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SemiconductorComponentsIndustries,LLC,2016September,2018Rev.
111PublicationOrderNumber:MT9M021/DMT9M021,MT9M031MT9M021/MT9M0311/3‐inchCMOSDigitalImageSensorDescriptionTheMT9M021/MT9M031fromONSemiconductorisa1/3-inchCMOSdigitalimagesensorwithanactive-pixelarrayof1280(H)*960(V).
Itincludessophisticatedcamerafunctionssuchasautoexposurecontrol,windowing,scaling,rowskipmode,andbothvideoandsingleframemodes.
Itisdesignedforlowlightperformanceandfeaturesaglobalshutterforaccuratecaptureofmovingscenes.
Itisprogrammablethroughasimpletwo-wireserialinterface.
TheMT9M021/MT9M031producesextraordinarilyclear,sharpdigitalpictures,anditsabilitytocapturebothcontinuousvideoandsingleframesmakesittheperfectchoiceforawiderangeofapplications,includingscanningandHDvideo.
Table1.
KEYPERFORMANCEPARAMETERSParameterTypicalValueOpticalFormat1/3-inch(6mm)ActivePixels1280(H)*960(V)=1.
2MpPixelSize3.
75mmColorFilterArrayRGBBayerorMonochromeShutterTypeGlobalShutterInputClockRange6–50MHzOutputPixelClock(Maximum)74.
25MHzOutputSerialParallelHiSPi(iBGAPackageOnly)12-bitFrameRateFullResolution720p45fps60fpsResponsivityMonochromeColor6.
1V/luxsec5.
3V/luxsecSNRMAX38dBDynamicRange64dBSupplyVoltageI/ODigitalAnalogHiSPi1.
8or2.
8V1.
8V2.
8V0.
4VPowerConsumption<400mWOperatingTemperature(Ambient)–30°Cto+70°CPackageOptions9*9mm63-piniBGA10*10mm48-piniLCCwww.
onsemi.
comFeaturesSuperiorLow-lightPerformanceHDVideo(720p60)GlobalShutterVideo/SingleFrameModeFlexibleRow-skipModesOn-chipAEandStatisticsEngineParallelandSerialOutputSupportforExternalLEDorFlashAutoBlackLevelCalibrationContextSwitchingApplicationsSceneProcessingScanningandMachineVision720p60VideoApplicationsSeedetailedorderingandshippinginformationonpage2ofthisdatasheet.
ORDERINGINFORMATIONIBGA639y9CASE503AQILCC4810y10CASE847AJMT9M021,MT9M031www.
onsemi.
com2ORDERINGINFORMATIONTable2.
AVAILABLEPARTNUMBERSPartNumberProductDescriptionOrderableProductAttributeDescriptionMT9M021IA3XTCDPBR11.
2MP1/3"GSCISBayeriBGA;CRA=0°;DryPackwithProtectiveFilm,DoubleSideBBARGlassMT9M021IA3XTCDRBR1.
2MP1/3"GSCISBayeriBGA;CRA=0°;DryPackwithoutProtectiveFilm,DoubleSideBBARGlassMT9M021IA3XTMDPBR11.
2MP1/3"GSCISMonoiBGA;CRA=0°;DryPackwithProtectiveFilm,DoubleSideBBARGlassMT9M021IA3XTMDRBR11.
2MP1/3"GSCISMonoiBGA;CRA=0°;DryPackwithoutProtectiveFilm,DoubleSideBBARGlassMT9M021IA3XTMZDPBR1.
2MP1/3"GSCISMonoiBGA;CRA25°;DryPackwithProtectiveFilm,DoubleSideBBARGlassMT9M021IA3XTMZDRBR1.
2MP1/3"GSCISMonoiBGA;CRA25°;DryPackwithoutProtectiveFilm,DoubleSideBBARGlassMT9M021IA3XTMZTPBR1.
2MP1/3"GSCISMonoiBGA;CRA25°;Tape&ReelwithProtectiveFilm,DoubleSideBBARGlassMT9M031D00STMC24BC12001.
2MP1/3"GSCISMono;CRA=0°;DieSales,200mmThicknessMT9M031I12STCDPBR11.
2MP1/3"GSCISBayeriLCC;CRA=0°;DryPackwithProtectiveFilm,DoubleSideBBARGlassMT9M031I12STCDRBR1.
2MP1/3"GSCISBayeriLCC;CRA=0°;DryPackwithoutProtectiveFilm,DoubleSideBBARGlassMT9M031I12STMDPBR1.
2MP1/3"GSCISMonoiLCC;CRA=0°;DryPackwithProtectiveFilm,DoubleSideBBARGlassMT9M031I12STMDRBR11.
2MP1/3"GSCISMonoiLCC;CRA=0°;DryPackwithoutProtectiveFilm,DoubleSideBBARGlassMT9M031I12STMZDRBR1.
2MP1/3"GSCISMonoiLCC;CRA=25°;DryPackwithoutProtectiveFilm,DoubleSideBBARGlassSeetheONSemiconductorDeviceNomenclaturedocument(TND310/D)forafulldescriptionofthenamingconventionusedforimagesensors.
Forreferencedocumentation,includinginformationonevaluationkits,pleasevisitourwebsiteatwww.
onsemi.
com.
GENERALDESCRIPTIONTheONSemiconductorMT9M021/MT9M031canbeoperatedinitsdefaultmodeorprogrammedforframesize,exposure,gain,andotherparameters.
Thedefaultmodeoutputisafull-resolutionimageat45framespersecond(fps).
Itoutputs12-bitrawdata,usingeithertheparallelorserial(HiSPi)outputports.
Thedevicemaybeoperatedinvideo(master)modeorinframetriggermode.
FRAME_VALIDandLINE_VALIDsignalsareoutputondedicatedpins,alongwithasynchronizedpixelclock.
AdedicatedFLASHpincanbeprogrammedtocontrolexternalLEDorflashexposureillumination.
TheMT9M021/MT9M031includesadditionalfeaturestoallowapplication-specifictuning:windowing,adjustableauto-exposurecontrol,autoblacklevelcorrection,on-boardtemperaturesensor,androwskipanddigitalbinningmodes.
Thesensorisdesignedtooperateinawidetemperaturerange(–30°Cto+70°C).
FUNCTIONALOVERVIEWTheMT9M021/MT9M031isaprogressive-scansensorthatgeneratesastreamofpixeldataataconstantframerate.
Itusesanon-chip,phase-lockedloop(PLL)thatcanbeoptionallyenabledtogenerateallinternalclocksfromasinglemasterinputclockrunningbetween6and50MHz.
Themaximumoutputpixelrateis74.
25Mp/s,correspondingtoaclockrateof74.
25MHz.
Figure1showsablockdiagramofthesensor.
MT9M021,MT9M031www.
onsemi.
com3Figure1.
BlockDiagramControlRegistersAnalogProcessingandA/DConversionActivePixelSensor(APS)ArrayPixelDataPath(SignalProcessing)TimingandControl(Sequencer)AutoExposureandStatsEngineTemperatureSensorOTPMMemoryPLLExternalClockSerialOutputParallelOutputFlashTriggerTwo-wireSerialInterfacePowerUserinteractionwiththesensoristhroughthetwo-wireserialbus,whichcommunicateswiththearraycontrol,analogsignalchain,anddigitalsignalchain.
Thecoreofthesensorisa1.
2MpActive-PixelSensorarray.
TheMT9M021/MT9M031featuresglobalshuttertechnologyforaccuratecaptureofmovingimages.
Theexposureoftheentirearrayiscontrolledbyprogrammingtheintegrationtimebyregistersetting.
Allrowssimultaneouslyintegratelightpriortoreadout.
Oncearowhasbeenread,thedatafromthecolumnsissequencedthroughananalogsignalchain(providingoffsetcorrectionandgain),andthenthroughananalog-to-digitalconverter(ADC).
TheoutputfromtheADCisa12-bitvalueforeachpixelinthearray.
TheADCoutputpassesthroughadigitalprocessingsignalchain(whichprovidesfurtherdatapathcorrectionsandappliesdigitalgain).
Thepixeldataareoutputatarateofupto74.
25Mp/s,inparalleltoframeandlinesynchronizationsignals.
FEATURESOVERVIEWTheMT9M021/MT9M031GlobalSensorshutterhasawidearrayoffeaturestoenhancefunctionalityandtoincreaseversatility.
Asummaryoffeaturesfollows.
PleaserefertotheMT9M021/MT9M031DeveloperGuidefordetailedfeaturedescriptions,registersettings,andtuningguidelinesandrecommendations.
OperatingModesTheMT9M021/MT9M031worksinmaster(video),trigger(singleframe),orAutoTriggermodes.
Inmastermode,thesensorgeneratestheintegrationandreadouttiming.
Intriggermode,itacceptsanexternaltriggertostartexposure,thengeneratestheexposureandreadouttiming.
Theexposuretimeisprogrammedthroughthetwo-wireserialinterfaceforbothmodes.
NOTE:TriggermodeisnotcompatiblewiththeHiSPiinterface.
WindowControlConfigurablewindowsizeandblankingtimesallowawiderangeofresolutionsandframerates.
Digitalbinningandskippingmodesaresupported,asareverticalandhorizontalmirroroperations.
ContextSwitchingContextswitchingmaybeusedtorapidlyswitchbetweentwosetsofregistervalues.
RefertotheMT9M021/MT9M031DeveloperGuideforacompletesetofcontextswitchableregisters.
GainTheMT9M021/MT9M031GlobalShuttersensorcanbeconfiguredforanaloggainofupto8x,anddigitalgainofupto8x.
AutomaticExposureControlTheintegratedautomaticexposurecontrolmaybeusedtoensureoptimalsettingsofexposureandgainarecomputedandupdatedeveryotherframe.
RefertotheMT9M021/MT9M031DeveloperGuideformoredetails.
HiSPiTheMT9M021/MT9M031GlobalShutterimagesensorsupportstwoorthreelanesofStreaming-SPorPacketized-SPprotocolsofONSemiconductor'sHigh-SpeedSerialPixelInterface.
MT9M021,MT9M031www.
onsemi.
com4PLLAnonchipPLLprovidesreferenceclockflexibilityandsupportsspreadspectrumsourcesforimprovedEMIperformance.
ResetTheMT9M021/MT9M031mayberesetbyaregisterwrite,orbyadedicatedinputpin.
OutputEnableTheMT9M021/MT9M031outputpinsmaybetri-statedusingadedicatedoutputenablepin.
TemperatureSensorThetemperaturesensorisonlyguaranteedtobefunctionalwhentheMT9M021/MT9M031isinitiallypowereduporisresetattemperaturesatorabove0°C.
BlackLevelCorrectionRowNoiseCorrectionColumnCorrectionTestPatternsSeveraltestpatternsmaybeenabledfordebugpurposes.
Theseincludeasolidcolor,colorbar,fadetogrey,andawalking1stestpattern.
MT9M021,MT9M031www.
onsemi.
com5TYPICALCONFIGURATIONANDPINOUTFigure2.
Serial4-laneHiSPiInterface1.
Allpowersuppliesmustbeadequatelydecoupled.
2.
ONSemiconductorrecommendsaresistorvalueof1.
5kW,butagreatervaluemaybeusedforslowertwo-wirespeed.
3.
Thispull-upresistorisnotrequiredifthecontrollerdrivesavalidlogiclevelonSCLKatalltimes.
4.
Theparallelinterfaceoutputpadscanbeleftunconnectediftheserialoutputinterfaceisused.
5.
ONSemiconductorrecommendsthat0.
1mFand10mFdecouplingcapacitorsforeachpowersupplyaremountedascloseaspossibletothepad.
Actualvaluesandresultsmayvarydependingonthelayoutanddesignconsiderations.
RefertotheMT9M021/MT9M031demoheadboardschematicsforcircuitrecommendations.
6.
ONSemiconductorrecommendsthatanalogpowerplanesbeplacedinamannersuchthatcouplingwiththedigitalpowerplanesismini-mized.
7.
Although4seriallanesareshown,theMT9M021/MT9M031supportsonly2-or3-laneHiSPi.
Notes:FLASHSLVS0_PSLVS0_NSLVS1_PSLVS1_NSLVS2_PSLVS2_NVDD_PLLVDD_IOVAAVAA_PIXAGNDDGNDVAA_PIXVAAVDD_IOVDDSDATASCLKEXTCLK1.
5kW21.
5kW2,3OE_BARRESET_BARTESTToControllerFromControllerMasterClock(650MHz)DigitalI/OPower1DigitalCorePower1AnalogPower1AnalogPower1AnalogGroundDigitalGroundSTANDBYVDD_SLVSHiSPiPower1VDD_PLLPLLPower1SLVS3_PSLVS3_NSLVSC_PSLVSC_NVDDVDD_SLVS77MT9M021,MT9M031www.
onsemi.
com6Figure3.
ParallelPixelDataInterface1.
Allpowersuppliesmustbeadequatelydecoupled.
2.
ONSemiconductorrecommendsaresistorvalueof1.
5kW,butagreatervaluemaybeusedforslowertwo-wirespeed.
3.
Thispull-upresistorisnotrequiredifthecontrollerdrivesavalidlogiclevelonSCLKatalltimes.
4.
Theserialinterfaceoutputpadscanbeleftunconnectediftheparalleloutputinterfaceisused.
5.
ONSemiconductorrecommendsthat0.
1mFand10mFdecouplingcapacitorsforeachpowersupplyaremountedascloseaspossibletothepad.
Actualvaluesandresultsmayvarydependingonthelayoutanddesignconsiderations.
RefertotheMT9M021/MT9M031demoheadboardschematicsforcircuitrecommendations.
6.
ONSemiconductorrecommendsthatanalogpowerplanesbeplacedinamannersuchthatcouplingwiththedigitalpowerplanesismini-mized.
Notes:FRAME_VALIDLINE_VALIDPIXCLKFLASHVDD_IOVDDVAAVAA_PIXAGNDDGNDVAA_PIXVAAVDD_IOVDDEXTCLKSDATASCLK1.
5kW21.
5kW2,3TRIGGEROE_BARRESET_BARTESTToControllerFromControllerMasterClock(650MHz)DigitalI/OPower1DigitalCorePower1AnalogPower1AnalogPower1AnalogGroundDigitalGroundDOUT[11:0]STANDBYPLLPower1VDD_PLLVDD_PLLMT9M021,MT9M031www.
onsemi.
com7Figure4.
9y9mm63-balliBGAPackageTopView(BallDown)ABCDEFGH12345678VDD_PLLEXTCLKSADDRLINE_VALIDDOUT8DOUT4DOUT0SLVSCNVDD_SLVSSCLKFRAME_VALIDDOUT9DOUT5DOUT1SLVS0NSLVSCPSLVS3NSDATAPIXCLKDOUT10DOUT6DOUT2SLVS0PSLVS2NSLVS3PDGNDFLASHDOUT11DOUT7DOUT3SLVS1NSLVS2PDGNDDGNDDGNDDGNDDGNDDGNDSLVS1PVDDVDDVDDVDD_IOVDD_IOVDD_IOVDD_IOVDDVAAAGNDVAA_PIXRESERVEDTESTTRIGGERVDD_IOVDDVAAAGNDVAA_PIXRESERVEDRESERVEDOE_BARRESET_BARSTANDBYTable3.
PINDESCRIPTIONS63-BALLIBGAPACKAGENameiBGAPinTypeDescriptionSLVS0_NA2OutputHiSPiserialdata,lane0,differentialNSLVS0_PA3OutputHiSPiserialdata,lane0,differentialPSLVS1_NA4OutputHiSPiserialdata,lane1,differentialNSLVS1_PA5OutputHiSPiserialdata,lane1,differentialPSTANDBYA8InputStandby-modeenablepin(activeHIGH)VDD_PLLB1PowerPLLpowerSLVSC_NB2OutputHiSPiserialDDRclockdifferentialNMT9M021,MT9M031www.
onsemi.
com8Table3.
PINDESCRIPTIONS63-BALLIBGAPACKAGE(continued)NameDescriptionTypeiBGAPinSLVSC_PB3OutputHiSPiserialDDRclockdifferentialPSLVS2_NB4OutputHiSPiserialdata,lane2,differentialNSLVS2_PB5OutputHiSPiserialdata,lane2,differentialPVAAB7,B8PowerAnalogpowerEXTCLKC1InputExternalinputclockVDD_SLVSC2PowerHiSPipowerSLVS3_NC3OutputHiSPiserialdata,lane3,differentialNSLVS3_PC4OutputHiSPiserialdata,lane3,differentialPDGNDC5,D4,D5,E5,F5,G5,H5PowerDigitalGNDVDDA6,A7,B6,C6,D6PowerDigitalpowerAGNDC7,C8PowerAnalogGNDSADDRD1InputTwo-WireSerialaddressselectSCLKD2InputTwo-WireSerialclockinputSDATAD3I/OTwo-WireSerialdataI/OVAA_PIXD7,D8PowerPixelpowerLINE_VALIDE1OutputAssertedwhenDOUTlinedataisvalidFRAME_VALIDE2OutputAssertedwhenDOUTframedataisvalidPIXCLKE3OutputPixelclockout.
DOUTisvalidonrisingedgeofthisclockFLASHE4OutputControlsignaltodriveexternallightsourcesVDD_IOE6,F6,G6,H6,H7PowerI/OsupplypowerDOUT8F1OutputParallelpixeldataoutputDOUT9F2OutputParallelpixeldataoutputDOUT10F3OutputParallelpixeldataoutputDOUT11F4OutputParallelpixeldataoutput(MSB)TESTF7InputManufacturingtestenablepin(connecttoDGND)DOUT4G1OutputParallelpixeldataoutputDOUT5G2OutputParallelpixeldataoutputDOUT6G3OutputParallelpixeldataoutputDOUT7G4OutputParallelpixeldataoutputTRIGGERG7InputExposuresynchronizationinputOE_BARG8InputOutputenable(activeLOW)DOUT0H1OutputParallelpixeldataoutput(LSB)DOUT1H2OutputParallelpixeldataoutputDOUT2H3OutputParallelpixeldataoutputDOUT3H4OutputParallelpixeldataoutputRESET_BARH8InputAsynchronousreset(activeLOW).
AllsettingsarerestoredtofactorydefaultReservedE7,E8,F8N/AReserved(donotconnect)MT9M021,MT9M031www.
onsemi.
com9Figure5.
10y10mm48-piniLCCPackage,ParallelOutput42NC741NC840VAA939AGND1038VAA_PIX1137VAA_PIX1236VAA1335AGND1434VAA1533Reserved1632Reserved17VDD_IO31Reserved18DOUT7DOUT8DOUT9DOUT10DOUT11VDD_IOPIXCLKVDDSCLKSDATARESET_BARVDD6DGND19NC5EXTCLK20NC4VDD_PLL21STANDBY3DOUT622OE_BAR2DOUT523SADDR1DOUT424TEST48DOUT325FLASH47DOUT226TRIGGER46DOUT127FRAME_VALID45DOUT028LINE_VALID44DGND29DGND43NC30Table4.
PINDESCRIPTIONS48-PINILCCPACKAGE,PARALLELPinNumberNameTypeDescription1DOUT4OutputParallelpixeldataoutput2DOUT5OutputParallelpixeldataoutput3DOUT6OutputParallelpixeldataoutput4VDD_PLLPowerPLLpower5EXTCLKInputExternalinputclock6DGNDPowerDigitalground7DOUT7OutputParallelpixeldataoutput8DOUT8OutputParallelpixeldataoutput9DOUT9OutputParallelpixeldataoutputMT9M021,MT9M031www.
onsemi.
com10Table4.
PINDESCRIPTIONS48-PINILCCPACKAGE,PARALLEL(continued)PinNumberDescriptionTypeName10DOUT10OutputParallelpixeldataoutput11DOUT11OutputParallelpixeldataoutput(MSB)12VDD_IOPowerI/Osupplypower13PIXCLKOutputPixelclockout.
DOUTisvalidonrisingedgeofthisclock14VDDPowerDigitalpower15SCLKInputTwo-WireSerialclockinput16SDATAI/OTwo-WireSerialdataI/O17RESET_BARInputAsynchronousreset(activeLOW).
Allsettingsarerestoredtofactorydefault18VDD_IOPowerI/Osupplypower19VDDPowerDigitalpower20NCNoconnection21NCNoconnection22STANDBYInputStandby-modeenablepin(activeHIGH)23OE_BARInputOutputenable(activeLOW)24SADDRInputTwo-WireSerialaddressselect25TESTInputManufacturingtestenablepin(connecttoDGND)26FLASHOutputFlashoutputcontrol27TRIGGERInputExposuresynchronizationinput28FRAME_VALIDOutputAssertedwhenDOUTframedataisvalid29LINE_VALIDOutputAssertedwhenDOUTlinedataisvalid30DGNDPowerDigitalground31ReservedN/AReserved(donotconnect)32ReservedN/AReserved(donotconnect)33ReservedN/AReserved(donotconnect)34VAAPowerAnalogpower35AGNDPowerAnalogground36VAAPowerAnalogpower37VAA_PIXPowerPixelpower38VAA_PIXPowerPixelpower39AGNDPowerAnalogground40VAAPowerAnalogpower41NCNoconnection42NCNoconnection43NCNoconnection44DGNDPowerDigitalground45DOUT0OutputParallelpixeldataoutput(LSB)46DOUT1OutputParallelpixeldataoutput47DOUT2OutputParallelpixeldataoutput48DOUT3OutputParallelpixeldataoutputMT9M021,MT9M031www.
onsemi.
com11ELECTRICALSPECIFICATIONSUnlessotherwisestated,thefollowingspecificationsapplytothefollowingconditions:VDD=1.
8V–0.
10/+0.
15;VDD_IO=VDD_PLL=VAA=VAA_PIX=2.
8V±0.
3V;VDD_SLVS=0.
4V–0.
1/+0.
2;TA=30°Cto+70°C;OutputLoad=10pF;PIXCLKFrequency=74.
25MHz;HiSPioff.
Two-WireSerialRegisterInterfaceTheelectricalcharacteristicsofthetwo-wireserialregisterinterface(SCLK,SDATA)areshowninFigure6andTable5.
Figure6.
Two-WireSerialBusTimingParametersSDATASCLKSSrPStftrtftrtSU;DATtHD;STAtSU;STOtSU;STAtBUFtHD;DATtHIGHtLOWtHD;STANOTE:Readsequence:Foran8-bitREAD,readwaveformsstartafterWRITEcommandandregisteraddressareissued.
Table5.
TWO-WIRESERIALBUSCHARACTERISTICS(fEXTCLK=27MHz;VDD=1.
8V;VDD_IO=2.
8V;VAA=2.
8V;VAA_PIX=2.
8V;VDD_PLL=2.
8V;TA=25°C)ParameterSymbolStandardModeFast-ModeUnitMinMaxMinMaxSCLKClockFrequencyfSCL01000400kHzHoldTime(Repeated)STARTConditiontHD;STA4.
00.
6msLOWPeriodoftheSCLKClocktLOW4.
71.
3msHIGHPeriodoftheSCLKClocktHIGH4.
00.
6msSet-upTimeforaRepeatedSTARTConditiontSU;STA4.
70.
6msDataHoldTimetHD;DAT0(Note4)3.
45(Note5)0(Note6)0.
9(Note5)msDataSet-upTimetSU;DAT250100(Note6)nsRiseTimeofbothSDATAandSCLKSignalstr100020+0.
1Cb(Note7)300nsFallTimeofbothSDATAandSCLKSignalstf30020+0.
1Cb(Note7)300nsSet-upTimeforSTOPConditiontSU;STO4.
00.
6msBusFreeTimebetweenaSTOPandSTARTConditiontBUF4.
71.
3msCapacitiveLoadforeachBusLineCb400400pFSerialInterfaceInputPinCapaci-tanceCIN_SI3.
33.
3pFMT9M021,MT9M031www.
onsemi.
com12Table5.
TWO-WIRESERIALBUSCHARACTERISTICS(continued)(fEXTCLK=27MHz;VDD=1.
8V;VDD_IO=2.
8V;VAA=2.
8V;VAA_PIX=2.
8V;VDD_PLL=2.
8V;TA=25°C)ParameterUnitFast-ModeStandardModeSymbolParameterUnitMaxMinMaxMinSymbolSDATAMaxLoadCapacitanceCLOAD_SD3030pFSDATAPull-upResistorRSD1.
54.
71.
54.
7kW1.
ThistableisbasedonI2Cstandard(v2.
1January2000).
PhilipsSemiconductor.
2.
Two-wirecontrolisI2C-compatible.
3.
AllvaluesreferredtoVIHmin=0.
9VDD_IOandVILmax=0.
1VDD_IOlevels.
SensorEXCLK=27MHz.
4.
Adevicemustinternallyprovideaholdtimeofatleast300nsfortheSDATAsignaltobridgetheundefinedregionofthefallingedgeofSCLK.
5.
ThemaximumtHD;DAThasonlytobemetifthedevicedoesnotstretchtheLOWperiod(tLOW)oftheSCLKsignal.
6.
AFast-modeI2C-busdevicecanbeusedinaStandard-modeI2C-bussystem,buttherequirementtSU;DAT250nsmustthenbemet.
ThiswillautomaticallybethecaseifthedevicedoesnotstretchtheLOWperiodoftheSCLKsignal.
IfsuchadevicedoesstretchtheLOWperiodoftheSCLKsignal,itmustoutputthenextdatabittotheSDATAlinetrmax+tSU;DAT=1000+250=1250ns(accordingtotheStandard-modeI2C-busspecification)beforetheSCLKlineisreleased.
7.
Cb=totalcapacitanceofonebuslineinpF.
I/OTimingBydefault,theMT9M021/MT9M031launchespixeldata,FVandLVwiththefallingedgeofPIXCLK.
TheexpectationisthattheusercapturesDOUT[11:0],FVandLVusingtherisingedgeofPIXCLK.
ThelaunchedgeofPIXCLKcanbeconfiguredinregisterR0x3028.
SeeFigure7andTable6forI/Otiming(AC)characteristics.
Figure7.
I/OTimingDiagramEXTCLKPIXCLKData[11:0]LINE_VALID/FRAME_VALIDPxl_0Pxl_1Pxl_2Pxl_ntPFLtPLLtFPtRPtFtR90%90%90%90%10%10%10%10%tEXTCLKtPDtPLHtPFHFRAME_VALIDLeadsLINE_VALIDby6PIXCLKsFRAME_VALIDTrailsLINE_VALIDby6PIXCLKsMT9M021,MT9M031www.
onsemi.
com13Table6.
I/OTIMINGCHARACTERISTICS,PARALLELOUTPUT(1.
8VVDD_IO)(Note1)SymbolDefinitionConditionMinTypMaxUnitfEXTCLKInputClockFrequency650MHztEXTCLKInputClockPeriod20166nstRInputClockRiseTimePLLEnabled34nstFInputClockFallTimePLLEnabled34nstRPPIXCLKRiseTimeSlewSetting=4(Default)2.
34.
6nstFPPIXCLKFallTimeSlewSetting=4(Default)34.
4nsPIXCLKDutyCycle405060%fPIXCLKPIXCLKFrequency(Note2)NominalVoltages,PLLEnabled674.
25MHztPDPIXCLKtoDataValidNominalVoltages,PLLEnabled32.
34.
5nstPFHPIXCLKtoFVHIGHNominalVoltages,PLLEnabled31.
54.
5nstPLHPIXCLKtoLVHIGHNominalVoltages,PLLEnabled32.
34.
5nstPFLPIXCLKtoFVLOWNominalVoltages,PLLEnabled31.
54.
5nstPLLPIXCLKtoLVLOWNominalVoltages,PLLEnabled324.
5ns1.
Minimumandmaximumvaluesaretakenatthetemperatureandvoltagelimits;forinstance,70°Cambientat90%ofVDD_IO,and30°Cat110%ofVDD_IO.
Allvaluesaretakenatthe50%transitionpoint.
Theloadingusedis20pF.
2.
JitterfromPIXCLKisalreadytakenintoaccountinthedataforalloftheoutputparameters.
Table7.
I/OTIMINGCHARACTERISTICS,PARALLELOUTPUT(2.
8VVDD_IO)(Note1)SymbolDefinitionConditionMinTypMaxUnitfEXTCLKInputClockFrequency650MHztEXTCLKInputClockPeriod20166nstRInputClockRiseTimePLLEnabled34nstFInputClockFallTimePLLEnabled34nstRPPIXCLKRiseTimeSlewSetting=4(Default)2.
34.
6nstFPPIXCLKFallTimeSlewSetting=4(Default)34.
4nsPIXCLKDutyCycle405060%fPIXCLKPIXCLKFrequency(Note2)NominalVoltages,PLLEnabled674.
25MHztPDPIXCLKtoDataValidNominalVoltages,PLLEnabled32.
34nstPFHPIXCLKtoFVHIGHNominalVoltages,PLLEnabled31.
54nstPLHPIXCLKtoLVHIGHNominalVoltages,PLLEnabled32.
34nstPFLPIXCLKtoFVLOWNominalVoltages,PLLEnabled31.
54nstPLLPIXCLKtoLVLOWNominalVoltages,PLLEnabled324ns1.
Minimumandmaximumvaluesaretakenatthetemperatureandvoltagelimits;forinstance,70°Cambientat90%ofVDD_IO,and30°Cat110%ofVDD_IO.
Allvaluesaretakenatthe50%transitionpoint.
Theloadingusedis20pF.
2.
JitterfromPIXCLKisalreadytakenintoaccountinthedataforalloftheoutputparameters.
Table8.
I/ORISESLEWRATE(2.
8VVDD_IO)(Note1)ParallelSlew(R0x306E[15:13])ConditionMinTypMaxUnit7Default1.
081.
772.
72V/ns6Default0.
771.
261.
94V/ns5Default0.
580.
951.
46V/ns4Default0.
440.
701.
08V/ns3Default0.
320.
510.
78V/ns2Default0.
230.
370.
56V/ns1Default0.
160.
250.
38V/ns0Default0.
100.
150.
22V/ns1.
Minimumandmaximumvaluesaretakenatthetemperatureandvoltagelimits;forinstance,70°Cambientat90%ofVDD_IO,and30°Cat110%ofVDD_IO.
Allvaluesaretakenatthe50%transitionpoint.
Theloadingusedis20pF.
MT9M021,MT9M031www.
onsemi.
com14Table9.
I/OFALLSLEWRATE(2.
8VVDD_IO)(Note1)ParallelSlew(R0x306E[15:13])ConditionMinTypMaxUnit7Default1.
001.
622.
41V/ns6Default0.
761.
241.
88V/ns5Default0.
600.
981.
50V/ns4Default0.
460.
751.
16V/ns3Default0.
350.
560.
86V/ns2Default0.
250.
400.
61V/ns1Default0.
170.
270.
41V/ns0Default0.
110.
160.
24V/ns1.
Minimumandmaximumvaluesaretakenatthetemperatureandvoltagelimits;forinstance,70°Cambientat90%ofVDD_IO,and30°Cat110%ofVDD_IO.
Allvaluesaretakenatthe50%transitionpoint.
Theloadingusedis20pF.
Table10.
I/ORISESLEWRATE(1.
8VVDD_IO)(Note1)ParallelSlew(R0x306E[15:13])ConditionMinTypMaxUnit7Default0.
410.
651.
10V/ns6Default0.
300.
470.
79V/ns5Default0.
240.
370.
61V/ns4Default0.
190.
280.
46V/ns3Default0.
140.
210.
34V/ns2Default0.
100.
150.
24V/ns1Default0.
070.
100.
16V/ns0Default0.
040.
060.
10V/ns1.
Minimumandmaximumvaluesaretakenatthetemperatureandvoltagelimits;forinstance,70°Cambientat90%ofVDD_IO,and30°Cat110%ofVDD_IO.
Allvaluesaretakenatthe50%transitionpoint.
Theloadingusedis20pF.
Table11.
I/OFALLSLEWRATE(1.
8VVDD_IO)(Note1)ParallelSlew(R0x306E[15:13])ConditionMinTypMaxUnit7Default0.
420.
681.
11V/ns6Default0.
320.
510.
84V/ns5Default0.
260.
410.
67V/ns4Default0.
200.
320.
52V/ns3Default0.
160.
240.
39V/ns2Default0.
120.
180.
28V/ns1Default0.
080.
120.
19V/ns0Default0.
050.
070.
11V/ns1.
Minimumandmaximumvaluesaretakenatthetemperatureandvoltagelimits;forinstance,70°Cambientat90%ofVDD_IO,and30°Cat110%ofVDD_IO.
Allvaluesaretakenatthe50%transitionpoint.
Theloadingusedis20pF.
MT9M021,MT9M031www.
onsemi.
com15DCElectricalCharacteristicsTheDCelectricalcharacteristicsareshowninTable12,Table13,Table14,andTable15.
Table12.
DCELECTRICALCHARACTERISTICSSymbolDefinitionConditionMinTypMaxUnitVDDCoreDigitalVoltage1.
71.
81.
95VVDD_IOI/ODigitalVoltage1.
7/2.
51.
8/2.
81.
9/3.
1VVAAAnalogVoltage2.
52.
83.
1VVAA_PIXPixelSupplyVoltage2.
52.
83.
1VVDD_PLLPLLSupplyVoltage2.
52.
83.
1VVDD_SLVSHiSPiSupplyVoltage0.
30.
40.
6VVIHInputHIGHVoltageVDD_IO*0.
7––VVILInputLOWVoltage––VDD_IO*0.
3VIINInputLeakageCurrentNoPull-upResistor;VIN=VDD_IOorDGND20––mAVOHOutputHIGHVoltageVDD_IO–0.
3––VVOLOutputLOWVoltageVDD_IO=2.
8V––0.
4VIOHOutputHIGHCurrentAtSpecifiedVOH–22––mAIOLOutputLOWCurrentAtSpecifiedVOL––22mACAUTION:StressesgreaterthanthoselistedinTable13maycausepermanentdamagetothedevice.
Thisisastressratingonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthisspecificationisnotimplied.
Table13.
ABSOLUTEMAXIMUMRATINGSSymbolParameterMinimumMaximumUnitVSUPPLYPowerSupplyVoltage(AllSupplies)–0.
34.
5VISUPPLYTotalPowerSupplyCurrent–200mAIGNDTotalGroundCurrent–200mAVINDCInputVoltage–0.
3VDD_IO+0.
3VVOUTDCOutputVoltage–0.
3VDD_IO+0.
3VTSTGStorageTemperature(Note1)–40+85°CStressesexceedingthoselistedintheMaximumRatingstablemaydamagethedevice.
Ifanyoftheselimitsareexceeded,devicefunctionalityshouldnotbeassumed,damagemayoccurandreliabilitymaybeaffected.
1.
Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectreliability.
Table14.
OPERATINGCURRENTCONSUMPTIONFORPARALLELOUTPUT(VAA=VAA_PIX=VDD_IO=VDD_PLL=2.
8V;VDD=1.
8V;PLLEnabledandPIXCLK=74.
25MHz;TA=25°C;CLOAD=10pF)SymbolParameterConditionMinTypMaxUnitIDDDigitalOperatingCurrentParallel,Streaming,FullResolution45fps4555mAIDD_IOI/ODigitalOperatingCurrentParallel,Streaming,FullResolution45fps50(Note1)–mAIAAAnalogOperatingCurrentParallel,Streaming,FullResolution45fps4550mAIAA_PIXPixelSupplyCurrentParallel,Streaming,FullResolution45fps610mAIDD_PLLPLLSupplyCurrentParallel,Streaming,FullResolution45fps68mA1.
IDD_IOoperatingcurrentisspecifiedwithimageat1/2saturationlevel.
MT9M021,MT9M031www.
onsemi.
com16Table15.
STANDBYCURRENTCONSUMPTION(AnalogVAA+VAA_PIX+VDD_PLL;DigitalVDD+VDD_IO;TA=25°C)DefinitionConditionMinTypMaxUnitHardStandby(ClockOff,DrivenLow)Analog,2.
8V–310mADigital,1.
8V–875mAHardStandby(ClockOn,EXTCLK=20MHz)Analog,2.
8V–1220mADigital,1.
8V–0.
871.
3mASoftStandby(ClockOff,DrivenLow)Analog,2.
8V–310mADigital,1.
8V–875mASoftStandby(ClockOn,EXTCLK=20MHz)Analog,2.
8V–1220mADigital,1.
8V–0.
871.
3mAHiSPiElectricalSpecificationsTheONSemiconductorMT9M021/MT9M031sensorsupportsSLVSmodeonly,anddoesnothaveaDLLfortimingadjustments.
RefertotheHigh-SpeedSerialPixel(HiSPi)InterfacePhysicalLayerSpecificationv2.
00.
00forelectricaldefinitions,specifications,andtiminginformation.
TheVDD_SLVSsupplyinthisdatasheetcorrespondstoVDD_TXintheHiSPiPhysicalLayerSpecification.
Similarly,VDDisequivalenttoVDD_HiSPiasreferencedinthespecification.
TheHiSPitransmitterelectricalspecificationsarelistedat700MHz.
Table16.
INPUTVOLTAGEANDCURRENT(HiSPiPOWERSUPPLY0.
4V)(MeasurementConditions:MaxFreq.
700MHz)SymbolParameterMinTypMaxUnitIDD_SLVSSupplyCurrent(PWRHiSPi)(Driving100WLoad)–1015mAVCMDHiSPiCommonModeVoltage(Driving100WLoad)VDD_SLVSx0.
45VDD_SLVS/2VDD_SLVSx0.
55V|VOD|HiSPiDifferentialOutputVoltage(Driving100WLoad)VDD_SLVSx0.
36VDD_SLVS/2VDD_SLVSx0.
64VDVCMChangeinVCMbetweenLogic1and025mV|VOD|Changein|VOD|betweenLogic1and025mVNMVODNoiseMargin–30%|DVCM|DifferenceinVCMbetweenanyTwoChannels50mV|DVOD|DifferenceinVODbetweenanyTwoChannels100mVDVCM_acCommon-modeACVoltage(pk)withoutVCMCapTermina-tion50mVDVCM_acCommon-modeACVoltage(pk)withVCMCapTermination30mVVOD_acMaxOvershootPeak|VOD|1.
3x|VOD|VVdiff_pkpkMaxOvershootVdiffpk-pk2.
6x|VOD|VVeyeEyeHeight1.
4xVODRoSingle-endedOutputImpedance355070WDRoOutputImpedanceMismatch20%MT9M021,MT9M031www.
onsemi.
com17Figure8.
DifferentialOutputVoltageforClockandDataPairsVDIFFminVDIFFmax0V(Diff)OutputSignalis'CpCn'or'DpDn'Table17.
RISEANDFALLTIMES(MeasurementConditions:HiSPiPowerSupply0.
4V,MaxFreq.
700MHz)SymbolParameterMinTypMaxUnit1/UIDataRate280–700Mb/sTxPREMaxSetupTimefromTransmitter(Note1)0.
3––UITxPostMaxHoldTimefromTransmitter0.
3––UIRISERiseTime(2080%)–0.
25UI–FALLFallTime(2080%)150ps0.
25UI–PLL_DUTYClockDuty455055%tpwBitratePeriod(Note1)1.
433.
57nsteyeEyeWidth(Notes1,2)0.
3UIttotaljitDataTotalJitter(pkpk)@1e9(Notes1,2)0.
2UItckjitClockPeriodJitter(RMS)(Note2)50pstcyjitClockCycletoCycleJitter(RMS)(Note2)100pstchskewClocktoDataSkew(Notes1,2)0.
10.
1UIt|PHYskew|PHY-to-PHYSkew(Notes1,5)2.
1UItDIFFSKEWMeanDifferentialSkew(Note6)–100100ps1.
OneUIisdefinedasthenormalizedmeantimebetweenoneedgeandthefollowingedgeoftheclock.
2.
Takenfrom0Vcrossingpoint.
3.
Alsodefinedwithamaximumloadingcapacitanceof10pFonanypin.
Theloadingcapacitancemayalsoneedtobelessforhigherbitratessotheriseandfalltimesdonotexceedthemaximum0.
3UI.
4.
TheabsolutemeanskewbetweentheClocklaneandanyDataLaneinthesamePHYbetweenanyedges.
5.
TheabsolutemeanskewbetweenanyClockinonePHYandanyDatalaneinanyotherPHYbetweenanyedges.
6.
Differentialskewisdefinedastheskewbetweencomplementaryoutputs.
ItismeasuredastheabsolutetimebetweenthetwocomplementaryedgesatmeanVCMpoint.
MT9M021,MT9M031www.
onsemi.
com18Figure9.
EyeDiagramforClockandDataSignalsDATAMASKCLOCKMASKTrigger/ReferenceUI/2UI/2RISEFALLVDIFFMaxVDIFFTxPreTxPost80%20%VDIFFCLKJITTERFigure10.
SkewwithinthePHYandOutputChannelsVCMDtCMPSKEWtCHSKEW1PHYMT9M021,MT9M031www.
onsemi.
com19POWER-ONRESETANDSTANDBYTIMINGPower-UpSequenceTherecommendedpower-upsequencefortheMT9M021/MT9M031isshowninFigure11.
Theavailablepowersupplies(VDD_IO,VDD,VDD_SLVS,VDD_PLL,VAA,VAA_PIX)musthavetheseparationspecifiedbelow.
1.
TurnonVDD_PLLpowersupply.
2.
After010ms,turnonVAAandVAA_PIXpowersupply.
3.
After010ms,turnonVDD_IOpowersupply.
4.
Afterthelastpowersupplyisstable,enableEXTCLK.
5.
AssertRESET_BARforatleast1ms.
6.
Wait150000EXTCLKs(forinternalinitializationintosoftwarestandby).
7.
ConfigurePLL,output,andimagesettingstodesiredvalues.
8.
Wait1msforthePLLtolock.
9.
Setstreamingmode(R0x301a[2]=1).
Figure11.
PowerUpEXTCLKVDD_SLVS(0.
4)VAA_PIXVAA(2.
8)VDD_IO(1.
8/2.
8)VDD(1.
8)VDD_PLL(2.
8)t0t1t2t3t4t5t6tXHardResetInternalIni-tializationSoftwareStandbyPLLLockStreamingRESET_BARTable18.
POWER-UPSEQUENCESymbolDefinitionMinTypMaxUnitt0VDD_PLLtoVAA/VAA_PIX010–mst1VAA/VAA_PIXtoVDD_IO010–mst2VDD_IOtoVDD010–mst3VDDtoVDD_SLVS010–mstXXtalSettleTime–30(Note1)–mst4HardReset1(Note2)––mst5InternalInitialization150000––EXTCLKst6PLLLockTime1––ms1.
Xtalsettlingtimeiscomponent-dependent,usuallytakingabout10–100ms.
2.
Hardresettimeistheminimumtimerequiredafterpowerrailsaresettled.
InacircuitwherehardresetishelddownbyRCcircuit,thentheRCtimemustincludetheallpowerrailsettletimeandXtalsettletime.
3.
ItiscriticalthatVDD_PLLisnotpoweredupaftertheotherpowersupplies.
Itmustbepoweredbeforeoratleastatthesametimeastheothers.
IfthecasehappensthatVDD_PLLispoweredafterothersuppliesthenthesensormayhavefunctionalityissuesandwillexperiencehighcurrentdrawonthissupply.
MT9M021,MT9M031www.
onsemi.
com20Power-DownSequenceTherecommendedpower-downsequencefortheMT9M021/MT9M031isshowninFigure12.
Theavailablepowersupplies(VDD_IO,VDD,VDD_SLVS,VDD_PLL,VAA,VAA_PIX)musthavetheseparationspecifiedbelow.
1.
DisablestreamingifoutputisactivebysettingstandbyR0x301a[2]=0.
2.
Thesoftstandbystateisreachedafterthecurrentroworframe,dependingonconfiguration,hasended.
3.
TurnoffVDD_SLVS.
4.
TurnoffVDD.
5.
TurnoffVDD_IO.
6.
TurnoffVAA/VAA_PIX.
7.
TurnoffVDD_PLL.
Figure12.
PowerDownEXTCLKVDD_PLL(2.
8)VDD_IO(1.
8/2.
8)VDD(1.
8)VDD_SLVS(0.
4)t0PowerDownuntilNextPowerUpCyclet1t2t3t4VAA_PIXVAA(2.
8)Table19.
POWER-DOWNSEQUENCESymbolParameterMinTypMaxUnitt0VDD_SLVStoVDD0––mst1VDDtoVDD_IO0––mst2VDD_IOtoVAA/VAA_PIX0––mst3VAA/VAA_PIXtoVDD_PLL0––mst4PwrDnuntilNextPwrUpTime100––ms1.
t4isrequiredbetweenpowerdownandnextpoweruptime;alldecouplingcapsfromregulatorsmustbecompletelydischarged.
MT9M021,MT9M031www.
onsemi.
com21Figure13.
QuantumEfficiencyMonochromeSensor010203040506070803504505506507508509501050QuantumEfficiency(%)Wavelength(nm)11001000900700600500400800Figure14.
QuantumEfficiencyColorSensor0102030405060703504505506507508509501050QuantumEfficiency(%)Wavelength(nm)RedGreenBlue4005006007008001000900IBGA639x9CASE503AQISSUEBDATE07APR2020SCALE1:1XXXX=SpecificDeviceCodeY=YearZZZ=LotTraceability*Thisinformationisgeneric.
Pleaserefertodevicedatasheetforactualpartmarking.
PbFreeindicator,"G"ormicrodot"G",mayormaynotbepresent.
SomeproductsmaynotfollowtheGenericMarking.
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