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SemiconductorComponentsIndustries,LLC,2015September,2017Rev.
01PublicationOrderNumber:CAT24S64/DCAT24S6464KbI2CCMOSSerialEEPROMwithSoftwareWriteProtectDescriptionTheCAT24S64isa64KbSerialCMOSEEPROM,internallyorganizedas8192wordsof8bitseach.
Itfeaturesa64bytepagewritebufferandsupportstheStandard(100kHz),Fast(400kHz)andFastPlus(1MHz)I2Cprotocol.
Thedevicefeaturesprogrammablesoftwarewriteprotectionwhichprovidespartialaswellasfullmemoryarrayprotection.
FeaturesSupportsStandard,FastandFastPlusI2CProtocol1.
7Vto5.
5VSupplyVoltageRange64BytePageWriteBufferUserProgrammableBlockWriteProtectionProtect1/4,1/2,3/4orEntireEEPROMArraySchmittTriggersandNoiseSuppressionFiltersonI2CBusInputs(SCLandSDA)LowPowerCMOSTechnology1,000,000Program/EraseCycles40YearDataRetentionIndustrialTemperatureRange:40°Cto+85°C4ballWLCSPPackageThisDeviceisPbFree,HalogenFree/BFRFreeandRoHSCompliant**Figure1.
FunctionalSymbolSDASCLCAT24S64VCCVSS**ForadditionalinformationonourPbFreestrategyandsolderingdetails,pleasedownloadtheONSemiconductorSolderingandMountingTechniquesReferenceManual,SOLDERRM/D.
www.
onsemi.
comPINCONFIGURATIONVCCVSSSDASeedetailedorderingandshippinginformationinthepackagedimensionssectiononpage11ofthisdatasheet.
ORDERINGINFORMATIONSCLWLCSP4(C4A)(TopView)SerialDataInput/OutputSDASerialClockInputSCLPowerSupplyVCCGroundVSSFunctionPinNamePINFUNCTIONWLCSP4C4ASUFFIXCASE567KVAB12F=SpecificDeviceCodeY=ProductionYear(LastDigit)M=ProductionMonth(19,O,N,D)FYMMARKINGDIAGRAMPin1CAT24S64www.
onsemi.
com2Table1.
ABSOLUTEMAXIMUMRATINGSParameterRatingUnitsStorageTemperature65to+150°CVoltageonAnyPinwithRespecttoGround(Note1)0.
5to+6.
5VStressesexceedingthoselistedintheMaximumRatingstablemaydamagethedevice.
Ifanyoftheselimitsareexceeded,devicefunctionalityshouldnotbeassumed,damagemayoccurandreliabilitymaybeaffected.
1.
Duringtransitions,voltageundershootonanypinshouldnotexceed1Vformorethan20ns.
VoltageovershootontheSCLandSDApinsshouldnotexceedtheabsolutemaximumratings,irrespectiveofVCC.
Table2.
RELIABILITYCHARACTERISTICS(Note2)SymbolParameterMinUnitsNEND(Note3)Endurance1,000,000Program/EraseCyclesTDR(Note4)DataRetention40Years2.
TheseparametersaretestedinitiallyandafteradesignorprocesschangethataffectstheparameteraccordingtoappropriateAECQ100andJEDECtestmethods.
3.
PageMode,VCC=5V,25°C4.
TA=55°CTable3.
DCANDACOPERATINGCONDITIONSSupplyVoltage/TemperatureRangeOperationVCC=1.
7Vto5.
5V/TA=40°Cto+85°CREAD/WRITEVCC=1.
6Vto5.
5V/TA=40°Cto+85°CREADVCC=1.
6Vto5.
5V/TA=0°Cto+85°CWRITETable4.
D.
C.
OPERATINGCHARACTERISTICSSymbolParameterTestConditionsMinMaxUnitsICCRReadCurrentRead,fSCL=400kHz/1MHz1mAICCWWriteCurrent2mAISBStandbyCurrentAllI/OPinsatGNDorVCCVCC≤2.
5V1mAVCC>2.
5V2ILI/OPinLeakagePinatGNDorVCC2mAVIL1InputLowVoltageVCC≥2.
5V0.
50.
3VCCVVIL2InputLowVoltageVCC<2.
5V0.
50.
25VCCVVIH1InputHighVoltageVCC≥2.
5V0.
7VCC5.
5VVIH2InputHighVoltageVCC<2.
5V0.
75VCC5.
5VVOL1OutputLowVoltageVCC≥2.
5V,IOL=3.
0mA0.
4VVOL2OutputLowVoltageVCC<2.
5V,IOL=1.
0mA0.
2VProductparametricperformanceisindicatedintheElectricalCharacteristicsforthelistedtestconditions,unlessotherwisenoted.
ProductperformancemaynotbeindicatedbytheElectricalCharacteristicsifoperatedunderdifferentconditions.
Table5.
PINIMPEDANCECHARACTERISTICSSymbolParameterConditionsMaxUnitsCIN(Note5)SDAI/OPinCapacitanceVIN=0V8pFCIN(Note5)InputCapacitance(otherpins)VIN=0V6pF5.
TheseparametersaretestedinitiallyandafteradesignorprocesschangethataffectstheparameteraccordingtoappropriateAECQ100andJEDECtestmethods.
CAT24S64www.
onsemi.
com3Table6.
A.
C.
CHARACTERISTICS(Note6)SymbolParameterStandardVCC<1.
7VFastVCC<1.
7VFastPlusVCC.
1.
7VUnitsMinMaxMinMaxMinMaxFSCLClockFrequency1004001,000kHztHD:STASTARTConditionHoldTime40.
60.
25mstLOWLowPeriodofSCLClock4.
71.
30.
45mstHIGHHighPeriodofSCLClock40.
60.
30mstSU:STASTARTConditionSetupTime4.
70.
60.
25mstHD:DATDataInHoldTime000mstSU:DATDataInSetupTime25010050nstR(Note7)SDAandSCLRiseTime1,00020300120nstF(Note7)SDAandSCLFallTime30020300120nstSU:STOSTOPConditionSetupTime40.
60.
25mstBUFBusFreeTimeBetweenSTOPandSTART4.
71.
30.
5mstAASCLLowtoDataOutValid3.
50.
90.
40mstDHDataOutHoldTime10010050nsTi(Note7)NoisePulseFilteredatSCLandSDAInputs1005050nstWRWriteCycleTime555mstPU(Notes7,8)Power-uptoReadyMode0.
350.
350.
35ms6.
Testconditionsaccordingto"A.
C.
TestConditions"table.
7.
Testedinitiallyandafteradesignorprocesschangethataffectsthisparameter.
8.
tPUisthedelaybetweenthetimeVCCisstableandthedeviceisreadytoacceptcommands.
Table7.
A.
C.
TESTCONDITIONSInputLevels0.
2xVCCto0.
8xVCCInputRiseandFallTimesv50nsInputReferenceLevels0.
3xVCC,0.
7xVCCOutputReferenceLevels0.
3xVCC,0.
7xVCCOutputLoadCurrentSource:IOL=3mA(VCC≥2.
5V);IOL=1mA(VCC<2.
5V);CL=100pFFigure2.
MaximumPullupResistancevs.
LoadCapacitanceLOADCAPACITANCE(pF)100100.
1110PULLUPRESISTANCE(kW)300nsRiseTime120nsRiseTimeSDAVCCRPVSSCLCAT24S64www.
onsemi.
com4PowerOnReset(POR)TheCAT24S64incorporatesPowerOnReset(POR)circuitrywhichprotectsthedeviceagainstpoweringupinthewrongstate.
TheCAT24S64willpowerupintoStandbymodeafterVCCexceedsthePORtriggerlevelandwillpowerdownintoResetmodewhenVCCdropsbelowthePORtriggerlevel.
ThisbidirectionalPORfeatureprotectsthedeviceagainst'brownout'failurefollowingatemporarylossofpower.
PinDescriptionSCL:TheSerialClockinputpinacceptstheSerialClockgeneratedbytheMaster.
SDA:TheSerialDataI/OpinreceivesinputdataandtransmitsdatastoredinEEPROM.
Intransmitmode,thispinisopendrain.
Dataisacquiredonthepositiveedge,andisdeliveredonthenegativeedgeofSCL.
FunctionalDescriptionTheCAT24S64supportstheInterIntegratedCircuit(I2C)Busdatatransmissionprotocol,whichdefinesadevicethatsendsdatatothebusasatransmitterandadevicereceivingdataasareceiver.
DataflowiscontrolledbyaMasterdevice,whichgeneratestheserialclockandallSTARTandSTOPconditions.
TheCAT24S64actsasaSlavedevice.
MasterandSlavealternateaseithertransmitterorreceiver.
I2CBusProtocolTheI2Cbusconsistsoftwo'wires',SCLandSDA.
ThetwowiresareconnectedtotheVCCsupplyviapullupresistors.
MasterandSlavedevicesconnecttothe2wirebusviatheirrespectiveSCLandSDApins.
ThetransmittingdevicepullsdowntheSDAlineto'transmit'a'0'andreleasesitto'transmit'a'1'.
Datatransfermaybeinitiatedonlywhenthebusisnotbusy(seeA.
C.
Characteristics).
Duringdatatransfer,theSDAlinemustremainstablewhiletheSCLlineisHIGH.
AnSDAtransitionwhileSCLisHIGHwillbeinterpretedasaSTARTorSTOPcondition(Figure3).
TheSTARTconditionprecedesallcommands.
ItconsistsofaHIGHtoLOWtransitiononSDAwhileSCLisHIGH.
TheSTARTactsasa'wakeup'calltoallreceivers.
AbsentaSTART,aSlavewillnotrespondtocommands.
TheSTOPconditioncompletesallcommands.
ItconsistsofaLOWtoHIGHtransitiononSDAwhileSCLisHIGH.
DeviceAddressingTheMasterinitiatesdatatransferbycreatingaSTARTconditiononthebus.
TheMasterthenbroadcastsan8bitserialSlaveaddress.
Thefirst4bitsoftheSlaveaddressaresetto1010,fornormalRead/Writeoperations(Figure4).
Thenext3bitsaresetto001.
Thelastbit,R/W,specifieswhetheraRead(1)orWrite(0)operationistobeperformed.
AcknowledgeAfterprocessingtheSlaveaddress,theSlaverespondswithanacknowledge(ACK)bypullingdowntheSDAlineduringthe9thclockcycle(Figure5).
TheSlavewillalsoacknowledgealladdressbytesandeverydatabytepresentedinWritemodeiftheaddressedlocationisnotwriteprotected.
InReadmodetheSlaveshiftsoutadatabyte,andthenreleasestheSDAlineduringthe9thclockcycle.
AslongastheMasteracknowledgesthedata,theSlavewillcontinuetransmitting.
TheMasterterminatesthesessionbynotacknowledgingthelastdatabyte(NoACK)andbyissuingaSTOPcondition.
BustimingisillustratedinFigure6.
CAT24S64www.
onsemi.
com5STARTCONDITIONSTOPCONDITIONSDASCLFigure3.
START/STOPConditions1010DEVICEADDRESSFigure4.
SlaveAddressBits001R/W189STARTSCLFROMMASTERBUSRELEASEDELAY(TRANSMITTER)ACKSETUP(≥tSU:DAT)BUSRELEASEDELAY(RECEIVER)DATAOUTPUTFROMTRANSMITTERDATAOUTPUTFROMRECEIVERFigure5.
AcknowledgeTimingACKDELAY(≤tAA)SCLSDAINSDAOUTFigure6.
BusTimingtSU:STAtHD:STAtHD:DATtFtLOWtAAtHIGHtLOWtRtDHtBUFtSU:DATtSU:STOCAT24S64www.
onsemi.
com6WriteOperationsByteWriteInByteWritemodetheMastersendsaSTART,followedbySlaveaddress,twobyteaddress(Table8)anddatatobewritten(Figure7).
TheSlave,CAT24S64acknowledgesall4bytes,andtheMasterthenfollowsupwithaSTOP,whichinturnstartstheinternalWriteoperation(Figure8).
DuringtheinternalWritecycle(tWR),theCAT24S64willnotacknowledgeanyReadorWriterequestfromtheMaster.
PageWriteTheCAT24S64contains8192bytesofdata,arrangedin128pagesof64byteseach.
Atwobyteaddressword(Table8),followingtheSlaveaddress,pointstothefirstbytetobewrittenintothememoryarray.
Themostsignificant7bitsfromtheaddressactivebits(a12toa6)identifythepageandthelast6bits(a5toa0)identifythebytewithinthepage.
Upto64bytescanbewritteninoneWritecycle(Figure9).
Theinternalbyteaddresscounterisautomaticallyincrementedaftereachdatabyteisloaded.
IftheMastertransmitsmorethan64databytes,thenearlierbyteswillbeoverwrittenbylaterbytesina'wraparound'fashion(withintheselectedpage).
TheinternalWritecyclestartsimmediatelyfollowingtheSTOP.
AcknowledgePollingTheready/busystatusoftheCAT24S64canbeascertainedbysendingReadorWriterequestsimmediatelyfollowingtheSTOPconditionthatinitiatedtheinternalWritecycle.
AslongasinternalWriteisinprogress,theCAT24S64willnotacknowledgetheSlaveaddress.
SoftwareWriteProtectionTheusercanselecttowrite-protectpartialorfullmemoryarraybywritingaspecificdataintotheWriteProtectRegister(WPR).
TheWPRislocatedoutsideofthe16Kbytesmemoryaddressingspace,ataddress1xxxxxxxxxxxxxxx.
ThesoftwarewriteprotectcontrolbitsfromtheWriteProtectRegisterareshowninTable9.
Thewriteprotectcontrolbits,b0tob3arenon-volatile.
TheWPEN(WriteProtectEnable)bitenablesthewriteprotectionwhenitissetto"1".
WhentheWPENbitis"0",thewholememoryarraycanbewritten.
TheBP0andBP1(BlockProtect)bitsdeterminewhichareaiswriteprotected.
Theusercanselecttoprotectaquarter,onehalf,threequartersortheentirememorybysettingthesebitsaccordingtoTable10.
Theprotectedblocksthenbecomeread-only.
TheleastsignificantbitfromtheWriteProtectRegister,WPLallowstheusertolockthewriteprotectionstatus.
WhentheWPLbitissetto"1"thecontrolbits,b0tob3fromWPRcannotbemodified.
Thereforetheprotectedblockscanbepermanentlyprotected.
IfWPLbitis"0"thestatusofcontrolbitsfromtheWPRcanbechanged.
TheCAT24S64willnotacknowledgethedatabyteandthewriterequestwillberejectedfortheaddresseslocatedintheprotectedarea.
NOTE:OncetheWPLbitissetto"1",theusercannolongermodifytheWPRbits,thereforethewriteprotectionstatusispermanentlylocked.
Table8.
BYTEADDRESSA15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0MemoryArray0xxa12a11a10a9a8a7a6a5a4a3a2a1a0WriteProtectRegister1xxxxxxxxxxxxxxxTable9.
WRITEPROTECTREGISTERb7b6b5b4b3b2b1b00000WPENBP1BP0WPLTable10.
BLOCKPROTECTIONBP1BP0ArrayAddressProtectedProtection001800-1FFFUpperQuarterProtection011000-1FFFUpperHalfProtection100800-1FFFUpper3/4ArrayProtection110000-1FFFFullArrayProtectionCAT24S64www.
onsemi.
com7WritingtheWriteProtectRegisterThewriteoperationtotheWriteProtectRegisterisperformedusingaByteWriteinstruction(Figure7)ataddress1xxxxxxxxxxxxxxx.
Thedatabytecontainsthe4leastsignificantbitsassignificantbits.
Theb7tob4bitsaredon'tcareduringthewriteoperation.
Sendingmorethanonedatabytewillcancelthewritecycle(WriteProtectRegistercontentwillnotbechanged).
Figure7.
ByteWriteSequenceSLAVEADDRESSSA***CKACKACKSTOPPSTARTACKBUSACTIVITY:MASTERSLAVEADDRESSBYTEADDRESSBYTEDATABYTEa15a8a7a0d7d0*a15=0forMemoryArrayaccess;a15=1forWriteProtectRegisteraccessa14a13=Don'tCarebitsSTOPCONDITIONSTARTCONDITIONADDRESSACK8thBitBytenSCLSDAFigure8.
WriteCycleTimingtWRSLAVEADDRESSSACKACKACKBUSACTIVITY:MASTERSLAVESTARTADDRESSBYTEADDRESSBYTEDATABYTEnDATABYTEn+1DATABYTEn+PACKSTOPACKACKPACKPv63Figure9.
PageWriteSequence**a15a8a7a0*a15=0forMemoryArrayaccess;a15=1forWriteProtectRegisteraccessa14a13=Don'tCarebits*CAT24S64www.
onsemi.
com8ReadOperationsImmediateReadUponreceivingaSlaveaddresswiththeR/Wbitsetto'1',theCAT24S64willinterpretthisasarequestfordataresidingatthecurrentbyteaddressinmemory.
TheCAT24S64willacknowledgetheSlaveaddress,willimmediatelyshiftoutthedataresidingatthecurrentaddress,andwillthenwaitfortheMastertorespond.
IftheMasterdoesnotacknowledgethedata(NoACK)andthenfollowsupwithaSTOPcondition(Figure10),theCAT24S64returnstoStandbymode.
SelectiveReadToreaddataresidingataspecificaddress,theselectedaddressmustfirstbeloadedintotheinternaladdressregister.
ThisisdonebystartingaByteWritesequence,wherebytheMastercreatesaSTARTcondition,thenbroadcastsaSlaveaddresswiththeR/Wbitsetto'0'andthensendstwoaddressbytestotheSlave.
RatherthancompletingtheByteWritesequencebysendingdata,theMasterthencreatesaSTARTconditionandbroadcastsaSlaveaddresswiththeR/Wbitsetto'1'.
TheSlaverespondswithACKaftereverybytesentbytheMasterandthensendsoutdataresidingattheselectedaddress.
Afterreceivingthedata,theMasterrespondswithNoACKandthenterminatesthesessionbycreatingaSTOPconditiononthebus(Figure11).
SequentialReadIfduringaReadsessiontheMasteracknowledgesthe1stdatabyte,thentheCAT24S64willcontinuetransmittingdataresidingatsubsequentlocationsuntiltheMasterrespondswithaNoACK,followedbyaSTOP(Figure12).
DuringSequentialReadtheinternalbyteaddressisautomaticallyincrementeduptotheendofmemory,whereitthenwrapsaroundtothebeginningofmemory.
WriteProtectRegisterReadToreadtheWriteProtectRegister,themastersimplysendsaSelectiveReadinstruction(Figure12)ataddress1xxxxxxxxxxxxxxx.
ThedatabyteshiftedoutbythedeviceshowsthecontentoftheWPRaccordingtoTable9.
Ifthemasteracknowledgesthedatabyteandsendmoreclocks,theWPRcontentwillcontinuetobereadout.
DeliveryStateTheCAT24S64isshippederased,i.
e.
,allmemoryarraybytesareFFhandtheWriteProtectRegisterbitssetto0(00h).
SCLSDA8thBitSTOPNOACKDATAOUT8SLAVEADDRESSSACKDATABYTENOACKSTOPPSTARTBUSACTIVITY:MASTERSLAVEFigure10.
ImmediateReadSequenceandTiming9CAT24S64www.
onsemi.
com9SLAVEADDRESSSACKACKACKBUSACTIVITY:MASTERSLAVESTARTADDRESSBYTEADDRESSBYTEDATABYTESLAVEADDRESSSACKPFigure11.
SelectiveReadSequence**STARTSTOPACKNOa15a8a7a0*a15=0forMemoryArrayaccess;a15=1forWriteProtectRegisteraccessa14a13=Don'tCarebits*BUSACTIVITY:MASTERSLAVEDATABYTEnDATABYTEn+1DATABYTEn+2DATABYTEn+xACKACKACKSTOPNOACKACKPSLAVEADDRESSFigure12.
SequentialReadSequenceCAT24S64www.
onsemi.
com10PACKAGEDIMENSIONSWLCSP4,0.
84x0.
84CASE567KVISSUEBSEATINGPLANENOTES:1.
DIMENSIONINGANDTOLERANCINGPERASMEY14.
5M,1994.
2.
CONTROLLINGDIMENSION:MILLIMETERS.
3.
DATUMC,THESEATINGPLANE,ISDEFINEDBYTHESPHERICALCROWNSOFTHECONTACTBALLS.
4.
COPLANARITYAPPLIESTOSPHERICALCROWNSOFTHESOLDERBALLS.
5.
DIMENSIONbISMEASUREDATTHEMAXIMUMCON-TACTBALLDIAMETERPARALLELTODATUMC.
EDABPINA1REFERENCE0.
05C0.
05CAA1A2CTOPVIEWSIDEVIEWNOTE4NOTE3DIMAMINNOMMILLIMETERSA1DEb0.
160.
18e0.
40BSC0.
080.
10A20.
23REF0.
810.
840.
810.
84MAX0.
200.
350.
120.
870.
87e10.
50BSCe14Xb12BABOTTOMVIEWeNOTE5A0.
05BC0.
03Ce1/2e/2PITCH0.
184XDIMENSIONS:MILLIMETERS*ForadditionalinformationonourPbFreestrategyandsolderingdetails,pleasedownloadtheONSemiconductorSolderingandMountingTechniquesReferenceManual,SOLDERRM/D.
SOLDERINGFOOTPRINT*0.
400.
50RECOMMENDEDPITCHA1CAT24S64www.
onsemi.
com11ORDERINGINFORMATION(Notes9thru12)DeviceOrderNumberSpecificDeviceMarkingPackageTypeTemperatureRangeLeadFinishShippingCAT24S64C4ATRFWLCSP4ballIndustrial(40°Cto+85°C)SnAgCuTape&Reel,5,000Units/Reel9.
AllpackagesareRoHScompliant(Leadfree,Halogenfree).
10.
Forinformationontapeandreelspecifications,includingpartorientationandtapesizes,pleaserefertoourTapeandReelPackagingSpecificationsBrochure,BRD8011/D.
11.
Fordetailedinformationandabreakdownofdevicenomenclatureandnumberingsystems,pleaseseetheONSemiconductorDeviceNomenclaturedocument,TND310/D,availableatwww.
onsemi.
com12.
Caution:TheEEPROMdevicesdeliveredinWLCSPmustneverbeexposedtoultravioletlight.
WhenexposedtoultravioletlighttheEEPROMcellslosetheirstoreddata.
CAT24S64/DONSemiconductorislicensedbyPhilipsCorporationtocarrytheI2CBusProtocol.
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pdf.
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01PublicationOrderNumber:CAT24S64/DCAT24S6464KbI2CCMOSSerialEEPROMwithSoftwareWriteProtectDescriptionTheCAT24S64isa64KbSerialCMOSEEPROM,internallyorganizedas8192wordsof8bitseach.
Itfeaturesa64bytepagewritebufferandsupportstheStandard(100kHz),Fast(400kHz)andFastPlus(1MHz)I2Cprotocol.
Thedevicefeaturesprogrammablesoftwarewriteprotectionwhichprovidespartialaswellasfullmemoryarrayprotection.
FeaturesSupportsStandard,FastandFastPlusI2CProtocol1.
7Vto5.
5VSupplyVoltageRange64BytePageWriteBufferUserProgrammableBlockWriteProtectionProtect1/4,1/2,3/4orEntireEEPROMArraySchmittTriggersandNoiseSuppressionFiltersonI2CBusInputs(SCLandSDA)LowPowerCMOSTechnology1,000,000Program/EraseCycles40YearDataRetentionIndustrialTemperatureRange:40°Cto+85°C4ballWLCSPPackageThisDeviceisPbFree,HalogenFree/BFRFreeandRoHSCompliant**Figure1.
FunctionalSymbolSDASCLCAT24S64VCCVSS**ForadditionalinformationonourPbFreestrategyandsolderingdetails,pleasedownloadtheONSemiconductorSolderingandMountingTechniquesReferenceManual,SOLDERRM/D.
www.
onsemi.
comPINCONFIGURATIONVCCVSSSDASeedetailedorderingandshippinginformationinthepackagedimensionssectiononpage11ofthisdatasheet.
ORDERINGINFORMATIONSCLWLCSP4(C4A)(TopView)SerialDataInput/OutputSDASerialClockInputSCLPowerSupplyVCCGroundVSSFunctionPinNamePINFUNCTIONWLCSP4C4ASUFFIXCASE567KVAB12F=SpecificDeviceCodeY=ProductionYear(LastDigit)M=ProductionMonth(19,O,N,D)FYMMARKINGDIAGRAMPin1CAT24S64www.
onsemi.
com2Table1.
ABSOLUTEMAXIMUMRATINGSParameterRatingUnitsStorageTemperature65to+150°CVoltageonAnyPinwithRespecttoGround(Note1)0.
5to+6.
5VStressesexceedingthoselistedintheMaximumRatingstablemaydamagethedevice.
Ifanyoftheselimitsareexceeded,devicefunctionalityshouldnotbeassumed,damagemayoccurandreliabilitymaybeaffected.
1.
Duringtransitions,voltageundershootonanypinshouldnotexceed1Vformorethan20ns.
VoltageovershootontheSCLandSDApinsshouldnotexceedtheabsolutemaximumratings,irrespectiveofVCC.
Table2.
RELIABILITYCHARACTERISTICS(Note2)SymbolParameterMinUnitsNEND(Note3)Endurance1,000,000Program/EraseCyclesTDR(Note4)DataRetention40Years2.
TheseparametersaretestedinitiallyandafteradesignorprocesschangethataffectstheparameteraccordingtoappropriateAECQ100andJEDECtestmethods.
3.
PageMode,VCC=5V,25°C4.
TA=55°CTable3.
DCANDACOPERATINGCONDITIONSSupplyVoltage/TemperatureRangeOperationVCC=1.
7Vto5.
5V/TA=40°Cto+85°CREAD/WRITEVCC=1.
6Vto5.
5V/TA=40°Cto+85°CREADVCC=1.
6Vto5.
5V/TA=0°Cto+85°CWRITETable4.
D.
C.
OPERATINGCHARACTERISTICSSymbolParameterTestConditionsMinMaxUnitsICCRReadCurrentRead,fSCL=400kHz/1MHz1mAICCWWriteCurrent2mAISBStandbyCurrentAllI/OPinsatGNDorVCCVCC≤2.
5V1mAVCC>2.
5V2ILI/OPinLeakagePinatGNDorVCC2mAVIL1InputLowVoltageVCC≥2.
5V0.
50.
3VCCVVIL2InputLowVoltageVCC<2.
5V0.
50.
25VCCVVIH1InputHighVoltageVCC≥2.
5V0.
7VCC5.
5VVIH2InputHighVoltageVCC<2.
5V0.
75VCC5.
5VVOL1OutputLowVoltageVCC≥2.
5V,IOL=3.
0mA0.
4VVOL2OutputLowVoltageVCC<2.
5V,IOL=1.
0mA0.
2VProductparametricperformanceisindicatedintheElectricalCharacteristicsforthelistedtestconditions,unlessotherwisenoted.
ProductperformancemaynotbeindicatedbytheElectricalCharacteristicsifoperatedunderdifferentconditions.
Table5.
PINIMPEDANCECHARACTERISTICSSymbolParameterConditionsMaxUnitsCIN(Note5)SDAI/OPinCapacitanceVIN=0V8pFCIN(Note5)InputCapacitance(otherpins)VIN=0V6pF5.
TheseparametersaretestedinitiallyandafteradesignorprocesschangethataffectstheparameteraccordingtoappropriateAECQ100andJEDECtestmethods.
CAT24S64www.
onsemi.
com3Table6.
A.
C.
CHARACTERISTICS(Note6)SymbolParameterStandardVCC<1.
7VFastVCC<1.
7VFastPlusVCC.
1.
7VUnitsMinMaxMinMaxMinMaxFSCLClockFrequency1004001,000kHztHD:STASTARTConditionHoldTime40.
60.
25mstLOWLowPeriodofSCLClock4.
71.
30.
45mstHIGHHighPeriodofSCLClock40.
60.
30mstSU:STASTARTConditionSetupTime4.
70.
60.
25mstHD:DATDataInHoldTime000mstSU:DATDataInSetupTime25010050nstR(Note7)SDAandSCLRiseTime1,00020300120nstF(Note7)SDAandSCLFallTime30020300120nstSU:STOSTOPConditionSetupTime40.
60.
25mstBUFBusFreeTimeBetweenSTOPandSTART4.
71.
30.
5mstAASCLLowtoDataOutValid3.
50.
90.
40mstDHDataOutHoldTime10010050nsTi(Note7)NoisePulseFilteredatSCLandSDAInputs1005050nstWRWriteCycleTime555mstPU(Notes7,8)Power-uptoReadyMode0.
350.
350.
35ms6.
Testconditionsaccordingto"A.
C.
TestConditions"table.
7.
Testedinitiallyandafteradesignorprocesschangethataffectsthisparameter.
8.
tPUisthedelaybetweenthetimeVCCisstableandthedeviceisreadytoacceptcommands.
Table7.
A.
C.
TESTCONDITIONSInputLevels0.
2xVCCto0.
8xVCCInputRiseandFallTimesv50nsInputReferenceLevels0.
3xVCC,0.
7xVCCOutputReferenceLevels0.
3xVCC,0.
7xVCCOutputLoadCurrentSource:IOL=3mA(VCC≥2.
5V);IOL=1mA(VCC<2.
5V);CL=100pFFigure2.
MaximumPullupResistancevs.
LoadCapacitanceLOADCAPACITANCE(pF)100100.
1110PULLUPRESISTANCE(kW)300nsRiseTime120nsRiseTimeSDAVCCRPVSSCLCAT24S64www.
onsemi.
com4PowerOnReset(POR)TheCAT24S64incorporatesPowerOnReset(POR)circuitrywhichprotectsthedeviceagainstpoweringupinthewrongstate.
TheCAT24S64willpowerupintoStandbymodeafterVCCexceedsthePORtriggerlevelandwillpowerdownintoResetmodewhenVCCdropsbelowthePORtriggerlevel.
ThisbidirectionalPORfeatureprotectsthedeviceagainst'brownout'failurefollowingatemporarylossofpower.
PinDescriptionSCL:TheSerialClockinputpinacceptstheSerialClockgeneratedbytheMaster.
SDA:TheSerialDataI/OpinreceivesinputdataandtransmitsdatastoredinEEPROM.
Intransmitmode,thispinisopendrain.
Dataisacquiredonthepositiveedge,andisdeliveredonthenegativeedgeofSCL.
FunctionalDescriptionTheCAT24S64supportstheInterIntegratedCircuit(I2C)Busdatatransmissionprotocol,whichdefinesadevicethatsendsdatatothebusasatransmitterandadevicereceivingdataasareceiver.
DataflowiscontrolledbyaMasterdevice,whichgeneratestheserialclockandallSTARTandSTOPconditions.
TheCAT24S64actsasaSlavedevice.
MasterandSlavealternateaseithertransmitterorreceiver.
I2CBusProtocolTheI2Cbusconsistsoftwo'wires',SCLandSDA.
ThetwowiresareconnectedtotheVCCsupplyviapullupresistors.
MasterandSlavedevicesconnecttothe2wirebusviatheirrespectiveSCLandSDApins.
ThetransmittingdevicepullsdowntheSDAlineto'transmit'a'0'andreleasesitto'transmit'a'1'.
Datatransfermaybeinitiatedonlywhenthebusisnotbusy(seeA.
C.
Characteristics).
Duringdatatransfer,theSDAlinemustremainstablewhiletheSCLlineisHIGH.
AnSDAtransitionwhileSCLisHIGHwillbeinterpretedasaSTARTorSTOPcondition(Figure3).
TheSTARTconditionprecedesallcommands.
ItconsistsofaHIGHtoLOWtransitiononSDAwhileSCLisHIGH.
TheSTARTactsasa'wakeup'calltoallreceivers.
AbsentaSTART,aSlavewillnotrespondtocommands.
TheSTOPconditioncompletesallcommands.
ItconsistsofaLOWtoHIGHtransitiononSDAwhileSCLisHIGH.
DeviceAddressingTheMasterinitiatesdatatransferbycreatingaSTARTconditiononthebus.
TheMasterthenbroadcastsan8bitserialSlaveaddress.
Thefirst4bitsoftheSlaveaddressaresetto1010,fornormalRead/Writeoperations(Figure4).
Thenext3bitsaresetto001.
Thelastbit,R/W,specifieswhetheraRead(1)orWrite(0)operationistobeperformed.
AcknowledgeAfterprocessingtheSlaveaddress,theSlaverespondswithanacknowledge(ACK)bypullingdowntheSDAlineduringthe9thclockcycle(Figure5).
TheSlavewillalsoacknowledgealladdressbytesandeverydatabytepresentedinWritemodeiftheaddressedlocationisnotwriteprotected.
InReadmodetheSlaveshiftsoutadatabyte,andthenreleasestheSDAlineduringthe9thclockcycle.
AslongastheMasteracknowledgesthedata,theSlavewillcontinuetransmitting.
TheMasterterminatesthesessionbynotacknowledgingthelastdatabyte(NoACK)andbyissuingaSTOPcondition.
BustimingisillustratedinFigure6.
CAT24S64www.
onsemi.
com5STARTCONDITIONSTOPCONDITIONSDASCLFigure3.
START/STOPConditions1010DEVICEADDRESSFigure4.
SlaveAddressBits001R/W189STARTSCLFROMMASTERBUSRELEASEDELAY(TRANSMITTER)ACKSETUP(≥tSU:DAT)BUSRELEASEDELAY(RECEIVER)DATAOUTPUTFROMTRANSMITTERDATAOUTPUTFROMRECEIVERFigure5.
AcknowledgeTimingACKDELAY(≤tAA)SCLSDAINSDAOUTFigure6.
BusTimingtSU:STAtHD:STAtHD:DATtFtLOWtAAtHIGHtLOWtRtDHtBUFtSU:DATtSU:STOCAT24S64www.
onsemi.
com6WriteOperationsByteWriteInByteWritemodetheMastersendsaSTART,followedbySlaveaddress,twobyteaddress(Table8)anddatatobewritten(Figure7).
TheSlave,CAT24S64acknowledgesall4bytes,andtheMasterthenfollowsupwithaSTOP,whichinturnstartstheinternalWriteoperation(Figure8).
DuringtheinternalWritecycle(tWR),theCAT24S64willnotacknowledgeanyReadorWriterequestfromtheMaster.
PageWriteTheCAT24S64contains8192bytesofdata,arrangedin128pagesof64byteseach.
Atwobyteaddressword(Table8),followingtheSlaveaddress,pointstothefirstbytetobewrittenintothememoryarray.
Themostsignificant7bitsfromtheaddressactivebits(a12toa6)identifythepageandthelast6bits(a5toa0)identifythebytewithinthepage.
Upto64bytescanbewritteninoneWritecycle(Figure9).
Theinternalbyteaddresscounterisautomaticallyincrementedaftereachdatabyteisloaded.
IftheMastertransmitsmorethan64databytes,thenearlierbyteswillbeoverwrittenbylaterbytesina'wraparound'fashion(withintheselectedpage).
TheinternalWritecyclestartsimmediatelyfollowingtheSTOP.
AcknowledgePollingTheready/busystatusoftheCAT24S64canbeascertainedbysendingReadorWriterequestsimmediatelyfollowingtheSTOPconditionthatinitiatedtheinternalWritecycle.
AslongasinternalWriteisinprogress,theCAT24S64willnotacknowledgetheSlaveaddress.
SoftwareWriteProtectionTheusercanselecttowrite-protectpartialorfullmemoryarraybywritingaspecificdataintotheWriteProtectRegister(WPR).
TheWPRislocatedoutsideofthe16Kbytesmemoryaddressingspace,ataddress1xxxxxxxxxxxxxxx.
ThesoftwarewriteprotectcontrolbitsfromtheWriteProtectRegisterareshowninTable9.
Thewriteprotectcontrolbits,b0tob3arenon-volatile.
TheWPEN(WriteProtectEnable)bitenablesthewriteprotectionwhenitissetto"1".
WhentheWPENbitis"0",thewholememoryarraycanbewritten.
TheBP0andBP1(BlockProtect)bitsdeterminewhichareaiswriteprotected.
Theusercanselecttoprotectaquarter,onehalf,threequartersortheentirememorybysettingthesebitsaccordingtoTable10.
Theprotectedblocksthenbecomeread-only.
TheleastsignificantbitfromtheWriteProtectRegister,WPLallowstheusertolockthewriteprotectionstatus.
WhentheWPLbitissetto"1"thecontrolbits,b0tob3fromWPRcannotbemodified.
Thereforetheprotectedblockscanbepermanentlyprotected.
IfWPLbitis"0"thestatusofcontrolbitsfromtheWPRcanbechanged.
TheCAT24S64willnotacknowledgethedatabyteandthewriterequestwillberejectedfortheaddresseslocatedintheprotectedarea.
NOTE:OncetheWPLbitissetto"1",theusercannolongermodifytheWPRbits,thereforethewriteprotectionstatusispermanentlylocked.
Table8.
BYTEADDRESSA15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0MemoryArray0xxa12a11a10a9a8a7a6a5a4a3a2a1a0WriteProtectRegister1xxxxxxxxxxxxxxxTable9.
WRITEPROTECTREGISTERb7b6b5b4b3b2b1b00000WPENBP1BP0WPLTable10.
BLOCKPROTECTIONBP1BP0ArrayAddressProtectedProtection001800-1FFFUpperQuarterProtection011000-1FFFUpperHalfProtection100800-1FFFUpper3/4ArrayProtection110000-1FFFFullArrayProtectionCAT24S64www.
onsemi.
com7WritingtheWriteProtectRegisterThewriteoperationtotheWriteProtectRegisterisperformedusingaByteWriteinstruction(Figure7)ataddress1xxxxxxxxxxxxxxx.
Thedatabytecontainsthe4leastsignificantbitsassignificantbits.
Theb7tob4bitsaredon'tcareduringthewriteoperation.
Sendingmorethanonedatabytewillcancelthewritecycle(WriteProtectRegistercontentwillnotbechanged).
Figure7.
ByteWriteSequenceSLAVEADDRESSSA***CKACKACKSTOPPSTARTACKBUSACTIVITY:MASTERSLAVEADDRESSBYTEADDRESSBYTEDATABYTEa15a8a7a0d7d0*a15=0forMemoryArrayaccess;a15=1forWriteProtectRegisteraccessa14a13=Don'tCarebitsSTOPCONDITIONSTARTCONDITIONADDRESSACK8thBitBytenSCLSDAFigure8.
WriteCycleTimingtWRSLAVEADDRESSSACKACKACKBUSACTIVITY:MASTERSLAVESTARTADDRESSBYTEADDRESSBYTEDATABYTEnDATABYTEn+1DATABYTEn+PACKSTOPACKACKPACKPv63Figure9.
PageWriteSequence**a15a8a7a0*a15=0forMemoryArrayaccess;a15=1forWriteProtectRegisteraccessa14a13=Don'tCarebits*CAT24S64www.
onsemi.
com8ReadOperationsImmediateReadUponreceivingaSlaveaddresswiththeR/Wbitsetto'1',theCAT24S64willinterpretthisasarequestfordataresidingatthecurrentbyteaddressinmemory.
TheCAT24S64willacknowledgetheSlaveaddress,willimmediatelyshiftoutthedataresidingatthecurrentaddress,andwillthenwaitfortheMastertorespond.
IftheMasterdoesnotacknowledgethedata(NoACK)andthenfollowsupwithaSTOPcondition(Figure10),theCAT24S64returnstoStandbymode.
SelectiveReadToreaddataresidingataspecificaddress,theselectedaddressmustfirstbeloadedintotheinternaladdressregister.
ThisisdonebystartingaByteWritesequence,wherebytheMastercreatesaSTARTcondition,thenbroadcastsaSlaveaddresswiththeR/Wbitsetto'0'andthensendstwoaddressbytestotheSlave.
RatherthancompletingtheByteWritesequencebysendingdata,theMasterthencreatesaSTARTconditionandbroadcastsaSlaveaddresswiththeR/Wbitsetto'1'.
TheSlaverespondswithACKaftereverybytesentbytheMasterandthensendsoutdataresidingattheselectedaddress.
Afterreceivingthedata,theMasterrespondswithNoACKandthenterminatesthesessionbycreatingaSTOPconditiononthebus(Figure11).
SequentialReadIfduringaReadsessiontheMasteracknowledgesthe1stdatabyte,thentheCAT24S64willcontinuetransmittingdataresidingatsubsequentlocationsuntiltheMasterrespondswithaNoACK,followedbyaSTOP(Figure12).
DuringSequentialReadtheinternalbyteaddressisautomaticallyincrementeduptotheendofmemory,whereitthenwrapsaroundtothebeginningofmemory.
WriteProtectRegisterReadToreadtheWriteProtectRegister,themastersimplysendsaSelectiveReadinstruction(Figure12)ataddress1xxxxxxxxxxxxxxx.
ThedatabyteshiftedoutbythedeviceshowsthecontentoftheWPRaccordingtoTable9.
Ifthemasteracknowledgesthedatabyteandsendmoreclocks,theWPRcontentwillcontinuetobereadout.
DeliveryStateTheCAT24S64isshippederased,i.
e.
,allmemoryarraybytesareFFhandtheWriteProtectRegisterbitssetto0(00h).
SCLSDA8thBitSTOPNOACKDATAOUT8SLAVEADDRESSSACKDATABYTENOACKSTOPPSTARTBUSACTIVITY:MASTERSLAVEFigure10.
ImmediateReadSequenceandTiming9CAT24S64www.
onsemi.
com9SLAVEADDRESSSACKACKACKBUSACTIVITY:MASTERSLAVESTARTADDRESSBYTEADDRESSBYTEDATABYTESLAVEADDRESSSACKPFigure11.
SelectiveReadSequence**STARTSTOPACKNOa15a8a7a0*a15=0forMemoryArrayaccess;a15=1forWriteProtectRegisteraccessa14a13=Don'tCarebits*BUSACTIVITY:MASTERSLAVEDATABYTEnDATABYTEn+1DATABYTEn+2DATABYTEn+xACKACKACKSTOPNOACKACKPSLAVEADDRESSFigure12.
SequentialReadSequenceCAT24S64www.
onsemi.
com10PACKAGEDIMENSIONSWLCSP4,0.
84x0.
84CASE567KVISSUEBSEATINGPLANENOTES:1.
DIMENSIONINGANDTOLERANCINGPERASMEY14.
5M,1994.
2.
CONTROLLINGDIMENSION:MILLIMETERS.
3.
DATUMC,THESEATINGPLANE,ISDEFINEDBYTHESPHERICALCROWNSOFTHECONTACTBALLS.
4.
COPLANARITYAPPLIESTOSPHERICALCROWNSOFTHESOLDERBALLS.
5.
DIMENSIONbISMEASUREDATTHEMAXIMUMCON-TACTBALLDIAMETERPARALLELTODATUMC.
EDABPINA1REFERENCE0.
05C0.
05CAA1A2CTOPVIEWSIDEVIEWNOTE4NOTE3DIMAMINNOMMILLIMETERSA1DEb0.
160.
18e0.
40BSC0.
080.
10A20.
23REF0.
810.
840.
810.
84MAX0.
200.
350.
120.
870.
87e10.
50BSCe14Xb12BABOTTOMVIEWeNOTE5A0.
05BC0.
03Ce1/2e/2PITCH0.
184XDIMENSIONS:MILLIMETERS*ForadditionalinformationonourPbFreestrategyandsolderingdetails,pleasedownloadtheONSemiconductorSolderingandMountingTechniquesReferenceManual,SOLDERRM/D.
SOLDERINGFOOTPRINT*0.
400.
50RECOMMENDEDPITCHA1CAT24S64www.
onsemi.
com11ORDERINGINFORMATION(Notes9thru12)DeviceOrderNumberSpecificDeviceMarkingPackageTypeTemperatureRangeLeadFinishShippingCAT24S64C4ATRFWLCSP4ballIndustrial(40°Cto+85°C)SnAgCuTape&Reel,5,000Units/Reel9.
AllpackagesareRoHScompliant(Leadfree,Halogenfree).
10.
Forinformationontapeandreelspecifications,includingpartorientationandtapesizes,pleaserefertoourTapeandReelPackagingSpecificationsBrochure,BRD8011/D.
11.
Fordetailedinformationandabreakdownofdevicenomenclatureandnumberingsystems,pleaseseetheONSemiconductorDeviceNomenclaturedocument,TND310/D,availableatwww.
onsemi.
com12.
Caution:TheEEPROMdevicesdeliveredinWLCSPmustneverbeexposedtoultravioletlight.
WhenexposedtoultravioletlighttheEEPROMcellslosetheirstoreddata.
CAT24S64/DONSemiconductorislicensedbyPhilipsCorporationtocarrytheI2CBusProtocol.
ONSemiconductorandaretrademarksofSemiconductorComponentsIndustries,LLCdbaONSemiconductororitssubsidiariesintheUnitedStatesand/orothercountries.
ONSemiconductorownstherightstoanumberofpatents,trademarks,copyrights,tradesecrets,andotherintellectualproperty.
AlistingofONSemiconductor'sproduct/patentcoveragemaybeaccessedatwww.
onsemi.
com/site/pdf/PatentMarking.
pdf.
ONSemiconductorreservestherighttomakechangeswithoutfurthernoticetoanyproductsherein.
ONSemiconductormakesnowarranty,representationorguaranteeregardingthesuitabilityofitsproductsforanyparticularpurpose,nordoesONSemiconductorassumeanyliabilityarisingoutoftheapplicationoruseofanyproductorcircuit,andspecificallydisclaimsanyandallliability,includingwithoutlimitationspecial,consequentialorincidentaldamages.
BuyerisresponsibleforitsproductsandapplicationsusingONSemiconductorproducts,includingcompliancewithalllaws,regulationsandsafetyrequirementsorstandards,regardlessofanysupportorapplicationsinformationprovidedbyONSemiconductor.
"Typical"parameterswhichmaybeprovidedinONSemiconductordatasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime.
Alloperatingparameters,including"Typicals"mustbevalidatedforeachcustomerapplicationbycustomer'stechnicalexperts.
ONSemiconductordoesnotconveyanylicenseunderitspatentrightsnortherightsofothers.
ONSemiconductorproductsarenotdesigned,intended,orauthorizedforuseasacriticalcomponentinlifesupportsystemsoranyFDAClass3medicaldevicesormedicaldeviceswithasameorsimilarclassificationinaforeignjurisdictionoranydevicesintendedforimplantationinthehumanbody.
ShouldBuyerpurchaseoruseONSemiconductorproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdONSemiconductoranditsofficers,employees,subsidiaries,affiliates,anddistributorsharmlessagainstallclaims,costs,damages,andexpenses,andreasonableattorneyfeesarisingoutof,directlyorindirectly,anyclaimofpersonalinjuryordeathassociatedwithsuchunintendedorunauthorizeduse,evenifsuchclaimallegesthatONSemiconductorwasnegligentregardingthedesignormanufactureofthepart.
ONSemiconductorisanEqualOpportunity/AffirmativeActionEmployer.
Thisliteratureissubjecttoallapplicablecopyrightlawsandisnotforresaleinanymanner.
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