dependentrewrite

AnIMPORTANTNOTICEattheendofthisdatasheetaddressesavailability,warranty,changes,useinsafety-criticalapplications,intellectualpropertymattersandotherimportantdisclaimers.
PRODUCTIONDATA.
DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018DRV2605HapticDriverforERMandLRAWithBuilt-InLibraryandSmart-LoopArchitecture11Features1FlexibleHaptic/VibraDriver–LRA(LinearResonanceActuator)–ERM(EccentricRotatingMass)I2CControlledDigitalPlaybackEngine–Real-TimePlaybackModeviaI2CSmartLoopArchitecture(1)–AutomaticOverdrive/Braking(ERM/LRA)–AutomaticResonanceTracking(LRA)–AutomaticActuatorDiagnostic(ERM/LRA)–AutomaticLevelCalibration(ERM/LRA)LicensedImmersionTouchSense2200features:–IntegratedImmersionEffectLibrary–AudiotoVibeOptionalPWMInputwith0%to100%DutyCycleControlRangeOptionalAnalogInputControlOptionalHardwareTriggerPinEfficientOutputDriveFastStartUpTimeConstantAccelerationOverSupplyVoltage1.
8VCompatible,VDDTolerantDigitalPins(1)Patentpendingcontrolalgorithm2ApplicationsMobilePhonesandTabletsWatchesandWearableTechnologyRemoteControls,Mice,andPeripheralDevicesTouch-EnabledDevicesHuman-MachineInterfaces3DescriptionTheDRV2605deviceisdesignedtoprovideextremely-flexiblehapticcontrolofERMandLRAactuatorsoverasharedI2C-compatiblebus.
Thiscontrolrelievesthehostprocessorfromevergeneratingpulse-widthmodulated(PWM)drivesignals,savingbothcostlytimerinterruptsandhardwarepins.
TheDRV2605deviceprovidesanextensiveintegratedlibraryover100licensedeffectsfromImmersionforERMandLRAwhicheliminatestheneedtodesignhapticswaveforms.
TheDRV2605deviceoffersalicensedversionoftheTouchSense2200softwarefromImmersion,whichincludesthe2200EffectsLibrary,and2200audio-to-vibefeatures.
Additionally,thereal-timeplaybackmodeallowsthehostprocessortobypassthelibraryplaybackengineandplaywaveformsdirectlyfromthehostthroughI2C.
TheDRV2605devicealsocontainsasmart-looparchitecture,whichallowseffortlessautoresonantdriveforLRAaswellasfeedback-optimizedERMdrive.
Thisfeedbackprovidesautomaticoverdriveandbraking,whichcreatesasimplifiedinputwaveformparadigmaswellasreliablemotorcontrolandconsistentmotorperformance.
Theaudio-to-hapticsmodeautomaticallyconvertsanaudioinputsignaltomeaningfulhapticeffects.
TheDRV2605devicefeaturesatrinary-modulatedoutputstage,providinggreaterefficiencythanlinear-basedoutputdrivers.
The9-ballWCSPfootprint,flexibleoperation,andlowcomponentcountmaketheDRV2605devicetheidealchoiceforportableandtouch-enabledvibratoryandhapticapplications.
ForanimportantnoticeregardingImmersionsoftware,seetheLegalNoticesection.
DeviceInformation(1)PARTNUMBERPACKAGEBODYSIZE(MAX)DRV2605DSBGA(9)1.
50mm*1.
50mm(1)Forallavailablepackages,seetheorderableaddendumattheendofthedatasheet.
2DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedTableofContents1Features.
12Applications13Description14RevisionHistory.
25PinConfigurationandFunctions.
46Specifications.
56.
1AbsoluteMaximumRatings56.
2ESDRatings.
56.
3RecommendedOperatingConditions.
56.
4ThermalInformation.
56.
5ElectricalCharacteristics.
66.
6TimingRequirements.
66.
7SwitchingCharacteristics.
66.
8TypicalCharacteristics.
87DetailedDescription107.
1Overview107.
2FunctionalBlockDiagram107.
3FeatureDescription.
117.
4DeviceFunctionalModes.
187.
5Programming.
227.
6RegisterMap.
338ApplicationandImplementation498.
1ApplicationInformation.
498.
2TypicalApplication508.
3InitializationSetup.
539PowerSupplyRecommendations.
5410Layout.
5510.
1LayoutGuidelines5510.
2LayoutExample5611DeviceandDocumentationSupport5711.
1LegalNotice5711.
2WaveformLibraryEffectsList.
5711.
3ReceivingNotificationofDocumentationUpdates5811.
4CommunityResources.
5811.
5Trademarks.
5811.
6ElectrostaticDischargeCaution.
5811.
7Glossary.
5812Mechanical,Packaging,andOrderableInformation584RevisionHistoryNOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion.
ChangesfromRevisionD(December2015)toRevisionEPageChangedtheDEFAULTvalueforbit5-4ofTable25From:1To346ChangedtheDEFAULTvalueforbit3-2ofTable25From:2To146ChangedtheDEFAULTvalueforbit1-0ofTable25From:2To146ChangedthetypicalvalueofC(VDD)inTable30From:0.
1FTo:1F49ChangedC(VDD)from0.
1to1FinFigure56.
50Changedtheinput-voltagesupplyrangeFrom:2Vto5.
2VTo:2.
5Vto5.
5VinthePowerSupplyRecommendationssecton54ChangesfromRevisionC(September2014)toRevisionDPageChangedth(1)Holdtime,SCLtoSDAfrom10nsto50nsinTimingRequirements6ChangedthedefaultvalueofNG_THRESH[1:0]from1to2intheRegisterMapControl3RegisterFieldDescriptions.
.
.
47ChangesfromRevisionB(February2014)toRevisionCPageChangedFeaturesbulletfromRoyalty-FreeIntegratedImmersionLibrarytoWaveformEventSequencerandTrigger1ChangedFeaturebulletfromAudioToHapticsModetoTopLevel:LicensedImmersionTouchSense2200features:.
.
.
.
.
1ChangedfromAudioToHapticsModetoAudiotoVibe1ChangedsecondparagraphofDescriptionforclarification.
1Updateddocumenttonewdatasheetstyle4DeletedOperatingfree-airtemperaturerange,TA(informationreplacedbyThermalInformationtable)5ChangedENpulldownresistanceaddedtoElectricalCharacteristics6ChangedconnectionterminalofinputimpedancefromGNDtoV(CM_ANA)inElectricalCharacteristicssection.
63DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedMovedswitchingparameterstonewSwitchingCharacteristicstable6AddedTIHapticBroadcastModesection.
23ChangedACcouplecapacitorrecommendationfrom0.
1Fto1FtobeconsistentwithRecommendedExternalComponentstable.
31AddedImmersionLegalNotice57ChangesfromRevisionA(March2013)toRevisionBPageChangedfrom1pagedatasheettofulldatasheetinproductfolder1ChangesfromOriginal(December2012)toRevisionAPageChangedminimumsupportedresonantfrequencyfrom50Hzto125Hz5AddeddigitalpulldownresistanceparametertoElectricalCharacteristics6Changed|IIH|MAXvaluefrom3to3.
5AperCMS#C13030206ChangedcalibrationdiagramtoincludeDRIVE_TIMEintoERMrequirements26Changedbitfieldnamefrom"LRA_DRIVE_MODE"to"OTP_STATUS"48ChangedC(REG)from0.
1to1FinFigure56.
504DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated(1)I=input,O=output,I/O=inputandoutput,P=power5PinConfigurationandFunctionsYZFPackage9-PinDSBGAWith0.
5-mmPitch(TopView)PinFunctionsPINTYPE(1)DESCRIPTIONNO.
NAMEA1ENIDeviceenableA2REGOTheREGpinisthe1.
8-Vregulatoroutput.
A1-Fcapacitorisrequired.
A3OUT+OPositivehapticdriverdifferentialoutputB1IN/TRIGIMulti-modeInput.
I2CselectableasPWM,analog,ortrigger.
Ifnotused,thispinshouldbeconnectedtoGNDB2SDAI/OI2CdataB3GNDPSupplygroundC1SCLII2CclockC3OUT–ONegativehaptic-driverdifferentialoutputC2VDDPSupplyinput(2.
5to5.
5V).
A0.
1-Fcapacitorisrequired.
5DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated6Specifications6.
1AbsoluteMaximumRatingsoveroperatingfree-airtemperaturerange,TA=25°C(unlessotherwisenoted)MINMAXUNITInputvoltageVDD–0.
36VEN–0.
3VDD+0.
3VSDA–0.
3VDD+0.
3VSCL–0.
3VDD+0.
3VIN/TRIG–0.
3VDD+0.
3VOperatingfree-airtemperature,TA–4085°COperatingjunctiontemperature,TJ–40150°CStoragetemperature,Tstg–65150°C(1)JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.
Pinslistedas±2000Vmayactuallyhavehigherperformance.
(2)JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess.
Pinslistedas±500Vmayactuallyhavehigherperformance.
6.
2ESDRatingsVALUEUNITV(ESD)ElectrostaticdischargeHumanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1)±2000VChargeddevicemodel(CDM),perJEDECspecificationJESD22-C101,allpins(2)±500(1)Ensuredbydesign.
Notproductiontested.
6.
3RecommendedOperatingConditionsoveroperatingfree-airtemperaturerange(unlessotherwisenoted)MINMAXUNITVDDSupplyvoltageVDD2.
55.
5V(PWM)PWMinputfrequency(1)IN/TRIGPin10250kHzZLLoadimpedance(1)VDD=5.
2V8ΩVILDigitallow-levelinputvoltageEN,IN/TRIG,SDA,SCL0.
5VVIHDigitalhigh-levelinputvoltageEN,IN/TRIG,SDA,SCL1.
3VVI(ANA)Inputvoltage(analogmode)IN/TRIG01.
8V(LRA)LRAFrequencyRange(1)125300Hz(1)Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplicationreport.
6.
4ThermalInformationTHERMALMETRIC(1)DRV2605UNITYZF(DSBGA)(9-PINS)RθJAJunction-to-ambientthermalresistance145.
2°C/WRθJC(top)Junction-to-case(top)thermalresistance0.
9°C/WRθJBJunction-to-boardthermalresistance105°C/WφJTJunction-to-topcharacterizationparameter5.
1°C/WφJBJunction-to-boardcharacterizationparameter103.
3°C/W6DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated6.
5ElectricalCharacteristicsTA=25°C,VDD=3.
6V(unlessotherwisenoted)PARAMETERTESTCONDITIONSMINTYPMAXUNITV(REG)VoltageattheREGpin1.
84VIILDigitallow-levelinputcurrentENVDD=5.
5V,VI=0V1AIIHDigitalhigh-levelinputcurrentIN/TRIG,SDA,SCLVDD=5.
5V,VI=VDD1AENVDD=5.
5V,VI=VDD3.
5VOLDigitallow-leveloutputvoltageSDAIOL=4mA0.
4VR(EN-GND)Digitalpull-downresistanceENVDD=5.
5V,VI=VDD2MΩI(SD)ShutdowncurrentV(EN)=0V1.
754AII(standby)StandbycurrentV(EN)=1.
8V,STANDBY=11.
95AIQQuiescentcurrentV(EN)=1.
8V,STANDBY=0,nosignal0.
61mAZIInputimpedanceIN/TRIGtoV(CM_ANA)100kΩV(CM_ANA)IN/TRIGcommon-modevoltage(AC-coupled)AC_COUPLE=10.
9VZO(SD)OutputimpedanceinshutdownOUT+toGND,OUT–toGND15kΩZL(th)Loadimpedancethresholdforover-currentdetectionOUT+toGND,OUT–toGND4ΩI(BAT_AV)AveragebatterycurrentduringoperationDutycycle=90%,LRAmode,noload2.
53.
25mADutycycle=90%,ERMmode,noload2.
53.
256.
6TimingRequirementsTA=25°C,VDD=3.
6V(unlessotherwisenoted)MINNOMMAXUNIT(SCL)FrequencyattheSCLpinwithnowaitstates400kHztw(H)Pulseduration,SCLhighSeeFigure1.
0.
6stw(L)Pulseduration,SCLlow1.
3stsu(1)Setuptime,SDAtoSCL100nsth(1)Holdtime,SCLtoSDA50nst(BUF)BusfreetimebetweenstopandstartconditionSeeFigure2.
1.
3stsu(2)Setuptime,SCLtostartcondition0.
6sth(2)Holdtime,startconditiontoSCL0.
6stsu(3)Setuptime,SCLtostopcondition0.
6s6.
7SwitchingCharacteristicsTA=25°C,VDD=3.
6V(unlessotherwisenoted)PARAMETERTESTCONDITIONSMINTYPMAXUNITt(start)Start-uptimeTimefromtheGObitorexternaltriggercommandtooutputsignal0.
7msTimefromENhightooutputsignal(PWM/AnalogModes)1.
5O(PWM)PWMOutputFrequency19.
520.
521.
5kHz7DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFigure1.
SCLandSDATimingFigure2.
TimingforStartandStopConditions8DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated6.
8TypicalCharacteristicsVDD=3.
6VERMopenloopStrongclick-60%ExternaledgetriggerFigure3.
ERMClickwithandWithoutBraking(ROM)VDD=3.
6VLRAclosedloopStrongclick-100%ExternalleveltriggerFigure4.
LRAClickwithBraking(ROM)VDD=3.
6VERMopenloopSequence=0x01,0x48InternaltriggerFigure5.
ERMClick-Bounce(ROM)VDD=3.
6VLRAclosedloopTransitionclick1-100%InternaltriggerFigure6.
LRATransition-Click(ROM)VDD=3.
6VERMclosedloopRTPModeFigure7.
ERMBuzz(RTP)VDD=3.
6VLRAclosedloopPWMModeFigure8.
LRAClickWithandWithoutBraking(PWM)9DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedTypicalCharacteristics(continued)VDD=4.
2VClosedloopNofilterFigure9.
StartupLatencyforERMandLRAFigure10.
SupplyCurrentvsSupplyVoltage(FullVibration)10DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated7DetailedDescription7.
1OverviewTheDRV2605deviceisahapticdriverthatreliesontheback-EMFproducedbyanactuatortoprovideaclosed-loopsystemthatoffersextremelyflexiblecontrolofLRAandERMactuatorsoverasharedI2C-compatiblebusorPWMinputsignal.
Thisschemahelpsimproveactuatorperformanceintermsofaccelerationconsistency,starttime,andbraketime.
Theimprovedsmart-looparchitectureinsidetheDRV2605deviceprovideseffortlessauto-resonantdriveforLRA,aswellasfeedback-optimizedERMdriveallowingforautomaticoverdriveandbraking.
Thesefeaturescreateasimplifiedinputwaveformparadigmaswellasreliablemotorcontrolandconsistentmotorperformance.
TheDRV2605devicealsoallowsforopen-loopdrivingbyusinginternally-generatedPWM.
Additionally,theaudio-to-vibemodeautomaticallyconvertsanaudioinputsignaltomeaningfulhapticeffects.
TheDRV2605deviceoffersalicensedversionofTouchSense2200softwarefromImmersionwhicheliminatestherequirementtodesignhapticwaveformsbecausethesoftwareincludesover100licensedeffects(5ERMlibrariesand1LRAlibrary)andaudio-to-vibefeatures.
ThewaveformscanbeinstantlyplayedbackthroughanI2Corcanbetriggeredthroughahardwaretriggerpin.
Additionally,thereal-timeplaybackmodeallowsthehostprocessortobypassthelibraryplaybackengineandplaywaveformsdirectlyfromthehostthroughtheI2C.
TheDRV2605devicefeaturesatrinary-modulatedoutputstagethatprovidesmoreefficiencythanlinear-basedoutputdrivers.
7.
2FunctionalBlockDiagram11DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated7.
3FeatureDescription7.
3.
1SupportforERMandLRAActuatorsTheDRV2605devicesupportsbothERMandLRAactuators.
TheERM_LRAbitinregister0x1Amustbeconfiguredtoselectthetypeofactuatorthatthedeviceuses.
7.
3.
2Smart-LoopArchitectureThesmart-looparchitectureisanadvancedclosed-loopsystemthatoptimizestheperformanceoftheactuatorandallowsforfailuredetection.
Thearchitectureconsistsofautomaticresonancetrackingandreporting(foranLRA),automaticlevelcalibration,acceleratedstartupandbraking,diagnosticsroutines,andotherproprietaryalgorithms.
7.
3.
2.
1Auto-ResonanceEngineforLRATheDRV2605auto-resonanceenginetrackstheresonantfrequencyofanLRAinrealtime,effectivelylockingontotheresonancefrequencyafterhalfofacycle.
Iftheresonantfrequencyshiftsinthemiddleofawaveformforanyreason,theenginetracksthefrequencyfromcycletocycle.
Theauto-resonanceengineaccomplishesthetrackingbyconstantlymonitoringtheback-EMFoftheactuator.
Theauto-resonanceengineisnotaffectedbytheautocalibrationprocess,whichisonlyusedforlevelcalibration.
Nocalibrationisrequiredfortheautoresonanceengine.
SeetheAuto-ResonanceEngineProgrammingfortheLRAsectionforauto-resonanceengineprogramminginformation.
7.
3.
2.
2Real-TimeResonance-FrequencyReportingforLRAThesmart-looparchitecturemakestheresonantfrequencyoftheLRAavailablethroughI2C(seetheLRAResonancePeriod(Address:0x22)section).
Becausefrequencyreportingoccursinrealtime,thefrequencymustbepolledwhiletheDRV2605devicesynchronizeswiththeLRA.
Thedatashouldnotbepolledwhentheactuatorisidleorbraking.
7.
3.
2.
3AutomaticOverdriveandBrakingAkeyfeatureoftheDRV2605isthesmart-looparchitecturewhichemploysactuatorfeedbackcontrolforbothERMsandLRAs.
Thefeedbackcontroldesensitizestheinputwaveformfromthemotor-responsebehaviorbyprovidingautomaticoverdriveandautomaticbraking.
Anopen-loophapticsystemtypicallydrivesanoverdrivevoltageatstartupthatishigherthanthesteady-stateratedvoltageoftheactuatortodecreasethestartuplatencyoftheactuator.
Likewise,abrakingalgorithmmustbeemployedforeffectivebraking.
Whenusinganopen-loopdriver,thesebehaviorsmustbecontainedintheinputwaveformdata.
Figure11showshowtwodifferentERMswithdifferentstartupbehaviors(MotorAandMotorB)canbothbedrivenoptimallybythesmart-looparchitecturewithasimpleinputforbothmotors.
Thesmart-looparchitectureworksequallywellforLRAswithacombinationoffeedbackcontrolandanauto-resonanceengine.
12DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFeatureDescription(continued)Figure11.
WaveformSimplificationWithSmartLoop7.
3.
2.
3.
1StartupBoostToreducetheactuatorstart-timeperformance,theDRV2605devicehasanoverdriveboostfeaturethatapplieshigherloopgaintotransientresponseoftheactuator.
TheSTARTUP_BOOSTbitenablesthefeature.
7.
3.
2.
3.
2BrakeFactorToreducetheactuatorbrake-timeperformance,theDRV2605deviceprovidesameanstoincreasethegainratiobetweenbrakinganddrivinggain.
Higherfeedback-gainratiosreducethebraketime,however,thegainratiosalsoreducethestabilityoftheclosed-loopsystem.
TheFB_BRAKE_FACTOR[2:0]bitscanbeadjustedtosetthebrakefactor.
7.
3.
2.
3.
3BrakeStabilizerToimprovebrakestabilityathighbrake-factorgainratios,theDRV2605devicehasabrake-stabilizermechanismthatautomaticallyreducestheloopgainwhenthebrakingisnearcompletion.
TheBRAKE_STABILIZERbitenablesthefeature.
7.
3.
2.
4AutomaticLevelCalibrationThesmart-looparchitectureusesactuatorfeedbackbymonitoringtheback-EMFbehavioroftheactuator.
Thelevelofback-EMFvoltagecanvaryacrossactuatormanufacturersbecauseofthespecificactuatorconstruction.
Autocalibrationcompensatesforthevariationandalsoperformsscalingforthedesiredactuatoraccordingtothespecifiedratedvoltageandoverdriveclamp-registersettings.
Whenautocalibrationisperformed,a100%signallevelatanyoftheDRV2605inputinterfacessuppliestheratedvoltagetotheactuatoratsteady-state.
Thefeedbackallowstheoutputleveltoincreaseabovetheratedvoltagelevelforautomaticoverdriveandbraking,butwithoutallowingtheoutputleveltoexceedtheprogrammableoverdriveclampvoltage.
Intheeventwheretheautomaticlevel-calibrationroutinefails,theDIAG_RESULTbitinregister0x00isassertedtoflagtheproblem.
Calibrationfailuresaretypicallyfixedbyadjustingtheregistersassociatedwiththeautomaticlevel-calibrationroutineor,forLRAactuators,theregistersassociatedwiththeautomatic-resonancedetectionengine.
SeetheAutomatic-LevelCalibrationProgrammingsectionforautomatic-levelcalibrationprogramming.
13DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFeatureDescription(continued)7.
3.
2.
4.
1AutomaticCompensationforResistiveLossesTheDRV2605deviceautomaticallycompensatesforresistivelossesinthedriver.
Duringtheautomaticlevel-calibrationroutine,theimpedanceoftheactuatorischeckedandthecompensationfactorisdeterminedandstoredintheA_CAL_COMP[7:0]bit.
7.
3.
2.
4.
2AutomaticBack-EMFNormalizationTheDRV2605deviceautomaticallycompensatesfordifferencesinback-EMFmagnitudebetweenactuators.
Thecompensationfactorisdeterminedduringtheautomaticlevel-calibrationroutineandthefactorisstoredintheA_CAL_BEMF[7:0]bit.
7.
3.
2.
4.
3CalibrationTimeAdjustmentThedurationoftheautomaticlevel-calibrationroutinehasanimpactonaccuracy.
Theimpactishighlydependentonthestart-timecharacteristicoftheactuator.
Theauto-calibrationroutineexpectstheactuatortohavereachedasteadyaccelerationbeforethecalibrationfactorsarecalculated.
Becausethestart-timecharacteristiccanbedifferentforeachactuator,theAUTO_CAL_TIME[1:0]bitcanchangethedurationoftheautomaticlevel-calibrationroutinetooptimizecalibrationperformance.
7.
3.
2.
4.
4Loop-GainControlTheDRV2605deviceallowstheusertocontrolhowfastthedriverattemptstomatchtheback-EMF(andthusmotorvelocity)andtheinputsignallevel.
Higherloop-gain(orfastersettling)optionsresultinless-stableoperationthanlowerloopgain(orslowersettling).
TheLOOP_GAIN[1:0]bitcontrolstheloopgain.
7.
3.
2.
4.
5Back-EMFGainControlTheBEMF_GAIN[1:0]bitsetstheanaloggainfortheback-EMFamplifier.
Theauto-calibrationroutineautomaticallypopulatesthebitwiththemostappropriatevaluefortheactuator.
ModifyingtheSAMPLE_TIME[1:0]bitalsoadjuststheback-EMFgain.
Thehigherthesampletime,thehigherthegain.
Bydefault,theback-EMFissampledonceduringaperiod.
Intheeventthatatwiceper-periodsamplingisdesired,asserttheLRA_DRIVE_MODEbit.
7.
3.
2.
5ActuatorDiagnosticsTheDRV2605deviceiscapableofdeterminingwhethertheactuatorisnotpresent(open)orshorted.
Ifafaultisdetectedduringthediagnosticprocess,theDIAG_RESULTbitisasserted.
7.
3.
3Open-LoopOperationforLRAWhenusingthePWMinputinopen-loopmode,theDRV2605deviceemploysafixeddividerthatobservesthePWMsignalandcommutatestheoutputdrivesignalatthePWMfrequencydividedby128.
ToaccomplishLRAdrive,thehostshoulddrivethePWMfrequencyat128timesthedesiredoperatingfrequency.
7.
3.
4Open-LoopOperationforERMTheDRV2605deviceoffersERMopen-loopoperationthroughthePWMinput.
TheoutputvoltageisbasedonthedutycycleoftheprovidedPWMsignal,wheretheOD_CLAMP[7:0]bitinregister0x17setsthefull-scaleamplitude.
FordetailsseetheRatedVoltageProgrammingsection.
7.
3.
5FlexibleFront-EndInterfaceTheDRV2605deviceoffersmultiplewaystolaunchandcontrolhapticeffects.
TheMODE[2:0]bitinregister0x01isusedtoselecttheinterfacemode.
14DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFeatureDescription(continued)7.
3.
5.
1PWMInterfaceWhentheDRV2605deviceisinPWMinterfacemode,thedeviceacceptsPWMdataattheIN/TRIGpin.
TheDRV2605devicedrivestheactuatorcontinuouslyinPWMinterfacemodeuntiltheusersetsthedevicetostandbymodeortoenteranotherinterfacemode.
Instandbymode,thestrengthofvibrationisdeterminedbythedutycycle.
FortheLRA,theDRV2605deviceautomaticallytrackstheresonancefrequencyunlesstheLRA_OPEN_LOOPbitinregister0x1Disset.
IftheLRA_OPEN_LOOPbitisset,theLRAisdrivenaccordingtothefrequencyofthePWMinputsignal.
Specifically,thedrivingfrequencyisthePWMfrequencydividedby128.
7.
3.
5.
2InternalMemoryInterfaceTheDRV2605devicehassixinternal-ROMlibrariesdesignedbyImmersioncalledTS2200.
ThefirstfivelibrariesarespecificallytunedforfivecategoriesofERMsoperatedinopen-loopmode(seeTable1).
Library6isaclosed-looplibrarytunedforLRAs.
Thelibraryselectionoccursthroughregister0x03(seethe(Address:0x03)section).
Figure12.
LibrarySelection15DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFeatureDescription(continued)Table1.
ERMLibraryTableLIBRARYRATEDVOLTAGEOVERDRIVEVOLTAGERISETIMEBRAKETIMEA1.
3V3V40msto60ms20msto40msB3V3V40msto60ms5msto15msC3V3V60msto80ms10msto20msD3V3V100msto140ms15msto25msE3V3V>140ms>30ms7.
3.
5.
2.
1WaveformSequencerThewaveformsequencerqueueswaveformidentifiersforplayback.
Eightsequenceregistersqueueuptoeightwaveformsforsequentialplayback.
AwaveformidentifierisanintegervaluereferringtotheindexpositionofawaveformintheROMlibrary.
Playbackbeginsatregisteraddress0x04whentheuserassertstheGObit(register0x0C).
Whenplaybackofthatwaveformends,thewaveformsequencerplaysthewaveformidentifierheldinregister0x05ifthenextwaveformisnon-zero.
Thewaveformsequencercontinuesinthiswayuntilitreachesanidentifiervalueofzerooruntilalleightidentifiersareplayed(registeraddresses0x04through0x0B),whicheverscenarioisreachedfirst.
Thewaveformidentifierrangeis1to127.
TheMSBofeachsequenceregistercanimplementadelaybetweensequencewaveforms.
WhentheMSBishigh,bits[6:0]indicatethelengthofthewaittime.
ThewaittimeforthatstepthenbecomesWAV_FRM_SEQ[6:0]*10ms.
7.
3.
5.
2.
2LibraryParameterizationTheROMwaveformsareaugmentedbythetimeoffsetregisters(registers0x0Dto0x10).
TheaugmentationoccursonlyfortheROMwaveformsandnotfortheotherinterfaces(suchasPWMandRTP).
Thepurposeofthefunctionalityistoaddtimestretching(ortimeshrinking)tothewaveform.
Thisfunctionalityisusefulforcustomizingtheentirelibraryofwaveformsforaspecificactuatorrisetimeandfalltime.
Thetimeparametersthatcanbestretchedorshrunkinclude:ODTOverdrivetimeSPTSustainpositivetimeSNTSustainNegativeTimeBRTBrakeTimeThetimevaluesareadditiveoffsetsandare8-bitsignedvalues.
Thedefaultoffsetofthetimevaluesis0.
Positivevaluesaddandnegativevaluessubtractfromthetimevalueoftheeffectthatiscurrentlyplayed.
Themostpositivevalueinthewaveformisautomaticallyinterpretedastheoverdrivetime,andthemostnegativevalueinthewaveformisautomaticallyinterpretedasthebraketime.
Thetime-offsetparametersareappliedtobothvoltage-timepairsandlinearramps.
Forlinearramps,linearinterpolationisstretched(orshrunk)overthetwooperativepointsfortheperiod(seeEquation1).
t+t(ofs)wheret(ofs)isthetimeoffset(1)7.
3.
5.
3Real-TimePlayback(RTP)InterfaceThereal-timeplaybackmodeisasimple,single8-bitregisterinterfacethatholdsanamplitudevalue.
Whenreal-timeplaybackisenabled,thereal-timeplaybackregisterissentdirectlytotheplaybackengine.
TheamplitudevalueisplayeduntiltheusersendsthedevicetostandbymodeorremovesthedevicefromRTPmode.
TheRTPmodeoperatesexactlylikethePWMmodeexceptthattheuserentersaregistervalueovertheI2Cratherthanadutycyclethroughtheinputpin.
Therefore,anyAPI(application-programminginterface)designedforusewithaPWMgeneratorinthehostprocessorcanwritethedatavaluesovertheI2Cratherthanwritingthedatavaluestothehosttimer.
Thisabilityfreesatimerinthehostwhileretainingcompatibilitywiththeoriginalsoftware.
16DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFortheLRA,theDRV2605deviceautomaticallytrackstheresonancefrequency.
7.
3.
5.
4AnalogInputInterfaceWhentheDRV2605deviceisinanalog-inputinterfacemode,thedeviceacceptsananalogvoltageattheIN/TRIGpin.
TheDRV2605devicedrivestheactuatorcontinuouslyinanalog-inputinterfacemodeuntiltheusersetsthedevicetostandbymodeortoenteranotherinterfacemode.
Thereferencevoltageinstandbymodeis1.
8V.
Therefore,the1.
8-Vreferencevoltageisinterpretedasa100%inputvalue.
Areferencevoltageof0.
9Visinterpretedasa50%inputvalueandareferencevoltageof0Visinterpretedasa0%inputvalue.
Theinputvalueinstandbymodeisanalogoustotheduty-cyclepercentageinPWMmode.
FortheLRA,theDRV2605automaticallytrackstheresonancefrequency.
7.
3.
5.
5Audio-to-VibeInterfaceTheDRV2605devicefeaturesanaudio-to-vibemodethatconvertsanaudioinputsignalintomeaningfulhapticeffectsusingtheImmersionaudio-to-vibetechnology.
Audio-to-Vibemodeaddsavibratorybassextensiontoportabledeviceswhichallowsuserstofeeltheaudioandvisualcontent.
Audio-to-Vibemodeisakeyfeaturebecauseitallowsforexistingapplicationstoincludehapticsensationswithoutrequiringadditionalsoftwaredrivers.
Additionally,event-drivenaudioeffectsgeneratedwithinanoperatingsystemcanbeusedtoautomaticallyprovideaproductwithhapticsensations.
SeetheWaveformPlaybackUsingAudio-to-VibeModesectionfordetails.
7.
3.
5.
6InputTriggerOptionTheDRV2605deviceincludescontinuoushapticmodes(suchasPWMandRTPmode)aswellastriggeredmodes(suchastheinternalmemoryinterface).
Thehapticeffectsinthecontinuoushapticmodesbeginassoonasthedeviceentersthemodeandstopwhenthedevicegoesintostandbymodeorexitsthecontinuoushapticmode.
Forthetriggeredmode,theDRV2605devicehasavarietyoftriggeroptionsthatareexplainedinthissection.
Inthecontinuoushapticmodes,theIN/TRIGpinprovidesexternaltriggercontroloftheGObit,whichallowsGPIOcontroltofireROMwaveforms.
TheexternaltriggercontrolcanprovideimprovedlatenciesinsystemswhereasignificantdelayexistsbetweenthedesiredeffecttimeandthetimeaGOcommandcanbesentovertheI2Cinterface.
NOTEThetriggeredeffectmustalreadybeselectedtotakeadvantageofthelowerlatency.
Thisoptionworksbestforacceleratingapre-queuedhigh-priorityeffect(suchasabuttonpress)orfortherepeatedfiringofthesameeffect(suchasscrolling).
7.
3.
5.
6.
1I2CTriggerSettingtheGObit(inregister0x0C)launchesthewaveform.
TheusercancancelthelaunchingofthewaveformbyclearingtheGObit.
7.
3.
5.
6.
2EdgeTriggerAlow-to-hightransitionontheIN/TRIGpinsetstheGObit.
Theplaybacksequenceindicatedinthewaveformsequencerplaysasnormal.
TheusercancancelthetransactionbyclearingtheGObit.
Anadditionallow-to-hightransitionwhiletheGObitishighalsocancelsthetransactionwhichclearsandresetstheGObit.
Clearingthetriggerpin(high-to-lowtransition)doesnothing,thereforetheusercansendashortpulsewithoutknowinghowlongthewaveformis.
Thepulsewidthshouldbeatleast1stoensuredetection.
17DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFigure13.
EdgeTriggerMode7.
3.
5.
6.
3LevelTriggerTheactionsoftheGObitdirectlyfollowtheIN/TRIGpin.
WhentheIN/TRIGpinishigh,theGObitishigh.
WhentheIN/TRIGpingoeslow,theGObitclears.
Therefore,afallingedgecancelsthetransaction.
TheleveltriggercanimplementaGPIO-controlledbuzzon-offcontrollerifanappropriatelylongwaveformisselected.
TheusermustholdtheIN/TRIGhighfortheentiredurationofthewaveformtocompletetheeffect.
Figure14.
LevelTriggerMode7.
3.
6EdgeRateControlTheDRV2605outputdriverimplementsedgeratecontrol(ERC).
TheERCensuresthattheriseandfallcharacteristicsoftheoutputdriversdonotemitlevelsofradiationthatcouldinterferewithothercircuitrycommoninmobileandportableplatforms.
BecauseofERCmostsystemdonotrequireexternaloutputfilters,capacitors,orferritebeads.
7.
3.
7ConstantVibrationStrengthTheDRV2605PWMinputusesadigitallevel-shifter.
Therefore,aslongastheinputvoltagemeetstheVIHandVILlevels,thevibrationstrengthremainsthesameevenifthedigitallevelsvary.
TheDRV2605devicealsofeaturespower-supplyfeedback.
Ifthesupplyvoltagedriftsovertime(becauseofbatterydischarge,forexample),thevibrationstrengthremainsthesameaslongasenoughsupplyvoltageisavailabletosustaintherequiredoutputvoltage.
7.
3.
8BatteryVoltageReportingDuringplayback,theDRV2605deviceprovidesreal-timevoltagemeasurementoftheVDDpin.
TheVBAT[7:0]bitlocatedinregister0x21providesthisinformation.
18DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated7.
3.
9One-TimeProgrammable(OTP)MemoryforConfigurationTheDRV2605devicecontainsnonvolatile,on-chip,OTPmemoryforspecificconfigurationparameters.
Whenwritten,theDRV2605deviceretainsthedevicesettingsinregisters0x16through0x1Aincludingafterpowercycling.
Thisretentionallowstheusertoaccountforsmallvariationsinactuatormanufacturingfromunittounitaswellastoshortenthedevice-initializationprocessfordevice-specificparameterssuchasactuatortype,actuator-ratedvoltage,andotherparameters.
AnadditionalbenefitofOTPisthattheDRV2605memorycanbecustomizedatthedevice-testlevelwithoutdrivingchangesinthedevicesoftware.
7.
3.
10Low-PowerStandbySettingthedevicetostandbyreducestheidlepowerconsumptionwithoutresettingtheregisters.
InLow-PowerStandbymode,theDRV2605devicefeaturesafastturnontimewhenitisrequestedtoplayawaveform.
7.
3.
11DeviceProtection7.
3.
11.
1ThermalProtectionTheDRV2605devicehasthermalprotectionthatcausesthedevicetoshutdownifitbecomestoohot.
Intheeventwherethethermalprotectionkicksin,theDRV2605deviceassertsaflag(bitOVER_TEMPinregister0x00)tonotifythehostprocessor.
7.
3.
11.
2OvercurrentProtectionoftheActuatorIftheimpedanceattheoutputpinoftheDRV2605deviceistoolow,thedevicelatchestheover-currentflag(OC_DETECTbitinregister0x00)andshutsdown.
Thedeviceperiodicallymonitorsthestatusoftheshortandremainsinthisconditionuntiltheshortisremoved.
Whentheshortisremoved,theDRV2605devicerestartsinthedefaultstate.
7.
4DeviceFunctionalModes7.
4.
1PowerStatesTheDRV2605devicehasthreedifferentpowerstateswhichallowfordifferentpower-consumptionlevelsandfunctions.
Figure15showsthetransitionintoandoutofeachstate.
Figure15.
Power-StateTransitionDiagram7.
4.
1.
1OperationWithVDD6V(AbsoluteMaximumVDD)TheDRV2605deviceisdesignedtooperateatupto5.
5V,withanabsolutemaximumvoltageof6V.
Ifexposedtovoltagesabove6V,thedevicecansufferpermanentdamage.
19DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedDeviceFunctionalModes(continued)7.
4.
1.
3OperationWithENControlTheENpinoftheDRV2605devicegatestheactiveoperation.
WhentheENpinislogichigh,theDRV2605deviceisactive.
WhentheENpinislogiclow,thedeviceenterstheshutdownstate,whichisthelowestpowerstateofthedevice.
Thedeviceregistersarenotreset.
TheENpinoperationisparticularlyusefulforconstant-sourcePWMandanaloginputmodestomaintaincompatibilitywithnon-I2Cdevicesignaling.
TheENpinmustbehightowriteI2Cdeviceregisters.
However,iftheENpinislowtheDRV2605devicecanstillacknowledge(ACK)duringanI2Ctransaction,however,noreadorwriteispossible.
Tocompletelyresetthedevicetothepowerupstate,settheDEV_RESETbitinregister0x01.
7.
4.
1.
4OperationWithSTANDBYControlTheSTANDBYbitinregister0x01forcesthedeviceinanoutofthestandbystate.
TheSTANDBYbitisassertedbydefault.
WhentheSTANDBYbitisasserted,theDRV2605devicegoesintoalow-powerstate.
InthestandbystatethedeviceretainsregistervaluesandtheabilitytohaveI2Ccommunication.
Thepropertiesofthestandbystatealsofeatureafastturn,wakeup,andplay,on-time.
AssertingtheSTANDBYbithasanimmediateeffect.
Forexample,ifawaveformisplayed,itimmediatelystopswhentheSTANDBYbitisasserted.
CleartheSTANDBYbittoexitthestandbystate(andgotothereadystate).
7.
4.
1.
5OperationWithDEV_RESETControlTheDEV_RESETbitinregister0x01performstheequivalentofpowercyclingthedevice.
Anyplaybackoperationsareimmediatelyinterrupted,andallregistersareresettothedefaultvalues.
TheDev_Resetbitautomatically-clearsaftertheresetoperationiscomplete.
7.
4.
1.
6OperationintheActiveStateIntheactivestate,theDRV2605devicehasI2Ccommunicationandiscapableofplayingwaveforms,runningcalibration,andrunningdiagnostics.
Theseoperationsarereferredtoasprocesses.
Figure16showstheflowofstarting,orfiring,aprocess.
NoticethattheGOsignalfirestheprocesses.
NotethattheGOsignalisnotthesameastheGObit.
Figure17showsadiagramoftheGO-signalbehavior.
Note:Ifanoutputshortispresentbeforeawaveformisplayed,changingmodes(withtheMODE[2:0]bitinregister0x01)isrequiredtoresumenormalplayback.
Figure16.
DiagramofActiveStates7.
4.
2ChangingModesofOperationTheDRV2605hasmultiplemodesforplayingwaveforms,aswellasacalibrationmodeandadiagnosticmode.
Table2liststheavailablemodes.
Table2.
ModeSelectionTableMODEMODE[2:0]N_PWM_ANALOGInternaltriggermode0XExternalTriggermode(edge)1X20DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedTable2.
ModeSelectionTable(continued)MODEMODE[2:0]N_PWM_ANALOGExternaltriggermode(level)2XAnaloginputmode30PWMmode31Audio-to-vibemode4XRTPmode5XDiagnosticsmode6XCalibrationmode7X7.
4.
3OperationoftheGOBitTheGObitistheprimarywaytoasserttheGOsignal,whichfiresprocessesintheDRV2605device.
TheprimarypurposeoftheGObitistofiretheplaybackofthewaveformidentifiersinthewaveformsequencer(registers0x04to0x0B).
However,TheGObitcanalsofirethecalibrationordiagnosticsprocesses.
WhenusingtheGObittoplaywaveformsininternaltriggermode,theGObitisassertedbywriting0x01toregister0x0C.
Inthiscase,theGObitcanbethoughtofasasoftwaretriggerforhapticwaveforms.
TheGObitremainshighuntiltheplaybackofthehapticwaveformsequenceiscomplete.
ClearingtheGObitduringwaveformplaybackcancelsthewaveformsequence.
TheGObitcanalsobeassertedbytheexternaltriggerwheninexternaltriggermode.
TheGObitinregister0x0Cmirrorsthestateoftheexternaltrigger.
SettingRTPmode,PWMmode,oraudio-to-vibemodealsosetstheGObit.
However,settingtheGObitinthiswayhasnoimpactontheGObitlocatedinregister0x0C.
Figure17.
GO-SignalLogic7.
4.
4OperationDuringExceptionalConditionsThissectionlistsdifferentexceptionalconditionsandthewaysthattheDRV2605deviceoperatesduringtheseconditions.
Thissectionalsodescribeshowthedevicegoesintoandoutofthesestates.
7.
4.
4.
1OperationWithNoActuatorAttachedInLRAclosed-loopmode,ifawaveformisplayedwithoutanactuatorconnectedtotheOUT+andOUT–pins,theoutputpinstoggle.
However,thetogglingfrequencyisnotpredictable.
InLRAopen-loopmode,theoutputpinstoggleatthespecifiedopen-loopfrequency.
7.
4.
4.
2OperationWithaShortatREGPinIftheREGpinisshortedtoGND,thedeviceautomaticallyshutsdown.
Whentheshortisremoved,thedevicestartsinthedefaultcondition.
7.
4.
4.
3OperationWithaShortatOUT+,OUT–,orBothIfanyoftheoutputpins(OUT+orOUT–)isshortedtoVDD,GND,ortoeachotherwhilethedeviceisplayingawaveform,theOC_DETECTbitisassertedandremainsasserteduntiltheshortisremoved.
Acurrent-protectioncircuitautomaticallyenablestoshutdownthecurrentthroughtheshort.
21DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedIfthedriverisplayingawaveformtheDRV2605devicechecksforshortsintheoutputthrougheitherahaptic-playback,auto-calibration,ordiagnosticsprocess.
Iftheshortoccurswhenthedeviceisidle,theshortisnotdetecteduntilthedeviceattemptstorunawaveform.
22DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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5Programming7.
5.
1Auto-ResonanceEngineProgrammingfortheLRA7.
5.
1.
1Drive-TimeProgrammingTheresonancefrequencyofeachLRAactuatorvariesbasedonmanyfactorsandisgenerallydominatedbymechanicalproperties.
Theauto-resonanceengine-trackingsystemisoptimizedbyprovidinginformationabouttheresonancefrequencyoftheactuator.
TheDRIVE_TIME[4:0]bitisusedasaninitialguessforthehalf-periodoftheLRA.
Thedrivetimeisautomaticallyandquicklyadjustedforoptimumdrive.
Forexample,iftheLRAhasaresonancefrequencyof200Hz,thenthedrivetimeshouldbesetto2.
5ms.
ForERMactuators,theDRIVE_TIME[4:0]bitcontrolstherateforback-EMFsampling.
Lowerdrivetimesimplyhigherback-EMFsamplingfrequencieswhichcausehigherpeak-to-averageratiosintheoutputsignal,andrequiresmoresupplyheadroom.
Higherdrivetimesimplylowerback-EMFsamplingfrequencieswhichcausethefeedbacktoreactataslowerrate.
7.
5.
1.
2Current-DissipationTimeProgrammingTosensetheback-EMFoftheactuator,theDRV2605devicegoesintohighimpedancemode.
However,beforethedeviceentershighimpedancemode,thedevicemustdissipatethecurrentintheactuator.
TheDRV2605devicecontrolsthetimeallocatedfordissipation-currentthroughtheIDISS_TIME[1:0]bit.
7.
5.
1.
3BlankingTimeProgrammingAfterthecurrentintheactuatordissipates,theDRV2605devicewaitsforablankingtimeofthesignaltosettlebeforetheback-EMFanalog-to-digital(AD)conversionconverts.
TheBLANKING_TIME[1:0]bitcontrolsthistime.
7.
5.
2Automatic-LevelCalibrationProgramming7.
5.
2.
1RatedVoltageProgrammingTheratedvoltageisthedrivingvoltagethatthedriverwilloutputduringsteadystate.
However,inclosed-loopdrivemode,temporarilyhavinganoutputvoltagethatishigherthantheratedvoltageispossible.
SeetheOverdriveVoltage-ClampProgrammingsectionfordetails.
TheRATED_VOLTAGE[7:0]bitinregister0x16setstheratedvoltagefortheclosed-loopdrivemodes.
FortheERM,Equation2calculatestheaveragesteady-statevoltagewhenafull-scaleinputsignalisprovided.
FortheLRA,Equation3calculatestheroot-mean-square(RMS)voltagewhendriventosteadystatewithafull-scaleinputsignal.
(2)(3)Inopen-loopmode,theRATED_VOLTAGE[7:0]bitisignored.
Instead,theOD_CLAMP[7:0]bit(inregister0x17)isusedtosettheratedvoltagefortheopen-loopdrivemodes.
FortheERM,Equation4calculatestheratedvoltagewithafull-scaleinputsignal.
FortheLRA,Equation5calculatestheRMSvoltagewithafull-scaleinputsignal.
(4)(5)Theauto-calibrationroutineusestheRATED_VOLTAGE[7:0]andOD_CLAMP[7:0]bitsasinputsandthereforetheseregistersmustbewrittenbeforecalibrationisperformed.
AnymodificationofthisregistervalueshouldbefollowedbycalibrationtoappropriatelysetA_CAL_BEMF[7:0].
23DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedProgramming(continued)7.
5.
2.
2OverdriveVoltage-ClampProgrammingDuringclosed-loopoperation,theactuatorfeedbackallowstheoutputvoltagegoabovetheratedvoltageduringtheautomaticoverdriveandautomaticbrakingperiods.
TheOD_CLAMP[7:0]bit(inRegister0x17)setsaclampsothattheautomaticoverdriveisbounded.
TheOD_CLAMP[7:0]bitalsoservesasthefull-scalereferencevoltageforopen-loopoperation.
TheOD_CLAMP[7:0]bitalwaysrepresentsthemaximumpeakvoltagethatisallowed,regardlessofthemode.
NOTEIfthesupplyvoltage(VDD)islessthantheoverdriveclampvoltage,theoutputdriverisunabletoreachtheclampvoltagevaluebecausetheoutputvoltagecannotexceedthesupplyvoltage.
Iftheratedvoltageexceedstheoverdriveclampvoltage,theoverdriveclampvoltagehaspriorityovertheratedvoltage.
InERMmode,useEquation6tocalculatetheallowedmaximumvoltage.
InLRAmode,useEquation7tocalculatethemaximumpeakvoltage.
(6)(7)7.
5.
3I2CInterface7.
5.
3.
1TIHapticBroadcastModeTheDRV2605devicefeaturestheTIhapticbroadcastmodewheretheDRV2605respondstotheslaveaddress0x58(7-bit)or1011000.
HapticbroadcastmodeisusefulintheeventthatmultipledriversimplementingtheTIhapticbroadcastmodeareinstalledinthesystem.
Insuchascenario,writingtheGObittotheTIhapticbroadcastslaveaddresswillcauseallhapticdriverstotriggertheprocessatthesametime.
7.
5.
3.
2GeneralI2COperationTheI2Cbusemploystwosignals,SDA(data)andSCL(clock),tocommunicatebetweenintegratedcircuitsinasystem.
Thebustransfersdataserially,onebitatatime.
The8-bitaddressanddatabytesaretransferredwiththemost-significantbit(MSB)first.
Inaddition,eachbytetransferredonthebusisacknowledgedbythereceivingdevicewithanacknowledgebit.
Eachtransferoperationbeginswiththemasterdevicedrivingastartconditiononthebusandendswiththemasterdevicedrivingastopconditiononthebus.
Thebususestransitionsonthedatapin(SDA)whiletheclockisatlogichightoindicatestartandstopconditions.
Ahigh-to-lowtransitionontheSDAsignalindicatesastart,andalow-to-hightransitionindicatesastop.
Normaldata-bittransitionsmustoccurwithinthelowtimeoftheclockperiod.
Figure18showsatypicalsequence.
Themasterdevicegeneratesthe7-bitslaveaddressandtheread-write(R/W)bittostartcommunicationwithaslavedevice.
Themasterdevicethenwaitsforanacknowledgecondition.
TheslavedeviceholdstheSDAsignallowduringtheacknowledgeclockperiodtoindicateacknowledgment.
Whenthisacknowledgmentoccurs,themastertransmitsthenextbyteofthesequence.
Eachdeviceisaddressedbyaunique7-bitslaveaddressplusaR/Wbit(1byte).
Allcompatibledevicessharethesamesignalsthroughabidirectionalbususingawired-ANDconnection.
Thenumberofbytesthatcanbetransmittedbetweenstartandstopconditionsisnotlimited.
Whenthelastwordtransfers,themastergeneratesastopconditiontoreleasethebus.
Figure18showsagenericdata-transfersequence.
UseexternalpullupresistorsfortheSDAandSCLsignalstosetthelogic-highlevelforthebus.
Pullupresistorswithvaluesbetween660Ωand4.
7kΩarerecommended.
DonotallowtheSDAandSCLvoltagestoexceedtheDRV2605supplyvoltage,VDD.
NOTETheDRV2605slaveaddressis0x5A(7-bit),or1011010inbinary.
24DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedProgramming(continued)Figure18.
TypicalI2CSequenceTheDRV2605deviceoperatesasanI2C-slave1.
8-Vlogicthresholds,butcanoperateuptotheVDDvoltage.
Thedeviceaddressis0x5A(7-bit),or1011010inbinarywhichisequivalentto0xB4(8-bit)forwritingand0xB5(8-bit)forreading.
7.
5.
3.
3Single-ByteandMultiple-ByteTransfersTheserialcontrolinterfacesupportsbothsingle-byteandmultiple-byteR/Woperationsforallregisters.
Duringmultiple-bytereadoperations,theDRV2605devicerespondswithdataonebyteatatimeandbeginningatthesignedregister.
Thedevicerespondsaslongasthemasterdevicecontinuestorespondwithacknowledges.
TheDRV2605supportssequentialI2Caddressing.
Forwritetransactions,asequentialI2Cwritetransactionhastakenplaceifaregisterisissuedfollowedbydataforthatregisteraswellastheremainingregistersthatfollow.
ForI2Csequential-writetransactions,theregisterissuedthenservesasthestartingpointandtheamountofdatatransmittedsubsequentlybeforeastoporstartistransmitteddetermineshowmanyregistersarewritten.
7.
5.
3.
4Single-ByteWriteAsshowninFigure19,asingle-bytedata-writetransferbeginswiththemasterdevicetransmittingastartconditionfollowedbytheI2Cdeviceaddressandtheread-writebit.
Theread-writebitdeterminesthedirectionofthedatatransfer.
Forawrite-datatransfer,theread-writebitmustbesetto0.
AfterreceivingthecorrectI2Cdeviceaddressandtheread-writebit,theDRV2605respondswithanacknowledgebit.
Next,themastertransmitstheregisterbytecorrespondingtotheDRV2605internal-memoryaddressthatisaccessed.
Afterreceivingtheregisterbyte,thedevicerespondsagainwithanacknowledgebit.
Finally,themasterdevicetransmitsastopconditiontocompletethesingle-bytedata-writetransfer.
Figure19.
Single-ByteWriteTransfer25DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedProgramming(continued)7.
5.
3.
5Multiple-ByteWriteandIncrementalMultiple-ByteWriteAmultiple-bytedatawritetransferisidenticaltoasingle-bytedatawritetransferexceptthatmultipledatabytesaretransmittedbythemasterdevicetotheDRV2605deviceasshowninFigure20.
Afterreceivingeachdatabyte,theDRV2605devicerespondswithanacknowledgebit.
Figure20.
Multiple-ByteWriteTransfer7.
5.
3.
6Single-ByteReadFigure21showsthatasingle-bytedata-readtransferbeginswiththemasterdevicetransmittingastartconditionfollowedbytheI2Cdeviceaddressandtheread-writebit.
Forthedata-readtransfer,bothawritefollowedbyareadactuallyoccur.
Initially,awriteoccurstotransfertheaddressbyteoftheinternalmemoryaddresstoberead.
Asaresult,theread-writebitissetto0.
AfterreceivingtheDRV2605addressandtheread-writebit,theDRV2605devicerespondswithanacknowledgebit.
Themasterthensendstheinternalmemoryaddressbyte,afterwhichthedeviceissuesanacknowledgebit.
ThemasterdevicetransmitsanotherstartconditionfollowedbytheDRV2605addressandtheread-writebitagain.
Thistime,theread-writebitissetto1,indicatingareadtransfer.
Next,theDRV2605devicetransmitsthedatabytefromthememoryaddressthatisread.
Afterreceivingthedatabyte,themasterdevicetransmitsanot-acknowledgefollowedbyastopconditiontocompletethesingle-bytedatareadtransfer.
SeethenoteintheGeneralI2COperationsection.
Figure21.
Single-ByteReadTransfer7.
5.
3.
7Multiple-ByteReadAmultiple-bytedata-readtransferisidenticaltoasingle-bytedata-readtransferexceptthatmultipledatabytesaretransmittedbytheDRV2605devicetothemasterdeviceasshowninFigure22.
Withtheexceptionofthelastdatabyte,themasterdevicerespondswithanacknowledgebitafterreceivingeachdatabyte.
Figure22.
Multiple-ByteReadTransfer26DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedProgramming(continued)7.
5.
4ProgrammingforOpen-LoopOperationTheDRV2605devicecanbeusedinopen-loopmodeandclosed-loopmode.
Ifopen-loopoperationisdesired,thefirststepistodeterminewhichactuatortypeistouse,eitherERMorLRA.
7.
5.
4.
1ProgrammingforERMOpen-LoopOperationToconfiguretheDRV2605deviceinERMopen-loopoperation,theERMmustbeselectedbywritingtheN_ERM_LRAbitto0(inregister0x1A),andtheERM_OPEN_LOOPbitto1inregister0x1D.
7.
5.
4.
2ProgrammingforLRAOpen-LoopOperationToconfiguretheDRV2605deviceinLRAopen-loopoperation,theLRAmustbeselectedbywritingtheN_ERM_LRAbitto1inregister0x1A,andtheLRA_OPEN_LOOPbitto1inregister0x1D.
7.
5.
5ProgrammingforClosed-LoopOperationForclosed-loopoperation,thedevicemustbecalibratedaccordingtotheactuatorselection.
Whencalibratedaccordingly,theuserisonlyrequiredtoprovidethedesiredwaveform.
TheDRV2605deviceautomaticallyadjuststheleveland,fortheLRA,automaticallyadjuststhedrivingfrequency.
7.
5.
6AutoCalibrationProcedureThecalibrationenginerequiresanumberofbitsasinputsbeforetheenginecanbeexecuted(seeFigure23).
Whentheinputsareconfigured,thecalibrationroutinecanbeexecuted.
Aftercalibrationexecutionoccurs,theoutputparametersarewrittenoverthespecifiedregisterlocations.
Figure23showsalloftherequiredinputsandgeneratedoutputs.
Toensureproperauto-resonanceoperation,theLRAactuatortyperequiresmoreinputparametersthantheERM.
TheLRAparametersareignoredwhenthedeviceisinERMmode.
Figure23.
Calibration-EngineFunctionalDiagramVariationoccursbetweendifferentactuatorseveniftheactuatorsareofthesamemodel.
Toensureoptimalresults,TIrecommendsthatthecalibrationroutineberunatleastonceforeachactuator.
TheOTPfeatureoftheDRV2605devicecanstorethecalibrationvalues.
Becauseofthestoredvalues,thecalibrationproceduredoesnothaveruneverytime.
Havingasinglesetofcalibrationregistervaluesthatcanbeloadedduringthesysteminitializationispossible.
27DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedProgramming(continued)Thefollowinginstructionslistthestep-by-stepregisterconfigurationforauto-calibration.
ForadditionaldetailsseetheRegisterMapsection.
1.
ApplythesupplyvoltagetotheDRV2605device,andpulltheENpinhigh.
Thesupplyvoltageshouldallowforadequatedrivevoltageoftheselectedactuator.
2.
Writeavalueof0x07toregister0x01.
ThisvaluemovestheDRV2605deviceoutofSTANDBYandplacestheMODE[2:0]bitsinauto-calibrationmode.
3.
Populatetheinputparametersrequiredbytheauto-calibrationengine:a.
ERM_LRA—selectionwilldependondesiredactuator.
b.
FB_BRAKE_FACTOR[2:0]—Avalueof2isvalidformostactuators.
c.
LOOP_GAIN[1:0]—Avalueof2isvalidformostactuators.
d.
RATED_VOLTAGE[7:0]—SeetheRatedVoltageProgrammingsectionforcalculatingthecorrectregistervalue.
e.
OD_CLAMP[7:0]—SeetheOverdriveVoltage-ClampProgrammingsectionforcalculatingthecorrectregistervalue.
f.
AUTO_CAL_TIME[1:0]—Avalueof3isvalidformostactuators.
g.
DRIVE_TIME[3:0]—SeetheDrive-TimeProgrammingforcalculatingthecorrectregistervalue.
h.
SAMPLE_TIME[1:0]—Avalueof3isvalidformostactuators.
i.
BLANKING_TIME[1:0]—Avalueof1isvalidformostactuators.
j.
IDISS_TIME[1:0]—Avalueof1isvalidformostactuators.
4.
SettheGObit(write0x01toregister0x0C)tostarttheauto-calibrationprocess.
Whenautocalibrationiscomplete,theGObitautomaticallyclears.
Theauto-calibrationresultsarewrittenintherespectiveregistersasshowninFigure23.
5.
CheckthestatusoftheDIAG_RESULTbit(inregister0x00)toensurethattheauto-calibrationroutineiscompletewithoutfaults.
6.
Evaluatesystemperformancewiththeauto-calibratedsettings.
Notethattheevaluationshouldoccurduringthefinalassemblyofthedevicebecausetheauto-calibrationprocesscanaffectactuatorperformanceandbehavior.
Ifanyadjustmentisrequired,theinputscanbemodifiedandthissequencecanberepeated.
Iftheperformanceissatisfactory,theusercandoanyofthefollowing:a.
Repeatthecalibrationprocessuponsubsequentpowerups.
b.
Storetheauto-calibrationresultsinhostprocessormemoryandrewritethemtotheDRV2605deviceuponsubsequentpowerups.
ThedeviceretainsthesesettingswheninSTANDBYmodeorwhentheENpinislow.
c.
Programtheresultspermanentlyinnonvolatile,on-chipOTPmemory.
Evenwhenadevicepowercycleoccurs,thedeviceretainstheauto-calibrationsettings.
SeetheProgrammingOn-ChipOTPMemorysectionforadditionalinformation.
7.
5.
7ProgrammingOn-ChipOTPMemoryTheOTPmemorycanonlybewrittenonce.
TopermanentlyprogramtheOTPmemoryinregisters0x16through0x1A,usethefollowingsteps:1.
Writeregisters0x16through0x1Awiththedesiredconfigurationandcalibrationvalueswhichprovidesatisfactoryperformance.
2.
Ensurethatthesupplyvoltage(VDD)isbetween4Vand4.
4V.
Thisvoltageisrequiredforthenonvolatilememorytoprogramproperly.
3.
SettheOTP_PROGRAMbitbywritingavalueof0x01toregister0x1E.
WhentheOTPmemoryiswrittenwhichcanonlyoccuronceinthedevice,theOTP_STATUSbit(inregister0x1E)onlyreads1.
4.
ResetthedevicebypowercyclingthedeviceorsettingtheDEV_RESETbitinregister0x01,andthenreadregisters0x16to0x1Atoensurethattheprogrammedvalueswereretained.
28DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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5.
8WaveformPlaybackProgramming7.
5.
8.
1DataFormatsforWaveformPlaybackTheDRV2605smart-looparchitecturehasthreemodesofoperation.
EachofthemodescandriveeitherERMorLRAdevices.
1.
Open-loopmode2.
Closed-loopmode(unidirectional)3.
Closed-loopmode(bidirectional)Eachmodehasdifferentadvantagesanddisadvantages.
TheDRV2605devicebringsnewcutting-edgeactuatorcontrolwithclosed-loopoperationaroundtheback-EMFforautomaticoverdriveandbraking.
However,someexistinghapticimplementationsalreadyincludeoverdriveandbrakingthatareembeddedinthewaveformdata.
Open-loopmodeisusedtopreservecompatibilitywithsuchsystems.
ThefollowingsectionsshowhowtheinputdataforeachDRV2605interfaceistranslatedtotheoutputdrivesignal.
7.
5.
8.
1.
1Open-LoopModeInopen-loopmode,thereferencelevelforfull-scaledriveissetbytheOD_CLAMP[7:0]bitinRegister0x17.
Amid-scaleinputvaluegivesnodrivesignal,andaless-thanmid-scalegivesanegativedrivevalue.
ForanERM,anegativedrivevalueresultsincounter-rotation,orbraking.
ForanLRA,anegativedrivevalueresultsina180-degreephaseshiftincommutation.
TheRTPmodehas8bitsofresolutionovertheI2Cbus.
TheRTPdatacaneitherbeinasigned(2scomplement)orunsignedformatasdefinedbytheDATA_FORMAT_RTPbit.
Figure24.
29DRV2605www.
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5.
8.
1.
2Closed-LoopMode,UnidirectionalInclosed-loopunidirectionalmode,theDRV2605deviceprovidesautomaticoverdriveandbrakingforbothERMandLRAactuators.
Closed-loopunidirectionalmodeistheeasiestmodetouseandunderstand.
Closed-loopunidirectionalmodeusesthefull8-bitresolutionofthedriver.
Closed-loopunidirectionalmodeoffersthebestperformance;however,thedataformatisnotphysicallycompatiblewiththeopen-loopmodedatathatcanbeusedinsomeexistingsystemsThereferencelevelforsteady-statefull-scaledriveissetbytheRATED_VOLTAGE[7:0]bit(whenauto-calibrationisperformed).
Theoutputvoltagecanmomentarilyexceedtheratedvoltageforautomaticoverdriveandbraking,butdoesnotexceedtheOD_CLAMP[7:0]voltage.
Brakingoccursautomaticallybasedontheinputsignalwhentheback-EMFfeedbackdeterminesthatbrakingisnecessary.
Becausethesystemisunidirectionalinclosed-loopunidirectionalmode,onlyunsigneddatashouldbeused.
TheRTPmodehas8bitsofresolutionovertheI2Cbus.
SettingtheDATA_FORMAT_RTPbitto0(signed)isnotrecommendedforclosed-loopunidirectionalmode.
Figure25.
NOTETheTS2200librarydataisstoredinbidirectionalformatandcannotbeusedinunidirectionalmode.
FortheRTPinterface,settheDATA_FORMAT_RTPbitto1(unsigned).
30DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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5.
8.
1.
3Closed-LoopMode,BidirectionalInclosed-loopbidirectionalmode,theDRV2605deviceprovidesautomaticoverdriveandbrakingforbothERMandLRAdevices.
Closed-loopbidirectionalmodepreservescompatibilitywithdatacreatedinopen-loopsignalingbymaintainingzerodrive-strengthatthemid-scalevalue.
Wheninputvalueslessthanthemid-scalevaluearegiven,theDRV2605deviceinterpretsthemasthesameasthemid-scalewithzerodrive.
Thereferencelevelforsteady-statefull-scaledriveissetbytheRATED_VOLTAGE[7:0]bit(whenautocalibrationisperformed).
Theoutputvoltagecanmomentarilyexceedtheratedvoltageforautomaticoverdriveandbraking,butdoesnotexceedtheOD_CLAMP[7:0]voltage.
Brakingoccursautomaticallybasedontheinputsignalwhentheback-EMFfeedbackdeterminesthatbrakingisnecessary.
AlthoughtheClosed-Loopmodepreservescompatibilitywithexistingdevicedataformats,itprovidesclosedloopbenefitsandisthedefaultconfigurationatpowerup.
TheRTPmodehas8bitsofresolutionovertheI2Cbus.
TheRTPdatacaneitherbeinsigned(2scomplement)orunsignedformatasdefinedbytheDATA_FORMAT_RTPbit.
Figure26.
NOTEClosed-loopbidirectionalmodeiscompatiblewithallDRV2605interfacesexceptforTS2200LibraryA(withfixedoverdriveprogramming).
LibraryAshouldonlybeusedinopen-loopmode.
LibrariesBthroughF(nooverdrive)cantakeadvantageoftheautomaticoverdriveandbrakingofclosed-loopbidirectionalmode.
31DRV2605www.
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5.
8.
2WaveformSetupandPlaybackPlaybackofahapticeffectcanoccurinmultipleways.
UsingthePWMmode,RTPmode,audio-to-vibemode,andanalog-inputmodecanprovidethewaveforminrealtime.
ThewaveformscanalsobeplayedfromtheROMinwhichcasethewaveformplaybackengineisusedandthewaveformiseitherplayedbyaninternalGObit(register0x0C),orbyanexternaltrigger.
7.
5.
8.
2.
1WaveformPlaybackUsingRTPModeTheusercanentertheRTPmodebywritingtheMODE[2:0]bitto5inregister0x01.
WheninRTPmode,theDRV2605devicedrivestheactuatorcontinuouslywiththeamplitudespecifiedintheRTP_INPUT[7:0]bit(inregister0x02).
BecausetheamplitudetracksthevaluespecifiedintheRTP_INPUT[7:0]bit,theI2Cbuscanstreamwaveforms.
7.
5.
8.
2.
2WaveformPlaybackUsingtheAnalog-InputModeTheusercanentertheanalog-inputmodebysettingtheMODE[2:0]bitto3inregister0x01andbysettingtheN_PWM_ANALOGbitto1inregister0x1D.
Wheninanalog-inputmode,theDRV2605deviceacceptsananalogvoltageattheIN/TRIGpin.
TheDRV2605devicedrivestheactuatorcontinuouslyinanalog-inputmodeuntiltheusersetsthedeviceintoSTANDBYmodeorentersanotherinterfacemode.
Thereferencevoltageinanalog-inputmodeis1.
8V.
Thereforea1.
8-Vreferencevoltageisinterpretedasa100%inputvalue,a0.
9-Vreferencevoltageisinterpretedas50%,anda0-Vreferencevoltageisinterpretedas0%.
Theinputvalueisanalogoustotheduty-cyclepercentageinPWMmode.
Theinterpretationofthesepercentagesvariesaccordingtotheselectedmodeofoperation.
SeetheDataFormatsforWaveformPlaybacksectionfordetails.
7.
5.
8.
2.
3WaveformPlaybackUsingPWMModeTheusercanenterthePWMmodebysettingtheMODE[2:0]bitto3inregister0x01andbysettingtheN_PWM_ANALOGbitto0inregister0x1D.
WheninPWMmode,theDRV2605deviceacceptsPWMdataattheIN/TRIGpin.
TheDRV2605devicedrivestheactuatorcontinuouslyinPWMmodeuntiltheusersetsthedevicetoSTANDBYmodeortoenteranotherinterfacemode.
Theinterpretationoftheduty-cycleinformationvariesaccordingtotheselectedmodeofoperation.
SeetheDataFormatsforWaveformPlaybacksectionfordetails.
7.
5.
8.
2.
4WaveformPlaybackUsingAudio-to-VibeModeTotakeadvantageoftheaudio-to-vibefeature,connecttheDRV2605devicetoaline-outsourceasshowninFigure55.
Thefull-scalerangeoftheIN/TRIGpinintheaudio-to-vibemodeis1.
8VPP.
A1-FcapacitorisrecommendedtoACcoupletheaudiosourceandtheIN/TRIGpin.
Forsourcessmallerthan1.
8VPP,theATH_MAX_INPUTbitinregister0x13canscaledowntheinputrange.
Thedeviceentersaudio-to-vibemodewhentheMODE[2:0]bitissetto4inregister0x01andwhentheAC_COUPLEbitinregister0x1BandtheN_PWM_ANALOGbitinregister0x1Daresetto1.
SeetheRegisterMapsectionfordetails.
7.
5.
8.
2.
5WaveformSequencerIftheuseruseslibraryeffects,theeffectsmustfirstbeloadedintothewaveformsequencer,andthentheeffectscanbelaunchedbyusinganyofthetriggeroptions(seetheWaveformTriggerssectionfordetails).
Thewaveformsequencer(seetheWaveformSequencer(Address:0x04to0x0B)section)queueswaveform-libraryidentifiersforplayback.
Eightsequenceregistersqueueuptoeightlibrarywaveformsforsequentialplayback.
AwaveformidentifierisanintegervaluereferringtotheindexpositionofawaveformintheROMlibrary.
Playbackbeginsatregisteraddress0x04whentheuserassertstheGObit(register0x0C).
Whenplaybackofthatwaveformends,thewaveformsequencerplaysthenextwaveformidentifierheldinregister0x05,ifthenextwaveformisnon-zero.
Thewaveformsequencercontinuesinthiswayuntilthesequencerreachesanidentifiervalueofzerooruntilalleightidentifiersareplayed(registeraddresses0x04through0x0B),whichevercomesfirst.
Thewaveformidentifierrangeis1to123.
TheMSBofeachsequenceregistercanbeusedtoimplementadelaybetweensequencewaveforms.
WhentheMSBishigh,bits6-0indicatethelengthofthewaittime.
ThewaittimeforthatstepthenbecomesWAV_FRM_SEQ[6:0]*10ms.
32DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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WaveformSequencerProgramming7.
5.
8.
2.
6WaveformTriggersWhenthewaveformsequencerhastheeffect(oreffects)loaded,thewaveformsequencercanbetriggeredbyaninternaltrigger,externaltrigger(edge),orexternaltrigger(level).
TotriggerusingtheinternaltriggersettheMODE[2:0]bitto0inregister0x01.
Totriggerusingtheexternaltrigger(edge),settheMODE[2:0]bitto1andthenfollowthetriggerinstructionslistedintheEdgeTriggersection.
Totriggerusingtheexternaltrigger(level),settheMODE[2:0]bitto2andthenfollowthetriggerinstructionslistedintheLevelTriggersection.
DRV2605www.
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6RegisterMapTable3.
RegisterMapOverviewREGNO.
DEFAULTBIT7BIT6BIT5BIT4BIT3BIT2BIT1BIT00x000x60DEVICE_ID[2:0]ReservedDIAG_RESULTFB_STSOVER_TEMPOC_DETECT0x010x40DEV_RESETSTANDBYReservedMODE[2:0]0x020x00RTP_INPUT[7:0]0x030x00ReservedHI_ZReservedLIBRARY_SEL[2]LIBRARY_SEL[1]LIBRARY_SEL[0]0x040x01WAIT1WAV_FRM_SEQ1[6:0]0x050x00WAIT2WAV_FRM_SEQ2[6:0]0x060x00WAIT3WAV_FRM_SEQ3[6:0]0x070x00WAIT4WAV_FRM_SEQ4[6:0]0x080x00WAIT5WAV_FRM_SEQ5[6:0]0x090x00WAIT6WAV_FRM_SEQ6[6:0]0x0A0x00WAIT7WAV_FRM_SEQ7[6:0]0x0B0x00WAIT8WAV_FRM_SEQ8[6:0]0x0C0x00ReservedGO0x0D0x00ODT[7:0]0x0E0x00SPT[7:0]0x0F0x00SNT[7:0]0x100x00BRT[7:0]0x110x05ReservedATH_PEAK_TIME[1:0]ATH_FILTER[1:0]0x120x19ATH_MIN_INPUT[7:0]0x130xFFATH_MAX_INPUT[7:0]0x140x19ATH_MIN_DRIVE[7:0]0x150xFFATH_MAX_DRIVE[7:0]0x160x3FRATED_VOLTAGE[7:0]0x170x89OD_CLAMP[7:0]0x180x0DA_CAL_COMP[7:0]0x190x6DA_CAL_BEMF[7:0]0x1A0x36N_ERM_LRAFB_BRAKE_FACTOR[2:0]LOOP_GAIN[1:0]BEMF_GAIN[1:0]0x1B0x93STARTUP_BOOSTReservedAC_COUPLEDRIVE_TIME[4:0]0x1C0xF5BIDIR_INPUTBRAKE_STABILIZERSAMPLE_TIME[1:0]BLANKING_TIME[1:0]IDISS_TIME[1:0]0x1D0xA0NG_THRESH[1:0]ERM_OPEN_LOOPSUPPLY_COMP_DISDATA_FORMAT_RTPLRA_DRIVE_MODEN_PWM_ANALOGLRA_OPEN_LOOP0x1E0x20ReservedAUTO_CAL_TIME[1:0]ReservedOTP_STATUSReservedOTP_PROGRAM0x210x00VBAT[7:0]0x220x00LRA_PERIOD[7:0]34DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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6.
1Status(Address:0x00)Figure28.
StatusRegister76543210DEVICE_ID[2:0]ReservedDIAG_RESULTFB_STSOVER_TEMPOC_DETECTRO-0RO-1RO-1RO-0RO-0RO-0RO-0Table4.
StatusRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-5DEVICE_ID[2:0]RO3Deviceidentifier.
TheDEVICE_IDbitindicatesthepartnumbertotheuser.
Theusersoftwarecanascertainthedevicecapabilitiesbyreadingthisregister.
3:DRV2605(containslicensedROMlibrary,doesnotcontainRAM)4:DRV2604(containsRAM,doesnotcontainlicensedROMlibrary)6:DRV2604L(low-voltageversionoftheDRV2604device)7:DRV2605L(low-voltageversionoftheDRV2605device)4Reserved3DIAG_RESULTRO0Thisflagstorestheresultoftheauto-calibrationroutineandthediagnosticroutine.
Theflagcontainstheresultforwhicheverroutinewasexecutedlast.
Theflagclearsuponread.
TestresultisnotvaliduntiltheGObitself-clearsattheendoftheroutine.
Auto-calibrationmode:0:Auto-calibrationpassed(optimumresultconverged)1:Auto-calibrationfailed(resultdidnotconverge)Diagnosticmode:0:Actuatorisfunctioningnormally1:Actuatorisnotpresentorisshorted,timingout,orgivingout–of-rangeback-EMF2FB_STSRO0Containsstatusforthefeedbackcontroller.
ThisindicateswhentheERMback-EMFhasbeenzeroformorethan~10msinERMmode,andindicateswhentheLRAfrequencytrackinghaslostfrequencylockinLRAmode.
Thisbitisfordebugpurposesonly,andcansometimesbesetundernormaloperationwhenextensivebrakingperiodsareused.
Thisbitwillclearuponread.
0:Feedbackcontrollerhasnottimedout1:Feedbackcontrollerhastimedout1OVER_TEMPRO0Latchingovertemperaturedetectionflag.
Ifthedevicebecomestoohot,itshutsdown.
Thisbitclearsuponread.
0:Deviceisfunctioningnormally1:Devicehasexceededthetemperaturethreshold0OC_DETECTRO0Latchingovercurrentdetectionflag.
Iftheloadimpedanceisbelowtheload-impedancethreshold,thedeviceshutsdownandperiodicallyattemptstorestartuntiltheimpedanceisabovethethreshold.
0:Noovercurrenteventisdetected1:Overcurrenteventisdetected35DRV2605www.
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6.
2Mode(Address:0x01)Figure29.
ModeRegister76543210DEV_RESETSTANDBYReservedMODE[2:0]R/W-0R/W-1R/W-0Table5.
ModeRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7DEV_RESETR/W0Devicereset.
Settingthisbitperformstheequivalentoperationofpowercyclingthedevice.
Anyplaybackoperationsareimmediatelyinterrupted,andallregistersareresettothedefaultvalues.
TheDEV_RESETbitself-clearsaftertheresetoperationiscomplete.
6STANDBYR/W1Softwarestandbymode0:Deviceready1:Deviceinsoftwarestandby5-3Reserved2-0MODER/W00:InternaltriggerWaveformsarefiredbysettingtheGObitinregister0x0C.
1:Externaltrigger(edgemode)ArisingedgeontheIN/TRIGpinsetstheGOBit.
AsecondrisingedgeontheIN/TRIGpincancelsthewaveformifthesecondrisingedgeoccursbeforetheGObithascleared.
2:Externaltrigger(levelmode)TheGObitfollowsthestateoftheexternaltrigger.
ArisingedgeontheIN/TRIGpinsetstheGObit,andafallingedgesendsacancel.
IftheGObitisalreadyintheappropriatestate,nochangeoccurs.
3:PWMinputandanaloginputAPWMoranalogsignalisacceptedattheIN/TRIGpinandusedasthedrivingsource.
Thedeviceactivelydrivestheactuatorwhileinthismode.
ThePWMoranaloginputselectionoccursbyusingtheN_PWM_ANALOGbit.
4:Audio-to-vibeAnAC-coupledaudiosignalisacceptedattheIN/TRIGpin.
Thedeviceconvertstheaudiosignalintomeaningfulhapticvibration.
TheAC_COUPLEandN_PWM_ANALOGbitsshouldalsobeset.
5:Real-timeplayback(RTPmode)ThedeviceactivelydrivestheactuatorwiththecontentsoftheRTP_INPUT[7:0]bitinregister0x02.
6:DiagnosticsSetthedeviceinthismodetoperformadiagnostictestontheactuator.
TheusermustsettheGObittostartthetest.
ThetestiscompletewhentheGObitself-clears.
ResultsarestoredintheDIAG_RESULTbitinregister0x00.
7:AutocalibrationSetthedeviceinthismodetoautocalibratethedevicefortheactuator.
Beforestartingthecalibration,theusermustsettheallrequiredinputparameters.
TheusermustsettheGObittostartthecalibration.
CalibrationiscompletewhentheGObitself-clears.
FormoreinformationseetheAutoCalibrationProceduresection.
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6.
3Real-TimePlaybackInput(Address:0x02)Figure30.
Real-TimePlaybackInputRegister76543210RTP_INPUT[7:0]R/W-0Table6.
Real-TimePlaybackInputRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0RTP_INPUT[7:0]R/W0Thisfieldistheentrypointforreal-timeplayback(RTP)data.
TheDRV2605playbackenginedrivestheRTP_INPUT[7:0]valuetotheloadwhenMODE[2:0]=5(RTPmode).
TheRTP_INPUT[7:0]valuecanbeupdatedinreal-timebythehostcontrollertocreatehapticwaveforms.
TheRTP_INPUT[7:0]valueisinterpretedassignedbydefault,butcanbesettounsignedbytheDATA_FORMAT_RTPbitinregister0x1D.
Whenthehapticwaveformiscomplete,theusercanidlethedevicebysettingMODE[2:0]=0,oralternativelybysettingSTANDBY=1.
7.
6.
4(Address:0x03)Figure31.
Register76543210ReservedHI_ZReservedLIBRARY_SEL[2:0]R/W-0R/W-0R/W-0R/W-1Table7.
RegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-5Reserved4HI_ZR/W0Thisbitsetstheoutputdriverintoatruehigh-impedancestate.
Thedevicemustbeenabledtogointothehigh-impedancestate.
Wheninhardwareshutdownorstandbymode,theoutputdrivershave15kOtoground.
WhentheHI_Zbitisasserted,thehi-Zfunctionalitytakeseffectimmediately,evenifatransactionistakingplace.
3Reserved2-0LIBRARY_SELR/W1Waveformlibraryselectionvalue.
ThisbitdetermineswhichlibrarytheplaybackengineselectswhentheGObitisset.
ForadditionaldetailsontheERMlibrariesseetheTable1section.
0:Empty1:TS2200LibraryA2:TS2200LibraryB3:TS2200LibraryC4:TS2200LibraryD5:TS2200LibraryE6:LRALibrary7:Reserved37DRV2605www.
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6.
5WaveformSequencer(Address:0x04to0x0B)Figure32.
WaveformSequencerRegister76543210WAITWAV_FRM_SEQ[6:0]R/W-0R/W-0Table8.
WaveformSequencerRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7WAITR/W0Whenthisbitisset,theWAV_FRM_SEQ[6:0]bitisinterpretedasawaittimeinwhichtheplaybackengineidles.
Thisbitisusedtoinserttimeddelaysbetweensequentiallyplayedwaveforms.
Delaytime=10ms*WAV_FRM_SEQ[6:0]IfWAIT=0,thenWAV_FRM_SEQ[6:0]isinterpretedasawaveformidentifierforsequenceplayback.
6-0WAV_FRM_SEQR/W0Waveformsequencevalue.
Thisbitholdsthewaveformidentifierofthewaveformtobeplayed.
AwaveformidentifierisanintegervaluereferringtotheindexpositionofawaveforminaROMlibrary.
Playbackbeginsatregisteraddress0x04whentheuserassertstheGObit(register0x0C).
Whenplaybackofthatwaveformends,thewaveformsequencerplaysthenextwaveformidentifierheldinregister0x05,ifthenextwaveformidentifierisnon-zero.
Thewaveformsequencercontinuesinthiswayuntilthesequencerreachesanidentifiervalueofzero,oralleightidentifiersareplayed(registeraddresses0x04through0x0B),whichevercomesfirst.
7.
6.
6GO(Address:0x0C)Figure33.
GORegister76543210ReservedGOR/W-0Table9.
GORegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-1Reserved0GOR/W0ThisbitisusedtofireprocessesintheDRV2605device.
TheprocessfiredbytheGObitisselectedbytheMODE[2:0]bit(register0x01).
Theprimaryfunctionofthisbitistofireplaybackofthewaveformidentifiersinthewaveformsequencer(registers0x04to0x0B),inwhichcase,thisbitcanbethoughtofasoftwaretriggerforhapticwaveforms.
TheGObitremainshighuntiltheplaybackofthehapticwaveformsequenceiscomplete.
ClearingtheGObitduringwaveformplaybackcancelsthewaveformsequence.
UsingoneoftheexternaltriggermodescancausetheGObittobesetorclearedbytheexternaltriggerpin.
Thisbitcanalsobeusedtofiretheauto-calibrationprocessorthediagnosticprocess.
38DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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6.
7OverdriveTimeOffset(Address:0x0D)Figure34.
OverdriveTimeOffsetRegister76543210ODT[7:0]R/W-0Table10.
OverdriveTimeOffsetRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0ODTR/W0Thisbitaddsatimeoffsettotheoverdriveportionofthelibrarywaveforms.
Somemotorsrequiremoreoverdrivetimethanothers,thereforethisregisterallowstheusertoaddorremoveoverdrivetimefromthelibrarywaveforms.
Themaximumvoltagevalueinthelibrarywaveformisautomaticallydeterminedtobetheoverdriveportion.
Thisregisterisonlyusefulinopen-loopmode.
Overdriveisautomaticforclosed-loopmode.
Theoffsetisinterpretedas2scomplement,thereforethetimeoffsetcanbepositiveornegative.
OverdriveTimeOffset(ms)=ODT[7:0]*5ms7.
6.
8SustainTimeOffset,Positive(Address:0x0E)Figure35.
SustainTimeOffset,PositiveRegister76543210SPT[7:0]R/W-0Table11.
SustainTimeOffset,PositiveRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0SPTR/W0Thisbitaddsatimeoffsettothepositivesustainportionofthelibrarywaveforms.
Somemotorshaveafasterorslowerresponsetimethanothers,thereforethisregisterallowstheusertoaddorremovepositivesustaintimefromthelibrarywaveforms.
Anypositivevoltagevalueotherthantheoverdriveportionisconsideredasasustainpositivevalue.
Theoffsetisinterpretedas2scomplement,thereforethetimeoffsetcanpositiveornegative.
Sustain-TimePositiveOffset(ms)=SPT[7:0]*5ms39DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated7.
6.
9SustainTimeOffset,Negative(Address:0x0F)Figure36.
SustainTimeOffset,NegativeRegister76543210SNT[7:0]R/W-0Table12.
SustainTimeOffset,NegativeRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0SNTR/W0Thisbitaddsatimeoffsettothenegativesustainportionofthelibrarywaveforms.
Somemotorshaveafasterorslowerresponsetimethanothers,thereforethisregisterallowstheusertoaddorremovenegativesustaintimefromthelibrarywaveforms.
Anynegativevoltagevalueotherthantheoverdriveportionisconsideredasasustainingnegativevalue.
Theoffsetisinterpretedastwo'scomplement,thereforethetimeoffsetcanbepositiveornegative.
Sustain-TimeNegativeOffset(ms)=SNT[7:0]*5ms7.
6.
10BrakeTimeOffset(Address:0x10)Figure37.
BrakeTimeOffsetRegister76543210BRT[7:0]R/W-0Table13.
BrakeTimeOffsetRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0BRTR/W0Thisbitaddsatimeoffsettothebrakingportionofthelibrarywaveforms.
Somemotorsrequiremorebrakingtimethanothers,thereforethisregisterallowstheusertoaddortakeawaybraketimefromthelibrarywaveforms.
Themostnegativevoltagevalueinthelibrarywaveformisautomaticallydeterminedtobethebrakingportion.
Thisregisterisonlyusefulinopen-loopmode.
Brakingisautomaticforclosed-loopmode.
Theoffsetisinterpretedas2scomplement,thereforethetimeoffsetcanbepositiveornegative.
BrakeTimeOffset(ms)=BRT[7:0]*5ms40DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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6.
11Audio-to-VibeControl(Address:0x11)Figure38.
Audio-to-VibeControlRegister76543210ReservedATH_PEAK_TIME[1:0]ATH_FILTER[1:0]R/W-0R/W-1R/W-0R/W-1Table14.
Audio-to-VibeControlRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-4Reserved3-2ATH_PEAK_TIME[1:0]R/W1Thisbitsetsthepeakdetectiontimefortheaudio-to-vibesignalpath:0:10ms1:20ms2:30ms3:40ms1-0ATH_FILTER[1:0]R/W1Thisbitsetsthelow-passfilterfrequencyfortheaudio-to-vibesignalpath:0:100Hz1:125Hz2:150Hz3:200Hz7.
6.
12Audio-to-VibeMinimumInputLevel(Address:0x12)Figure39.
Audio-to-VibeMinimumInputLevelRegister76543210ATH_MIN_INPUT[7:0]R/W-0R/W-0R/W-0R/W-1R/W-1R/W-0R/W-0R/W-1LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterresetTable15.
Audio-to-VibeMinimumInputLevelRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0ATH_MIN_INPUT[7:0]R/W0x19ThisbitsetstheminimumvoltagelevelattheIN/TRIGpinthatisdetectedbytheaudio-to-vibeengine.
Levelsbelowthisareignored.
ATH_MIN_INPUTVoltage(VPP)=ATH_MIN_INPUT[7:0]*1.
8V/2557.
6.
13Audio-to-VibeMaximumInputLevel(Address:0x13)Figure40.
Audio-to-VibeMaximumInputLevelRegister76543210ATH_MAX_INPUT[7:0]R/W-1Table16.
Audio-to-VibeMaximumInputLevelRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0ATH_MAX_INPUT[7:0]R/W0xFFThisbitsetsthefull-scalevoltagelevelattheIN/TRIGpinforaudio-to-vibemode.
ATH_MAX_INPUTVoltage(VPP)=ATH_MAX_INPUT[7:0]*1.
8V/2557.
6.
14Audio-to-VibeMinimumOutputDrive(Address:0x14)41DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFigure41.
Audio-to-VibeMinimumOutputDriveRegister76543210ATH_MIN_DRIVE[7:0]R/W-0R/W-0R/W-0R/W-1R/W-1R/W-0R/W-0R/W-1Table17.
Audio-to-VibeMinimumOutputDriveRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0ATH_MIN_DRIVE[7:0]R/W0x19Thisbitsetstheminimumoutputlevelthatisappliedtotheactuatordriveengine.
ATH_MIN_DRIVE(%)=ATH_MIN_DRIVE[7:0]/255*100%7.
6.
15Audio-to-VibeMaximumOutputDrive(Address:0x15)Figure42.
Audio-to-VibeMaximumOutputDriveRegister76543210ATH_MAX_DRIVE[7:0]R/W-1Table18.
Audio-to-VibeMaximumOutputDriveRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0ATH_MAX_DRIVE[7:0]R/W0xFFThisbitsetsthemaximumoutputlevelthatisappliedtotheactuatordriveengine.
ATH_MAX_DRIVE(%)=ATH_MAX_DRIVE[7:0]/255*100%42DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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6.
16RatedVoltage(Address:0x16)Figure43.
RatedVoltageRegister76543210RATED_VOLTAGE[7:0]R/W-0R/W-0R/W-1R/W-1R/W-1R/W-1R/W-1R/W-1Table19.
RatedVoltageRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0RATED_VOLTAGE[7:0]R/W0x3FThisbitsetsthereferencevoltageforfull-scaleoutputduringclosed-loopoperation.
Theauto-calibrationroutineusesthisregisterasaninput,thereforethisregistermustbewrittenwiththeratedvoltagevalueofthemotorbeforecalibrationisperformed.
Thisregisterisignoredforopen-loopoperationbecausetheoverdrivevoltagesetsthereferenceforthatcase.
AnymodificationofthisregistervalueshouldbefollowedbycalibrationtosetA_CAL_BEMFappropriately.
SeetheRatedVoltageProgrammingsectionforcalculatingthecorrectregistervalue.
7.
6.
17OverdriveClampVoltage(Address:0x17)Figure44.
OverdriveClampVoltageRegister76543210OD_CLAMP[7:0]R/W-1R/W-0R/W-0R/W-1R/W-1R/W-0R/W-0R/W-1Table20.
OverdriveClampVoltageRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7OD_CLAMP[7:0]R/W0x89Duringclosed-loopoperationtheactuatorfeedbackallowstheoutputvoltagetogoabovetheratedvoltageduringtheautomaticoverdriveandautomaticbrakingperiods.
Thisregistersetsaclampsothattheautomaticoverdriveisbounded.
Thisbitalsoservesasthefull-scalereferencevoltageforopen-loopoperation.
SeetheOverdriveVoltage-ClampProgrammingsectionforcalculatingthecorrectregistervalue.
7.
6.
18Auto-CalibrationCompensationResult(Address:0x18)Figure45.
Auto-CalibrationCompensation-ResultRegister76543210A_CAL_COMP[7:0]R/W-0R/W-0R/W-0R/W-0R/W-1R/W-1R/W-0R/W-1Table21.
Auto-CalibrationCompensation-ResultRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0A_CAL_COMP[7:0]R/W0x0DThisregistercontainsthevoltage-compensationresultafterexecutionofautocalibration.
ThevaluestoredintheA_CAL_COMPbitcompensatesforanyresistivelossesinthedriver.
Thecalibrationroutinecheckstheimpedanceoftheactuatortoautomaticallydetermineanappropriatevalue.
Theauto-calibrationcompensation-resultvalueismultipliedbythedrivegainduringplayback.
Auto-calibrationcompensationcoefficient=1+A_CAL_COMP[7:0]/25543DRV2605www.
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6.
19Auto-CalibrationBack-EMFResult(Address:0x19)Figure46.
Auto-CalibrationBack-EMFResultRegister76543210A_CAL_BEMF[7:0]R/W-0R/W-1R/W-1R/W-0R/W-1R/W-1R/W-0R/W-1Table22.
Auto-CalibrationBack-EMFResultRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0A_CAL_BEMF[7:0]R/W0x6DThisregistercontainstheratedback-EMFresultafterexecutionofautocalibration.
TheA_CAL_BEMF[7:0]bitisthelevelofback-EMFvoltagethattheactuatorgiveswhentheactuatorisdrivenattheratedvoltage.
TheDRV2605playbackengineusesthisthevaluestoredinthisbittoautomaticallydeterminetheappropriatefeedbackgainforclosed-loopoperation.
Auto-calibrationback-EMF(V)=(A_CAL_BEMF[7:0]/255)*1.
22V/BEMF_GAIN[1:0]44DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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6.
20FeedbackControl(Address:0x1A)Figure47.
FeedbackControlRegister76543210N_ERM_LRAFB_BRAKE_FACTOR[2:0]LOOP_GAIN[1:0]BEMF_GAIN[1:0]R/W-0R/W-0R/W-1R/W-1R/W-0R/W-1R/W-1R/W-0Table23.
FeedbackControlRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7N_ERM_LRAR/W0ThisbitsetstheDRV2605deviceinERMorLRAmode.
Thisbitshouldbesetpriortorunningautocalibration.
0:ERMMode1:LRAMode6-4FB_BRAKE_FACTOR[2:0]R/W3Thisbitselectsthefeedbackgainratiobetweenbrakinggainanddrivinggain.
Ingeneral,addingadditionalfeedbackgainwhilebrakingisdesirablesothattheactuatorbrakesasquicklyaspossible.
Largeratiosprovideless-stableoperationthanlowerones.
Theadvancedusercanselecttooptimizethisregister.
Otherwise,thedefaultvalueshouldprovidegoodperformanceformostactuators.
Thisvalueshouldbesetpriortorunningautocalibration.
0:1x1:2x2:3x3:4x4:6x5:8x6:16x7:Brakingdisabled3-2LOOP_GAIN[1:0]R/W1Thisbitselectsaloopgainforthefeedbackcontrol.
TheLOOP_GAIN[1:0]bitsetshowfasttheloopattemptstomaketheback-EMF(andthusmotorvelocity)matchtheinputsignallevel.
Higherloop-gain(fastersettling)optionsprovideless-stableoperationthanlowerloopgain(slowersettling).
Theadvancedusercanselecttooptimizethisregister.
Otherwise,thedefaultvalueshouldprovidegoodperformanceformostactuators.
Thisvalueshouldbesetpriortorunningautocalibration.
0:Low1:Medium(default)2:High3:VeryHigh1-0BEMF_GAIN[1:0]R/W2Thisbitsetstheanaloggainoftheback-EMFamplifier.
ThisvalueisinterpreteddifferentlybetweenERMmodeandLRAmode.
AutocalibrationautomaticallypopulatestheBEMF_GAINbitwiththemostappropriatevaluefortheactuator.
ERMMode0:0.
33x1:1.
0x2:1.
8x(default)3:4.
0xLRAMode0:5x1:10x2:20x(default)3:30x45DRV2605www.
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6.
21Control1(Address:0x1B)Figure48.
Control1Register76543210STARTUP_BOOSTReservedAC_COUPLEDRIVE_TIME[4:0]R/W-1R/W-0R/W-1R/W-0R/W-0R/W-1R/W-1Table24.
Control1RegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7STARTUP_BOOSTR/W1Thisbitapplieshigherloopgainduringoverdrivetoenhanceactuatortransientresponse.
6Reserved5AC_COUPLER/W0Thisbitappliesa0.
9-VcommonmodevoltagetotheIN/TRIGpinwhenanAC-couplingcapacitorisused.
Thisbitisonlyusefulforanaloginputmode.
ThisbitshouldnotbeassertedforPWMmodeorexternaltriggermode.
0:Common-modedrivedisabledforDC-couplingordigitalinputsmodes1:Common-modedriveenabledforACcoupling4-0DRIVE_TIME[4:0]R/W0x13LRAMode:SetsinitialguessforLRAdrive-timeinLRAmode.
Drivetimeisautomaticallyadjustedforoptimumdriveinrealtime;however,thisregistershouldbeoptimizedfortheapproximateLRAfrequency.
Ifthebitissettoolow,itcanaffecttheactuatorstartuptime.
Ifthebitissettoohigh,itcancauseinstability.
Optimumdrivetime(ms)≈0.
5*LRAPeriodDrivetime(ms)=DRIVE_TIME[4:0]*0.
1ms+0.
5msERMMode:Setsthesampleratefortheback-EMFdetection.
Lowerdrivetimescausehigherpeak-to-averageratiosintheoutputsignal,requiringmoresupplyheadroom.
Higherdrivetimescausethefeedbacktoreactataslowerrate.
DriveTime(ms)=DRIVE_TIME[4:0]*0.
2ms+1ms46DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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6.
22Control2(Address:0x1C)Figure49.
Control2Register76543210BIDIR_INPUTBRAKE_STABILIZERSAMPLE_TIME[1:0]BLANKING_TIME[1:0]IDISS_TIME[1:0]R/W-1R/W-1R/W-1R/W-0R/W-1R/W-0R/W-1Table25.
Control2RegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7BIDIR_INPUTR/W1TheBIDIR_INPUTbitselectshowtheengineinterpretsdata.
0:UnidirectionalinputmodeBrakingisautomaticallydeterminedbythefeedbackconditionsandisappliedwhenrequired.
Useofthismodealsorecoversanadditionalbitofverticalresolution.
Thismodeshouldonlybeusedforclosed-loopoperation.
Examples::0%InputNooutputsignal50%InputHalf-scaleoutputsignal100%InputFull-scaleoutputsignal1:Bidirectionalinputmode(default)Thismodeiscompatiblewithtraditionalopen-loopsignalingandalsoworkswellwithclosed-loopmode.
Whenoperatingclosed-loop,brakingisautomaticallydeterminedbythefeedbackconditionsandappliedwhenrequired.
Whenoperatingopen-loopmodes,brakingisonlyappliedwhentheinputsignalislessthan50%.
Open-loopmode(ERMandLRA)examples:0%InputNegativefull-scaleoutputsignal(braking)25%InputNegativehalf-scaleoutputsignal(braking)50%InputNooutputsignal75%InputPositivehalf-scaleoutputsignal100%InputPositivefull-scaleoutputsignalClosed-loopmode(ERMandLRA)examples:0%to50%InputNooutputsignal50%InputNooutputsignal75%InputHalf-scaleoutputsignal100%InputFull-scaleoutputsignal6BRAKE_STABILIZERR/W1Whenthisbitisset,loopgainisreducedwhenbrakingisalmostcompletetoimproveloopstability5-4SAMPLE_TIME[1:0]R/W3LRAauto-resonancesamplingtime(Advanceduseonly)0:150s1:200s2:250s3:300s3-2BLANKING_TIME[1:0]R/W1Blankingtimebeforetheback-EMFADmakesaconversion.
(Advanceduseonly)1-0IDISS_TIME[1:0]R/W1Currentdissipationtime.
ThisbitisthetimeallowedforthecurrenttodissipatefromtheactuatorbetweenPWMcyclesforflybackmitigation.
(Advanceduseonly)47DRV2605www.
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6.
23Control3(Address:0x1D)Figure50.
Control3Register76543210NG_THRESH[1:0]ERM_OPEN_LOOPSUPPLY_COMP_DISDATA_FORMAT_RTPLRA_DRIVE_MODEN_PWM_ANALOGLRA_OPEN_LOOPR/W-1R/W-0R/W-1R/W-0R/W-0R/W-0R/W-0R/W-0Table26.
Control3RegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-6NG_THRESH[1:0]R/W2Thisbitisthenoise-gatethresholdforPWMandanaloginputs.
0:Disabled1:2%2:4%(Default)3:8%5ERM_OPEN_LOOPR/W1ThisbitselectsmodeofoperationwhileinERMmode.
Closed-loopoperationisusuallydesiredforbecauseofautomaticoverdriveandbrakingproperties.
However,manyexistingwaveformlibrariesweredesignedforopen-loopoperation,thereforeopen-loopoperationcanberequiredforcompatibility.
0:ClosedLoop1:OpenLoop4SUPPLY_COMP_DISR/W0Thisbitdisablessupplycompensation.
TheDRV2605devicegenerallyprovidesconstantdriveoutputovervariationinthepowersupplyinput(VDD).
Insomesystems,supplycompensationcanhavealreadybeenimplementedupstream,thereforedisablingtheDRV2605supplycompensationcanbeuseful.
0:Supplycompensationenabled1:Supplycompensationdisabled3DATA_FORMAT_RTPR/W0ThisbitselectstheinputdatainterpretationforRTP(Real-TimePlayback)mode.
0:Signed1:Unsigned2LRA_DRIVE_MODER/W0ThisbitselectsthedrivemodefortheLRAalgorithm.
Thisbitdetermineshowoftenthedriveamplitudeisupdated.
Updatingoncepercycleprovidesasymmetricaloutputsignal,whileupdatingtwicepercycleprovidesmoreprecisecontrol.
0:Oncepercycle1:Twicepercycle1N_PWM_ANALOGR/W0ThisbitselectstheinputmodefortheIN/TRIGpinwhenMODE[2:0]=3.
InPWMinputmode,thedutycycleoftheinputsignaldeterminestheamplitudeofthewaveform.
Inanaloginputmode,theamplitudeoftheinputdeterminestheamplitudeofthewaveform.
0:PWMInput1:AnalogInput0LRA_OPEN_LOOPR/W0Thisbitselectsanopen-loopdriveoptionforLRAMode.
Whenasserted,theplaybackenginedrivestheLRAattheselectedfrequencyindependentlyoftheresonancefrequency.
InPWMinputmode,theplaybackenginerecoverstheLRAcommutationfrequencyfromthePWMinput,dividingthefrequencyby128.
ThereforethePWMinputfrequencymustbeequalto128timestheresonantfrequencyoftheLRA.
0:Auto-resonancemode1:LRAopen-loopmode48DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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6.
24Control4(Address:0x1E)Figure51.
Control4Register76543210ReservedAUTO_CAL_TIME[1:0]ReservedOTP_STATUSReservedOTP_PROGRAMR/W-1R/W-0R-0R/W-0Table27.
Control4RegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-6Reserved5-4AUTO_CAL_TIME[1:0]R/W2Thisbitsetsthelengthoftheautocalibrationtime.
TheAUTO_CAL_TIME[1:0]bitshouldbeenoughtimeforthemotoraccelerationtosettlewhendrivenattheRATED_VOLTAGE[7:0]value.
0:150ms(minimum),350ms(maximum)1:250ms(minimum),450ms(maximum)2:500ms(minimum),700ms(maximum)3:1000ms(minimum),1200ms(maximum)3Reserved2OTP_STATUSR0OTPMemorystatus0:OTPMemoryhasnotbeenprogrammed1:OTPMemoryhasbeenprogrammed1Reserved0OTP_PROGRAMR/W0Thisbitlaunchestheprogrammingprocessforone-timeprogrammable(OTP)memorywhichprogramsthecontentsofregister0x16through0x1Aintononvolatilememory.
Thisprocesscanonlybeexecutedonetimeperdevice.
SeetheProgrammingOn-ChipOTPMemorysectionfordetails.
7.
6.
25V(BAT)VoltageMonitor(Address:0x21)Figure52.
V(BAT)Voltage-MonitorRegister76543210VBAT[7:0]R/W-0Table28.
V(BAT)Voltage-MonitorRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0VBAT[7:0]R/W0Thisbitprovidesareal-timereadingofthesupplyvoltageattheVDDpin.
Thedevicemustbeactivelysendingawaveformtotakeareading.
VDD(V)=VBAT[7:0]*5.
6V/2557.
6.
26LRAResonancePeriod(Address:0x22)Figure53.
LRAResonance-PeriodRegister76543210LRA_PERIOD[7:0]R/W-0Table29.
LRAResonance-PeriodRegisterFieldDescriptionsBITFIELDTYPEDEFAULTDESCRIPTION7-0LRA_PERIOD[7:0]R/W0ThisbitreportsthemeasurementoftheLRAresonanceperiod.
Thedevicemustbeactivelysendingawaveformtotakeareading.
LRAperiod(us)=LRA_Period[7:0]*98.
46s49DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated8ApplicationandImplementationNOTEInformationinthefollowingapplicationssectionsisnotpartoftheTIcomponentspecification,andTIdoesnotwarrantitsaccuracyorcompleteness.
TI'scustomersareresponsiblefordeterminingsuitabilityofcomponentsfortheirpurposes.
Customersshouldvalidateandtesttheirdesignimplementationtoconfirmsystemfunctionality.
8.
1ApplicationInformationThetypicalapplicationforahapticdriverisinatouch-enabledsystemthatalreadyhasanapplicationprocessorwhichmakesthedecisiononwhentoexecutehapticeffects.
TheDRV2605devicecanbeusedfullywithI2Ccommunications(eitherusingRTPorthememoryinterface).
Asystemdesignercanchosetouseexternaltriggerstoplaylow-latencyeffects(suchasfromaphysicalbutton)orcandecidetousethePWMinterface.
Figure54showsatypicalhapticsystemimplementation.
Thesystemdesignershouldnotusetheinternalregulator(REG)topoweranyexternalload.
Asystemdesignercanalsoimplementaudio-to-vibe.
Figure55showsatypicalhapticsystemimplementationsupportingaudio-to-vibe.
Figure54.
I2CControlwithOptionalPWMInputorExternalTriggerFigure55.
I2CControlWithAudio-to-VibeInputandOptionalACCouplingTable30.
RecommendedExternalComponentsCOMPONENTDESCRIPTIONSPECIFICATIONTYPICALVALUEC(VDD)InputcapacitorCapacitance1FC(REG)RegulatorcapacitorCapacitance1FC(IN)ACcouplingcapacitor(optional)Capacitance1FR(PU)PullupresistorResistance2.
2k50DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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2TypicalApplicationAtypicalapplicationoftheDRV2605deviceisinasystemthathasexternalbuttonswhichfiredifferenthapticeffectswhenpressed.
Figure56showsatypicalschematicofsuchasystem.
Thebuttonscanbephysicalbuttons,capacitive-touchbuttons,orGPIOsignalscomingfromthetouch-screensystem.
Effectsinthistypeofsystemareprogrammable.
Figure56.
TypicalApplicationSchematic8.
2.
1DesignRequirementsForthisdesignexample,usethevalueslistedinTable31astheinputparameters.
Table31.
DesignParametersDESIGNPARAMETEREXAMPLEVALUEInterfaceI2C,externaltriggerActuatortypeLRA,ERMInputpowersourceLi-ion/Li-polymer,5-Vboost8.
2.
2DetailedDesignProcedure8.
2.
2.
1ActuatorSelectionTheactuatordecisionisbasedonmanyfactorsincludingcost,formfactor,vibrationstrength,power-consumptionrequirements,hapticsharpnessrequirements,reliability,andaudiblenoiseperformance.
Theactuatorselectionisoneofthemostimportantdesignconsiderationsofahapticsystemandthereforetheactuatorshouldbethefirstcomponenttoconsiderwhendesigningthesystem.
ThefollowingsectionslistthebasicsofERMandLRAactuators.
8.
2.
2.
1.
1EccentricRotating-MassMotors(ERM)Eccentricrotating-massmotors(ERMs)aretypicallyDC-controlledmotorsofthebarorcointype.
ERMscanbedrivenintheclockwisedirectionorcounter-clockwisedirectiondependingonthepolarityofvoltageacrossthetwopins.
Bidirectionaldriveismadepossibleinasingle-supplysystembydifferentialoutputsthatarecapableofsourcingandsinkingcurrent.
Thebidirectionaldrivefeaturehelpseliminatelongvibrationtailswhichareundesirableinhapticfeedbacksystems.
51DRV2605www.
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comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedFigure57.
MotorSpinDirectioninERMMotorsAnothercommonapproachtodrivingDCmotorsistheconceptofoverdrivevoltage.
Toovercometheinertiaofthemassofthemotor,theDCmotorsareoftenoverdrivenforashortamountoftimebeforereturningtotheratedvoltageofthemotortosustaintherotationofthemotor.
Overdriveisalsousedtostop(orbrake)amotorquickly.
RefertothedatasheetoftheparticularmotorusedwiththeDRV2605deviceforsafeandreliableoverdrivevoltageandduration.
8.
2.
2.
1.
2LinearResonanceActuators(LRA)Linearresonantactuators(LRAs)vibrateoptimallyattheresonantfrequency.
LRAshaveahigh-Qfrequencyresponsebecauseofarapiddropinvibrationperformanceattheoffsetsof3to5Hzfromtheresonantfrequency.
Manyfactorsalsocauseashiftordriftintheresonantfrequencyoftheactuatorsuchastemperature,aging,themassoftheproducttowhichtheLRAismounted,andinthecaseofaportableproduct,themannerinwhichtheproductisheld.
Furthermore,astheactuatorisdriventothemaximumallowedvoltage,manyLRAswillshiftseveralhertzinfrequencybecauseofmechanicalcompression.
Allofthesefactorsmakeareal-timetrackingauto-resonantalgorithmcriticalwhendrivingLRAtoachieveconsistent,optimizedperformance.
Figure58.
TypicalLRAResponse8.
2.
2.
1.
2.
1Auto-ResonanceEngineforLRATheDRV2605auto-resonanceenginetrackstheresonantfrequencyofanLRAinrealtimeeffectivelylockingintotheresonancefrequencyafterhalfacycle.
Iftheresonantfrequencyshiftsinthemiddleofawaveformforanyreason,theenginetracksthefrequencyfromcycletocycle.
Theautoresonanceengineaccomplishesthistrackingbyconstantlymonitoringtheback-EMFoftheactuator.
Notethattheautoresonanceengineisnotaffectedbytheauto-calibrationprocesswhichisonlyusedforlevelcalibration.
Nocalibrationisrequiredfortheautoresonanceengine.
8.
2.
2.
2CapacitorSelectionTheDRV2605devicehasaswitchingoutputstagewhichpullstransientcurrentsthroughtheVDDpin.
TIrecommendsplacinga0.
1-Flowequivalent-series-resistance(ESR)supply-bypasscapacitoroftheX5RorX7RtypeneartheVDDsupplypinforproperoperationoftheoutputdriverandthedigitalportionofthedevice.
Placea1-FX5RorX7R-typecapacitorfromtheREGpintoground.
52DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
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2.
2.
3InterfaceSelectionTheI2Cinterfaceisrequiredtoconfigurethedevice.
ThedevicecanbeusedfullywiththeI2CinterfaceandwitheitherRTPorinternalmemory.
TheadvantageofusingtheI2CinterfaceisthatnoadditionalGPIO(fortheIN/TRIGpin)isrequiredforfiringeffects,andnoPWMsignalisrequiredtobegenerated.
ThereforetheIN/TRIGpincanbeconnectedtoGND.
UsingtheexternaltriggerpinhastheadvantagethatnoI2Ctransactionisrequiredtofirethepre-loadedeffect,whichisagoodchoiceforinterfacingwithabutton.
ThePWMinterfaceisavailableforbackwardcompatibility.
Ifaudio-to-vibeisdesired,thenuseC(IN)asshowninFigure55.
8.
2.
2.
4PowerSupplySelectionTheDRV2605devicesupportsawiderangeofvoltagesintheinput.
Ensuringthatthebatteryvoltageishighenoughtosupportthedesiredvibrationstrengthwiththeselectedactuatorisanimportantdesignconsideration.
ThetypicalapplicationusesLi-ionorLi-polymerbatterieswhichprovideenoughvoltageheadroomtodrivemostcommonactuators.
Ifverystrongvibrationsaredesired,aboostconvertercanbeplacedbetweenthepowersupplyandtheVDDpintoprovideaconstantvoltagewithahealthyheadroom(5-Vrailsarecommoninsomesystems)whichisparticularlytrueiftwoAAbatteriesinseriesarebeingusedtopowerthesystem.
8.
2.
3ApplicationCurvesVDD=3.
6VERMopenloopStrongclick-60%ExternaledgetriggerVDD=3.
6VLRAclosedloopStrongclick-100%ExternalleveltriggerFigure59.
ERMClickwithandwithoutBrakingFigure60.
LRAClickWithandWithoutBraking53DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated8.
3InitializationSetup8.
3.
1InitializationProcedure1.
Afterpowerup,waitatleast250sbeforetheDRV2605deviceacceptsI2Ccommands.
2.
AsserttheENpin(logichigh).
TheENpincanbeassertedanytimeduringorafterthe250-swaitperiod.
3.
WritetheMODEregister(address0x01)tovalue0x00toremovethedevicefromstandbymode.
4.
Ifthenonvolatileauto-calibrationmemoryhasbeenprogrammedasdescribedintheAutoCalibrationProceduresection,skipStep5andproceedtoStep6.
5.
PerformthestepsasdescribedintheAutoCalibrationProceduresection.
Alternatively,rewritetheresultsfromapreviouscalibration.
6.
IfusingtheembeddedROMlibrary,writethelibraryselectionregister(address0x03)toselectalibrary.
7.
Thedefaultsetupisclosed-loopbidirectionalmode.
Touseothermodesandfeatures,writeControl1(0x1B),Control2(0x1C),andControl3(0x1D)asrequired.
Open-loopoperationisrecommendedforERMmodewhenusingtheROMlibraries.
8.
PutthedeviceinstandbymodeordeasserttheENpin,whicheveristhemostconvenient.
Bothsettingsarelow-powermodes.
TheusercanselectthedesiredMODE(address0x01)atthesametimetheSTANDBYbitisset.
8.
3.
2TypicalUsageExamples8.
3.
2.
1PlayaWaveformorWaveformSequencefromtheROMWaveformMemory1.
InitializethedeviceaslistedintheInitializationProceduresection.
2.
AsserttheENpin(activehigh)ifitwaspreviouslydeasserted.
3.
Ifregister0x01alreadyholdsthedesiredvalueandtheSTANDBYbitislow,theusercanskipthisstep.
SelectthedesiredMODE[2:0]valueof0(internaltrigger),1(externaledgetrigger),or2(externalleveltrigger)intheMODEregister(address0x01).
IftheSTANDBYbitwaspreviouslyasserted,thisbitshouldbedeasserted(logiclow)atthistime.
4.
Selectthewaveformindextobeplayedandwriteittoaddress0x04.
Alternatively,asequenceofwaveformindicescanbewrittentoregister0x04through0x0B.
SeetheWaveformSequencersectionfordetails.
5.
Ifusingtheinternaltriggermode,settheGObit(inregister0x0C)tofiretheeffectorsequenceofeffects.
Ifusinganexternaltriggermode,sendanappropriatetriggerpulsetotheIN/TRIGpin.
SeetheWaveformTriggerssectionfordetails.
6.
Ifdesired,theusercanrepeatStep5tofiretheeffectorsequenceagain.
7.
Putthedeviceinlow-powermodebydeassertingtheENpinorsettingtheSTANDBYbit.
8.
3.
2.
2PlayaReal-TimePlayback(RTP)Waveform1.
InitializethedeviceasshownintheInitializationProceduresection.
2.
AsserttheENpin(activehigh)ifitwaspreviouslydeasserted.
3.
SettheMODE[2:0]valueto5(RTPMode)ataddress0x01.
IftheSTANDBYbitwaspreviouslyasserted,thisbitshouldbedeasserted(logiclow)atthistime.
Ifregister0x01alreadyholdsthedesiredvalueandtheSTANDBYbitislow,theusercanskipthisstep.
4.
Writethedesireddriveamplitudetothereal-timeplaybackinputregister(address0x02).
5.
Whenthedesiredsequenceofdriveamplitudesiscomplete,putthedeviceinlow-powermodebydeassertingtheENpinorsettingtheSTANDBYbit.
54DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedInitializationSetup(continued)8.
3.
2.
3PlayaPWMorAnalogInputWaveform1.
InitializethedeviceasshownintheInitializationProceduresection.
2.
AsserttheENpin(activehigh)ifitwaspreviouslydeasserted.
3.
Ifregister0x01alreadyholdsthedesiredvalueandtheSTANDBYbitislow,theusercanskipthisstep.
SettheMODEvalueto3(PWM/AnalogMode)ataddress0x01.
IftheSTANDBYbitwaspreviouslyasserted,thisbitshouldbedeasserted(logiclow)atthistime.
4.
Selecttheinputmode(PWMoranalog)intheControl3register(address0x1D).
Ifthismodewasselectedduringtheinitializationprocedure,theusercanskipthisstep.
5.
SendthedesiredPWMoranaloginputwaveformsequencefromtheexternalsource.
SeetheDataFormatsforWaveformPlaybacksectionfordriveamplitudescaling.
6.
Whenthedesireddrivesequenceiscomplete,putthedeviceinlow-powermodebydeassertingtheENpinorsettingtheSTANDBYbit.
9PowerSupplyRecommendationsTheDRV2605deviceisdesignedtooperatefromaninput-voltagesupplyrangebetween2.
5Vto5.
5V.
Thedecouplingcapacitorforthepowersupplyshouldbeplacedclosedtothedevicepin.
55DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated10Layout10.
1LayoutGuidelinesUsethefollowingguidelinesfortheDRV2605layout:Thedecouplingcapacitorforthepowersupply(VDD)shouldbeplacedclosedtothedevicepin.
Thefilteringcapacitorfortheregulator(REG)shouldbeplacedclosetothedeviceREGpin.
WhencreatingthepadsizefortheWCSPpins,TIrecommendsthatthePCBlayoutusenonsoldermask-defined(NSMD)land.
Withthismethod,thesoldermaskopeningismadelargerthanthedesiredlandareaandtheopeningsizeisdefinedbythecopperpadwidth.
Figure61showsandTable32listsappropriatediametersforawafer-chipscalepackage(WCSP)layout.
Figure61.
LandPatternDimensionsTable32.
LandPatternDimensionsSOLDERPADDEFINITIONSCOPPERPADSOLDERMASKOPENINGCOPPERTHICKNESSSTENCILOPENINGSTENCILTHICKNESSNonsoldermaskdefined(NSMD)275m(0,–25m)375m(0,–25m)1-ozmaximum(32m)275m*275m2(roundedcorners)125-mthick1.
CircuittracesfromNSMDdefinedPWBlandsshouldbe75-mto100-mwideintheexposedareainsidethesoldermaskopening.
Widertracewidthsreducedevicestand-offandimpactreliability.
2.
TherecommendedsolderpasteisType3orType4.
3.
ThebestreliabilityresultsareachievedwhenthePWBlaminateglasstransitiontemperatureisabovetheoperatingtherangeoftheintendedapplication.
4.
ForaPWBusingaNi/Ausurfacefinish,thegoldthicknessshouldbelessthan0.
5mtoavoidareductioninthermalfatigueperformance.
5.
Soldermaskthicknessshouldbelessthan20montopofthecoppercircuitpattern.
6.
Thebestsolderstencilperformanceisachievedusinglaser-cutstencilswithelectropolishing.
Useofchemically-etchedstencilsresultsininferiorsolderpastevolumecontrol.
7.
TraceroutingawayfromtheWCSPdeviceshouldbebalancedinXandYdirectionstoavoidunintentionalcomponentmovementbecauseofsolder-wettingforces.
56DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated10.
1.
1TraceWidthTherecommendedtracewidthatthesolderpinsis75mto100mtopreventsolderwickingontowiderPCBtraces.
Maintainthistracewidthuntilthepinpatternhasescaped,thenthetracewidthcanbeincreasedforimprovedcurrentflow.
Thewidthandlengthofthe75-mto100-mtracesshouldbeassymmetricalaspossiblearoundthedevicetoprovideevensolderreflowoneachofthepins.
10.
2LayoutExampleFigure62.
DRV2605LayoutExampleDSBGA57DRV2605www.
ti.
comSLOS825E–DECEMBER2012–REVISEDAPRIL2018ProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporated11DeviceandDocumentationSupport11.
1LegalNoticeInordertoassistpurchasersandusersofTI'sDRV2605product,TIhaspaidaroyaltyonyourbehalftoImmersionCorporationtosecureyourrightstousecertainImmersionCorporationsoftwareembedded(ordesignedspecificallytobeembedded)inTI'sDRV2605productsolelyasincorporatedinTI'sDRV2605product,subjecttotheterms,conditionsandrestrictionsofTI'slicensewithImmersionCorporation.
Subjecttotheterms,conditionsandrestrictionsofTI'slicensewithImmersionCorporation,youshallnot(1)useordistributeanyImmersionCorporationsoftwareincorporatedinTI'sDRV2605productexceptasincorporatedinTI'sDRV2605productinaccordancewithTI'sapplicablepublishedspecificationsanddatasheetsfortheDRV2605product,(2)modifyanyImmersionsoftware,(3)changeordeleteanyImmersionproprietarynotices,(4)reverseengineerordisassembleanyImmersionsoftwareorotherwiseattempttodiscovertheinternalworkingsordesignofanyImmersionsoftware,or(5)distributeImmersionsoftwareasastand-alonebasis.
11.
2WaveformLibraryEffectsListEFFECTIDNO.
WAVEFORMNAMEEFFECTIDNO>WAVEFORMNAMEEFFECTIDNO.
WAVEFORMNAME1StrongClick-100%42LongDoubleSharpClickMedium2–80%83TransitionRampUpLongSmooth2–0to100%2StrongClick-60%43LongDoubleSharpClickMedium3–60%84TransitionRampUpMediumSmooth1–0to100%3StrongClick-30%44LongDoubleSharpTick1–100%85TransitionRampUpMediumSmooth2–0to100%4SharpClick-100%45LongDoubleSharpTick2–80%86TransitionRampUpShortSmooth1–0to100%5SharpClick-60%46LongDoubleSharpTick3–60%87TransitionRampUpShortSmooth2–0to100%6SharpClick-30%47Buzz1–100%88TransitionRampUpLongSharp1–0to100%7SoftBump-100%48Buzz2–80%89TransitionRampUpLongSharp2–0to100%8SoftBump-60%49Buzz3–60%90TransitionRampUpMediumSharp1–0to100%9SoftBump-30%50Buzz4–40%91TransitionRampUpMediumSharp2–0to100%10DoubleClick-100%51Buzz5–20%92TransitionRampUpShortSharp1–0to100%11DoubleClick-60%52PulsingStrong1–100%93TransitionRampUpShortSharp2–0to100%12TripleClick-100%53PulsingStrong2–60%94TransitionRampDownLongSmooth1–50to0%13SoftFuzz-60%54PulsingMedium1–100%95TransitionRampDownLongSmooth2–50to0%14StrongBuzz-100%55PulsingMedium2–60%96TransitionRampDownMediumSmooth1–50to0%15750msAlert100%56PulsingSharp1–100%97TransitionRampDownMediumSmooth2–50to0%161000msAlert100%57PulsingSharp2–60%98TransitionRampDownShortSmooth1–50to0%17StrongClick1-100%58TransitionClick1–100%99TransitionRampDownShortSmooth2–50to0%18StrongClick2-80%59TransitionClick2–80%100TransitionRampDownLongSharp1–50to0%19StrongClick3-60%60TransitionClick3–60%101TransitionRampDownLongSharp2–50to0%20StrongClick4-30%61TransitionClick4–40%102TransitionRampDownMediumSharp1–50to0%21MediumClick1-100%62TransitionClick5–20%103TransitionRampDownMediumSharp2–50to0%22MediumClick2-80%63TransitionClick6–10%104TransitionRampDownShortSharp1–50to0%23MediumClick3-60%64TransitionHum1–100%105TransitionRampDownShortSharp2–50to0%24SharpTick1-100%65TransitionHum2–80%106TransitionRampUpLongSmooth1–0to50%25SharpTick2-80%66TransitionHum3–60%107TransitionRampUpLongSmooth2–0to50%26SharpTick3–60%67TransitionHum4–40%108TransitionRampUpMediumSmooth1–0to50%27ShortDoubleClickStrong1–100%68TransitionHum5–20%109TransitionRampUpMediumSmooth2–0to50%28ShortDoubleClickStrong2–80%69TransitionHum6–10%110TransitionRampUpShortSmooth1–0to50%29ShortDoubleClickStrong3–60%70TransitionRampDownLongSmooth1–100to0%111TransitionRampUpShortSmooth2–0to50%30ShortDoubleClickStrong4–30%71TransitionRampDownLongSmooth2–100to0%112TransitionRampUpLongSharp1–0to50%31ShortDoubleClickMedium1–100%72TransitionRampDownMediumSmooth1–100to0%113TransitionRampUpLongSharp2–0to50%32ShortDoubleClickMedium2–80%73TransitionRampDownMediumSmooth2–100to0%114TransitionRampUpMediumSharp1–0to50%33ShortDoubleClickMedium3–60%74TransitionRampDownShortSmooth1–100to0%115TransitionRampUpMediumSharp2–0to50%34ShortDoubleSharpTick1–100%75TransitionRampDownShortSmooth2–100to0%116TransitionRampUpShortSharp1–0to50%58DRV2605SLOS825E–DECEMBER2012–REVISEDAPRIL2018www.
ti.
comProductFolderLinks:DRV2605SubmitDocumentationFeedbackCopyright2012–2018,TexasInstrumentsIncorporatedWaveformLibraryEffectsList(continued)EFFECTIDNO.
WAVEFORMNAMEEFFECTIDNO>WAVEFORMNAMEEFFECTIDNO.
WAVEFORMNAME35ShortDoubleSharpTick2–80%76TransitionRampDownLongSharp1–100to0%117TransitionRampUpShortSharp2–0to50%36ShortDoubleSharpTick3–60%77TransitionRampDownLongSharp2–100to0%118Longbuzzforprogrammaticstopping–100%37LongDoubleSharpClickStrong1–100%78TransitionRampDownMediumSharp1–100to0%119SmoothHum1(Nokickorbrakepulse)–50%38LongDoubleSharpClickStrong2–80%79TransitionRampDownMediumSharp2–100to0%120SmoothHum2(Nokickorbrakepulse)–40%39LongDoubleSharpClickStrong3–60%80TransitionRampDownShortSharp1–100to0%121SmoothHum3(Nokickorbrakepulse)–30%40LongDoubleSharpClickStrong4–30%81TransitionRampDownShortSharp2–100to0%122SmoothHum4(Nokickorbrakepulse)–20%41LongDoubleSharpClickMedium1–100%82TransitionRampUpLongSmooth1–0to100%123SmoothHum5(Nokickorbrakepulse)–10%11.
3ReceivingNotificationofDocumentationUpdatesToreceivenotificationofdocumentationupdates,navigatetothedeviceproductfolderonti.
com.
Intheupperrightcorner,clickonAlertmetoregisterandreceiveaweeklydigestofanyproductinformationthathaschanged.
Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument.
11.
4CommunityResourcesThefollowinglinksconnecttoTIcommunityresources.
Linkedcontentsareprovided"ASIS"bytherespectivecontributors.
TheydonotconstituteTIspecificationsanddonotnecessarilyreflectTI'sviews;seeTI'sTermsofUse.
TIE2EOnlineCommunityTI'sEngineer-to-Engineer(E2E)Community.
Createdtofostercollaborationamongengineers.
Ate2e.
ti.
com,youcanaskquestions,shareknowledge,exploreideasandhelpsolveproblemswithfellowengineers.
DesignSupportTI'sDesignSupportQuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsandcontactinformationfortechnicalsupport.
11.
5TrademarksE2EisatrademarkofTexasInstruments.
ImmersionisatrademarkofImmersionCorporation.
TouchSenseisaregisteredtrademarkofImmersionCorporation.
Allothertrademarksarethepropertyoftheirrespectiveowners.
11.
6ElectrostaticDischargeCautionThesedeviceshavelimitedbuilt-inESDprotection.
TheleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoamduringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates.
11.
7GlossarySLYZ022—TIGlossary.
Thisglossarylistsandexplainsterms,acronyms,anddefinitions.
12Mechanical,Packaging,andOrderableInformationThefollowingpagesincludemechanical,packaging,andorderableinformation.
Thisinformationisthemostcurrentdataavailableforthedesignateddevices.
Thisdataissubjecttochangewithoutnoticeandrevisionofthisdocument.
Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation.
PACKAGEOPTIONADDENDUMwww.
ti.
com22-Mar-2018Addendum-Page1PACKAGINGINFORMATIONOrderableDeviceStatus(1)PackageTypePackageDrawingPinsPackageQtyEcoPlan(2)Lead/BallFinish(6)MSLPeakTemp(3)OpTemp(°C)DeviceMarking(4/5)SamplesDRV2605YZFRACTIVEDSBGAYZF93000Green(RoHS&noSb/Br)SNAGCULevel-1-260C-UNLIM-40to852605DRV2605YZFTACTIVEDSBGAYZF9250Green(RoHS&noSb/Br)SNAGCULevel-1-260C-UNLIM-40to852605(1)Themarketingstatusvaluesaredefinedasfollows:ACTIVE:Productdevicerecommendedfornewdesigns.
LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect.
NRND:Notrecommendedfornewdesigns.
Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartinanewdesign.
PREVIEW:Devicehasbeenannouncedbutisnotinproduction.
Samplesmayormaynotbeavailable.
OBSOLETE:TIhasdiscontinuedtheproductionofthedevice.
(2)RoHS:TIdefines"RoHS"tomeansemiconductorproductsthatarecompliantwiththecurrentEURoHSrequirementsforall10RoHSsubstances,includingtherequirementthatRoHSsubstancedonotexceed0.
1%byweightinhomogeneousmaterials.
Wheredesignedtobesolderedathightemperatures,"RoHS"productsaresuitableforuseinspecifiedlead-freeprocesses.
TImayreferencethesetypesofproductsas"Pb-Free".
RoHSExempt:TIdefines"RoHSExempt"tomeanproductsthatcontainleadbutarecompliantwithEURoHSpursuanttoaspecificEURoHSexemption.
Green:TIdefines"Green"tomeanthecontentofChlorine(Cl)andBromine(Br)basedflameretardantsmeetJS709Blowhalogenrequirementsof<=1000ppmthreshold.
Antimonytrioxidebasedflameretardantsmustalsomeetthe<=1000ppmthresholdrequirement.
(3)MSL,PeakTemp.
-TheMoistureSensitivityLevelratingaccordingtotheJEDECindustrystandardclassifications,andpeaksoldertemperature.
(4)Theremaybeadditionalmarking,whichrelatestothelogo,thelottracecodeinformation,ortheenvironmentalcategoryonthedevice.
(5)MultipleDeviceMarkingswillbeinsideparentheses.
OnlyoneDeviceMarkingcontainedinparenthesesandseparatedbya"~"willappearonadevice.
IfalineisindentedthenitisacontinuationofthepreviouslineandthetwocombinedrepresenttheentireDeviceMarkingforthatdevice.
(6)Lead/BallFinish-OrderableDevicesmayhavemultiplematerialfinishoptions.
Finishoptionsareseparatedbyaverticalruledline.
Lead/BallFinishvaluesmaywraptotwolinesifthefinishvalueexceedsthemaximumcolumnwidth.
ImportantInformationandDisclaimer:TheinformationprovidedonthispagerepresentsTI'sknowledgeandbeliefasofthedatethatitisprovided.
TIbasesitsknowledgeandbeliefoninformationprovidedbythirdparties,andmakesnorepresentationorwarrantyastotheaccuracyofsuchinformation.
Effortsareunderwaytobetterintegrateinformationfromthirdparties.
TIhastakenandcontinuestotakereasonablestepstoproviderepresentativeandaccurateinformationbutmaynothaveconducteddestructivetestingorchemicalanalysisonincomingmaterialsandchemicals.
TIandTIsuppliersconsidercertaininformationtobeproprietary,andthusCASnumbersandotherlimitedinformationmaynotbeavailableforrelease.
InnoeventshallTI'sliabilityarisingoutofsuchinformationexceedthetotalpurchasepriceoftheTIpart(s)atissueinthisdocumentsoldbyTItoCustomeronanannualbasis.
PACKAGEOPTIONADDENDUMwww.
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com22-Mar-2018Addendum-Page2IMPORTANTNOTICETexasInstrumentsIncorporated(TI)reservestherighttomakecorrections,enhancements,improvementsandotherchangestoitssemiconductorproductsandservicesperJESD46,latestissue,andtodiscontinueanyproductorserviceperJESD48,latestissue.
Buyersshouldobtainthelatestrelevantinformationbeforeplacingordersandshouldverifythatsuchinformationiscurrentandcomplete.
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htm)applytothesaleofpackagedintegratedcircuitproductsthatTIhasqualifiedandreleasedtomarket.
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TImayexpresslydesignatecertainproductsascompletingaparticularqualification(e.
g.
,Q100,MilitaryGrade,orEnhancedProduct).
DesignersagreethatithasthenecessaryexpertisetoselecttheproductwiththeappropriatequalificationdesignationfortheirapplicationsandthatproperproductselectionisatDesigners'ownrisk.
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MailingAddress:TexasInstruments,PostOfficeBox655303,Dallas,Texas75265Copyright2018,TexasInstrumentsIncorporated