UTXE0z8nrd12

MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20041POSTOFFICEBOX655303DALLAS,TEXAS75265DLowSupplyVoltageRange1.
8Vto3.
6VDUltralow-PowerConsumption:ActiveMode:200μAat1MHz,2.
2VStandbyMode:0.
7μAOffMode(RAMRetention):0.
1μADFivePowerSavingModesDWake-UpFromStandbyModeinlessthan6μsD16-BitRISCArchitecture,125nsInstructionCycleTimeDBasicClockModuleConfigurations:VariousInternalResistorsSingleExternalResistor32kHzCrystalHighFrequencyCrystalResonatorExternalClockSourceD16-BitTimer_AWithThreeCapture/CompareRegistersDOn-ChipComparatorforAnalogSignalCompareFunctionorSlopeA/DConversionDSerialCommunicationInterface(USART0)Software-SelectsAsynchronousUARTorSynchronousSPIDSerialOnboardProgramming,NoExternalProgrammingVoltageNeededProgrammableCodeProtectionbySecurityFuseDFamilyMembersInclude:MSP430F122:4KB+256BFlashMemory256BRAMMSP430F123:8KB+256BFlashMemory256BRAMDAvailableina28-PinPlasticSmall-OutlineWideBody(SOWB)Package,28-PinPlasticThinShrinkSmall-OutlinePackage(TSSOP)and32-PinQFNPackageDForCompleteModuleDescriptions,SeetheMSP430x1xxFamilyUser'sGuide,LiteratureNumberSLAU049descriptionTheTexasInstrumentsMSP430familyofultralowpowermicrocontrollersconsistofseveraldevicesfeaturingdifferentsetsofperipheralstargetedforvariousapplications.
Thearchitecture,combinedwithfivelowpowermodesisoptimizedtoachieveextendedbatterylifeinportablemeasurementapplications.
Thedevicefeaturesapowerful16-bitRISCCPU,16-bitregisters,andconstantgeneratorsthatattributetomaximumcodeefficiency.
Thedigitallycontrolledoscillator(DCO)allowswake-upfromlow-powermodestoactivemodeinlessthan6μs.
TheMSP430F12xseriesisanultralow-powermixedsignalmicrocontrollerwithabuilt-in16-bittimerandtwenty-twoI/Opins.
TheMSP430F12xseriesalsohasabuilt-incommunicationcapabilityusingasynchronous(UART)andsynchronous(SPI)protocolsinadditiontoaversatileanalogcomparator.
Typicalapplicationsincludesensorsystemsthatcaptureanalogsignals,convertthemtodigitalvalues,andthenprocessthedataanddisplaythemortransmitthemtoahostsystem.
StandaloneRFsensorfrontendisanotherareaofapplication.
TheI/OportinputsprovidesingleslopeA/Dconversioncapabilityonresistivesensors.
AVAILABLEOPTIONSPACKAGEDDEVICESTAPLASTIC28-PINSOWB(DW)PLASTIC28-PINTSSOP(PW)PLASTIC32-PINQFN(RHB)40°Cto85°CMSP430F122IDWMSP430F122IPWMSP430F122IRHB40°Cto85°CMSP430F122IDWMSP430F123IDWMSP430F122IPWMSP430F123IPWMSP430F122IRHBMSP430F123IRHBPleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
Copyright20012004TexasInstrumentsIncorporatedPRODUCTIONDATAinformationiscurrentasofpublicationdate.
ProductsconformtospecificationsperthetermsofTexasInstrumentsstandardwarranty.
Productionprocessingdoesnotnecessarilyincludetestingofallparameters.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20042POSTOFFICEBOX655303DALLAS,TEXAS75265pindesignation,MSP430x12x12345678910111213142827262524232221201918171615TESTVCCP2.
5/ROSCVSSXOUTXINRST/NMIP2.
0/ACLKP2.
1/INCLKP2.
2/CAOUT/TA0P3.
0/STE0P3.
1/SIMO0P3.
2/SOMI0P3.
3/UCLK0P1.
7/TA2/TDO/TDIP1.
6/TA1/TDI/TCLKP1.
5/TA0/TMSP1.
4/SMCLK/TCKP1.
3/TA2P1.
2/TA1P1.
1/TA0P1.
0/TACLKP2.
4/CA1/TA2P2.
3/CA0/TA1P3.
7P3.
6P3.
5/URXD0P3.
4/UTXD0DWORPWPACKAGE(TOPVIEW)RHBPACKAGE(TOPVIEW)XINP2.
5/ROSCNCNCRST/NMIVCCP2.
0/ACLKTESTP2.
1/INCLKP1.
7/TA2/TDO/TDIXOUTP1.
6/TA1/TDI/TCLKP1.
1/TA0P1.
0/TACLKNCP2.
4/CA1/TA2P2.
3/CA0/TA1P1.
2/TA1110111213272829P3.
0/STE0P3.
1/SIMO0P3.
2/SOMI0P3.
3/UCLK0P3.
4/UTXD0P3.
5/URXD0P3.
6P1.
5/TA0/TMS257634143031VSSP1.
3/TA2824232018192221172615P2.
2/CAOUT/TA0NCP3.
7P1.
4/SMCLK/TCKNote:NCpinsnotinternallyconnectedPowerPadconnectiontoVSSrecommendedfunctionalblockdiagramOscillatorACLKSMCLKCPUIncl.
16Reg.
BusConvMCBXINXOUTP3P2MDB,16BitMAB,16BitMCLKMAB,4BitVCCVSSRST/NMISystemClockROSCP18KBFlash4KBFlash256BRAMWatchdogTimer15/16-BitTimer_A33CCRegI/OPort18I/Os,withInterruptCapabilityI/OPort26I/Os,withInterruptCapabilityPORUSART0UARTModeSPIModeI/OPort38I/OsMDB,16-BitMAB,16-BitJTAGTESTTestJTAGEmulationModule868ComparatorAMDB,8BitMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20043POSTOFFICEBOX655303DALLAS,TEXAS75265TerminalFunctionsTERMINALDW,PWRHBI/ODESCRIPTIONNAMENO.
NO.
I/ODESCRIPTIONP1.
0/TACLK2121I/OGeneral-purposedigitalI/Opin/Timer_A,clocksignalTACLKinputP1.
1/TA02222I/OGeneral-purposedigitalI/Opin/Timer_A,capture:CCI0Ainput,compare:Out0output/BSLtransmitP1.
2/TA12323I/OGeneral-purposedigitalI/Opin/Timer_A,capture:CCI1Ainput,compare:Out1outputP1.
3/TA22424I/OGeneral-purposedigitalI/Opin/Timer_A,capture:CCI2Ainput,compare:Out2outputP1.
4/SMCLK/TCK2525I/OGeneral-purposedigitalI/Opin/SMCLKsignaloutput/testclock,inputterminalfordeviceprogrammingandtestP1.
5/TA0/TMS2626I/OGeneral-purposedigitalI/Opin/Timer_A,compare:Out0output/testmodeselect,inputterminalfordeviceprogrammingandtestP1.
6/TA1/TDI/TCLK2727I/OGeneral-purposedigitalI/Opin/Timer_A,compare:Out1output/testdatainputterminalortestclockinputP1.
7/TA2/TDO/TDI2828I/OGeneral-purposedigitalI/Opin/Timer_A,compare:Out2output/testdataoutputterminalordatainputduringprogrammingP2.
0/ACLK86I/OGeneral-purposedigitalI/Opin/ACLKoutputP2.
1/INCLK97I/OGeneral-purposedigitalI/Opin/Timer_A,clocksignalatINCLKP2.
2/CAOUT/TA0108I/OGeneral-purposedigitalI/Opin/Timer_A,capture:CCI0Binput/comparator_A,output/BSLreceiveP2.
3/CA0/TA11918I/OGeneral-purposedigitalI/Opin/Timer_A,compare:Out1output/comparator_A,inputP2.
4/CA1/TA22019I/OGeneral-purposedigitalI/Opin/Timer_A,compare:Out2output/comparator_A,inputP2.
5/ROSC332I/OGeneral-purposedigitalI/Opin/InputforexternalresistorthatdefinestheDCOnominalfrequencyP3.
0/STE0119I/OGeneral-purposedigitalI/Opin/slavetransmitenable—USART0/SPImodeP3.
1/SIMO01210I/OGeneral-purposedigitalI/Opin/slavein/masteroutofUSART0/SPImodeP3.
2/SOMI01311I/OGeneral-purposedigitalI/Opin/slaveout/masterinofUSART0/SPImodeP3.
3/UCLK01412I/OGeneral-purposedigitalI/Opin/externalclockinput—USART0/UARTorSPImode,clockoutput—USART0/SPImodeclockinputP3.
4/UTXD01513I/OGeneral-purposedigitalI/Opin/transmitdataout—USART0/UARTmodeP3.
5/URXD01614I/OGeneral-purposedigitalI/Opin/receivedatain—USART0/UARTmodeP3.
61715I/OGeneral-purposedigitalI/OpinP3.
71816I/OGeneral-purposedigitalI/OpinRST/NMI75IResetornonmaskableinterruptinputTEST129ISelectstestmodeforJTAGpinsonPort1VCC230SupplyvoltageVSS41GroundreferenceXIN63IInputterminalofcrystaloscillatorXOUT52OOutputterminalofcrystaloscillatorNC4,17,20,31NointernalconnectionQFNPadNAPackagePadNAQFNpackagepadconnectiontoVSSrecommended.
TDOorTDIisselectedviaJTAGinstruction.
General-PurposeRegisterProgramCounterStackPointerStatusRegisterConstantGeneratorGeneral-PurposeRegisterGeneral-PurposeRegisterGeneral-PurposeRegisterPC/R0SP/R1SR/CG1/R2CG2/R3R4R5R12R13General-PurposeRegisterGeneral-PurposeRegisterR6R7General-PurposeRegisterGeneral-PurposeRegisterR8R9General-PurposeRegisterGeneral-PurposeRegisterR10R11General-PurposeRegisterGeneral-PurposeRegisterR14R15MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20044POSTOFFICEBOX655303DALLAS,TEXAS75265short-formdescriptionCPUTheMSP430CPUhasa16-bitRISCarchitecturethatishighlytransparenttotheapplication.
Alloperations,otherthanprogram-flowinstructions,areperformedasregisteroperationsinconjunctionwithsevenaddressingmodesforsourceoperandandfouraddressingmodesfordestinationoperand.
TheCPUisintegratedwith16registersthatprovidereducedinstructionexecutiontime.
Theregister-to-registeroperationexecutiontimeisonecycleoftheCPUclock.
Fouroftheregisters,R0toR3,arededicatedasprogramcounter,stackpointer,statusregister,andconstantgeneratorrespectively.
Theremainingregistersaregeneral-purposeregisters.
PeripheralsareconnectedtotheCPUusingdata,address,andcontrolbuses,andcanbehandledwithallinstructions.
instructionsetTheinstructionsetconsistsof51instructionswiththreeformatsandsevenaddressmodes.
Eachinstructioncanoperateonwordandbytedata.
Table1showsexamplesofthethreetypesofinstructionformats;theaddressmodesarelistedinTable2.
Table1.
InstructionWordFormatsDualoperands,source-destinatione.
g.
ADDR4,R5R4+R5>R5Singleoperands,destinationonlye.
g.
CALLR8PC>(TOS),R8>PCRelativejump,un/conditionale.
g.
JNEJump-on-equalbit=0Table2.
AddressModeDescriptionsADDRESSMODESDSYNTAXEXAMPLEOPERATIONRegisterDDMOVRs,RdMOVR10,R11R10>R11IndexedDDMOVX(Rn),Y(Rm)MOV2(R5),6(R6)M(2+R5)>M(6+R6)Symbolic(PCrelative)DDMOVEDE,TONIM(EDE)>M(TONI)AbsoluteDDMOV&MEM,&TCDATM(MEM)>M(TCDAT)IndirectDMOV@Rn,Y(Rm)MOV@R10,Tab(R6)M(R10)>M(Tab+R6)IndirectautoincrementDMOV@Rn+,RmMOV@R10+,R11M(R10)>R11R10+2>R10ImmediateDMOV#X,TONIMOV#45,TONI#45>M(TONI)NOTE:S=sourceD=destinationMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20045POSTOFFICEBOX655303DALLAS,TEXAS75265operatingmodesTheMSP430hasoneactivemodeandfivesoftwareselectablelow-powermodesofoperation.
Aninterrupteventcanwakeupthedevicefromanyofthefivelow-powermodes,servicetherequestandrestorebacktothelow-powermodeonreturnfromtheinterruptprogram.
Thefollowingsixoperatingmodescanbeconfiguredbysoftware:DActivemodeAM;AllclocksareactiveDLow-powermode0(LPM0);CPUisdisabledACLKandSMCLKremainactive.
MCLKisdisabledDLow-powermode1(LPM1);CPUisdisabledACLKandSMCLKremainactive.
MCLKisdisabledDCO'sdc-generatorisdisabledifDCOnotusedinactivemodeDLow-powermode2(LPM2);CPUisdisabledMCLKandSMCLKaredisabledDCO'sdc-generatorremainsenabledACLKremainsactiveDLow-powermode3(LPM3);CPUisdisabledMCLKandSMCLKaredisabledDCO'sdc-generatorisdisabledACLKremainsactiveDLow-powermode4(LPM4);CPUisdisabledACLKisdisabledMCLKandSMCLKaredisabledDCO'sdc-generatorisdisabledCrystaloscillatorisstoppedMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20046POSTOFFICEBOX655303DALLAS,TEXAS75265interruptvectoraddressesTheinterruptvectorsandthepower-upstartingaddressarelocatedintheaddressrangeof0FFFFh-0FFE0h.
Thevectorcontainsthe16-bitaddressoftheappropriateinterrupthandlerinstructionsequence.
INTERRUPTSOURCEINTERRUPTFLAGSYSTEMINTERRUPTWORDADDRESSPRIORITYPower-upExternalresetWatchdogFlashmemoryWDTIFG(seeNote1)KEYV(seeNote1)Reset0FFFEh15,highestNMIOscillatorfaultFlashmemoryaccessviolationNMIIFG(seeNotes1and4)OFIFG(seeNotes1and4)ACCVIFG(seeNotes1and4)(non)-maskable,(non)-maskable,(non)-maskable0FFFCh140FFFAh130FFF8h12Comparator_ACAIFGmaskable0FFF6h11WatchdogtimerWDTIFGmaskable0FFF4h10Timer_A3TACCR0CCIFG(seeNote2)maskable0FFF2h9Timer_A3TACCR1andTACCR2CCIFGs,TAIFG(seeNotes1and2)maskable0FFF0h8USART0receiveURXIFG0maskable0FFEEh7USART0transmitUTXIFG0maskable0FFECh60FFEAh50FFE8h4I/OPortP2(eightflagsseeNote3)P2IFG.
0toP2IFG.
7(seeNotes1and2)maskable0FFE6h3I/OPortP1(eightflags)P1IFG.
0toP1IFG.
7(seeNotes1and2)maskable0FFE4h20FFE2h10FFE0h0,lowestNOTES:1.
Multiplesourceflags2.
Interruptflagsarelocatedinthemodule3.
ThereareeightPortP2interruptflags,butonlysixPortP2I/Opins(P2.
05)areimplementedonthe'12xdevices.
4.
(non)-maskable:theindividualinterruptenablebitcandisableaninterruptevent,butthegeneralinterruptenablecannot.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20047POSTOFFICEBOX655303DALLAS,TEXAS75265specialfunctionregistersMostinterruptandmoduleenablebitsarecollectedintothelowestaddressspace.
Specialfunctionregisterbitsthatarenotallocatedtoafunctionalpurposearenotphysicallypresentinthedevice.
Simplesoftwareaccessisprovidedwiththisarrangement.
interruptenable1and276540OFIEWDTIE321rw-0rw-0rw-0Address0hNMIIEACCVIErw-0WDTIE:Watchdog-timerinterruptenable.
Inactiveifwatchdogmodeisselected.
Activeifwatchdogtimerisconfiguredinintervaltimermode.
OFIE:Oscillator-fault-interruptenableNMIIE:Nonmaskable-interruptenableACCVIE:Flashaccessviolationinterruptenable76540321Address01hUTXIE0URXIE0rw-0rw-0URXIE0:USART0:UARTandSPIreceive-interruptenableUTXIE0:USART0:UARTandSPItransmit-interruptenableinterruptflagregister1and276540OFIFGWDTIFG321rw-0rw-1rw-(0)Address02hNMIIFGWDTIFG:Setonwatchdogtimeroverflow(inwatchdogmode)orsecuritykeyviolation.
ResetonVCCpoweruporaresetconditionattheRST/NMIpininresetmode.
OFIFG:FlagsetonoscillatorfaultNMIIFG:SetviaRST/NMIpin76540321Address03hUTXIFG0URXIFG0rw-0rw-0URXIFG0:USART0:UARTandSPIreceiveflagUTXIFG0:USART0:UARTandSPItransmitflagMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20048POSTOFFICEBOX655303DALLAS,TEXAS75265moduleenableregisters1and276540321Address04h76540321Address05hUTXE0URXE0USPIE0rw-0rw-0URXE0:USART0:UARTreceiveenableUTXE0:USART0:UARTtransmitenableUSPIE0:USART0:SPI(synchronousperipheralinterface)transmitandreceiveenableLegendrw:rw-0,1:Bitcanbereadandwritten.
Bitcanbereadandwritten.
ItisResetorSetbyPUCSFRbitisnotpresentindevice.
rw-(0,1):Bitcanbereadandwritten.
ItisResetorSetbyPORmemoryorganizationMSP430F122MSP430F123MemoryMain:interruptvectorMain:codememorySizeFlashFlash4KBFlash0FFFFh0FFE0h0FFFFh0F000h8KBFlash0FFFFh0FFE0h0FFFFh0E000hInformationmemorySizeFlash256Byte010FFh01000h256Byte010FFh01000hBootmemorySizeROM1KB0FFFh0C00h1KB0FFFh0C00hRAMSize256Byte02FFh0200h256Byte02FFh0200hPeripherals16-bit8-bit8-bitSFR01FFh0100h0FFh010h0Fh00h01FFh0100h0FFh010h0Fh00hbootstraploader(BSL)TheMSP430bootstraploader(BSL)enablesuserstoprogramtheflashmemoryorRAMusingaUARTserialinterface.
AccesstotheMSP430memoryviatheBSLisprotectedbyuser-definedpassword.
ForcompletedescriptionofthefeaturesoftheBSLanditsimplementation,seetheApplicationreportFeaturesoftheMSP430BootstrapLoader,LiteratureNumberSLAA089.
BSLFunctionDW&PWPackagePinsRHBPackagePinsDataTransmit22-P1.
122-P1.
1DataReceive10-P2.
28-P2.
2MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER20049POSTOFFICEBOX655303DALLAS,TEXAS75265flashmemoryTheflashmemorycanbeprogrammedviatheJTAGport,thebootstraploader,orin-systembytheCPU.
TheCPUcanperformsingle-byteandsingle-wordwritestotheflashmemory.
Featuresoftheflashmemoryinclude:DFlashmemoryhasnsegmentsofmainmemoryandtwosegmentsofinformationmemory(AandB)of128byteseach.
Eachsegmentinmainmemoryis512bytesinsize.
DSegments0tonmaybeerasedinonestep,oreachsegmentmaybeindividuallyerased.
DSegmentsAandBcanbeerasedindividually,orasagroupwithsegments0n.
SegmentsAandBarealsocalledinformationmemory.
DNewdevicesmayhavesomebytesprogrammedintheinformationmemory(neededfortestduringmanufacturing).
Theusershouldperformaneraseoftheinformationmemorypriortothefirstuse.
peripheralsPeripheralsareconnectedtotheCPUthroughdata,address,andcontrolbussesandcanbehandledusingallinstructions.
Forcompletemoduledescriptions,seetheMSP430x1xxFamilyUser'sGuide,literaturenumberSLAU049.
oscillatorandsystemclockTheclocksystemintheMSP430x12xdevicesissupportedbythebasicclockmodulethatincludessupportfora32768-Hzwatchcrystaloscillator,aninternaldigitally-controlledoscillator(DCO)andahighfrequencycrystaloscillator.
Thebasicclockmoduleisdesignedtomeettherequirementsofbothlowsystemcostandlow-powerconsumption.
TheinternalDCOprovidesafastturn-onclocksourceandstabilizesinlessthan6μs.
Thebasicclockmoduleprovidesthefollowingclocksignals:DAuxiliaryclock(ACLK),sourcedfroma32768-Hzwatchcrystalorahighfrequencycrystal.
DMainclock(MCLK),thesystemclockusedbytheCPU.
DSub-Mainclock(SMCLK),thesub-systemclockusedbytheperipheralmodules.
digitalI/OTherearethree8-bitI/Oportsimplemented—portsP1,P2,andP3(onlysixportP2I/Osignalsareavailableonexternalpins):DAllindividualI/Obitsareindependentlyprogrammable.
DAnycombinationofinput,output,andinterruptconditionsispossible.
DEdge-selectableinterruptinputcapabilityforalltheeightbitsofportsP1andsixbitsofportP2.
DRead/writeaccesstoport-controlregistersissupportedbyallinstructions.
NOTE:SixbitsofportP2,P2.
0toP2.
5,areavailableonexternalpinsbutallcontrolanddatabitsforportP2areimplemented.
PortP3hasnointerruptcapability.
watchdogtimerTheprimaryfunctionofthewatchdogtimer(WDT)moduleistoperformacontrolledsystemrestartafterasoftwareproblemoccurs.
Iftheselectedtimeintervalexpires,asystemresetisgenerated.
Ifthewatchdogfunctionisnotneededinanapplication,themodulecanbeconfiguredasanintervaltimerandcangenerateinterruptsatselectedtimeintervals.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200410POSTOFFICEBOX655303DALLAS,TEXAS75265USART0TheMSP430x12xdeviceshaveonehardwareuniversalsynchronous/asynchronousreceivetransmit(USART0)peripheralmodulethatisusedforserialdatacommunication.
TheUSARTsupportssynchronousSPI(3or4pin)andasynchronousUARTcommunicationprotocols,usingdouble-bufferedtransmitandreceivechannels.
timer_A3Timer_A3isa16-bittimer/counterwiththreecapture/compareregisters.
Timer_A3cansupportmultiplecapture/compares,PWMoutputs,andintervaltiming.
Timer_A3alsohasextensiveinterruptcapabilities.
Interruptsmaybegeneratedfromthecounteronoverflowconditionsandfromeachofthecapture/compareregisters.
Timer_A3SignalConnectionsInputPinNumberDeviceInputSignalModuleInputNameModuleBlockModuleOutputSignalOutputPinNumberDW,PWRHBDeviceInputSignalModuleInputNameModuleBlockModuleOutputSignalDW,PWRHB21-P1.
021-P1.
0TACLKTACLKACLKACLKTimerNASMCLKSMCLKTimerNA9-P2.
17-P2.
1INCLKINCLK22-P1.
122-P1.
1TA0CCI0A22-P1.
122-P1.
110-P2.
28-P2.
2TA0CCI0BCCR0TA026-P1.
526-P1.
5DVSSGNDCCR0TA0DVCCVCC23-P1.
223-P1.
2TA1CCI1A19-P2.
318-P2.
3CAOUT(internal)CCI1BCCR1TA123-P1.
223-P1.
2DVSSGNDCCR1TA127-P1.
627-P1.
6DVCCVCC24-P1.
324-P1.
3TA2CCI2A20-P2.
419-P2.
4ACLK(internal)CCI2BCCR2TA224-P1.
324-P1.
3DVSSGNDCCR2TA228-P1.
728-P1.
7DVCCVCCcomparator_ATheprimaryfunctionofthecomparator_Amoduleistosupportprecisionslopeanalog-to-digitalconversions,battery-voltagesupervision,andmonitoringofexternalanalogsignals.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200411POSTOFFICEBOX655303DALLAS,TEXAS75265peripheralfilemapPERIPHERALSWITHWORDACCESSTimer_AReservedReservedReservedReservedCapture/compareregisterCapture/compareregisterCapture/compareregisterTimer_AregisterReservedReservedReservedReservedCapture/comparecontrolCapture/comparecontrolCapture/comparecontrolTimer_AcontrolTimer_AinterruptvectorTACCR2TACCR1TACCR0TARTACCTL2TACCTL1TACCTL0TACTLTAIV017Eh017Ch017Ah0178h0176h0174h0172h0170h016Eh016Ch016Ah0168h0166h0164h0162h0160h012EhFlashMemoryFlashcontrol3Flashcontrol2Flashcontrol1FCTL3FCTL2FCTL1012Ch012Ah0128hWatchdogWatchdog/timercontrolWDTCTL0120hPERIPHERALSWITHBYTEACCESSUSART0TransmitbufferReceivebufferBaudrateBaudrateModulationcontrolReceivecontrolTransmitcontrolUSARTcontrolU0TXBUFU0RXBUFU0BR1U0BR0U0MCTLU0RCTLU0TCTLU0CTL077h076h075h074h073h072h071h070hComparator_AComparator_AportdisableComparator_Acontrol2Comparator_Acontrol1CAPDCACTL2CACTL105Bh05Ah059hBasicClockBasicclocksys.
control2Basicclocksys.
control1DCOclockfreq.
controlBCSCTL2BCSCTL1DCOCTL058h057h056hPortP3PortP3selectionPortP3directionPortP3outputPortP3inputP3SELP3DIRP3OUTP3IN01Bh01Ah019h018hPortP2PortP2selectionPortP2interruptenablePortP2interruptedgeselectPortP2interruptflagPortP2directionPortP2outputPortP2inputP2SELP2IEP2IESP2IFGP2DIRP2OUTP2IN02Eh02Dh02Ch02Bh02Ah029h028hPortP1PortP1selectionPortP1interruptenablePortP1interruptedgeselectPortP1interruptflagPortP1directionPortP1outputPortP1inputP1SELP1IEP1IESP1IFGP1DIRP1OUTP1IN026h025h024h023h022h021h020hMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200412POSTOFFICEBOX655303DALLAS,TEXAS75265peripheralfilemap(continued)PERIPHERALSWITHBYTEACCESS(CONTINUED)SpecialFunctionModuleenable2Moduleenable1SFRinterruptflag2SFRinterruptflag1SFRinterruptenable2SFRinterruptenable1ME2ME1IFG2IFG1IE2IE1005h004h003h002h001h000habsolutemaximumratingsVoltageappliedatVCCtoVSS0.
3Vto4.
1VVoltageappliedtoanypin(seeNote)0.
3VtoVCC+0.
3VDiodecurrentatanydeviceterminal±2mAStoragetemperature,Tstg(unprogrammeddevice)55°Cto150°CStoragetemperature,Tstg(programmeddevice)40°Cto85°CStressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.
Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperatingconditions"isnotimplied.
Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
NOTE:AllvoltagesreferencedtoVSS.
TheJTAGfuse-blowvoltage,VFB,isallowedtoexceedtheabsolutemaximumrating.
ThevoltageisappliedtotheTESTpinwhenblowingtheJTAGfuse.
recommendedoperatingconditionsMINNOMMAXUNITSSupplyvoltageduringprogramexecutionV(seeNote1)1836VSupplyvoltageduringprogramexecution,VCC(seeNote1)1.
83.
6VSupplyvoltageduringprogram/eraseflashmemory,VCC2.
73.
6VSupplyvoltage,VSS0VOperatingfree-airtemperaturerange,TA4085°CLFXT1tlffLFmodeselected,XTS=0Watchcrystal32768HzLFXT1crystalfrequency,f(LFXT1)(seeNote2)XT1selectedmodeXTS1Ceramicresonator4508000kHz(seeNote2)XT1selectedmode,XTS=1Crystal10008000kHzProcessorfrequencyf(MCLKsignal)VCC=1.
8Vdc4.
15MHzProcessorfrequencyf(system)(MCLKsignal)VCC=3.
6Vdc8MHzNOTES:1.
TheLFXT1oscillatorinLF-moderequiresaresistorof5.
1MΩfromXOUTtoVSSwhenVCC<2.
5V.
TheLFXT1oscillatorinXT1-modeacceptsaceramicresonatororacrystalfrequencyof4MHzatVCC≥2.
2V.
TheLFXT1oscillatorinXT1-modeacceptsaceramicresonatororacrystalfrequencyof8MHzatVCC≥2.
8V.
2.
TheLFXT1oscillatorinLF-moderequiresawatchcrystal.
TheLFXT1oscillatorinXT1-modeacceptsaceramicresonatororcrystal.
1.
8V3.
6V2.
7V3V4.
15MHz8.
0MHzSupplyVoltageVSupplyvoltagerange,'F12x,duringflashmemoryprogrammingSupplyvoltagerange,'F12x,duringprogramexecutionNOTE:Minimumprocessorfrequencyisdefinedbysystemclock.
FlashprogramoreraseoperationsrequireaminimumVCCof2.
7V.
f(system)(MHz)Figure1.
FrequencyvsSupplyVoltage,MSP430F12xMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200413POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)supplycurrent(intoVCC)excludingexternalcurrentPARAMETERTESTCONDITIONSMINTYPMAXUNITTA=40°C+85°C,fMCLK=f(SMCLK)=1MHz,VCC=2.
2V200250μAI(AM)ActivemodefMCLK=f(SMCLK)=1MHz,f(ACLK)=32,768Hz,ProgramexecutesinFlashVCC=3V300350μAI(AM)ActivemodeTA=40°C+85°C,fff4096HzVCC=2.
2V35μAf(MCLK)=f(SMCLK)=f(ACLK)=4096Hz,ProgramexecutesinFlashVCC=3V1118μAI(COff)Lowpowermode(LPM0)TA=40°C+85°C,f0f1MHzVCC=2.
2V3245μAI(CPUOff)Low-powermode,(LPM0)f(MCLK)=0,f(SMCLK)=1MHz,f(ACLK)=32,768HzVCC=3V5570μAI()Lowpowermode(LPM2)TA=40°C+85°C,ff0MHzVCC=2.
2V1114μAI(LPM2)Low-powermode,(LPM2)f(MCLK)=f(SMCLK)=0MHz,f(ACLK)=32,768Hz,SCG0=0VCC=3V1722μATA=40°C0.
81.
2TA=25°CVCC=2.
2V0.
71μAI()Lowpowermode(LPM3)TA=85°CCC1.
62.
3μI(LPM3)Low-powermode,(LPM3)TA=40°C1.
82.
2TA=25°CVCC=3V1.
61.
9μATA=85°CCC2.
33.
4μTA=40°C0.
10.
5I(LPM4)Low-powermode,(LPM4)TA=25°CVCC=2.
2V/3V0.
10.
5μA(LPM4)p,()TA=85°CCC0.
81.
9μNOTE:Allinputsaretiedto0VorVCC.
Outputsdonotsourceorsinkanycurrent.
currentconsumptionofactivemodeversussystemfrequencyIAM=IAM[1MHz]*fsystem[MHz]currentconsumptionofactivemodeversussupplyvoltageIAM=IAM[3V]+120μA/V*(VCC3V)MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200414POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)(continued)Schmitt-triggerinputsPortP1toPortP3;P1.
0toP1.
7,P2.
0toP2.
5,P3.
0toP3.
7PARAMETERVCCMINTYPMAXUNITVPositivegoinginputthresholdvoltage2.
2V1.
11.
5VVIT+Positive-goinginputthresholdvoltage3V1.
51.
9VVNegativegoinginputthresholdvoltage2.
2V0.
40.
9VVITNegative-goinginputthresholdvoltage3V0.
91.
3VVInputvoltagehysteresis(VV)2.
2V0.
31.
1VVhysInputvoltagehysteresis,(VIT+VIT)3V0.
51VstandardinputsRST/NMI,TEST;JTAG:TCK,TMS,TDI/TCLKPARAMETERVCCMINTYPMAXUNITVILLow-levelinputvoltage22V/3VVSSVSS+0.
6VVIHHigh-levelinputvoltage2.
2V/3V0.
8*VCCVCCVinputsPx.
x,TAxPARAMETERTESTCONDITIONSVCCMINTYPMAXUNITPortP1,P2:P1.
xtoP2.
x,External2.
2V/3V1.
5cyclet(int)ExternalinterrupttimingPortP1,P2:P1.
xtoP2.
x,Externaltriggersignalfortheinterruptflag,()2.
2V62ns(int)pggggpg,(seeNote1)3V50nstTimerAcapturetimingTA0TA1TA22.
2V62nst(cap)Timer_A,capturetimingTA0,TA1,TA23V50nsfTimer_AclockfrequencyTACLKINCLKt=t2.
2V8MHzf(TAext)Timer_AclockfrequencyexternallyappliedtopinTACLK,INCLKt(H)=t(L)3V10MHzfTimerAclockfrequencySMCLKorACLKsignalselected2.
2V8MHzf(TAint)Timer_AclockfrequencySMCLKorACLKsignalselected3V10MHzNOTES:1.
Theexternalsignalsetstheinterruptflageverytimetheminimumt(int)cycleandtimeparametersaremet.
Itmaybesetevenwithtriggersignalsshorterthant(int).
Boththecycleandtimingspecificationsmustbemettoensuretheflagisset.
t(int)ismeasuredinMCLKcycles.
leakagecurrent(seeNotes1and2)PARAMETERTESTCONDITIONSVCCMINTYPMAXUNITIHighimpedanceleakagecurrentPortP1:P1.
x,0≤*≤72.
2V/3V±50nAIlkg(Px.
x)High-impedanceleakagecurrentPortP2:P2.
x,0≤*≤52.
2V/3V±50nANOTES:1.
TheleakagecurrentismeasuredwithVSSorVCCappliedtothecorrespondingpin(s),unlessotherwisenoted.
2.
Theleakageofthedigitalportpinsismeasuredindividually.
Theportpinmustbeselectedforinputandtheremustbenooptionalpulluporpulldownresistor.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200415POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)(continued)outputsPort1toPort3;P1.
0toP1.
7,P2.
0toP2.
5,P3.
0toP3.
7PARAMETERTESTCONDITIONSMINTYPMAXUNITI(OHmax)=1.
5mAV22VSeeNote1VCC0.
25VCCVHighleveloutputvoltageI(OHmax)=6mAVCC=2.
2VSeeNote2VCC0.
6VCCVVOHHigh-leveloutputvoltageI(OHmax)=1.
5mAV3VSeeNote1VCC0.
25VCCVI(OHmax)=6mAVCC=3VSeeNote2VCC0.
6VCCI(OLmax)=1.
5mAV22VSeeNote1VSSVSS+0.
25VLowleveloutputvoltageI(OLmax)=6mAVCC=2.
2VSeeNote2VSSVSS+0.
6VVOLLow-leveloutputvoltageI(OLmax)=1.
5mAVCC=3VSeeNote1VSSVSS+0.
25VI(OLmax)=6mAVCC=3VSeeNote2VSSVSS+0.
6NOTES:1.
Themaximumtotalcurrent,IOHmaxandIOLmax,foralloutputscombined,shouldnotexceed±12mAtoholdthemaximumvoltagedropspecified.
2.
Themaximumtotalcurrent,IOHmaxandIOLmax,foralloutputscombined,shouldnotexceed±48mAtoholdthemaximumvoltagedropspecified.
outputsP1.
x,P2.
x,P3.
x,TAxPARAMETERTESTCONDITIONSVCCMINTYPMAXUNITf(P20)P2.
0/ACLK;CL=20pF2.
2V/3VfSystemf(TAx)OutputfrequencyTA0,TA1,TA2;CL=20pF,Internalclocksource,SMCLKsignalapplied(seeNote1)2.
2V/3VdcfSystemMHzfSMCLK=fLFXT1=fXT140%60%P14/SMCLKfSMCLK=fLFXT1=fLF22V/3V35%65%P1.
4/SMCLK,CL=20pFfSMCLK=fLFXT1/n2.
2V/3V50%15ns50%50%+15nst(Xdc)DutycycleofO/PfrequencyfSMCLK=fDCOCLK2.
2V/3V50%15ns50%50%+15nsfrequencyP20/ACLKfP20=fLFXT1=fXT140%60%P2.
0/ACLK,CL=20pFfP20=fLFXT1=fLF2.
2V/3V30%70%CL=20pFfP20=fLFXT1/n50%t(TAdc)TA0,TA1,TA2;CL=20pF,Dutycycle=50%2.
2V/3V0±50nsNOTE1:ThelimitsofthesystemclockMCLKhastobemet.
MCLKandSMCLKcanhavedifferentfrequencies.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200416POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedoperatingfree-airtemperature(unlessotherwisenoted)(continued)outputsPortsP1,P2,andP3Figure2VOLLow-LevelOutputVoltageV0481216202428320.
00.
51.
01.
52.
02.
5VCC=2.
2VP1.
0TA=25°CTA=85°COLITypicalLow-LevelOutputCurrentmATYPICALLOW-LEVELOUTPUTCURRENTvsLOW-LEVELOUTPUTVOLTAGEFigure3VOLLow-LevelOutputVoltageV010203040500.
00.
51.
01.
52.
02.
53.
03.
5VCC=3VP1.
0TA=25°CTA=85°CTYPICALLOW-LEVELOUTPUTCURRENTvsLOW-LEVELOUTPUTVOLTAGEOLITypicalLow-LevelOutputCurrentmAFigure4VOHHigh-LevelOutputVoltageV28242016128400.
00.
51.
01.
52.
02.
5VCC=2.
2VP1.
0TA=25°CTA=85°COHITypicalHigh-LevelOutputCurrentmATYPICALHIGH-LEVELOUTPUTCURRENTvsHIGH-LEVELOUTPUTVOLTAGEFigure5VOHHigh-LevelOutputVoltageV60504030201000.
00.
51.
01.
52.
02.
53.
03.
5VCC=3VP1.
0TA=25°CTA=85°CTYPICALHIGH-LEVELOUTPUTCURRENTvsHIGH-LEVELOUTPUTVOLTAGEOHITypicalHigh-LevelOutputCurrentmANOTE:Onlyoneoutputisloadedatatime.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200417POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)(continued)USART(seeNote1)PARAMETERTESTCONDITIONSMINTYPMAXUNITt()USART:deglitchtimeVCC=2.
2V200430800nst(τ)USART:deglitchtimeVCC=3V150280500nsNOTE1:ThesignalappliedtotheUSARTreceivesignal/terminal(URXD)shouldmeetthetimingrequirementsoft(τ)toensurethattheURXSflip-flopisset.
TheURXSflip-flopissetwithnegativepulsesmeetingtheminimum-timingconditionoft(τ).
Theoperatingconditionstosettheflagmustbemetindependentlyfromthistimingconstraint.
ThedeglitchcircuitryisactiveonlyonnegativetransitionsontheURXDline.
wake-upfromlowerpowermodes(LPMx)PARAMETERTESTCONDITIONSMINTYPMAXUNITt(LPM0)VCC=2.
2V/3V100nst(LPM2)VCC=2.
2V/3V100nsf(MCLK)=1MHz,VCC=2.
2V/3V6t(LPM3)Delaytime(seeNote1)f(MCLK)=2MHz,VCC=2.
2V/3V6μs(LPM3)Delaytime(seeNote1)f(MCLK)=3MHz,VCC=2.
2V/3V6μf(MCLK)=1MHz,VCC=2.
2V/3V6t(LPM4)f(MCLK)=2MHz,VCC=2.
2V/3V6μs(LPM4)f(MCLK)=3MHz,VCC=2.
2V/3V6μNOTE1:ParameterapplicableonlyifDCOCLKisusedforMCLK.
RAMPARAMETERMINNOMMAXUNITV(RAMh)CPUhalted(seeNote1)1.
6VNOTE1:ThisparameterdefinestheminimumsupplyvoltageVCCwhenthedataintheprogrammemoryRAMremainsunchanged.
Noprogramexecutionshouldhappenduringthissupplyvoltagecondition.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200418POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)(continued)Comparator_A(seeNote1)PARAMETERTESTCONDITIONSVCCMINTYPMAXUNITI()CAON=1CARSEL=0CAREF=02.
2V2540μAI(DD)CAON=1,CARSEL=0,CAREF=03V4560μAI(Refladder/CAON=1,CARSEL=0,CAREF1/2/3Noloadat2.
2V3050μAI(Refladder/RefDiode)CAREF=1/2/3,NoloadatP2.
3/CA0/TA1andP2.
4/CA1/TA23V4571μAV(IC)Common-modeinputvoltageCAON=12.
2V/3V0VCC1VV(Ref025)Voltageat0.
25VCCnodeVCCPCA0=1,CARSEL=1,CAREF=1,NoloadatP2.
3/CA0/TA1andP2.
4/CA1/TA22.
2V/3V0.
230.
240.
25V(Ref050)Voltageat0.
5VCCnodeVCCPCA0=1,CARSEL=1,CAREF=2,NoloadatP2.
3/CA0/TA1andP2.
4/CA1/TA22.
2V/3V0.
470.
480.
5V(seeFigure6andFigure7)PCA0=1,CARSEL=1,CAREF=3,NoloadatP23/CA0/TA1and2.
2V390480540mVV(RefVT)(seeFigure6andFigure7)NoloadatP2.
3/CA0/TA1andP2.
4/CA1/TA2,TA=85°C3V400490550mVV(offset)OffsetvoltageSeeNote22.
2V/3V3030mVVhysInputhysteresisCAON=12.
2V/3V00.
71.
4mVTA=25°C,Overdrive10mV,2.
2V160210300nstTA=25C,Overdrive10mV,Withoutfilter:CAF=03V80150240nst(responseLH)TA=25°C,Overdrive10mV,2.
2V1.
41.
93.
4μsTA=25C,Overdrive10mV,Withfilter:CAF=13V0.
91.
52.
6μsTA=25°C,2.
2V130210300nstTA=25C,Overdrive10mV,withoutfilter:CAF=03V80150240nst(responseHL)TA=25°C,2.
2V1.
41.
93.
4μsTA=25C,Overdrive10mV,withfilter:CAF=13V0.
91.
52.
6μsNOTES:1.
TheleakagecurrentfortheComparator_AterminalsisidenticaltoIlkg(Px.
x)specification.
2.
TheinputoffsetvoltagecanbecancelledbyusingtheCAEXbittoinverttheComparator_Ainputsonsuccessivemeasurements.
Thetwosuccessivemeasurementsarethensummedtogether.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200419POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedoperatingfree-airtemperature(unlessotherwisenoted)(continued)TAFree-AirTemperature°C400450500550600650452551535557595VCC=3VFigure6.
V(RefVT)vsTemperature,VCC=3VV(REFVT)ReferenceVoltsmVTypicalFigure7.
V(RefVT)vsTemperature,VCC=2.
2VTAFree-AirTemperature°C400450500550600650452551535557595VCC=2.
2VV(REFVT)ReferenceVoltsmVTypical_+CAON01V+01CAFLowPassFilterτ≈2.
0μsToInternalModulesSetCAIFGFlagCAOUTVVCC10V0Figure8.
BlockDiagramofComparator_AModuleOverdriveVCAOUTt(response)V+V400mVFigure9.
OverdriveDefinitionMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200420POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)(continued)PUC/PORPARAMETERTESTCONDITIONSMINTYPMAXUNITt(POR_Delay)InternaltimedelaytoreleasePOR150250μsVCCthresholdatwhichPORTA=40°C1.
41.
8VVPORVCCthresholdatwhichPORreleasedelaytimebeginsTA=25°C1.
11.
5VVPORreleasedelaytimebegins(seeNote1)TA=85°CVCC=2.
2V/3V0.
81.
2VV(min)VCCthresholdrequiredtogenerateaPOR(seeNote2)VCC|dV/dt|≥1V/ms0.
2Vt(reset)RST/NMIlowtimeforPUC/PORResetisacceptedinternally2μsNOTES:1.
VCCrisetimedV/dt≥1V/ms.
2.
WhendrivingVCClowinordertogenerateaPORcondition,VCCshouldbedrivento200mVorlowerwithadV/dtequaltoorlessthan1V/ms.
ThecorrespondingrisingVCCmustalsomeetthedV/dtrequirementequaltoorgreaterthan+1V/ms.
VCCPORVtVPORV(min)PORNoPORFigure10.
Power-OnReset(POR)vsSupplyVoltage00.
20.
61.
01.
21.
82.
04020020406080Temperature[°C]V[V]1.
61.
40.
80.
41.
21.
51.
80.
81.
11.
425°CMaxMinPORFigure11.
VPORvsTemperatureMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200421POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)(continued)DCOPARAMETERTESTCONDITIONSVCCMINTYPMAXUNITfR0DCO3MOD0DCOR0T25°C2.
2V0.
080.
120.
15MHzf(DCO03)Rsel=0,DCO=3,MOD=0,DCOR=0,TA=25°C3V0.
080.
130.
16MHzfR1DCO3MOD0DCOR0T25°C2.
2V0.
140.
190.
23MHzf(DCO13)Rsel=1,DCO=3,MOD=0,DCOR=0,TA=25°C3V0.
140.
180.
22MHzf(CO)R=2DCO=3MOD=0DCOR=0T=25°C2.
2V0.
220.
300.
36MHzf(DCO23)Rsel=2,DCO=3,MOD=0,DCOR=0,TA=25°C3V0.
220.
280.
34MHzf(CO)R=3DCO=3MOD=0DCOR=0T=25°C2.
2V0.
370.
490.
59MHzf(DCO33)Rsel=3,DCO=3,MOD=0,DCOR=0,TA=25°C3V0.
370.
470.
56MHzf(CO)R=4DCO=3MOD=0DCOR=0T=25°C2.
2V0.
610.
770.
93MHzf(DCO43)Rsel=4,DCO=3,MOD=0,DCOR=0,TA=25°C3V0.
610.
750.
9MHzf(CO)R=5DCO=3MOD=0DCOR=0T=25°C2.
2V11.
21.
5MHzf(DCO53)Rsel=5,DCO=3,MOD=0,DCOR=0,TA=25°C3V11.
31.
5MHzf(CO)R=6DCO=3MOD=0DCOR=0T=25°C2.
2V1.
61.
92.
2MHzf(DCO63)Rsel=6,DCO=3,MOD=0,DCOR=0,TA=25°C3V1.
6922.
29MHzf(CO)R=7DCO=3MOD=0DCOR=0T=25°C2.
2V2.
42.
93.
4MHzf(DCO73)Rsel=7,DCO=3,MOD=0,DCOR=0,TA=25°C3V2.
73.
23.
65MHzf(CO)R=7DCO=7MOD=0DCOR=0T=25°C2.
2V44.
54.
9MHzf(DCO77)Rsel=7,DCO=7,MOD=0,DCOR=0,TA=25°C3V4.
44.
95.
4MHzf(CO)R=4DCO=7MOD=0DCOR=0T=25°C22V/3VFDCO40FDCO40FDCO40MHzf(DCO47)Rsel=4,DCO=7,MOD=0,DCOR=0,TA=25°C2.
2V/3VFDCO40x1.
7FDCO40x2.
1FDCO40x2.
5MHzS(Rsel)SR=fRsel+1/fRsel2.
2V/3V1.
351.
652ratioS(DCO)SDCO=fDCO+1/fDCO2.
2V/3V1.
071.
121.
16ratioDTemperaturedriftR=4DCO=3MOD=0(seeNote1)2.
2V0.
310.
360.
40%/°CDtTemperaturedrift,Rsel=4,DCO=3,MOD=0(seeNote1)3V0.
330.
380.
43%/°CDVDriftwithVCCvariation,Rsel=4,DCO=3,MOD=0(seeNote1)2.
2V/3V0510%/VNOTES:1.
Theseparametersarenotproductiontested.
2.
2V3VVCCMaxMinMaxMinf(DCOx7)f(DCOx0)FrequencyVariance01234567DCOSteps1fDCOCLKFigure12.
DCOCharacteristicsMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200422POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)(continued)mainDCOcharacteristicsDIndividualdeviceshaveaminimumandmaximumoperationfrequency.
Thespecifiedparametersforf(DCOx0)tof(DCOx7)arevalidforalldevices.
DAllrangesselectedbyRsel(n)overlapwithRsel(n+1):Rsel0overlapsRsel1,.
.
.
Rsel6overlapsRsel7.
DDCOcontrolbitsDCO0,DCO1,andDCO2haveastepsizeasdefinedbyparameterSDCO.
DModulationcontrolbitsMOD0toMOD4selecthowoftenf(DCO+1)isusedwithintheperiodof32DCOCLKcycles.
Thefrequencyf(DCO)isusedfortheremainingcycles.
Thefrequencyisanaverageequalto:faverage+32f(DCO)f(DCO)1)MODf(DCO))(32*MOD)f(DCO)1)DCOwhenusingROSC(seeNote1)PARAMETERTESTCONDITIONSVCCMINNOMMAXUNITfDCOoutputfrequencyRsel=4,DCO=3,MOD=0,DCOR=1,2.
2V1.
8±15%MHzfDCO,DCOoutputfrequencyRsel=4,DCO=3,MOD=0,DCOR=1,TA=25°C3V1.
95±15%MHzDt,TemperaturedriftRsel=4,DCO=3,MOD=0,DCOR=12.
2V/3V±0.
1%/°CDv,DriftwithVCCvariationRsel=4,DCO=3,MOD=0,DCOR=12.
2V/3V10%/VNOTES:1.
ROSC=100kΩ.
Metalfilmresistor,type0257.
0.
6wattwith1%toleranceandTK=±50ppm/°C.
crystaloscillator,LFXT1PARAMETERTESTCONDITIONSMINTYPMAXUNITCInputcapacitanceXTS=0;LFmodeselected.
VCC=2.
2V/3V12pFCXINInputcapacitanceXTS=1;XT1modeselected.
VCC=2.
2V/3V(seeNote1)2pFCOOutputcapacitanceXTS=0;LFmodeselected.
VCC=2.
2V/3V12pFCXOUTOutputcapacitanceXTS=1;XT1modeselected.
VCC=2.
2V/3V(seeNote1)2pFVILInputlevelsatXINVCC=22V/3V(seeNote2)VSS0.
2*VCCVVIHInputlevelsatXINVCC=2.
2V/3V(seeNote2)0.
8*VCCVCCVNOTES:1.
Requiresexternalcapacitorsatbothterminals.
Valuesarespecifiedbycrystalmanufacturers.
2.
Appliesonlywhenusinganexternallogic-levelclocksource.
Notapplicablewhenusingacrystalorresonator.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200423POSTOFFICEBOX655303DALLAS,TEXAS75265electricalcharacteristicsoverrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted)(continued)FlashMemoryPARAMETERTESTCONDITIONSVCCMINNOMMAXUNITVCC(PGM/ERASE)ProgramandErasesupplyvoltage2.
73.
6VfFTGFlashTimingGeneratorfrequency257476kHzIPGMSupplycurrentfromVCCduringprogram2.
7V/3.
6V35mAIERASESupplycurrentfromVCCduringerase2.
7V/3.
6V37mAtCPTCumulativeprogramtimeseeNote12.
7V/3.
6V4mstCMEraseCumulativemasserasetimeseeNote22.
7V/3.
6V200msProgram/Eraseendurance104105cyclestRetentionDataretentiondurationTJ=25°C100yearstWordWordorbyteprogramtime35tBlock,0Blockprogramtimefor1stbyteorword30tBlock,1-63BlockprogramtimeforeachadditionalbyteorwordseeNote321ttBlock,EndBlockprogramend-sequencewaittimeseeNote36tFTGtMassEraseMasserasetime5297tSegEraseSegmenterasetime4819NOTES:1.
Thecumulativeprogramtimemustnotbeexceededwhenwritingtoa64-byteflashblock.
Thisparameterappliestoallprogrammingmethods:individualword/bytewriteandblockwritemodes.
2.
Themasserasedurationgeneratedbytheflashtiminggeneratorisatleast11.
1ms(=5297x1/fFTG,max=5297x1/476kHz).
ToachievetherequiredcumulativemasserasetimetheFlashController'smasseraseoperationcanberepeateduntilthistimeismet.
(Aworstcaseminimumof19cyclesarerequired).
3.
ThesevaluesarehardwiredintotheFlashController'sstatemachine;tFTG=1/fFTG.
JTAGInterfacePARAMETERTESTCONDITIONSVCCMINNOMMAXUNITfTCKinputfrequencyseeNote12.
2V05MHzfTCKTCKinputfrequencyseeNote13V010MHzRInternalInternalpull-downresistanceonTESTseeNote22.
2V/3V256090kΩNOTES:1.
fTCKmayberestrictedtomeetthetimingrequirementsofthemoduleselected.
2.
TESTpull-downresistorimplementedinallversions.
JTAGFuse(seeNote1)PARAMETERTESTCONDITIONSVCCMINNOMMAXUNITVCC(FB)Supplyvoltageduringfuse-blowconditionTA=25°C2.
5VVFBVoltagelevelonTESTforfuse-blow67VIFBSupplycurrentintoTESTduringfuseblow100mAtFBTimetoblowfuse1msNOTES:1.
Oncethefuseisblown,nofurtheraccesstotheMSP430JTAG/Testandemulationfeaturesispossible.
TheJTAGblockisswitchedtobypassmode.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200424POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONinput/outputschematicPortP1,P1.
0toP1.
3,input/outputwithSchmitt-triggerENDP1.
0/TACLKP1.
1/TA0P1.
2/TA1P1.
3/TA20101InterruptEdgeSelectENSetQP1IE.
xP1IFG.
xP1IRQ.
xInterruptFlagP1IES.
xP1SEL.
xModuleXINP1IN.
xP1OUT.
xModuleXOUTDirectionControlFromModuleP1DIR.
xP1SEL.
xPadLogicNOTE:x=Bit/identifier,0to3forportP1P1Sel.
0P1DIR.
0P1DIR.
0P1OUT.
0VSSP1IN.
0TACLKP1IE.
0P1IFG.
0P1IES.
0P1Sel.
1P1DIR.
1P1DIR.
1P1OUT.
1Out0signalP1IN.
1CCI0AP1IE.
1P1IFG.
1P1IES.
1P1Sel.
2P1DIR.
2P1DIR.
2P1OUT.
2Out1signalP1IN.
2CCI1AP1IE.
2P1IFG.
2P1IES.
2P1Sel.
3P1DIR.
3P1DIR.
3P1OUT.
3Out2signalP1IN.
3CCI2AP1IE.
3P1IFG.
3P1IES.
3SignalfromortoTimer_AMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200425POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONinput/outputschematic(continued)PortP1,P1.
4toP1.
7,input/outputwithSchmitt-triggerandin-systemaccessfeaturesENDP1.
4P1.
70101InterruptEdgeSelectENSetQP1IE.
xP1IFG.
xP1IRQ.
xInterruptFlagP1IES.
xP1SEL.
xModuleXINP1IN.
xP1OUT.
xModuleXOUTDirectionControlFromModuleP1DIR.
xP1SEL.
xPadLogicBusKeeper60kΩControlbyJTAG01TDOControlledByJTAGP1.
xTDI/TCLKP1.
xTSTTMSTSTTCKTSTControlledbyJTAGTSTP1.
xP1.
xNOTE:ThetestpinshouldbeprotectedfrompotentialEMIandESDvoltagespikes.
Thismayrequireasmallerexternalpulldownresistorinsomeapplications.
x=Bitidentifier,4to7forportP1Duringprogrammingactivityandduringblowingthefuse,thepinTDO/TDIisusedtoapplythetestinputforJTAGcircuitry.
P1.
7/TA2/TDO/TDIP1.
6/TA1/TDI/TCLKP1.
5/TA0/TMSP1.
4/SMCLK/TCKTypicalTESTBumandTestFuseDVCCP1Sel.
4P1DIR.
4P1DIR.
4P1OUT.
4SMCLKP1IN.
4unusedP1IE.
4P1IFG.
4P1IES.
4P1Sel.
5P1DIR.
5P1DIR.
5P1OUT.
5Out0signalP1IN.
5unusedP1IE.
5P1IFG.
5P1IES.
5P1Sel.
6P1DIR.
6P1DIR.
6P1OUT.
6Out1signalP1IN.
6unusedP1IE.
6P1IFG.
6P1IES.
6P1Sel.
7P1DIR.
7P1DIR.
7P1OUT.
7Out2signalP1IN.
7unusedP1IE.
7P1IFG.
7P1IES.
7SignalfromortoTimer_AMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200426POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONinput/outputschematic(continued)PortP2,P2.
0toP2.
2,input/outputwithSchmitt-triggerENDP2.
0/ACLKP2.
1/INCLKP2.
2/CAOUT/TA00101InterruptEdgeSelectENSetQP2IE.
xP2IFG.
xP2IRQ.
xInterruptFlagP2IES.
xP2SEL.
xModuleXINP2IN.
xP2OUT.
xModuleXOUTDirectionControlFromModuleP2DIR.
xP2SEL.
xPadLogicNOTE:x=Bitidentifier,0to2forportP20:Input1:OutputBusKeeperCAPD.
XPnSel.
xPnDIR.
xDIRECTIONCONTROLFROMMODULEPnOUT.
xMODULEXOUTPnIN.
xMODULEXINPnIE.
xPnIFG.
xPnIES.
xP2Sel.
0P2DIR.
0P2DIR.
0P2OUT.
0ACLKP2IN.
0unusedP2IE.
0P2IFG.
0P1IES.
0P2Sel.
1P2DIR.
1P2DIR.
1P2OUT.
1VSSP2IN.
1INCLKP2IE.
1P2IFG.
1P1IES.
1P2Sel.
2P2DIR.
2P2DIR.
2P2OUT.
2CAOUTP2IN.
2CCI0BP2IE.
2P2IFG.
2P1IES.
2SignalfromortoTimer_AMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200427POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONinput/outputschematic(continued)PortP2,P2.
3toP2.
4,input/outputwithSchmitt-triggerENDP2.
3/CA0/TA10101InterruptEdgeSelectENSetQP2IE.
3P2IFG.
3P2IRQ.
3InterruptFlagP2IES.
3P2SEL.
3ModuleXINP2IN.
3P2OUT.
3ModuleXOUTDirectionControlFromModuleP2DIR.
3P2SEL.
3PadLogic0:Input1:OutputBusKeeperCAPD.
3ENDP2.
4/CA1/TA21010InterruptEdgeSelectENSetQP2IE.
4P2IFG.
4P2IRQ.
4InterruptFlagP2IES.
4P2SEL.
4ModuleXINP2IN.
4P2OUT.
4ModuleXOUTDirectionControlFromModuleP2DIR.
4P2SEL.
4PadLogic0:Input1:OutputBusKeeperCAPD.
4_+Comparator_AReferenceBlockCAREFCAREFCAEXP2CACAFCCI1B0VPnSel.
xPnDIR.
xDIRECTIONCONTROLFROMMODULEPnOUT.
xMODULEXOUTPnIN.
xMODULEXINPnIE.
xPnIFG.
xPnIES.
xP2Sel.
3P2DIR.
3P2DIR.
3P2OUT.
3Out1signalP2IN.
3unusedP2IE.
3P2IFG.
3P1IES.
3P2Sel.
4P2DIR.
4P2DIR.
4P2OUT.
4Out2signalP2IN.
4unusedP2IE.
4P2IFG.
4P1IES.
4SignalfromTimer_AMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200428POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONinput/outputschematic(continued)PortP2,P2.
5,input/outputwithSchmitt-triggerandROSCfunctionfortheBasicClockmoduleENDP2.
5/ROSC0101InterruptEdgeSelectENSetQP2IE.
5P2IFG.
5P2IRQ.
5InterruptFlagP2IES.
5P2SEL.
5ModuleXINP2IN.
5P2OUT.
5ModuleXOUTDirectionControlFromModuleP2DIR.
5P2SEL.
5PadLogicNOTE:DCOR:ControlbitfromBasicClockModuleifitisset,P2.
5IsdisconnectedfromP2.
5padBusKeeper0101VCCInternaltoBasicClockModuleDCORDCGenerator0:Input1:OutputCAPD.
5PnSel.
xPnDIR.
xDIRECTIONCONTROLFROMMODULEPnOUT.
xMODULEXOUTPnIN.
xMODULEXINPnIE.
xPnIFG.
xPnIES.
xP2Sel.
5P2DIR.
5P2DIR.
5P2OUT.
5VSSP2IN.
5unusedP2IE.
5P2IFG.
5P2IES.
5MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200429POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONinput/outputschematic(continued)PortP2,unbondedbitsP2.
6andP2.
7END0101InterruptEdgeSelectENSetQP2IE.
xP2IFG.
xP2IRQ.
xInterruptFlagP2IES.
xP2SEL.
xModuleXINP2IN.
xP2OUT.
xModuleXOUTDirectionControlFromModuleP2DIR.
xP2SEL.
xBusKeeper010:Input1:OutputNodeIsResetWithPUCPUCNOTE:x=Bit/identifier,6to7forportP2withoutexternalpinsP2Sel.
xP2DIR.
xDIRECTION-CONTROLFROMMODULEP2OUT.
xMODULEXOUTP2IN.
xMODULEXINP2IE.
xP2IFG.
xP2IES.
xP2Sel.
6P2DIR.
6P2DIR.
6P2OUT.
6VSSP2IN.
6unusedP2IE.
6P2IFG.
6P2IES.
6P2Sel.
7P2DIR.
7P2DIR.
7P2OUT.
7VSSP2IN.
7unusedP2IE.
7P2IFG.
7P2IES.
7NOTE:Unbondedbits6and7ofportP2canbeusedasinterruptflags.
Onlysoftwarecanaffecttheinterruptflags.
Theyworkassoftwareinterrupts.
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200430POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONinput/outputschematic(continued)portP3,P3.
0andP3.
4toP3.
7,input/outputwithSchmitt-triggerP3.
0/STE0P3IN.
xModuleXINPadLogicENDP3OUT.
xP3DIR.
xP3SEL.
xModuleXOUTDirectionControlFromModule0101P3.
4/UTXD0P3.
5/URXD00:Input1:Outputx:BitIdentifier,0and4to7forPortP3P3.
6P3.
7PnSel.
xPnDIR.
xDIRECTIONCONTROLFROMMODULEPnOUT.
xMODULEXOUTPnIN.
xMODULEXINP3Sel.
0P3DIR.
0VSSP3OUT.
0VSSP3IN.
0STE0P3Sel.
4P3DIR.
4VCCP3OUT.
4UTXD0P3IN.
4UnusedP3Sel.
5P3DIR.
5VSSP3OUT.
5VSSP3IN.
5URXD0P3Sel.
6P3DIR.
6VSSP3OUT.
6VSSP3IN.
6UnusedP3Sel.
7P3DIR.
7VSSP3OUT.
7VSSP3IN.
7UnusedOutputfromUSART0moduleInputtoUSART0moduleportP3,P3.
1,input/outputwithSchmitt-triggerP3.
1/SIMO0P3IN.
1PadLogicENDP3OUT1P3DIR.
1P3SEL.
1(SI)MO00101DCM_SIMOSYNCMMSTESTCFromUSART0SI(MO)0ToUSART00:Input1:OutputMSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200431POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONinput/outputschematic(continued)portP3,P3.
2,input/outputwithSchmitt-triggerP3.
2/SOMI0P3IN.
2PadLogicENDP3OUT.
2P3DIR.
2P3SEL.
20101DCM_SOMISYNCMMSTESTCSO(MI)0FromUSART0(SO)MI0ToUSART00:Input1:OutputportP3,P3.
3,input/outputwithSchmitt-triggerP3.
3/UCLK0P3IN.
3PadLogicENDP3OUT.
3P3DIR.
3P3SEL.
3UCLK.
00101DCM_UCLKSYNCMMSTESTCFromUSART0UCLK0ToUSART00:Input1:OutputNOTE:UARTmode:TheUARTclockcanonlybeaninput.
IfUARTmodeandUARTfunctionareselected,theP3.
3/UCLK0isalwaysaninput.
SPI,slavemode:TheclockappliedtoUCLK0isusedtoshiftdatainandout.
SPI,mastermode:TheclocktoshiftdatainandoutissuppliedtoconnecteddevicesonpinP3.
3/UCLK0(inslavemode).
MSP430x12xMIXEDSIGNALMICROCONTROLLERSLAS312CJULY2001REVISEDSEPTEMBER200432POSTOFFICEBOX655303DALLAS,TEXAS75265APPLICATIONINFORMATIONJTAGfusecheckmodeMSP430devicesthathavethefuseontheTESTterminalhaveafusecheckmodethatteststhecontinuityofthefusethefirsttimetheJTAGportisaccessedafterapower-onreset(POR).
Whenactivated,afusecheckcurrent,afusecheckcurrent,ITF,of1mAat3V,2.
5mAat5VcanflowfromfromtheTESTpintogroundifthefuseisnotburned.
Caremustbetakentoavoidaccidentallyactivatingthefusecheckmodeandincreasingoverallsystempowerconsumption.
WhentheTESTpinistakenbacklowafteratestorprogrammingsession,thefusecheckmodeandsensecurrentsareterminated.
ActivationofthefusecheckmodeoccurswiththefirstnegativeedgeontheTMSpinafterpoweruporiftheTMSisbeingheldlowduringpowerup.
ThesecondpositiveedgeontheTMSpindeactivatesthefusecheckmode.
Afterdeactivation,thefusecheckmoderemainsinactiveuntilanotherPORoccurs.
AftereachPORthefusecheckmodehasthepotentialtobeactivated.
ThefusecheckcurrentwillonlyflowwhenthefusecheckmodeisactiveandtheTMSpinisinalowstate(seeFigure13).
Therefore,theadditionalcurrentflowcanbepreventedbyholdingtheTMSpinhigh(defaultcondition).
TimeTMSGoesLowAfterPORTMSITFITESTFigure13.
FuseCheckModeCurrent,MSP430F12xNOTE:TheCODEandRAMdataprotectionisensurediftheJTAGfuseisblownandthe256-bitbootloaderaccesskeyisused.
Alsoseethebootstraploadersectionformoreinformation.
PACKAGEOPTIONADDENDUMwww.
ti.
com31-May-2017Addendum-Page1PACKAGINGINFORMATIONOrderableDeviceStatus(1)PackageTypePackageDrawingPinsPackageQtyEcoPlan(2)Lead/BallFinish(6)MSLPeakTemp(3)OpTemp(°C)DeviceMarking(4/5)SamplesMSP430F122IDWACTIVESOICDW2820Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F122MSP430F122IDWRACTIVESOICDW281000Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F122MSP430F122IPWACTIVETSSOPPW2850Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F122MSP430F122IPWRACTIVETSSOPPW282000Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F122MSP430F122IRHBRACTIVEVQFNRHB323000Green(RoHS&noSb/Br)CUNIPDAULevel-2-260C-1YEAR-40to85MSP430F122MSP430F122IRHBTACTIVEVQFNRHB32250Green(RoHS&noSb/Br)CUNIPDAULevel-2-260C-1YEAR-40to85MSP430F122MSP430F123IDWACTIVESOICDW2820Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F123MSP430F123IDWRACTIVESOICDW281000Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F123MSP430F123IPWACTIVETSSOPPW2850Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F123MSP430F123IPWRACTIVETSSOPPW282000Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F123MSP430F123IPWR-HYDACTIVETSSOPPW282000Green(RoHS&noSb/Br)CUNIPDAULevel-1-260C-UNLIM-40to85M430F123MSP430F123IRHBRACTIVEVQFNRHB323000Green(RoHS&noSb/Br)CUNIPDAULevel-2-260C-1YEAR-40to85MSP430F123MSP430F123IRHBTACTIVEVQFNRHB32250Green(RoHS&noSb/Br)CUNIPDAULevel-2-260C-1YEAR-40to85MSP430F123(1)Themarketingstatusvaluesaredefinedasfollows:ACTIVE:Productdevicerecommendedfornewdesigns.
LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect.
NRND:Notrecommendedfornewdesigns.
Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartinanewdesign.
PREVIEW:Devicehasbeenannouncedbutisnotinproduction.
Samplesmayormaynotbeavailable.
OBSOLETE:TIhasdiscontinuedtheproductionofthedevice.
PACKAGEOPTIONADDENDUMwww.
ti.
com31-May-2017Addendum-Page2(2)RoHS:TIdefines"RoHS"tomeansemiconductorproductsthatarecompliantwiththecurrentEURoHSrequirementsforall10RoHSsubstances,includingtherequirementthatRoHSsubstancedonotexceed0.
1%byweightinhomogeneousmaterials.
Wheredesignedtobesolderedathightemperatures,"RoHS"productsaresuitableforuseinspecifiedlead-freeprocesses.
TImayreferencethesetypesofproductsas"Pb-Free".
RoHSExempt:TIdefines"RoHSExempt"tomeanproductsthatcontainleadbutarecompliantwithEURoHSpursuanttoaspecificEURoHSexemption.
Green:TIdefines"Green"tomeanthecontentofChlorine(Cl)andBromine(Br)basedflameretardantsmeetJS709Blowhalogenrequirementsof<=1000ppmthreshold.
Antimonytrioxidebasedflameretardantsmustalsomeetthe<=1000ppmthresholdrequirement.
(3)MSL,PeakTemp.
-TheMoistureSensitivityLevelratingaccordingtotheJEDECindustrystandardclassifications,andpeaksoldertemperature.
(4)Theremaybeadditionalmarking,whichrelatestothelogo,thelottracecodeinformation,ortheenvironmentalcategoryonthedevice.
(5)MultipleDeviceMarkingswillbeinsideparentheses.
OnlyoneDeviceMarkingcontainedinparenthesesandseparatedbya"~"willappearonadevice.
IfalineisindentedthenitisacontinuationofthepreviouslineandthetwocombinedrepresenttheentireDeviceMarkingforthatdevice.
(6)Lead/BallFinish-OrderableDevicesmayhavemultiplematerialfinishoptions.
Finishoptionsareseparatedbyaverticalruledline.
Lead/BallFinishvaluesmaywraptotwolinesifthefinishvalueexceedsthemaximumcolumnwidth.
ImportantInformationandDisclaimer:TheinformationprovidedonthispagerepresentsTI'sknowledgeandbeliefasofthedatethatitisprovided.
TIbasesitsknowledgeandbeliefoninformationprovidedbythirdparties,andmakesnorepresentationorwarrantyastotheaccuracyofsuchinformation.
Effortsareunderwaytobetterintegrateinformationfromthirdparties.
TIhastakenandcontinuestotakereasonablestepstoproviderepresentativeandaccurateinformationbutmaynothaveconducteddestructivetestingorchemicalanalysisonincomingmaterialsandchemicals.
TIandTIsuppliersconsidercertaininformationtobeproprietary,andthusCASnumbersandotherlimitedinformationmaynotbeavailableforrelease.
InnoeventshallTI'sliabilityarisingoutofsuchinformationexceedthetotalpurchasepriceoftheTIpart(s)atissueinthisdocumentsoldbyTItoCustomeronanannualbasis.
TAPEANDREELINFORMATION*AlldimensionsarenominalDevicePackageTypePackageDrawingPinsSPQReelDiameter(mm)ReelWidthW1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W(mm)Pin1QuadrantMSP430F122IDWRSOICDW281000330.
032.
411.
3518.
673.
116.
032.
0Q1MSP430F122IPWRTSSOPPW282000330.
016.
46.
910.
21.
812.
016.
0Q1MSP430F122IRHBRVQFNRHB323000330.
012.
45.
35.
31.
58.
012.
0Q2MSP430F122IRHBTVQFNRHB32250180.
012.
45.
35.
31.
58.
012.
0Q2MSP430F123IDWRSOICDW281000330.
032.
411.
3518.
673.
116.
032.
0Q1MSP430F123IPWRTSSOPPW282000330.
016.
46.
910.
21.
812.
016.
0Q1MSP430F123IRHBRVQFNRHB323000330.
012.
45.
35.
31.
58.
012.
0Q2MSP430F123IRHBTVQFNRHB32250180.
012.
45.
35.
31.
58.
012.
0Q2PACKAGEMATERIALSINFORMATIONwww.
ti.
com15-Jan-2015PackMaterials-Page1*AlldimensionsarenominalDevicePackageTypePackageDrawingPinsSPQLength(mm)Width(mm)Height(mm)MSP430F122IDWRSOICDW281000367.
0367.
055.
0MSP430F122IPWRTSSOPPW282000367.
0367.
038.
0MSP430F122IRHBRVQFNRHB323000367.
0367.
035.
0MSP430F122IRHBTVQFNRHB32250210.
0185.
035.
0MSP430F123IDWRSOICDW281000367.
0367.
055.
0MSP430F123IPWRTSSOPPW282000367.
0367.
038.
0MSP430F123IRHBRVQFNRHB323000367.
0367.
035.
0MSP430F123IRHBTVQFNRHB32250210.
0185.
035.
0PACKAGEMATERIALSINFORMATIONwww.
ti.
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g.
,ISO/TS16949andISO26262),TIisnotresponsibleforanyfailuretomeetsuchindustrystandardrequirements.
WhereTIspecificallypromotesproductsasfacilitatingfunctionalsafetyorascompliantwithindustryfunctionalsafetystandards,suchproductsareintendedtohelpenablecustomerstodesignandcreatetheirownapplicationsthatmeetapplicablefunctionalsafetystandardsandrequirements.
Usingproductsinanapplicationdoesnotbyitselfestablishanysafetyfeaturesintheapplication.
Designersmustensurecompliancewithsafety-relatedrequirementsandstandardsapplicabletotheirapplications.
DesignermaynotuseanyTIproductsinlife-criticalmedicalequipmentunlessauthorizedofficersofthepartieshaveexecutedaspecialcontractspecificallygoverningsuchuse.
Life-criticalmedicalequipmentismedicalequipmentwherefailureofsuchequipmentwouldcauseseriousbodilyinjuryordeath(e.
g.
,lifesupport,pacemakers,defibrillators,heartpumps,neurostimulators,andimplantables).
Suchequipmentincludes,withoutlimitation,allmedicaldevicesidentifiedbytheU.
S.
FoodandDrugAdministrationasClassIIIdevicesandequivalentclassificationsoutsidetheU.
S.
TImayexpresslydesignatecertainproductsascompletingaparticularqualification(e.
g.
,Q100,MilitaryGrade,orEnhancedProduct).
DesignersagreethatithasthenecessaryexpertisetoselecttheproductwiththeappropriatequalificationdesignationfortheirapplicationsandthatproperproductselectionisatDesigners'ownrisk.
Designersaresolelyresponsibleforcompliancewithalllegalandregulatoryrequirementsinconnectionwithsuchselection.
DesignerwillfullyindemnifyTIanditsrepresentativesagainstanydamages,costs,losses,and/orliabilitiesarisingoutofDesigner'snon-compliancewiththetermsandprovisionsofthisNotice.
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