P32ncsetting

TOSHIBAOriginalCMOS8-BitMicrocontrollerTLCS-870/CSeriesTMP86FM25FGSemiconductorCompanyRevisionHistoryDateRevision2008/3/61FirstRelease2008/8/292ContentsRevised2008-08-29CautioninSettingtheUARTNoiseRejectionTimeWhenUARTisused,settingsofRXDNCarelimiteddependingonthetransferclockspecifiedbyBRG.
Thecom-bination"O"isavailablebutpleasedonotselectthecombination"–".
Thetransferclockgeneratedbytimer/counterinterruptiscalculatedbythefollowingequation:Transferclock[Hz]=Timer/countersourceclock[Hz]÷TTREGsetvalueBRGsettingTransferclock[Hz]RXDNCsetting00(Nonoiserejection)01(Rejectpulsesshorterthan31/fc[s]asnoise)10(Rejectpulsesshorterthan63/fc[s]asnoise)11(Rejectpulsesshorterthan127/fc[s]asnoise)000fc/13OOO–110(Whenthetransferclockgen-eratedbytimer/counterinter-ruptisthesameastherightsidecolumn)fc/8O–––fc/16OO––fc/32OOO–ThesettingexcepttheaboveOOOOTMP86FM25I2008-03-06DocumentChangeNotificationThepurposeofthisnotificationistoinformcustomersaboutthelaunchofthePb-freeversionofthedevice.
TheintroductionofaPb-freereplacementaffectsthedatasheet.
Pleaseunderstandthatthisnotificationisintendedasatemporarysubstituteforarevisionofthedatasheet.
Changestothedatasheetmayincludethefollowing,thoughnotallofthemmayapplytothisparticulardevice.
1.
PartnumberExample:TMPxxxxxxFTMPxxxxxxFGAllreferencestothepreviouspartnumberwereleftunchangedinbodytext.
Thenewpartnumberisindicatedontheprelimspages(coverpageandthisnotification).
2.
PackagecodeandpackagedimensionsExample:LQFP100-P-1414-0.
50CLQFP100-P-1414-0.
50FAllreferencestothepreviouspackagecodeandpackagedimensionswereleftunchangedinbodytext.
Thenewonesareindicatedontheprelimspages.
3.
AdditionofnotesonleadsolderabilityNowthatthedeviceisPb-free,notesonleadsolderabilityhavebeenadded.
4.
RESTRICTIONSONPRODUCTUSETheprevious(obsolete)provisionmightbeleftunchangedonpage1ofbodytext.
Anewreplacementisincludedonthenextpage.
5.
PublicationdateofthedatasheetThepublicationdateatthelowerrightcorneroftheprelimspagesappliestothenewdevice.
TMP86FM25II2008-03-061.
Partnumber2.
PackagecodeanddimensionsPreviousPartNumber(inBodyText)PreviousPackageCode(inBodyText)NewPartNumberNewPackageCodeOTPTMP86FM25FP-QFP100-1420-0.
65ATMP86FM25FGQFP100-P-1420-0.
65Q*:Forthedimensionsofthenewpackage,seetheattachedPackageDimensionsdiagram.
3.
AdditionofnotesonleadsolderabilityThefollowingsolderabilitytestisconductedonthenewdevice.
LeadsolderabilityofPb-freedevices(withtheGsuffix)TestTestConditionsRemarkSolderability(1)UseofLead(Pb)·solderbathtemperature=230°C·dippingtime=5seconds·thenumberoftimes=once·useofR-typeflux(2)UseofLead(Pb)-Free·solderbathtemperature=245°C·dippingtime=5seconds·thenumberoftimes=once·useofR-typefluxLeadswithover95%soldercoveragetillleadformingareacceptable.
4.
RESTRICTIONSONPRODUCTUSEThefollowingreplacesthe"RESTRICTIONSONPRODUCTUSE"onpage1ofbodytext.
5.
PublicationdateofthedatasheetThepublicationdateofthisdatasheetisprintedatthelowerrightcornerofthisnotification.
RESTRICTIONSONPRODUCTUSE20070701-ENTheinformationcontainedhereinissubjecttochangewithoutnotice.
TOSHIBAiscontinuallyworkingtoimprovethequalityandreliabilityofitsproducts.
Nevertheless,semiconductordevicesingeneralcanmalfunctionorfailduetotheirinherentelectricalsensitivityandvulnerabilitytophysicalstress.
Itistheresponsibilityofthebuyer,whenutilizingTOSHIBAproducts,tocomplywiththestandardsofsafetyinmakingasafedesignfortheentiresystem,andtoavoidsituationsinwhichamalfunctionorfailureofsuchTOSHIBAproductscouldcauselossofhumanlife,bodilyinjuryordamagetoproperty.
Indevelopingyourdesigns,pleaseensurethatTOSHIBAproductsareusedwithinspecifiedoperatingrangesassetforthinthemostrecentTOSHIBAproductsspecifications.
Also,pleasekeepinmindtheprecautionsandconditionssetforthinthe"HandlingGuideforSemiconductorDevices,"or"TOSHIBASemiconductorReliabilityHandbook"etc.
TheTOSHIBAproductslistedinthisdocumentareintendedforusageingeneralelectronicsapplications(computer,personalequipment,officeequipment,measuringequipment,industrialrobotics,domesticappliances,etc.
).
TheseTOSHIBAproductsareneitherintendednorwarrantedforusageinequipmentthatrequiresextraordinarilyhighqualityand/orreliabilityoramalfunctionorfailureofwhichmaycauselossofhumanlifeorbodilyinjury("UnintendedUsage").
UnintendedUsageincludeatomicenergycontrolinstruments,airplaneorspaceshipinstruments,transportationinstruments,trafficsignalinstruments,combustioncontrolinstruments,medicalinstruments,alltypesofsafetydevices,etc.
.
UnintendedUsageofTOSHIBAproductslistedinhisdocumentshallbemadeatthecustomer'sownrisk.
Theproductsdescribedinthisdocumentshallnotbeusedorembeddedtoanydownstreamproductsofwhichmanufacture,useand/orsaleareprohibitedunderanyapplicablelawsandregulations.
Theinformationcontainedhereinispresentedonlyasaguidefortheapplicationsofourproducts.
NoresponsibilityisassumedbyTOSHIBAforanyinfringementsofpatentsorotherrightsofthethirdpartieswhichmayresultfromitsuse.
NolicenseisgrantedbyimplicationorotherwiseunderanypatentsorotherrightsofTOSHIBAorthethirdparties.
Pleasecontactyoursalesrepresentativeforproduct-by-productdetailsinthisdocumentregardingRoHScompatibility.
Pleaseusetheseproductsinthisdocumentincompliancewithallapplicablelawsandregulationsthatregulatetheinclusionoruseofcontrolledsubstances.
Toshibaassumesnoliabilityfordamageorlossesoccurringasaresultofnoncompliancewithapplicablelawsandregulations.
Foradiscussionofhowthereliabilityofmicrocontrollerscanbepredicted,pleaserefertoSection1.
3ofthechapterentitledQualityandReliabilityAssurance/HandlingPrecautions.
TMP86FM25III2008-03-06(Annex)PackageDimensionsQFP100-P-1420-0.
65QUnit:mm20.
00.
123.
80.
214.
00.
117.
80.
20.
825TYP80511305031811000.
575TYP0.
650.
30.
10.
06M0.
130.
10.
190.
12.
70.
23.
05MAX0.
150.
080.
040~100.
80.
22004-03-01DifferenceComparisontableofTMP86CM25F/CS25F/PS25F/C925XBandTMP86CM25AF/FM25FTMP86CM25F/TMP86CS25FTMP86PS25FTMP86C925XB(Emulationchip)TMP86FM25FTMP86CM25AFROM32K(MaskROM)60K(MaskROM)60K(OTP)32K(Flash)32K(MaskROM)RAM2K2KI/O42pin42pin(MCUpart)42pinExternalInterrupt5pin5pinADConverter8-bitADconverter*8ch8-bitADconverter*8ch(Note3)TimerCounter18-bittimer*1ch8-bittimer*4ch18-bittimer*1ch8-bittimer*4chSerialInterface8-bitSIO*2chUART*1ch8-bitSIO*2chUART*1chLCD60seg*16com60seg*16com(Note4)Key-onWakeup4ch4chOperatingVoltageinMCUMode1.
8to5.
5Vat4.
2MHz2.
7to5.
5Vat8MHz4.
5to5.
5Vat16MHz1.
8to5.
25Vat4.
2MHz2.
7to5.
25Vat8MHz4.
5to5.
25Vat16MHz1.
8to3.
6Vat4.
2MHz(Externalclock)1.
8to3.
6Vat8MHz(Resonator)2.
7to3.
6Vat16MHzOperatingTemperatureinMCUMode40to85℃0to60°C40to85°CWritingtoFlashMemory2.
7to3.
6Vat16MHz25°C±5°CPackageP-QFP100-1420-0.
65AFBGA272P-QFP100-1420-0.
65ACPUWait(Note1)N/AAvailable(Note2)Note1:TheCPUwaitisaCPUhaltfunctionforstabilizingofpowersupplyofFlashmemory.
TheCPUwaitperiodisasfollows.
IntheCPUwaitperiodexceptRESET,CPUishaltedbutperipheralfunctionsarenothalted.
Therefore,iftheinterruptoccursduringtheCPUwaitperiod,theinterruptlatchisset.
Inthiscase,iftheIMFhasbeensetto"1",theinterruptserviceroutineisexecutedafterCPUwaitperiod.
Fordetailsreferto1.
1"FlashMemory"inTMP86FM25Fdatasheet.
Halt/OperateConditionWaitTimeCPUPeripheralsAfterresetrelease210/fc[s]HaltHaltChangingfromSTOPmodetoNORMALmode(atEEPCR="1")210/fc[s]HaltOperateChangingfromSTOPmodetoSLOWmode(atEEPCR="1")23/fs[s]HaltOperateChangingfromIDLE0/1/2modetoNORMALmode(atEEPCR="0")210/fc[s]HaltOperateChangingfromSLEEP0/1/2modetoSLOWmode(atEEPCR="0")23/fs[s]HaltOperateNote2:ThoughtheTMP86CM25AFdoesnothaveaFlashmemory,theCPUwaitfunctionisinsertedinTMP86CM25AtokeepthecompatibilitywithFlashproduct(TMP86FM25F).
Note3:ADconversiontimeofTMP86CM25A/FM25isdifferentfromthatofTMP86CM25/CS25/PS25/C925.
Fordetails,referto2.
12"8-BitADConverter(ADC)".
Note4:ThereferencevoltageofTMP86CM25A/FM25isdifferentfromthatofTMP86CM25/CS25/PS25/C925.
Fordetails,referto"ElectricalCharacteristics".
TMP86FM252004-03-0186FM25-1UnderdevelopmentCMOS8-BitMicrocontrollerTMP86FM25FTheTMP86FM25isaFlashtypeMCUwhichincludes32KbytesFlashmemory.
ItisapincompatiblewithamaskROMproduct"A"versionoftheTMP86CM25A.
Writingtheprogramtobuilt-inFlashmemory,theTMP86FM25operatesasthesamewayastheTMP86CM25A.
TheTMP86FM25hasa2KbytesBOOTROM(MaskedROM)forprogrammingtoFlashmemory.
ProductNo.
FlashMemoryBOOTROMRAMPackageTMP86FM25F32K*8bits2K*8bits2.
0K*8bitsP-QFP100-1420-0.
65AP-QFP100-1420-0.
65ATMP86FM25FTheinformationcontainedhereinissubjecttochangewithoutnotice.
Theinformationcontainedhereinispresentedonlyasaguidefortheapplicationsofourproducts.
NoresponsibilityisassumedbyTOSHIBAforanyinfringementsofpatentsorotherrightsofthethirdpartieswhichmayresultfromitsuse.
NolicenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofTOSHIBAorothers.
TOSHIBAiscontinuallyworkingtoimprovethequalityandreliabilityofitsproducts.
Nevertheless,semiconductordevicesingeneralcanmalfunctionorfailduetotheirinherentelectricalsensitivityandvulnerabilitytophysicalstress.
Itistheresponsibilityofthebuyer,whenutilizingTOSHIBAproducts,tocomplywiththestandardsofsafetyinmakingasafedesignfortheentiresystem,andtoavoidsituationsinwhichamalfunctionorfailureofsuchTOSHIBAproductscouldcauselossofhumanlife,bodilyinjuryordamagetoproperty.
Indevelopingyourdesigns,pleaseensurethatTOSHIBAproductsareusedwithinspecifiedoperatingrangesassetforthinthemostrecentTOSHIBAproductsspecifications.
Also,pleasekeepinmindtheprecautionsandconditionssetforthinthe"HandlingGuideforSemiconductorDevices,"or"TOSHIBASemiconductorReliabilityHandbook"etc.
.
TheTOSHIBAproductslistedinthisdocumentareintendedforusageingeneralelectronicsapplications(computer,personalequipment,officeequipment,measuringequipment,industrialrobotics,domesticappliances,etc.
).
TheseTOSHIBAproductsareneitherintendednorwarrantedforusageinequipmentthatrequiresextraordinarilyhighqualityand/orreliabilityoramalfunctionorfailureofwhichmaycauselossofhumanlifeorbodilyinjury("UnintendedUsage").
UnintendedUsageincludeatomicenergycontrolinstruments,airplaneorspaceshipinstruments,transportationinstruments,trafficsignalinstruments,combustioncontrolinstruments,medicalinstruments,alltypesofsafetydevices,etc.
.
UnintendedUsageofTOSHIBAproductslistedinthisdocumentshallbemadeatthecustomer'sownrisk.
Theproductsdescribedinthisdocumentaresubjecttotheforeignexchangeandforeigntradelaws.
TOSHIBAproductsshouldnotbeembeddedtothedownstreamproductswhichareprohibitedtobeproducedandsold,underanylawandregulations.
Foradiscussionofhowthereliabilityofmicrocontrollerscanbepredicted,pleaserefertoSection1.
3ofthechapterentitledQualityandReliabilityAssurance/HandlingPrecautions.
030619EBP1TMP86FM252004-03-0186FM25-2UnderdevelopmentPinAssignments(Topview)Note1:ThemaskedROMproduct(TMP86CM25AF/CM25F/CS25F),theOTPproduct(TMP86PS25F)andtheemulationchip(TMP86C925XB)don'thaveaBOOTfunctioninP15pin.
Note2:PortsassignedasMUL6toMUL0canswitchpinassignmentbythemultifunctionregister(MULSEL).
Forfunctionsassignedtoeachpin,seethetablebelow.
PinNameFunctionPinAssignmentMUL0DVOP30orP71MUL1PDO3,PWM3,TC3P31orP72MUL2PDO4,PWM4,PPG4,TC4P32orP73MUL3PDO6,PWM6,PPG6,TC6P33orP74MUL4INT1P12orP34MUL5INT2P13orP35MUL6INT3P14orP36P-QFP100-1420-0.
65ACOM2COM3COM4(MUL4/COM5)P34(MUL5/COM6)P35(MUL6/COM7)P36(COM8)P70(MUL0/COM9)P71(MUL1/COM10)P72(MUL2/COM11)P73(MUL3/COM12)P74(SI1/COM13)P75(SO1/COM14)P76(SCK1/COM15)P77V4V3V2V1C1C0SEG28SEG29SEG30SEG31SEG32SEG33SEG34SEG35SEG36SEG37SEG38SEG39P50(SEG40)P51(SEG41)P52(SEG42)P53(SEG43)P54(SEG44)P55(SEG45)P56(SEG46)P57(SEG47)81828384858687888990919293949596979899100807978777675747372717069686766656463626160595857565554535251COM1COM0SEG0SEG1SEG2SEG3SEG4SEG5SEG6SEG7SEG8SEG9SEG10SEG11SEG12SEG13SEG14SEG15SEG16SEG17SEG18SEG19SEG20SEG21SEG22SEG23SEG24SEG25SEG26SEG275049484746454443424140393837363534333231123456789101112131415161718192021222324252627282930VSSXINXOUTTESTVDD(XTIN)P21(XTOUT)P22(/)P20(AIN0)P60(AIN1/ECIN)P61(AIN2/ECNT)P62(AIN3/INT0)P63(AIN4/STOP2)P64(AIN5/STOP3)P65(AIN6/STOP4)P66(AIN7/STOP5)P67VAREF(SEG59/SCK0)P17(SEG58/TXD/SO0)P16(BOOT/SEG57/RXD/SI0)P15(SEG56/MUL6)P14(SEG55/MUL5)P13(SEG54/MUL4)P12(SEG53)P11(SEG52)P10(SEG51/MUL3)P33(SEG50/MUL2)P32(SEG49/MUL1)P31(SEG48/MUL0)P30RESETINT5STOPTMP86FM252004-03-0186FM25-3UnderdevelopmentBlockDiagramXINXOUTPowersupplyResonatorconnectingpinsI/Oport(Segmentoutput)VDDVSSP5Address/databusSystemcontrolcircuitStandbycontrolcircuit(Key-onwakeup)TiminggeneratorHighfrequencyLowfrequencyClockgeneratorTLCS-870/CCPUDatamemory(RAM)Programmemory(Flash)InterruptControllerI/OportsAnalogreferencepinsI/OportsVAREFP67(AIN7)toP60(AIN0)P57(SEG47)toP50(SEG40)P28-bitADconverterP6P7SIO1Address/databusCommonoutputsCOM4toCOM0LCDdrivercircuitSegmentoutputsSEG39toSEG0P1P17(SEG59)toP10(SEG52)LCDpowersupplyC0C1V1V2V3V4ResetinputRESETtestpinTEST8-bittimer/counterTC6TC118-bittimer/counterTimebasetimerWatchdogtimerP77(COM15)toP70(COM8)P22toP20P3P36(COM7)toP34(COM5)UARTP3TC5TC4TC3P33(SEG51)toP30(SEG48)LCDvoltageboostercircuitSIO0SIOTMP86FM252004-03-0186FM25-4UnderdevelopmentPinFuntionsTheTMP86FM25hasMCUmodeandserialPROMmode.
(1)MCUmodeIntheMCUmode,theTMP86FM25isapincompatiblewiththeTMP86CM25A(MakesuretofixtheTESTpintolowlevel).
(2)SerialPROMmodeIntheSerialPROMmode,programmingtoFlashmemoryisavailablebyexecutingBOOTROM.
IntheserialPROMmode,TXD(P16)andRXD(P15)pinsareusedasaserialinterfacepin.
Therefore,iftheprogrammingisexecutedon-boardaftermounting,thesepinsshouldbereleasedfromtheotherdevicesforcommunicationinserialPROMmode.
TMP86FM252004-03-0186FM25-5Underdevelopment1.
1FLASHMemory1.
1.
1OutlineTheTMP86FM25incorporates32768bytesofFLASHmemory(Address8000HtoFFFFH).
ThewritingtoFLASHiscontrolledbyFLASHcontrolregister(EEPCR),FLASHstatusregister(EEPSR).
TowritedatatotheFLASH,executetheSerialPROMmode.
FordetailsabouttheSerialPROMmode,referto"2.
1SerialPROMMode".
TheFLASHmemoryoftheTMP86FM25features:TheFLASHmemoryisconstructedof512pagesFLASHmemoryandonepagesizeis64bytes(512pages*64bytes=32768bytes).
TheTMP86FM25incorporatesa64-bytetemporarydatabuffer.
ThedatawrittentoFLASHmemoryistemporarilystoredinthisdatabuffer.
After64bytesdatahavebeenwrittentothetemporarydatabuffer,thewritingtoFLASHmemoryautomaticallystartsbypagewriting(The64bytesdataarewrittentospecifiedpageofFLASHsimultaneously).
Atthesametime,page-by-pageerasingoccursautomatically.
So,itisunnecessarytoeraseindividualpagesinadvance.
TheFLASHcontrolcircuitincorporatesanoscillatordedicatedtotheFLASH.
SoFLASHwritingtimeisindependentofthesystemclockfrequency(fc).
Inaddition,becauseanFLASHcontrolcircuitcontrolswritingtimeforeachFLASHmemorycell,thewritingtimevariesineachpage(Typically4msperpage).
ControllingthepowerfortheFLASHcontrolcircuit(Regulatorandvoltagestep-upcircuit)achieveslowpowerconsumptioniftheFLASHisnotinuse(Example:WhentheprogramisexecutedinRAMarea).
1.
1.
2ConditionsforAccessingtheFLASHAreasTheconditionsforaccessingtheFLASHareasvarydependingoneachoperationmode.
ThefollowingtablesshowsFLASHareaccessconditions.
Table1.
1.
1FLASHAreaAccessConditionsOperationModeAreaMCUMode(Note1)SerialPROMMode(Note2)FLASHmemory8000HtoFFFFHRead/FetchonlyWrite/Read/FetchsupportedNote1:"MCUMode"showsNORMAL1/2andSLOW1/2modes.
Note2:"SerialPROMMode"showstheFLASHcontrollingmode.
Fordetails,referto2.
1"SerialPROMMode".
Note3:"Fetch"meansreadingoperationofFLASHdataasaninstructionbyCPU.
TMP86FM252004-03-0186FM25-6Underdevelopment1.
1.
3DifferencesamongProductSeriesThespecificationsoftheFLASHproduct(TMP86FM25)aredifferentfromTMP86CM25A(MaskedROM"A"version),TMP86C925XB(Emulationchip),TMP86CM25F/CS25F(MaskedROM)andTMP86PS25(OTP)aslistedbelow.
See1.
2.
2"Control"forexplanationsaboutthecontrolregisters.
FLASHProduct(TMP86FM25)MaskedROM"A"Version(TMP86CM25AF)TheCurrentProductsTMP86C925XB(Emulationchip)TMP86CM25F/CS25F(MaskROM)TMP86PS25F(OTP)RewritingtheEEPCRregisterItispossibletorewritetheEEPCRregisteronlywhentheprogramexecutionareainuseisRAM/BOOT-ROM.
NeithertheEEPMDnorEEPRSitselfdoesnotfunction.
FLASHwritetimeTypically4ms(Independentofthesystemclock)(WritingtoanareathatcorrespondstotheFLASHareacausesnothing.
)Executingareadinstruction/fetchtothe8000HtoFFFFHareawhenEEPSR="1".
IfEEPSR="1",executingareadinstruction/fetchtotheFLASHareacausesFFHtobereadregardlessofwhatthecurrentROMdatais.
FetchingFFHresultsinasoftwareinterruptoccurring.
AlwaysmaskedROMdataisread.
MCUmodeTheEEPSRstaysat"0"(Writedisabled).
Executingawriteinstructiontothe8000HtoFFFFHareawhenEEPCR="0011"EEPSR="1"andEEPSR="0"SerialPROMmodeTheEEPSRissetto"1"(Writeenabled).
-TheFLASHfunctionisnotexecutedbecausetheemulationchipandtheMASK(except"A"version)/OTPproductsdon'thaveEEPCRandEEPSRregisters.
Therefore,thesoftwareincludingtheFLASHregistercannotbeemulatedbytheemulationchip.
IfthesoftwareincludingtheFLASHregisterisexecutedintheMASK(except"A"version)/OTPortheemulationchip,thesoftwareprocessdiffersfromtheFLASHproduct.
CPUwaitforFlash(WaitperiodforstabilizingofthepowersupplyofFlashcontrolcircuit)ThewaitperiodisinsertedinthereleasingfromReset,STOPmode(EEPCR="1")andIDLE/SLEEPmode(EEPCR="0").
EveniftheFLASHregisterisnotusedforsoftware,thewaitperiodisinsertedinResetprocess.
Thewaitperiodisnotinserted.
EveniftheFLASHregisterisnotusedforsoftware,theResetandSTOPprocessdiffersfromtheFLASHproduct.
BOOT-ROM2Kbytesareincludedinthe3800Hto3FFFHarea.
NoBOOT-ROMisincluded.
Executingaread/fetchtothe3800Hto3FFFHareacauses"FFH"toberead.
Fetching"FFH"resultsinasoftwareinterruptoccurring.
Thecurrentproductsdon'thaveBOOT-ROM.
Therefore,theserialPROMmodecannotbeemulatedinthecurrentproducts.
Operatingvoltage(VDD)1.
8to3.
6V(1MHzto4.
2MHz:Externalclock)1.
8to3.
6V(1MHzto8MHz:Resonator)2.
7to3.
6V(1MHzto16MHz)1.
8to5.
5V(1MHzto4.
2MHz)2.
7to5.
5V(1MHzto8MHz)4.
5to5.
5V(1MHzto16MHz)ThemaximumvoltageoftheTMP86C925XBis5.
25V.
TMP86FM252004-03-0186FM25-7Underdevelopment1.
1.
4FLASHMemoryConfiguration64consecutivebytesintheFLASHareaaretreatedasonegroup,whichisdefinedasapage.
TheTMP86FM25incorporatesaone-pagetemporarydatabuffer.
WritingdatatoFLASHistemporarilystoredinthis64-bytedatabuffer.
After64bytesdatahavebeenwrittentothetemporarydatabuffer,thesedataarewrittentospecifiedpageofFLASHatatime.
However,datacanbereadfromanyaddressbytebybyte.
1.
1.
4.
1PageConfigurationTheFLASHareahasapageconfigurationof64bytes/pageasshownbelow.
Thetotalnumberofbytesinitis512pages*64bytes(=32768bytes).
Thewriteableareais8000HtoFFFFHinSerialPROMmode.
Note:TheFLASHarea(8000HtoFFFFH)canbewrittenonlyintheSerialPROMmode.
FordetailsoftheSerialPROMmode,referto2.
1"SerialPROMMode".
Address0123456789ABCDEF8000H8010H8020H8030H8040H8050H8060H8070H8080H8090H80A0H80B0H80C0H80D0H80E0H80F0HFFE0HFFF0HFigure1.
1.
1PageConfigurationPage0Page1Page2Page3Page511TMP86FM252004-03-0186FM25-8Underdevelopment1.
2FLASHMemoryControlCircuit1.
2.
1ConfigurationFigure1.
2.
1FLASHMemoryControlEndofwriteSerialPROMmodeFLASHareachipselectsignalRAM/BOOT-ROMfetchsignalWRsignalSYSCR1SYSCR2SYSCR2DecoderEEPCRTemporarydatabuffer(64bytes)withwritedatacounterDQRCPWritetimecounterENOverflowOverflow512EEPSRRequesttogenerateaninterruptvectorDQRCPEEPSRRDsignalDQRCPENFLASHwarm-upcounterCPUWAITsignalFLASHMemoryVINDatainputAddressinput168DatabusAddressbus4EEPMDEEPRSATPWDWMNPWDWBFBUSYEWUPENWINTOverflowDQRCPRegulatorClearCountupTMP86FM252004-03-0186FM25-9Underdevelopment1.
2.
2ControlTheFLASHmemoryiscontrolledbyFLASHcontrolregister(EEPCR)andFLASHstatusregister(EEPSR).
TheseregistersareassignedtoDBR.
AddressReadWrite0F90HSIO0BR0(SIO0buffer0)91SIO0BR1(SIO0buffer1)92SIO0BR2(SIO0buffer2)93SIO0BR3(SIO0buffer3)94SIO0BR4(SIO0buffer4)95SIO0BR5(SIO0buffer5)96SIO0BR6(SIO0buffer6)97SIO0BR7(SIO0buffer7)98SIO0CR1(SIO0controlregister1)99SIO0SR(SIO0statusregister)SIO0CR2(SIO0controlregister2)9ASTOPCR(Key-onwakeupcontrolregister)9BRDBUF(UARTreceiveddatabuffer)TDBUF(UARTtransmitdatabuffer)9CReserved::9FReservedA0SIO1BR0(SIO1buffer0)A1SIO1BR1(SIO1buffer1)A2SIO1BR2(SIO1buffer2)A3SIO1BR3(SIO1buffer3)A4SIO1BR4(SIO1buffer4)A5SIO1BR5(SIO1buffer5)A6SIO1BR6(SIO1buffer6)A7SIO1BR7(SIO1buffer7)A8SIO1CR1(SIO1controlregister1)A9SIO1SR(SIO1statusregister)SIO1CR2(SIO1controlregister2)AAReserved::BFReservedC0MULSEL(Multiplexedfunctionselectregister)C1Reserved::DFReservedE0EEPCR(Flashmemorycontrol)E1EEPSR(Flashmemorystatus)E2Reserved::FFReservedNote1:Donotaccessreservedareasbytheprogram.
Note2::Cannotbeaccessed.
Note3:Write-onlyregistersandinterruptlatchescannotusetheread-modify-writeinstructions(BitmanipulationinstructionssuchasSET,CLR,etc.
andlogicaloperationinstructionssuchasAND,OR,etc.
).
Figure1.
2.
1TheDataBufferRegister(DBR)forTMP86FM25TMP86FM252004-03-0186FM25-10UnderdevelopmentFLASHControlRegister76543210EEPMDEEPRSATPWDWMNPWDW(Initialvalue:1100*011)EEPCR(0FE0H)ProgramExecutionAreaEEPMDFLASHwriteenablecontrol(Writeprotect).
RAM/BOOTFLASH1100:FLASHwritedisable.
0011:FLASHwriteenable.
Othervalues:Reserved.
EEPRSFLASHwriteforciblestop.
0:1:FLASHwritingisforcedtostop.
(Thewritedatacounterisinitialized.
)*Afterwriting"1"toEEPRS,itisautomaticallyclearedto"0".
ReadonlyATPWDWAutomaticpowercontrolfortheFLASHcontrolcircuitintheIDLE0/1/2,SLEEP0/1/2modes.
(ThisbitisavailableonlywhenMNPWDWissetto"1".
)0:AutomaticpowershutdownisexecutedinIDLE0/1/2andSLEEP0/1/2modes.
1:AutomaticpowershutdownisnotexecutedinIDLE0/1/2andSLEEP0/1/2modes.
(Thepowerisalwayssuppliedinthesemodes.
)R/WMNPWDWSoftware-basedpowercontrolfortheFLASHcontrolcircuit.
0:ThepowerfortheFLASHcontrolcircuitisturnedoff.
1:ThepowerfortheFLASHcontrolcircuitisturnedon.
R/WReadonlyNote1:TheEEPMD,EEPRS,andMNPWDWcanberewrittenonlywhenaprogramfetchistakingplaceintheRAMorBOOT-ROMarea.
IfanattemptismadetorewritetheEEPCRregisterwhenaprogramisbeingexecutedintheFLASHarea,theEEPMD,EEPRS,andMNPWDWkeepholdingthepreviousdata;theyarenotrewritten.
Note2:TowritetotheFLASH,settheEEPMDwith"0011B"inadvancewhenaprogramfetchistakingplaceintheRAMarea.
Note3:ToforciblystopwritingofFLASH,settheEEPRSto"1"whenaprogramfetchistakingplaceintheRAMarea.
Note4:TheATPWDWfunctionsonlyiftheMNPWDWis"1".
IftheMNPWDWis"0",thepowerfortheFLASHcontrolcircuitiskeptturnedoffregardlessofthesettingoftheATPWDW.
Note5:WhenaSTOPmodeisexecuted,thepowerfortheFLASHcontrolcircuitisturnedoffregardlessofthesettingoftheATPWDW.
IftheMNPWDWis"0",entering/exitingtheSTOPmodeallowsthepowerfortheFLASHcontrolcircuittobekeptturnedoff.
Note6:ExecutingareadinstructiontotheEEPCRregisterresultsinbit3beingreadasundefined.
Bit2isalwaysreadas"0".
Note7:ThefollowingattentionisnecessarywhentheMNPWDWissetorcleared.
WhentheMNPWDWischangedfrom"1"to"0"Cleartheinterruptmasterenableflag(IMF)to"0"inadvancetodisableaninterrupt.
Afterthat,donotsetIMFto"1"duringEEPSR="0".
Ifawatchdogtimerisinuse,clearthebinarycounterforthewatchdogtimerjustbeforeMNPWDWischangedfrom"1"to"0".
WhentheMNPWDWischangedfrom"0"to"1"WhenwritetoorreadfromtheFlasharea,makesurethattheEEPSRis"1"bysoftware.
OncetheMNPWDWisrewrittenfrom"0"to"1"bysoftware,keepperformingsoftware-basedpollinguntiltheEEPSRbecomes"1".
Note8:InMCUmode,theEEPMDandEEPRSshouldbesetto"1100B"and"0".
Figure1.
2.
2FLASHControlRegisterTMP86FM252004-03-0186FM25-11UnderdevelopmentFLASHStatusRegister76543210WINTEWUPENBFBUSY(Initialvalue:*****010)EEPSR(0FE1H)WINTInterruptdetectionduringawritetotheFLASH0:Notdetected1:Detected(Interruptoccurred)*WINTisautomaticallyclearedto"0"whenreadinstructionisexecutedtoEEPSR.
ControlcircuitstatusOperating(Poweron)Halt(Poweroff)orwarm-upFLASHstatusTemporarydatabufferemptyWritingDisableEWUPENFLASHcontrolcircuitstatusmonitor110BFBUSYFLASHwritebusyflag011ReadonlyNote1:IfanonmaskableinterruptoccursduringawritetotheFLASH,theWINTissetto"1"andthewritingisdiscontinued,andthenwarm-upperiod(CPUwait)forthecontrolcircuitofFlashmemoryisexecuted.
(Thewritedatacounterisinitialized.
)IfWINT="1"isdetectedinthenonmaskableinterruptserviceroutine,awriteisnotcompletedsuccessfully.
So,itisnecessarytotryawriteagain.
ThecontentofthepagetowhichawriteistakingplacemaybechangedtoanunexpectedvaluedependingonthetimingwhentheWINTbecomes"1".
Note2:EvenifanonmaskableinterruptoccursduringanFLASHwarm-up,theCPUstaysatahaltuntilthewarm-upisfinished.
Note3:TheWINTisautomaticallyclearedto"0"whenareadinstructionisexecutedtotheEEPSRregister.
Note4:WhenMNPWDWischangedfrom"0"to"1",EWUPENbecomes"1"aftertaking210/fc[s](ifSYSCK="0")or23/fs[s](ifSYSCK="1").
BeforeaccessingtheFLASH,makesurethattheEWUPENis"1"intheRAMarea.
Note5:IftheBFBUSYis"1",executingareadinstructionorfetchtotheFLASHareacausesFFHtoberead.
FetchingFFHresultsinasoftwareinterruptoccurring.
Note6:IntheTMP86CM25A,iftheEWUPENis"1",writingtothemaskedROMareathatcorrespondstotheFLASHareadoesnotsettheBFBUSYoftheTMP86CM25Ato"1".
Figure1.
2.
3FLASHStatusRegisterTMP86FM252004-03-0186FM25-12Underdevelopment1.
2.
3FLASHWriteEnableControl(EEPCR)IntheFLASHproduct,thecontrolregistercanbeusedtodisableawritetotheFLASH(Writeprotect)inordertopreventawritetotheFLASHfromoccurringbymistakebecauseofaprogramerrorormicrocontrollermalfunction.
ToenableawritetotheFLASH,settheEEPCRwith0011B.
TodisableawritetotheFLASH,settheEEPCRwith1100B.
AresetinitializestheEEPCRto1100BtodisableawritetotheFLASH.
Usually,settheEEPCRwith1100B,exceptwhenitisnecessarytowritetotheFLASH.
Note1:TheFLASHmemory(8000HtoFFFFH)canbewrittenonlyintheserialPROMmode.
Note2:TheEEPCRcanberewrittenonlywhenaprogramisbeingexecutedintheRAMarea.
ExecutingawriteinstructiontotheEEPCRintheFLASHareadoesnotchangeitssetting.
Note3:IntheTMP86CM25A,executingawriteinstructiontotheEEPCRchangesitssetting;however,thenewsettingdoesnottakeeffect.
Note4:ThisfunctioncanbeusedinserialPROMmode.
InMCUmode,theEEPCRshouldbealwayssetto"1100B".
TMP86FM252004-03-0186FM25-13Underdevelopment1.
2.
4FLASHWriteForcibleStop(EEPCR)ToforciblystopawritetotheFLASH,settheEEPCRto"1".
SettingtheEEPCRto"1"initializesthewritedatacounterofdatabufferandforciblystopsawrite,andthenawarm-upperiod(CPUwait)forthecontrolcircuitofFlashmemoryisexecuted.
Afterwarm-upperiod,theEEPSRisclearedto"0".
Thewarm-upperiodis210/fc(SYSCK="0")or23/fs(SYSCK="1").
Afterthis,ifwritingtoFLASHstartsagain,dataisstoredasthefirstbyteofthetemporarydatabufferandsetstheEEPSRto"1".
Therefore,itisnecessarytowrite64bytesdatatothetemporarydatabuffer.
After1to63bytesaresavedtothetemporarydatabuffer,iftheEEPCRissetto"1"thespecifiedpageofflashisnotwritten.
(Itkeepspreviousdata.
)Note1:After64bytesarewrittentothetemporarydatabuffer,thesettingtheEEPCRto"1"maycausethewritingthepageofFLASHtoanunexpectedvalue.
Note2:TheEEPCRcanberewrittenonlywhenaprogramisbeingexecutedintheRAMarea.
IntheFLASHarea,executingawriteinstructiontotheEEPCRdoesnotaffectitssetting.
Note3:Duringthewarm-upperiodforFlashmemory(CPUwait),theperipheralcircuitscontinueoperating,buttheCPUstaysatahaltuntilthewarm-upisfinished.
Evenifaninterruptlatchissetto"1"bygeneratingofinterruptrequest,aninterruptsequencedoesn'tstarttilltheendofwarmup.
Ifinterruptsoccurduringawarm-upperiodwithIMF="1",theinterruptsequencewhichdependsoninterruptprioritywillstartafterwarm-upperiod.
Note4:WhentheEEPCRissetto"1"withEEPSR="0",awarm-upperiodisnotexecuted.
Note5:IfexecutedawriteorreadinstructiontotheFlashareaimmediatelyaftersettingEEPCR,insertoneormoremachinecycleinstructionsaftersettingEEPCR.
Example:ReadstheFlashmemorydataimmediatelyaftersettingEEPCRto"1".
LDHL,8000HLD(EEPCR),3FH;SetEEPCRto"1".
NOP;NOP(DonotexecutereadinstructionimmediatelyaftersettingEEPCR.
)LDA,(HL);Readsthedataofaddress8000H.
(ReadinstructiontotheFlashmemory.
)Note6:ThisfunctioncanbeusedinserialPROMmode.
Inthismode,theEEPCRshouldbealwayssetto"0".
TMP86FM252004-03-0186FM25-14UnderdevelopmentFigure1.
2.
4WriteDataCounterInitializationandWriteForcibleStop0120012345Buffer0Buffer1Buffer2Buffer63EEPCRWriteinstructiontotheFLASHareaWritedatacounterEEPSREEPSRData0Data1Data0'Data1'Data2'WritetotheEPCR="1"FLASHwarm-upcounterFLASHcontrolcircuitstatusNormaloperationWarm-upinprogressNormaloperation0210/fcor23/fs[s]Overflow0(CPUwait)TMP86FM252004-03-0186FM25-15Underdevelopment1.
2.
5PowerControlfortheFLASHControlCircuitFortheFLASHproduct,itispossibletoturnoffthepowerforFLASHcontrolcircuit(suchasaregulator)tosuppresspowerconsumptioniftheFLASHareaisnotaccessed.
FortheTMP86CM25A,theregistersettingandtheCPUwaitfunctionsbehaveinthesamemannerasfortheFLASHproducttomaintaincompatibility;however,powerconsumptionisnotsuppressed.
TheEEPCRandEEPCRareusedtocontrolthepowerfortheFLASHcontrolcircuit.
IfthepowerfortheFLASHcontrolcircuitisturnedoffaccordingtothesettingoftheseregisters,startingtousethecircuitsagainneedstoallowwarm-uptimeforthepowersupply.
Table1.
2.
1PowerSupplyWarm-upTime(CPUwait)fortheFLASHControlCircuitSTOPMode(whenEEPCR="1")NORMAL1/2IDLE0/1/2ModeSLOW1/2SLEEP0/1/2ModeToReturntoaNORMALModeToReturntoaSLOWMode210/fc[s](64sat16MHz)23/fs[s](244sat32.
768kHz)STOPwarm-uptime+210/fc[s]STOPwarm-uptime+23/fs[s]1.
2.
5.
1Software-basedPowerControlfortheFLASHControlCircuit(EEPCR)TheEEPCRisasoftware-basedpowercontrolbitfortheFLASHcontrolcircuit.
WhenaprogramisbeingexecutedintheRAMarea,settingthisbitenablessoftware-basedpowercontrol.
ClearingtheEEPCRto"0"immediatelyturnsoffthepowerfortheFLASHcontrolcircuit.
OncetheEEPCRisswitchedfrom"0"to"1",beforeattemptingareadorfetchfromtheFLASHarea,itisnecessarytoinsertawarm-upperiodbysoftwareuntilthepowersupplyisstabilized.
Inthiscase,becausetheCPUwaitisnotexecuted,anyotherinstructionsexceptaccessingtoFlash(writeorread)areavailable.
WhenMNPWDWischangedfrom"0"to"1",EWUPENbecomes"1"aftertaking210/fc[s](SYSCK="0")or23/fs[s](SYSCK="1").
Usuallysoftware-basedpollingshouldbeperformeduntiltheEEPSRbecomes"1".
Anexampleofsettingisgivenbelow.
(1)ExampleofcontrollingtheEEPCR1.
TransferaprogramforcontrollingtheEEPCRtotheRAMarea.
2.
ReleaseanaddresstrapintheRAMarea(setuptheWDTCR1andWDTCR2registers).
3.
JumptothecontrolprogramtransferredtotheRAMarea.
4.
Cleartheinterruptmasterenableflag(IMF←"0").
5.
Clearthebinarycounterifthewatchdogtimerisinuse.
6.
ToturnoffthepowerfortheFLASHcontrolcircuit,cleartheEEPCRto"0".
7.
PerformCPUprocessingasrequired.
8.
ToaccesstheFLASHareaagain,settheEEPCRto"1".
9.
KeepprogrampollinguntiltheEEPSRbecomes"1".
(UponcompletionofanFLASHwarm-up,theEEPSRissetto"1".
Ittakes210/fc(SYSCK="0")or23/fs(SYSCK="1")untilEWUPENbecomes"1".
)ThisprocedureenablestheFLASHareatobeaccessed.
TMP86FM252004-03-0186FM25-16UnderdevelopmentIftheEEPCRis"1",enteringaSTOPmodeforciblyturnsoffthepowerfortheFLASHcontrolcircuit.
WhentheSTOPmodeisreleased,aSTOPmodeoscillationwarm-upiscarriedout,andthentheCPUwaitperiod(warm-upforstabilizingofFLASHpowersupplycircuit)isautomaticallyperformed.
IftheEEPCRis"0",entering/exitingtheSTOPmodekeepsthepowerfortheFLASHcontrolcircuitturnedoff.
Note1:IftheEEPSRis"0",donotaccess(Fetch,read,orwrite)theFLASHarea.
ExecutingareadinstructionorfetchtotheFLASHareacausesFFHtoberead.
FetchingFFHresultsinasoftwareinterruptoccurring.
FortheTMP86CM25A,however,maskedROMdataisalwaysreadregardlessofthestateoftheEEPSR.
Note2:TocleartheEEPCRto"0",cleartheinterruptmasterenableflag(IMF)to"0"inadvancetodisableaninterrupt.
Afterthat,donotsetIMFto"1"duringEEPSR="0".
Note3:IftheEEPCRis"0",generatinganonmaskableinterruptautomaticallyrewritestheMNPWDWto"1"towarm-uptheFLASHcontrolcircuit(CPUwait).
Thattime,theperipheralcircuitscontinueoperating,buttheCPUstaysatahaltuntilthewarm-upisfinished.
Note4:TheEEPCRcanberewrittenonlywhenaprogramisbeingexecutedintheRAMarea.
IntheFLASHarea,executingawriteinstructiontotheEEPCRdoesnotaffectitssetting.
Note5:Ifawatchdogtimerisusedasaninterruptrequest,clearthebinarycounterforthewatchdogtimerjustbeforeMNPWDWischangedfrom"1"to"0".
Note6:Duringthewarm-upperiodwithasoftwarepollingofEEPSR,ifanonmaskableinterruptoccursduringanFLASHwarm-up,theCPUstaysatahaltuntilthewarm-upisfinished.
Figure1.
2.
5Software-basedPowerControlfortheFLASHControlCircuit(EEPCR)EEPCREEPSREEPSRFLASHwarm-upcounterFLASHcontrolcircuitstatusProgramexecutionareaSpecifyMNPWDW=0SpecifyMNPWDW=1NormaloperationPower-offstateWarm-upinprogressNormaloperationFLASHareaRAMareaFLASHarea0210/fcor23/fs[s]Overflow0Softwarepolling(CPUisoperating)TMP86FM252004-03-0186FM25-17UnderdevelopmentExample:Performingsoftware-basedpowercontrolfortheFLASHcontrolcircuitsRAMAREA:DI;Disableaninterrupt(IMF←"0").
LD(WDTCR2),4Eh;;Clearthebinarycounterifthewatchdogtimerisinuse.
CLR(EEPCR).
0;CleartheEEPCRto"0".
sLOOP1:SET(EEPCR).
0;SettheEEPCRto"1".
TEST(EEPSR).
1;MonitortheEEPSRregister.
JRST,sLOOP1;JumptosLOOP1ifEEPSR="0".
JPMAIN;JumptotheFLASHarea.
TMP86FM252004-03-0186FM25-18Underdevelopment1.
2.
5.
2AutomaticPowerControlfortheFLASHControlCircuit(EEPCR)TheEEPCRisanautomaticpowercontrolbitfortheFLASHcontrolcircuit.
ItispossibletosuppresspowerconsumptionbyautomaticallyshuttingdownthepowerfortheFLASHcontrolcircuitwhenanoperationmodeischangedtoIDLE0/1/2andSLEEP0/1/2modes.
Thisbitcanbespecifiedregardlessoftheareainwhichaprogramisbeingexecuted.
AftertheEEPCRisclearedto"0",enteringanoperationmode(IDLE0/1/2orSLEEP0/1/2)wheretheCPUisatahaltautomaticallyturnsoffthepowerfortheFLASHcontrolcircuit.
Oncetheoperationmodeisreleased,thewarm-uptime(CPUwait)isautomaticallycountedtoresumenormalprocessing.
TheCPUwaitperiodiseither210/fc(SYSCK="0")or23/fs(SYSCK="1").
IftheEEPCRis"1",releasingtheoperationmodedoesnotcausetheCPUwait.
IfEEPCR="1",executingaSTOPmodeforciblyturnsoffthepowerfortheFLASHcontrolcircuitregardlessofthesettingoftheEEPCR.
WhentheSTOPmodeisreleased,aSTOPmodeoscillationwarm-upiscarriedout,andthenanFLASHcontrolcircuitwarm-up(CPUwait)isautomaticallyperformed.
IftheEEPCRis"0",entering/exitingaSTOPmodeallowsthepowerfortheFLASHcontrolcircuittobekeptturnedoff.
Note1:TheEEPCRfunctionsonlyiftheEEPCRis"1".
IftheEEPCRis"0",thepowerfortheFLASHcontrolcircuitiskeptturnedoffwhenanoperationmodeisexecutedorreleased.
Note2:DuringanFLASHwarm-up(CPUwait),theperipheralcircuitscontinueoperating,buttheCPUstaysatahalt.
Evenifaninterruptlatchissetunderthiscondition,nointerruptprocessoccursuntiltheCPUwaitiscompleted.
IftheIMFis"1"whentheinterruptlatchisset,interruptprocesstakesplaceaccordingtotheinterruptpriorityaftertheCPUhasstartedoperating.
Figure1.
2.
6AutomaticPowerControlfortheFLASHControlCircuit(EEPCR)EEPCREEPCREEPSRFLASHwarm-upcounterFLASHcontrolcircuitstatusProgramexecutionareaSpecifyATPWDW=0NormaloperationPower-offstateWarm-upinprogressNormaloperationFLASHareaorRAMarea0210/fcor23/fs[s]Overflow0EEPSROperationmodeNORMALorSLOWmodeIDLEorSLEEPmodeCPUWAITNORMALorSLOWmodeTMP86FM252004-03-0186FM25-19Underdevelopment1.
2.
6AccessingtotheFLASHMemoryDuringthewritingtotheFLASHarea,neitherareadnorfetchcanbeperformedforthe8000HtoFFFFHarea.
Therefore,towritetheFLASHarea,theprogramshouldbeexecutedintheBOOTROMorRAMarea.
Basically,towritetheFLASHarea,theprogramcanbeexecutedinBOOTROMareabyusingtheFLASHwritingmodeoftheSerialPROMmode,butitcanbealsoexecutedanyuserprograminRAMareabyusingtheRAMloadermodeoftheSerialPROMmode.
ExplanationhereismadeofonlythemethodofFLASHprogramminginRAMarea.
FordetailabouteachoperationmodeoftheSerialPROMmode,referto2.
1"SerialPROMMode".
AlthoughthewritingtoFLASHisexecutedonpage-by-page,thereadingfromFLASHisexecutedonbyte-by-byte.
IfanonmaskableinterruptoccursduringawritetotheFLASH(EEPSR="1"),theWINTissetto"1"andthewritingisdiscontinued,andthenthewarm-upperiodforcontrolcircuitofFlashmemoryisexecuted(Thewritedatacounterisalsoinitialized).
IfWINT="1"isdetectedinthenonmaskableinterruptserviceroutine,awriteisnotcompletedsuccessfully.
So,itisnecessarytotryawriteagain.
Thewarm-upperiodis210/fc(SYSCK="0")or23/fs(SYSCK="1").
After1to63bytesaresavedtothetemporarydatabuffer,ifaninterruptgenerates,thespecifiedpageofFLASHisnotwritten.
(Itkeepspreviousdata.
)Note1:WritingtotheFLASHareaisenabledonlyinserialPROMmode.
FordetailsofserialPROMmode,referto2.
1"SerialPROMMode".
Note2:After64bytesarewrittentothetemporarydatabuffer,thegeneratingofaninterruptmaycausethewritingthepageofFLASHtoanunexpectedvalue.
Note3:Duringthewarm-upperiodforFlashmemory(CPUwait),theperipheralcircuitscontinueoperating,buttheCPUstaysatahaltuntilthewarm-upisfinished.
Evenifaninterruptlatchissetto"1"bygeneratingofinterruptrequest,aninterruptsequencedoesn'tstarttilltheendofwarm-up.
Ifinterruptsoccurduringawarm-upperiodwithIMF="1",theinterruptsequencewhichdependsoninterruptprioritywillstartafterwarm-upperiod.
Note4:WhenwritethedatatoFlashmemoryfromRAMarea,disableallthenon-maskableinterruptbyclearinginterruptmasterenableflag(IMF)to"0"beforehand.
TMP86FM252004-03-0186FM25-20Underdevelopment1.
2.
6.
1FLASHWritingProgramintheRAMAreaTodeveloptheprograminRAM,thewritecontrolprogramshouldbeloadedfromexternaldevicebyusingRAMloadermodeinSerialPROMmode.
GivenbelowisanexampleofwritingthecontrolprogramintheRAMarea.
(1)ExampleofwritingprogramintheRAMarea1.
MonitortheEEPSR.
Ifitis"0",settheEEPCRto"1",andthenstartandkeeppollinguntiltheEEPSRbecomes"1".
2.
Cleartheinterruptmasterenableflag(IMF←"0").
3.
SettheEEPCRwith"3BH"(toenableawritetotheFLASH).
4.
Executeawriteinstructionfor64bytestotheFLASHarea.
5.
StartandkeeppollingbysoftwareuntiltheEEPSRbecomes"0".
(UponcompletionofaneraseandwritetotheFLASHcells,theEEPSRissetto"1".
FortheFLASHproduct,therequiredwritetimeistypically4ms.
Fortheemulationchip,itisthevaluespecifiedintheEEPEVAregister.
)6.
SettheEEPCRwith"CBH"(todisableawritetotheFLASH).
Note:See(2),"MethodofspecifyinganaddressforawritetotheFLASH",foradescriptionabouttheFLASHaddresstobespecifiedatstep4above.
TMP86FM252004-03-0186FM25-21Underdevelopment(2)MethodofspecifyinganaddressforawritetotheFLASHTheFLASHpagetobewrittenisspecifiedbythe10high-orderbitsoftheaddressofthefirstbytedata.
Thefirstbytedataisstoredatthefirstaddressofthetemporarydatabuffer.
Ifthedatatobewrittenis,forexample,8040H,page1isselected,andthedataisstoredatthefirstaddressofthetemporarydatabuffer.
Evenifthe6low-orderbitsofthespecifiedaddressisnot000000B,thefirstbytedataisalwaysstoredatthefirstaddressofthedatabuffer.
AnyaddresscanbespecifiedasthesecondandsubsequentaddresswithinFLASHarea(8000HtoFFFFH).
Thewritedatabytesarestoredinthetemporarydatabufferinthesequencetheyarewritten,regardlessofwhataddressisspecified.
Usually,theaddressthatisthesameasthefirstbyteisspecifiedforthesecondandsubsequentaddress.
A16-bittransferinstruction(LDW)canalsobeusedforwritingtothetemporarydatabuffer.
Example:Databytes00Hto3FHarewrittentopage1.
(Figure1.
2.
9showstheexampleofdatabufferandpages.
)DI;Disableaninterrupt(IMF←"0").
LDC,00HLDHL,EEPCR;SpecifytheEEPCRregisteraddress.
LDIX,8040H;Specifyawriteaddress.
LD(HL),3BH;SpecifytheEEPCR.
sLOOP1:LD(IX),C;Storedatatothetemporarydatabuffer.
(Awritepageisselectedwhenthefirstbyteiswritten.
)INCC;C=C+1.
CMPC,40H;JumptosLOOP1ifCisnot40H.
JRNZ,sLOOP1sLOOP2:TEST(EEPSR).
0JRSF,sLOOP2;JumptosLOOP2ifEEPSR="1".
LD(HL),0CBH;SpecifytheEEPCR.
Note:IftheBFBUSYis"1",executingareadinstructionorfetchtotheFLASHareacauses"FFH"toberead.
Fetching"FFH"resultsinasoftwareinterruptoccurring.
TMP86FM252004-03-0186FM25-22Underdevelopment0123456789ABCDEF00H01H02H03H04H05H06H07H08H09H0AH0BH0CH0DH0EH0FH10H11H12H13H14H15H16H19H1AH1BH1CH1DH1EH1FH20H21H22H23H24H25H26H29H2AH2BH2CH2DH2EH2FH30H31H32H33H34H35H36H37H38H39H3AH3BH3CH3DH3EH3FHAddress0123456789ABCDEF8030H8040H00H01H02H03H04H05H06H07H08H09H0AH0BH0CH0DH0EH0FH8050H10H11H12H13H14H15H16H19H1AH1BH1CH1DH1EH1FH8060H20H21H22H23H24H25H26H29H2AH2BH2CH2DH2EH2FH8070H30H31H32H33H34H35H36H37H38H39H3AH3BH3CH3DH3EH3FHFigure1.
2.
7DataBufferandWritePage(Example)TemporarydatabufferPage1TMP86FM252004-03-0186FM25-23UnderdevelopmentFigure1.
2.
8WritetotheFLASHAreaData20123630Buffer0Buffer1Buffer2Buffer63FLASHcellWriteinstructiontotheFLASHareaWritedatacounterEEPSREEPSRData0Data1ErasingWritingWritecompletedWritetime(Typically4ms)Data6364bytesarewrittenatatime.
OverflowDatabeforewritingDataafterwritingTMP86FM252004-03-0186FM25-24Underdevelopment2.
1SerialPROMMode2.
1.
1OutlineTheTMP86FM25hasa2-KbyteBOOT-ROMforprogrammingtoFLASHmemory.
ThisBOOT-ROMisamaskROMthatcontainsaprogramtowritetheFLASHmemoryon-board.
TheBOOT-ROMisavailableinaserialPROMmodeanditiscontrolledbyP11pin,BOOT(P15)pin,TESTpinandRESETpin,andiscommunicatedviaTXD(P16)andRXD(P15)pins.
TherearefouroperationmodesinaserialPROMmode:FLASHwritingmode,RAMloadermode,FLASHmemorySUMoutputmodeandProductdiscriminationcodeoutputmode.
OperatingareaofserialPROMmodediffersfromthatofMCUmode.
TheoperatingareaofserialPROMmodeshowsinTable2.
1.
1.
Table2.
1.
1OperatingAreaofSerialPROMModeParameterMinMaxUnitOperatingvoltage2.
73.
6VHighfrequency(Note)216MHzTemperature25±5°CNote:Eventhoughincludedinaboveoperatingarea,partoffrequencycannotbesupportedinserialPROMmode.
Fordetails,refertoTable2.
1.
6.
2.
1.
2MemoryMappingTheBOOT-ROMismappedinaddress3800Hto3FFFH.
TheFigure2.
1.
1showsamemorymapping.
Figure2.
1.
1MemoryAddressMaps0000H64bytesSFRRAMDBRFLASH003FH0040H083FH0F80H0FFFHFFFFHBOOTROM3800H3FFFH8000H2048bytes128bytes2048bytes32768bytesTMP86FM252004-03-0186FM25-25Underdevelopment2.
1.
3SerialPROMModeSetting2.
1.
3.
1SerialPROMModeControlPinsToexecuteon-boardprogramming,starttheTMP86FM25inserialPROMmode.
SettingofaserialPROMmodeisshowninTable2.
1.
2.
Table2.
1.
2SerialPROMModeSettingPinSettingBOOT/RXDpin(P15)HighP11pinLowRESET,TESTpin2.
1.
3.
2PinFunctionIntheserialPROMmode,TXD(P16)andRXD(P15)pinsareusedasaserialinterfacepin.
Table2.
1.
3PinFunctionintheSerialPROMModePinName(SerialPROMmode)Input/OutputFunctionPinName(MCUmode)TXDOutputSerialdataoutputP16RXD/BOOTInputSerialPROMmodecontrol/SerialdatainputP15RESETInputSerialPROMmodecontrolRESETTESTInputSerialPROMmodecontrol(Note1)TESTP11InputSerialPROMmodecontrol(Fixto"L"level)P11VDD2.
7Vto3.
6VVSS0VVAREFPowersupplyOpenorequalwithVDDP10,P12toP14,P17P20toP22P30toP36P50toP57P60toP67P70toP77I/OPlacedinHigh-ZstateduringserialPROMmode.
SEG39toSEG0COM4toCOM0OutputC0,C1,V4toV1LCDvoltageboosterpinOpenXINInputXOUTOutputResonatorconnectingpinsforhigh-frequencyclock.
Forinputtingexternalclock,XINisusedandXOUTisopened.
(Note2)Note1:Whenthedeviceisusedason-boardwritingandotherpartsarealreadymountedinplace,becarefulnotoaffectthesecommunicationcontrolpins.
Note2:OperatingareaofhighfrequencyinserialPROMmodeisfrom2MHzto16MHz.
TMP86FM252004-03-0186FM25-26UnderdevelopmentTosetaserialPROMmode,connectdevicepinsasshowninFigure2.
1.
2.
Figure2.
1.
2SerialPROMModePortSettingExternalcontrolVDD(2.
7V~3.
6V)GNDXOUTGNDVDDVAREFP11TXD(P16)BOOT/RXD(P15)RESETTESTMCUmodeXINTMP86FM25SerialPROMmodeVDDGNDTMP86FM252004-03-0186FM25-27Underdevelopment2.
1.
3.
3ActivatingSerialPROMModeThefollowingisaprocedureofsettingofserialPROMmode.
Figure2.
1.
3showsaserialPROMmodetiming.
(1)TurnonthepowertotheVDDpin.
(2)SettheP11pin,TESTpinandRESETpintolowlevel.
(3)SettheBOOT/RXDpin(P15)tohighlevel.
(4)Waituntilthepowersupplyandclocksufficientlystabilize.
(5)SettheTESTpinfromlowleveltohighlevel.
(6)ReleasetheRESET.
(Settohighlevel)(7)Inputamatchingdata(5AH)toRXDpinafterwaitingforsetupsequence.
Figure2.
1.
3SerialPROMModeTimingTable2.
1.
4SerialPROMModeTimingcharacteristicsRequiredMinimumTimeParameterSymbolTheNumberofClock(fc)atfc=2MHzatfc=16MHzSetuptimeforTESTpinRstf>512/fc[s]Tssup-1msRstf,besuretodisablethewatchdogtimer(WDT)ortoclearthebinarycounterofWDTimmediatelybefore.
DescriptionofRAMloadermode1.
Theprocessofthe1stbytethroughthe4thbytearethesameasFLASHmemorywritingmode.
2.
Thereceivedatainthe5thbyteistheRAMloadercommanddata(60H)towritetheuser'sprogramtoRAM.
3.
Whenthe5thbyteisoneoftheoperationcommanddatashowninTable2.
1.
7,thedevicesendstheechobackdatawhichisthesameasreceivedoperationcommanddata(inthiscase,60H).
Ifthe5thbytedatadoesnotcorrespondtotheoperationcommanddata,thedevicestopsUARTfunctionaftersending3bytesofoperationcommanderrorcode:(63H).
4.
Theprocessofthe7thbytethroughthem'thbytearethesameasFLASHmemorywritingmode.
5.
Thereceivedatainthem'th+1throughn'th2bytesarereceivedasbinarydatainIntelHexformat.
Noreceiveddataareechoedbacktothecontroller.
Thedatawhichisnotthestartmark(3AHfor":")inIntelHexformatisignoredanddoesnotsendanerrorcodetothecontrolleruntilthedevicereceivesthestartmark.
Afterreceivingthestartmark,thedevicereceivesthedatarecord,thatconsistsoflengthofdata,address,recordtype,writingdataandchecksum.
Afterreceivingthechecksumofdatarecord,thedevicewaitsthestartmarkdata(3AH)again.
ThedataofdatarecordiswrittentospecifiedRAMbythereceivingdata.
Sinceafterreceivinganendrecord,thedevicestartstocalculatetheSUM,thecontrollershouldwaittheSUMaftersendingtheendrecord.
IfreceiveerrororIntelHexformaterroroccurs,theUARTfunctionofTMP86FM25stopswithoutreturningerrorcodetothecontroller.
6.
Then'th1andthen'thbytesaretheSUMvaluethatissenttothecontrollerinorderoftheupperbyteandthelowerbyte.
FordetailsonhowtocalculatetheSUM,referto2.
1.
9"Checksum(SUM)".
TheSUMcalculationisperformedafterdetectingtheendrecord,butthecalculationisnotexecutedwhenreceiveerrororIntelHexformaterrorhasoccurred.
TheSUMiscalculatedbythedatawrittentoRAM,butthelengthofdata,address,recordtypeandchecksuminIntelHexformatarenotincludedinSUM.
7.
ThebootprogramjumpstothefirstaddressthatisreceivedasdatainIntelHexformataftersendingtheSUMtothecontroller.
TMP86FM252004-03-0186FM25-37Underdevelopment2.
1.
6.
3FLASHMemorySUMOutputMode(Operationcommand:90H)Table2.
1.
10showsFLASHmemorySUMoutputmodeprocess.
Table2.
1.
10FLASHMemorySUMOutputProcessNumberofBytesTransferredTransferDatafromExternalControllertoTMP86FM25BaudRateTransferDatafromTMP86FM25toExternalController1stbyte2ndbyteMatchingdata(5AH)9600bps9600bps(Baudrateautoset)OK:Echobackdata(5AH)Error:Nothingtransmitted3rdbyte4thbyteBaudratemodificationdata(SeeTable2.
1.
5)9600bps9600bpsOK:EchobackdataError:A1H*3,A3H*3,62H*3(Note1)5thbyte6thbyteOperationcommanddata(90H)ChangednewbaudrateChangednewbaudrateOK:Echobackdata(90H)Error:A1H*3,A3H*3,63H*3(Note1)7thbyteChangednewbaudrateOK:SUM(High)(Note2)Error:Nothingtransmitted8thbyteChangednewbaudrateOK:SUM(Low)(Note2)Error:NothingtransmittedBOOTROM9thbyte(Waitforthenextoperation)(Commanddata)ChangednewbaudrateNote1:"xxH*3"denotesthatoperationstopsaftersending3bytesofxxH.
Fordetails,referto2.
1.
8"ErrorCode".
Note2:Referto2.
1.
9"Checksum(SUM)"DescriptionofFLASHmemorySUMoutputmode1.
Theprocessofthe1stbytethroughthe4thbytearethesameasFLASHmemorywritingmode.
2.
Thereceivedatainthe5thbyteistheFLASHmemorySUMcommanddata(90H)tocalculatetheentireFLASHmemory.
3.
Whenthe5thbyteisoneoftheoperationcommanddatashowninTable2.
1.
7,thedevicesendstheechobackdatawhichisthesameasreceivedoperationcommanddata(inthiscase,90H).
Ifthe5thbytedatadoesnotcorrespondtotheoperationcommanddata,thedevicestopsUARTfunctionaftersending3bytesofoperationcommanderrorcode:(63H).
4.
The7thandthe8thbytesaretheSUMvaluethatissenttothecontrollerinorderoftheupperbyteandthelowerbyte.
FordetailsonhowtocalculatetheSUM,referto2.
1.
9"Checksum(SUM)".
5.
AftersendingtheSUM,thedevicewaitsforthenextoperationcommanddata.
TMP86FM252004-03-0186FM25-38Underdevelopment2.
1.
6.
4ProductDiscriminationCodeOutputMode(Operationcommand:C0H)Table2.
1.
11showsproductdiscriminationcodeoutputmodeprocess.
Table2.
1.
11ProductDiscriminationCodeOutputProcessNumberofBytesTransferredTransferDatafromExternalControllertoTMP86FM25BaudRateTransferDatafromTMP86FM25toExternalController1stbyte2ndbyteMatchingdata(5AH)9600bps9600bps(Baudrateautoset)OK:Echobackdata(5AH)Error:Nothingtransmitted3rdbyte4thbyteBaudratemodificationdata(SeeTable2.
1.
5)9600bps9600bpsOK:EchobackdataError:A1H*3,A3H*3,62H*3(Note1)5thbyte6thbyteOperationcommanddata(C0H)ChangednewbaudrateChangednewbaudrateOK:Echobackdata(C0H)Error:A1H*3,A3H*3,63H*3(Note1)7thbyteChangednewbaudrate3AHStartmark8thbyteChangednewbaudrate0AHThenumberoftransferdata(from9thto18thbyte)9thbyteChangednewbaudrate02HLengthofaddress(2bytes)10thbyteChangednewbaudrate00HReserveddata11thbyteChangednewbaudrate00HReserveddata12thbyteChangednewbaudrate00HReserveddata13thbyteChangednewbaudrate00HReserveddata14thbyteChangednewbaudrate01HThenumberofROMblock(1block)15thbyteChangednewbaudrate80HFirstaddressofROM16thbyteChangednewbaudrate00H17thbyteChangednewbaudrateFFHEndaddressofROM18thbyteChangednewbaudrateFFH19thbyteChangednewbaudrate7FHChecksumoftransferreddata(from9thto18thbyte)BOOTROM20thbyte(Waitforthenextoperation)(commanddata)ChangednewbaudrateNote:"xxH*3"denotesthatoperationstopsaftersending3bytesofxxH.
Fordetails,referto2.
1.
8"ErrorCode".
Descriptionofproductdiscriminationcodeoutputmode1.
Theprocessofthe1stbytethroughthe4thbytearethesameasFLASHmemorywritingmode.
2.
Thereceivedatainthe5thbyteistheproductdiscriminationcodeoutputcommanddata(C0H).
3.
Whenthe5thbyteisoneoftheoperationcommanddatashowninTable2.
1.
7,thedevicesendstheechobackdatawhichisthesameasreceivedoperationcommanddata(inthiscase,C0H).
Ifthe5thbytedatadoesnotcorrespondtotheoperationcommanddata,thedevicestopsUARTfunctionaftersending3bytesofoperationcommanderrorcode:(63H).
4.
The7thandthe19thbytesaretheproductdiscriminationcode.
Fordetails,referto2.
1.
12"ProductDiscriminationCode".
5.
AftersendingtheSUM,thedevicewaitsforthenextoperationcommanddata.
TMP86FM252004-03-0186FM25-39Underdevelopment2.
1.
7FLASHMemoryWritingDataFormatFLASHareaofTMP86FM25consistsof512pagesandonepagesizeis64bytes.
WritingtoFLASHisexecutedbypagewriting.
Therefore,itisnecessarytosend64bytesdata(foronepage)eventhoughonlyafewbytesdataarewritten.
Figure2.
1.
5showsanorganizationofFLASHarea.
Whenthecontrollersendsthewritingdatatothedevice,besuretokeeptheformatdescribedbelow.
1.
TheaddressofdataafterreceivingtheFLASHwritingcommandshouldbethefirstaddressofpage.
Forexample,incaseofpage2,thefirstaddressshouldbe8080H.
2.
Ifthelastdata'saddressofdatarecordisnotendaddressofpage,theaddressofthenextdatarecordshouldbetheaddress+1.
Forexample,ifthelastdata'saddressis802FH(Page0),theaddressofthenextdatarecordshouldbe8030H(Page0).
Example::10802000202122232425262728292A2B2C2D2E2FD8'8020Hto802FHdata:10803000303132333435363738393A3B3C3D3E3FC8'8030Hto803FHdata3.
Thelastdata'saddressofdatarecordimmediatelybeforesendingtheendrecordshouldbethelastaddressofpage.
Forexample,incaseofpage1,thelastdata'saddressofdatarecordshouldbe807FH.
Example::10807000303132333435363738393A3B3C3D3E3F88'8070Hto807FHdata:00000001FF'EndrecordNote:DonotwriteonlytheaddressesfromFFE0HtoFFFFHwhenalldataofFLASHmemoryarethesamedata.
Iftheseareaareonlywritten,thenextoperationcannotbeexecutedbecauseofpassworderror.
Address0123456789ABCDEF8000HF8010H8020HPage08030HE8040HF8050H8060HPage18070HE8080HF8090H80A0HPage280B0HE80C0H::FF70HEFF80HFFF90HFFA0HPage510FFB0HEFFC0HFFFD0HFFE0HPage511FFF0HENote:"F"showsthefirstaddressofeachpageand"E"showsthelastaddressofeachpage.
Figure2.
1.
5OrganizationofFLASHAreaTMP86FM252004-03-0186FM25-40Underdevelopment2.
1.
8ErrorCodeWhenthedevicedetectsanerror,theerrorcodesaresenttothecontroller.
Table2.
1.
12ErrorCodeTransmitDataMeaningofTransmitData62H,62H,62HBaudratemodificationerroroccurred.
63H,63H,63HOperatingcommanderroroccurred.
A1H,A1H,A1HFramingerrorinreceiveddataoccurred.
A3H,A3H,A3HOverrunerrorinreceiveddataoccurred.
Note:Ifpassworderroroccurs,theTMP86FM25doesn'tsenderrorcodes.
2.
1.
9Checksum(SUM)(1)CalculationmethodSUMconsistsofbyte+byte.
.
.
+byte,thechecksumofwhichisreturnedinwordastheresult.
Namely,dataisreadoutinbyteandchecksumofwhichiscalculated,withtheresultreturnedinword.
Example:A1HIfthedatatobecalculatedconsistsofthefourbytesshowntotheleft,SUMofthedataisB2HC3HD4HA1H+B2H+C3H+D4H=02EAHSUM(HIGH)=02HSUM(LOW)=EAHTheSUMreturnedwhenexecutingtheFLASHmemorywritecommand,RAMloadercommand,orFLASHmemorySUMcommandiscalculatedinthemannershownabove.
(2)CalculationdataThedatafromwhichSUMiscalculatedarelistedinTable2.
1.
13below.
Table2.
1.
13ChecksumCalculationDataOperatingModeCalculationDataRemarksFLASHmemorywritingmodeFLASHmemorySUMoutputmodeDataintheentirearea(32Kbytes)ofFLASHmemoryEvenwhenwrittentopartoftheFLASHarea,dataintheentirememoryarea(32Kbytes)iscalculated.
Thelengthofdata,address,recordtypeandchecksuminIntelHexformatarenotincludedinSUM.
RAMloadermodeDatawrittentoRAMThelengthofdata,address,recordtypeandchecksuminIntelHexformatarenotincludedinSUM.
ProductDiscriminationCodeOutputmodeChecksumoftransferreddata(from9thto18thbyte)Fordetails,referto2.
1.
12"ProductDiscriminationCode".
TMP86FM252004-03-0186FM25-41Underdevelopment2.
1.
10IntelHexFormat(Binary)1.
Afterreceivingthechecksumofarecord,thedevicewaitsforthestartmarkdata(3AHfor":")ofthenextrecord.
Therefore,thedeviceignoresthedata,whichdoesnotmatchthestartmarkdataafterreceivingthechecksumofarecord.
2.
Makesurethatoncethecontrollerprogramhasfinishedsendingthechecksumoftheendrecord,itdoesnotsendanythingandwaitsfortwobytesofdatatobereceived(Upperandlowerbytesofchecksum).
Thisisbecauseafterreceivingthechecksumoftheendrecord,thebootprogramcalculatesthechecksumandreturnsthecalculatedchecksumintwobytestothecontroller.
3.
IfareceiveerrororIntelHexformaterroroccurs,theUARTfunctionofTMP86FM25stopswithoutreturningerrorcodetothecontroller.
Inthefollowingcases,anIntelHexformaterroroccurs:Whentherecordtypeisnot00H,01H,or02HWhenaSUMerroroccurredWhenthedatalengthofanextendedrecord(Type=02H)isnot02HWhentheaddressofanextendedrecord(Type=02H)islargerthan1000Handafterthat,receivesthedatarecordWhenthedatalengthoftheendrecord(Type=01H)isnot00H2.
1.
11PasswordsTheeightormorebytesconsecutivedatainflashmemoryareacanbeusedaspassword.
Inpasswordcheck,TMP86FM25comparesthesedatawithdatawhicharetransmittedfromtheexternalcontroller.
Theareainwhichpasswordscanbespecifiedislocatedataddresses8000HtoFF9FH.
TheareafromFFA0HtoFFFFHcannotbespecifiedaspasswordsarea.
Thedevicecomparesthestoredpasswordswiththepasswords,whicharereceivedfromthecontroller.
IfalldataofaddressesfromFFE0HtoFFFFHare"00H"or"FFH",thepasswordscomparisonisnotexecutedbecausethedeviceisconsideredasblankproduct.
Itisnecessarytospecifythepasswordcountstorageaddressesandthepasswordcomparisonstartaddresseventhoughitisablankproduct.
Table2.
1.
14showsthepasswordsettingintheblankproductandnonblankproduct.
TMP86FM252004-03-0186FM25-42UnderdevelopmentTable2.
1.
14PasswordsettingintheBlankProductandNonBlankProductPasswordBlankProduct(Note1)NonBlankProductPNSA(Passwordcountstorageaddresses)8000H≤PNSA≤FF9FH8000H≤PNSA≤FF9FHPCSA(Passwordcomparisonstartaddress)8000H≤PCSA≤FF9FH8000H≤PCSA≤FFA0NN(Passwordcount)*8≤NSettingofpasswordNoneedNeed(Note2)Note1:WhenalldataofaddressesfromFFE0HtoFFFFHareaare"00H"or"FFH",thedeviceisjudgedasblankproduct.
Note2:Thesamethreeormorebytesconsecutivedatacannotbeusedaspassword.
Whenthepasswordincludesthesameconsecutivedata(Threeormorebytes),thepassworderroroccurs.
Ifthepassworderroroccurred,theUARTfunctionofdevicestopswithoutreturningerrorcode.
Note3:*:Don'tcare.
Note4:Whenthepassworddoesn'tmatchtheabovecondition,thepassworderroroccurs.
Ifthepassworderroroccurred,theUARTfunctionofdevicestopswithoutreturningerrorcode.
Note5:Incaseoftheblankproduct,thedevicereceivesIntelHexFormatimmediatelyafterreceivingPCSAwithoutreceivingpasswordstrings.
Inthistime,becausethedeviceignoresthedataexceptthestartmarkdata(3AHfor":")asIntelHexFormatdata,evenifexternalcontrollertransmitteddummypasswordstrings,processoperatescorrectly.
However,ifthedummypasswordstringscontaindata"3AH",thedevicedetectsitasstartmarkdatamistakenly,anddevicestopsprocesswithoutreturningerrorcode.
Therefore,iftheseprocessbecomesissue,theexternalcontrollershouldnottransmitthedummypasswordstrings.
Figure2.
1.
6Exampleofpasswordcompare08H8012H01H8107H02H8108H03H8109H04H810AHFLASHmemory05H810BH06H810CH07H810DH08H810EH80H12H81H07H01H02H03H04H05H06H07H08HUARTPNSAPCSAPasswordstring8bytesRXDpinComparison"08H"istreatedasthenumberofpassword.
ExamplePNSA=8012HPCSA=8107HPasswordstring=01H,02H,03H,04H,05H,06H,07H,08HTMP86FM252004-03-0186FM25-43Underdevelopment2.
1.
11.
1ConfirmationmethodoftheblankproductandnonblankproductTheexternalcontrollercanconfirmwhetherthedeviceistheblankproductornot,bytransmissionofdatadescribedbelow.
(1)ExecutesFLASHmemorywritingmodeorRAMloadermode.
(2)TransmitsthePNSAandPCSA.
(3)Transmitstheendrecord.
(4)Incaseoftheblankproduct,thedevicesendschecksumofflashmemory.
Incaseofthenonblankproduct,thedevicedoesn'tsendchecksumofflashmemorybuttheUARTfunctionstopswithoutsendinganydata.
Theexternalcontrollercanconfirmtheblankproductandnonblankproductbyreceivingchecksum.
Note:WhentheUARTfunctionstopsinnonblankproduct,theTMP86FM25shouldberesetbypinresetinputforrestartingtheserialPROMmode.
2.
1.
11.
2PasswordStringAstringofpasswordsinthereceiveddataarecomparedwiththedataintheFLASHmemory.
Inthefollowingcases,apassworderroroccurs:WhenthereceiveddatadoesnotmatchthedataintheFLASHmemory2.
1.
11.
3HandlingofPasswordErrorIfapassworderroroccurs,theUARTfunctionofTMP86FM25stopswithoutreturningerrorcodetothecontroller.
Therefore,whenapassworderroroccurs,theTMP86FM25shouldberesetbyRESETpininput.
2.
1.
12ProductDiscriminationCodeTheproductdiscriminationcodeisa13-bytedata,thatincludesthestartaddressandtheendaddressofROM.
Table2.
1.
15showstheproductdiscriminationcodeformat.
Table2.
1.
15ProductDiscriminationCodeFormatDataTheMeaningofDataInCaseofTMP86FM251stStartmark(3AH)3AH2ndThenumberoftransferdata(from3rdto12thbyte)0AH3rdLengthofaddress02H4thReserveddata00H5thReserveddata00H6thReserveddata00H7thReserveddata00H8thThenumberofROMblock01H9thTheupperbyteofthefirstaddressofROM80H10thThelowerbyteofthefirstaddressofROM00H11thTheupperbyteoftheendaddressofROMFFH12thThelowerbyteoftheendaddressofROMFFH13thChecksumoftransferreddata(from3rdto12thbyte)7FHTMP86FM252004-03-0186FM25-44Underdevelopment2.
1.
13FlowchartSTARTSetupUARTdatareceiveReceivedata="5AH"Changebaudrate(Adjustto9600baudsourceclock)NoYesUARTdatatransmit(Transmitdata="5AH")UARTdatareceiveChangebaudratebyreceivedataReceivedata=30H(FLASHmemorywritingmode)Receivedata=60H(RAMloadermode)Receivedata=90H(FLASHSUMoutputmode)UARTdatareceive(IntelHexformat)UARTdatatransmit(Checksum)UARTdatareceiveUARTdatatransmit(Transmitdata=30H)UARTdatatransmit(Transmitdata=60H)Passwordcertification(ComparereceivedataandFLASHdata)UARTdatareceive(IntelHexformat)UARTdatatransmit(Checksum)JumpstostartaddressofuserprogramUARTdatatransmit(Transmitdata=90H)UARTdatatransmit(Checksum)Receivedata=C0H(Productdiscriminationcodeoutputmode)UARTdatatransmit(Transmitdata=C0H)Passwordcertification(ComparereceivedataandFLASHdata)FLASHwriteprocessRAMwriteprocessUARTdatatransmit(Productdiscriminationcode)UARTdatatransmit(Echoedbackthebaudratemodificationdata)TMP86FM252004-03-0186FM25-45UnderdevelopmentElectricalCharacteristicsAbsoluteMaximumRatings(VSS=0V)ParameterSymbolPinsRatingUnitSupplyvoltageVDD0.
3to4.
0InputvoltageVIN0.
3toVDD+0.
3VOUT1ExceptV4pin0.
3toVDD+0.
3OutputvoltageVOUT2V4pin-0.
3to4.
0VIOUT1P6port1.
8IOUT2P1,P2,P34toP36,P5,P6,P7ports3.
2Outputcurrent(Per1pin)IOUT3P30toP33port30ΣIOUT1P6port30ΣIOUT2P1,P2,P34toP36,P5,P6,P7ports60Outputcurrent(Total)ΣIOUT3P30toP33port80mAPowerdissipation[Topr=85°C]PD350mWSolderingtemperature(Time)Tsld260(10s)StoragetemperatureTstg55to125OperatingtemperatureTopr40to85°CNote:Theabsolutemaximumratingsareratedvalueswhichmustnotbeexceededduringoperation,evenforaninstant.
Anyoneoftheratingsmustnotbeexceeded.
Ifanyabsolutemaximumratingisexceeded,adevicemaybreakdownoritsperformancemaybedegraded,causingittocatchfireorexploderesultingininjurytotheuser.
Thus,whendesigningproductswhichincludethisdevice,ensurethatnoabsolutemaximumratingvaluewilleverbeexceeded.
TMP86FM252004-03-0186FM25-46UnderdevelopmentRecommendedOperatingCondition-1(MCUmode)(VSS=0V,Topr=40to85°C)ParameterSymbolPinsConditionMinMaxUnitNORMAL1,2modefc=16MHzIDLE0,1,2mode2.
7NORMAL1,2modefc=4.
2MHz(incaseofexternalclock)IDLE0,1,2mode1.
8NORMAL1,2modefc=8MHz(incaseofconnectingaresonator)IDLE0,1,2mode1.
8SLOW1,2modefs=32.
768kHzSLEEP0,1,2modeSupplyvoltageVDDSTOPmode1.
83.
6VIH1ExcepthysteresisinputVDD*0.
70VIH2HysteresisinputVDD≥2.
7VVDD*0.
75InputhighlevelVIH3VDD="1"VDD="0"3.
000VDDVCapacityforLCDboostercircuitCLCD0.
10.
47FNote1:Therecommendedoperatingconditionsforadeviceareoperatingconditionsunderwhichitcanbeguaranteedthatthedevicewilloperateasspecified.
Ifthedeviceisusedunderoperatingconditionsotherthantherecommendedoperatingconditions(Supplyvoltage,operatingtemperaturerange,specifiedAC/DCvaluesetc.
),malfunctionmayoccur.
Thus,whendesigningproductswhichincludethisdevice,ensurethattherecommendedoperatingconditionsforthedevicearealwaysadheredto.
Note2:WhenLCDCTL1issetto"1",alwayskeepthecondintionofVDDisclearedto"0",alwayssupplythereferencevoltagefromV4pin.
RecommendedOperatingCondition-2(SerialPROMmode)(VSS=0V,Topr=25°C±5°C)ParameterSymbolPinsConditionMinMaxUnitSupplyvoltageVDD2MHz≤fc≤16MHz2.
73.
6VClockfrequencyfcXIN,XOUTVDD=2.
7to3.
6V2.
016.
0MHzNote:TheoperatingtemperatureareaofserialPROMmodeis25°C±5°CandtheoperatingareaofhighfrequencyofserialPROMmodeisdifferentfromMCUmode.
TMP86FM252004-03-0186FM25-47UnderdevelopmentDCCharacteristics(VSS=0V,Topr=40to85°C)ParameterSymbolPinsConditionMinTyp.
MaxUnitHysteresisvoltageVHSHysteresisinputVDD=3.
3V0.
4VIIN1TESTVDD=3.
6V,VIN=0V5IIN2Sinkopendrain,Tri-stateVDD=3.
6V,VIN=3.
6V/0V±5InputcurrentIIN3RESET,STOPVDD=3.
6V,VIN=3.
6V+5ARIN1TESTpulldownVDD=3.
6V,VIN=3.
6V70InputresistanceRIN2RESETpullupVDD=3.
6V,VIN=0V100220450kHigh-frequencyfeedbackresistorRFBXOUTVDD=3.
6V1.
2Low-frequencyfeedbackresistorRFBTXTOUTVDD=3.
6V14MOutputleakagecurrentILOSinkopendrain,Tri-stateVDD=3.
6VVOUT=3.
4V/0.
2V±10AOutputhighvoltageVOHC-MOS,Tri-stateVDD=3.
6V,lOH=–0.
6mA3.
2OutputlowvoltageVOLExceptXOUT,P30toP33portVDD=3.
6V,IOL=0.
9mA0.
4VOutputlowcurrentIOLP30toP33portsVDD=3.
6V,VOL=1.
0V6mAFlashareaMNP="1"6.
07.
2SupplycurrentinNORMAL1,2modeFetchareaRAMareaMNP="0"3.
94.
8MNPATP="1"3.
34.
3SupplycurrentinIDLE0,1,2modeVDD=3.
6VVIN=3.
4V/0.
2Vfc=16MHzfs=32.
768kHzMNPATP="0"2.
53.
0mAFlashareaMNP="1"8501200SupplycurrentinSLOW1modeFetchareaRAMareaMNP="0"1021MNPATP="1"8501200SupplycurrentinSLEEP1modeMNPATP="0"717MNPATP="1"8501200SupplycurrentinSLEEP0modeVDD=3.
6VVIN=3.
4V/0.
2Vfs=32.
768kHzMNPATP="0"616SupplycurrentinSTOPmodeIDDVDD=3.
6VVIN=3.
4V/0.
2V0.
510ANote1:TypicalvaluesshowthoseatTopr=25°C,VDD=3.
3VNote2:Inputcurrent(IIN1,IIN2):Thecurrentthroughpull-uporpull-downresistorisnotincluded.
Note3:IDDdoesnotincludeIREFcurrent.
Note4:ThesupplycurrentsofSLOW2andSLEEP2modesareequivalenttoIDLE0,IDLE1,IDLE2.
Note5:MNP(MNPWDW)showsbit0inEEPCRregisterandATP(ATPWDW)showsbit1inEEPCRregister.
Note6:"Fetch"meansreadingoperationofFLASHdataasaninstructionbyCPU.
TMP86FM252004-03-0186FM25-48UnderdevelopmentADConversionCharacteristics(VSS=0.
0V,2.
7V≤VDD≤3.
6V,Topr=40to85°C)ParameterSymbolConditionMinTyp.
MaxUnitAnalogreferencevoltageVAREFVDD1.
0VDDAnalogreferencevoltagerange(Note4)VAREF2.
5AnaloginputvoltageVAINVSSVAREFVPowersupplycurrentofanalogreferencevoltageIREFVDD=VAREF=3.
6VVSS=0.
0V0.
4mANonlinearityerror±1Zeropointerror±1Fullscaleerror±1TotalerrorVDD=2.
7VVSS=0.
0VVAREF=2.
7V±2LSB(VSS=0.
0V,2.
0V≤VDD<2.
7V,Topr=40to85°C)ParameterSymbolConditionMinTyp.
MaxUnitAnalogreferencevoltageVAREFVDD0.
6VDDAnalogreferencevoltagerange(Note4)VAREF2.
0AnaloginputvoltageVAINVSSVAREFVPowersupplycurrentofanalogreferencevoltageIREFVDD=VAREF=2.
0VVSS=0.
0V0.
22mANonlinearityerror±1Zeropointerror±1Fullscaleerror±1TotalerrorVDD=2.
0VVSS=0.
0VVAREF=2.
0V±2LSB(VSS=0.
0V,1.
8V≤VDD<2.
0V,Topr=10to85°C)(Note5)ParameterSymbolConditionMinTyp.
MaxUnitAnalogreferencevoltageVAREFVDD0.
1VDDAnalogreferencevoltagerange(Note4)VAREF1.
8AnaloginputvoltageVAINVSSVAREFVPowersupplycurrentofanalogreferencevoltageIREFVDD=VAREF=1.
8VVSS=0.
0V0.
2mANonlinearityerror±2Zeropointerror±2Fullscaleerror±2TotalerrorVDD=1.
8VVSS=0.
0VVAREF=1.
8V±4LSBNote1:Thetotalerrorincludesallerrorsexceptaquantizationerror,andisdefinedasamaximumdeviationfromtheidealconversionline.
Note2:Conversiontimeisdifferentinrecommendedvaluebypowersupplyvoltage.
Note3:PleaseuseinputvoltagetoAINinputPininlimitofVAREFVSS.
Whenvoltageofrangeoutsideisinput,conversionvaluebecomesunsettledandgivesaffecttootherchannelconversionvalue.
Note4:AnalogReferenceVoltageRange:VAREF=VAREFVSSNote5:WhenADisusedwithVDD<2.
0V,theguaranteedtemperaturerangevarieswiththeoperatingvoltage.
TMP86FM252004-03-0186FM25-49UnderdevelopmentACCharacteristics(VSS=0V,VDD=2.
7to3.
6V,Topr=40to85°C)ParameterSymbolConditionMinTyp.
MaxUnitNORMAL1,2modeIDLE1,2mode0.
254SLOW1,2modeMachinecycletimetcySLEEP1,2mode117.
6133.
3sHighlevelclockpulsewidthtwcHLowlevelclockpulsewidthtwcLForexternalclockoperation(XINinput)fc=16MHz31.
25nsHighlevelclockpulsewidthtwcHLowlevelclockpulsewidthtwcLForexternalclockoperation(XTINinput)fs=32.
768kHz15.
26s(VSS=0V,VDD=1.
8to3.
6V,Topr=40to85°C)ParameterSymbolConditionMinTyp.
MaxUnitNORMAL1,2modeIDLE1,2mode0.
54SLOW1,2modeMachinecycletimetcySLEEP1,2mode117.
6133.
3sHighlevelclockpulsewidthtwcHLowlevelclockpulsewidthtwcLForexternalclockoperation(XINinput)fc=4.
2MHz119.
04nsHighlevelclockpulsewidthtwcHLowlevelclockpulsewidthtwcLForexternalclockoperation(XTINinput)fs=32.
768kHz15.
26sTimerCounter1input(ECIN)Characteristics(VSS=0V,Topr=40to85°C)ParameterSymbolConditionMinTyp.
MaxUnitFrequencymeasurementmodeVDD=2.
7to3.
6V0.
5.
TC1input(ECINinput)tTC1FrequencymeasurementmodeVDD=1.
8to2.
7V0.
25MHzTMP86FM252004-03-0186FM25-50UnderdevelopmentUARTTiming-1(VDD=2.
7Vto3.
6V,fc=2MHzto16MHz,Ta=25°C)RequiredMinimumTimeParameterSymbolTheNumberofClock(fc)Atfc=2MHzAtfc=16MHzTimefromthereceptionofamatchingdatauntiltheoutputofanechobackCMeb1Approx.
600300s37.
5sTimefromthereceptionofaBaudRateModificationDatauntiltheoutputofanechobackCMeb2Approx.
700350s43.
7sTimefromthereceptionofanoperationcommanduntiltheoutputofanechobackCMeb3Approx.
600300s37.
5sCalculationtimeofchecksumCKsmApprox.
1573000786.
5ms98.
3msUARTTiming-2(VDD=2.
7Vto3.
6V,fc=2MHzto16MHz,Ta=25°C)RequiredMinimumTimeParameterSymbolTheNumberofClock(fc)Atfc=2MHzAtfc=16MHzTimefromresetreleaseuntilacceptanceofstartbitofRXDpinRXsup8385041.
9ms5.
3msTimebetweenamatchingdataandthenextmatchingdataCMtr12850014.
3ms1.
8msTimefromtheechobackofmatchingdatauntiltheacceptanceofbaudratemodificationdataCMtr2600300s37.
5sTimefromtheoutputofechobackofbaudratemodificationdatauntiltheacceptanceofanoperationcommandCMtr3750375s46.
9sTimefromtheoutputofechobackofoperationcommanduntiltheacceptanceofPasswordcountstorageaddressesCMtr4950475s59.
4sFlashCharacteristics(VSS=0V)ParameterConditionMinTyp.
MaxUnitNumberofguaranteedwrites(Pagewriting)toFlashmemoryinserialPROMmodeVDD=2.
7to3.
6V,2MHz≤fc≤16MHz(Topr=25°C±5°C)105TimesRXsupCMtr2CMtr3CMtr4RESETpin(TMP86FM25)(5AH)(28H)(30H)RXDpin(TMP86FM25)(5AH)(28H)(30H)TXDpin(TMP86FM25)CMeb1CMeb2CMeb3(5AH)(5AH)(5AH)CMtr1RXDpin(TMP86FM25)TXDpin(TMP86FM25)TMP86FM252004-03-0186FM25-51UnderdevelopmentPackageDimensionsP-QFP100-1420-0.
65AUnit:mmTMP86FM252004-03-0186FM25-52Underdevelopment