Imagefilemarkets.com

2013ALSE.
V2013.
08aJPEG-EncoderDataSheethttp://www.
alse-fr.
comThisJPEG-EncoderIPhasbeendesignedforeasyintegrationintoFPGAsfromanyvendor.
IthasbeenhighlyoptimizedforaverysmallfootprintandanexcellentFmaxallowingtheuseoflowcostFPGAs.
ThisIPenablesFPGA-basedapplicationstooutperformDSP-basedsolutionsandtoaddressthemostchallengingmarkets.
TheJPEG-EncoderIPcancompressStillImagesandVideoStreamsanditcomeswithRaster-to-Blockconversionintegrated.
Severalpopularinputformatsaresupportednatively(BT656,YUV,RGB),thussimplifyingtheconnectiontovariousimagesensorsorvideostreamingsources(VideoCodecs,Ethernetstreamsetc).
DeliverablesincludeaverysophisticatedHDLsimulationenvironmentforseamlessdevelopment,verificationandintegrationinthefinalapplication.
DemosareavailableformanyAltera,LatticeandXilinxkits(contactALSEforActel-Microsemi).
JPEGEncoderBlockDiagramJPEGEncoderforbothStillImageandRealTimeVideoCompressionBaselineJPEG-Encoder.
Supportsanyimageresolutionupto64Kx64Kimages.
Inputstream:YCrCb4:2:2(othersubsamplingschemescanbeimplementeduponrequest).
BT656/RGB/YUVstreamshandling(seeafter).
8bitssamples.
StandardHuffmanTable.
Dynamicallyconfigurablequantizationtables(upto8tables)formultiplelevelsofcompression.
Dynamicchoiceofcompressionlevel.
8Bits(byte)StreamingOutputInterface.
Encodingatapproximately1.
16pixelperclockcycle.
NoexternalRAMrequiredforJPEGEncoderalone;RastertoBlockrequirementsdependonlinesize(seenoteonTableofImplementationresults,hereafter.
SpeedandAreaoptimizedCompact:seeimplementationresultstable,hereafter.
Fast:onAlteraEP3C25F256C6CycloneIIIdevice,theEncodercanrunatmorethan150MHz.
Versatile:canbeusedonallkindsofFPGAs(internalmemoryblocksarerequired).
IntroductionFeaturesJPEGEncoderQuantizationTablesQuantizationTablesJPEGStreamerHuffman&RunLengthEncoderZigZagQuantizerDCTControlUnitQuantizationTablesJPEG-EncoderQuantizationTables4Tablesor8Tables2013ALSE.
V2013.
08aJPEG-EncoderDataSheethttp://www.
alse-fr.
comExamplesofImplementationResults:AlteraCyclonefamiliesFPGADeviceFunctionAreaMemoryMultipliersFrequencyCyclone-IVspeedgradeC6Encoderalone3700LE's7xM9K4(18x18)170MHzCyclone-IVspeedgradeC6RastertoBlock(1024pixelslines)+BT656200LE's8xM9K*4(18x18)170MHzCyclone-IVspeedgradeC6Encoder+RastertoBlock+BT6563900LE's15xM9K*4(18x18)170MHzCyclone-VspeedgradeC6Encoderalone1700ALM's15xM10K4(18x18)190MHz*Incaseof1920pixelslines,8extramemoryblocksarerequired(usedinRastertoBlock).
ContactALSEforimplementationresultsonanyotherFPGAdevicefamily.
SophisticatedHDLSimulationEnvironmentJPEGstreamgenerationfromBMPinputfile(otherformatsavailableuponrequest,contactALSE).
OutputcapturewithJPEGfilereconstruction.
TestbenchesandSimulationscriptsforModelSim.
Pre-compiledsimulationslibraries.
User'sGuide.
FlexibleLicensingschemesNo(zero)royalty.
EncryptedRTLTimedorUntimedNodeLockedorFloatingSingleorMulti-projectsRTL.
Netlist(perprojectorformultipleproject).
EasySystemIntegration:Singleclock,fullysynchronousdesignInputVideoformatchoice:BT656(4:2:2YUVformat)24bitsRGB(4:4:4)24bitsYUV(4:4:4)Other:contactALSEOutput:standardJPEG8bitsStreamEasyconnectiontoA.
L.
S.
EGEDEK(EthernetCommunicationEngineIP)forstreamingoverEthernet.
OptionalBlocksYUV4:4:4ImagesFramesBT656DecoderRastertoBlockConverterJPEGEncoderBT6564:2:2ImagesFramesYUV4:2:2ConverterRGBtoYUVConverterRGB4:4:4ImagesFramesJPEGEncoder:SystemIntegrationImplementationResults&PerformancesDeliverablesandLicensingSchemesYUV/RGBGeneratorBT656GeneratorModelUnitUnderTestJPEGTopwithBT656ControlJPEGStreamReceptionUser.
bmpImagesFileJPEG.
jpgFileSimulationEnvironment