frequencieswww.580hu.com

UniversityofCentralFloridaUniversityofCentralFloridaSTARSSTARSElectronicThesesandDissertations,2004-20192007HotCarrierEffectOnLdmosTransistorsHotCarrierEffectOnLdmosTransistorsLiangjunJiangUniversityofCentralFloridaPartoftheElectricalandElectronicsCommonsFindsimilarworksat:https://stars.
library.
ucf.
edu/etdUniversityofCentralFloridaLibrarieshttp://library.
ucf.
eduThisDoctoralDissertation(OpenAccess)isbroughttoyouforfreeandopenaccessbySTARS.
IthasbeenacceptedforinclusioninElectronicThesesandDissertations,2004-2019byanauthorizedadministratorofSTARS.
Formoreinformation,pleasecontactSTARS@ucf.
edu.
STARSCitationSTARSCitationJiang,Liangjun,"HotCarrierEffectOnLdmosTransistors"(2007).
ElectronicThesesandDissertations,2004-2019.
3213.
https://stars.
library.
ucf.
edu/etd/3213HOTCARRIEREFFECTONLDMOSTRANSISTORSByLIANGJUNJIANGM.
S.
ZhejiangUniversity,2001B.
S.
ZhejiangUniversity,1998AdissertationsubmittedinpartialfulfillmentoftherequirementsforthedegreeofDoctorofPhilosophyintheSchoolofElectricalEngineeringandComputerScienceintheCollegeofEngineeringandComputerScienceattheUniversityofCentralFloridaOrlando,FloridaSpringTerm2007MajorProfessor:JiannS.
Yuan2007LiangjunJiangiiABSTRACTOneofthemainproblemsencounteredwhenscalingdownisthehotcarrierinduceddegradationofMOSFETs.
Thisproblemhasbeenstudiedintensivelyduringthepastdecade,underbothstaticanddynamicstressconditions.
Inthisperiodithasevolvedfromamoreorlessacademicresearchtopictooneofthemoststringentconstraintsguaranteeingthelifetimeofsub-microndevices.
Newdrainengineeringtechniqueleadstotheextensiveusageoflateraldopeddrainstructures.
Inthesedevicesthepeakofthelateralfieldisloweredbyreducingthedopingconcentrationnearthedrainandbyprovidingasmoothjunctiontransitioninsteadofanabruptone.
Therefore,theamountofhotcarriergenerationforagivensupplyvoltageandtheinfluenceofacertainphysicaldamageontheelectricalcharacteristicsisdecreaseddramatically.
Acompleteunderstandingofthehotcarrierdegradationprobleminsub-micron0.
25umLDMOSFETsispresentedinthiswork.
Firstwediscussthedegradationmechanismsobservedunder,forcircuitoperation,somewhatartificialbutwell-controlleduniform-substratehotelectronandsubstratehot-holeinjectionconditions.
Thenthemorerealisticcaseofstaticchannelhotcarrierdegradationistreated,andsomeimportantprocess-relatedeffectsareillustrated,followedbythebehaviorunderthemostrelevantcaseforrealoperation,namelydynamicdegradation.
AnAccurateandpracticalparameterextractionisusedtoobtaintheLDMOSFETsmodelparameters,withtheexperimentverification.
Goodagreementbetweenthemodelsimulationandexperimentisachieved.
Thegatechargetransferperformanceisexaminedtodemonstratethehotcarriereffect.
Furthermore,InordertounderstandthedynamicstressontheLDMOSFETanditseffectonRFcircuit,thehot-carrierinjectionexperimentinwhichdynamiciiistresswithdifferentdutycycleappliedtoaLDMOStransistorispresented.
AClass-CpoweramplifierisusedtoasanexampletodemonstratetheeffectofdynamicstressonRFcircuitperformance.
Finally,thestrategyforimprovinghotcarrierreliabilityandaforecastofthehotcarrierreliabilityproblemfornano-technologiesarediscussed.
Themaincontributionofthisworkis,itsystemicallyresearchthehotcarrierreliabilityissueonthesub-micronlateraldopeddrainMOSFETs,whichisinducedbystaticanddynamicvoltagestress;ThestressconditionmimicsthetypicalapplicationscenariosofLDMOSFET.
Modelparametersextractiontechniqueisintroducedwiththeaidofthecurrentdevicemodelingtools,theperformancedegradationmodelcanbeeasilyimplementintotheexistingcomputer-aidedtools.
Therefore,circuitperformancedegradationcanbeaccuratelyestimatedinthedesignstage.
CMOStechnologiesareconstantlyscaleddown.
Theproductionon65nmisonthemarket.
Withthereductioningeometries,thedevicesbecomemorevulnerabletohotcarrierinjection(HCI).
HCIreliabilityisamustfordesignsimplementedwithnewprocesses.
ReliabilitysimulationneedstobeimplementedinPDKlibrarieslocatedonthemodelingstage.
Theuseofprofessionaltoolsisaprerequisitetodevelopaccuratedevicemodels,fromDCtoGHz,includingnoisemodelingandnonlinearHFeffects,withinareasonabletime.
Designersneedtolearntodesignforreliabilityandtheyshouldbeeducatedonadditionalreliabilityanalyses.
Thevalueisthereductionoffailureandredesigncosts.
ivACKNOWLEDGMENTSIwouldliketoexpressmysinceregratitudeandappreciationtomyadvisor,ProfessorJ.
S.
Yuan,forprovidingmewiththeuniqueopportunitytoworkintheresearchareaofsemiconductordevicemodelingandreliability,forhisexpertguidancesandmentorship,andforhisencouragementandsupportatalllevels.
Iwouldalsoliketothankmycommitteemembersforreadingthisdissertationandofferingconstructivecomments.
Dr.
JianTanandDr.
AshrafLotfiattheEnpirionCompanyofferedmuch-appreciatedadvice,supportandthought-provokingideasthroughoutunderstandinglateraldopingMOStransistors.
Dr.
AftabAhmadatSemtechCorporationsharedhisexperienceandthoughtsandhelpedmetosetuptheCMOSreliabilitymeasurement.
IwillwishtoacknowledgemyappreciationtoMr.
MartinKailatSemtechCorporationforhisassistanceduringtheexperiment.
IwouldliketothankDr.
ChuanzhaoYu,Dr.
HongYang,Dr.
YiLiu,Dr.
EnjunXiao,Dr.
AnwarSadatfortheirgeneroushelpintheexperimentalphaseofthisresearch,andothercolleaguesintheCircuitDesignandReliabilityLaboratory,includingDr.
LiYang,Dr.
JiaDi,WadeSmith,FeiLiuandLinShenfortheirfriendshipandcompanionship.
Also,theresearchinthisdissertationhasbeensupportedinpartbytheEnpirionCompanyandSemtechIncorporation.
IhaveappreciatedthefinancialsupportoftheDepartmentofElectricalEngineering,UniversityofCentralFloridaduringtheyearsofmyPh.
D.
study.
Finally,Iwouldliketothankmyfamilyfortheirlife-longloveandsupport.
Iespeciallyowemuchtomyparentsforofferingtheirinvaluablepracticalexperiencetohelpmedebugthelifedifficultiesduringtheperiod.
vTABLEOFCONTENTSLISTOFFIGURESviiiLISTOFTABLES.
xiLISTOFACRONYMSANDABBREVIATIONSxii1CHAPTERONE:INTRODUCTION.
11.
1Motivation.
11.
2ResearchGoals.
21.
3Outlines.
22CHAPTERTWO:DEVICEMODELINGPROCESS.
32.
1Introduction.
32.
2GeneralProcess.
32.
3BSIM3ModelandEquivalentCircuitModel.
92.
4Device112.
4.
1TechnologyandLDMOSDescription.
122.
4.
2ThePerformanceoftheLDMOS.
132.
4.
3ModelParameterExtraction173CHAPTERTHREE:DEVICERELIABLITY.
223.
1Introduction.
223.
2HotCarrierInjectionofLDMOSFETs.
364CHAPTERFOUR:CIRCUITDESIGNANDPERFORMANCEANALYSIS.
494.
1Introduction.
49vi4.
2CircuitDesign.
504.
2.
1DC-DCConverter.
504.
2.
2PowerAmplifier.
615CHAPTER5:DEGRADATIONSUBJECTTOSTRESS.
635.
1DeviceDegradation645.
2.
1DC.
645.
2.
2CV.
715.
2.
3RF.
745.
2CircuitDegradation.
825.
2.
1DC-DCConverter.
825.
2.
2PowerAmplifier.
955.
3Summary.
976CHAPTERSIX:CONCLUSIONS.
996.
1Summary.
996.
2FurtherWork.
100REFERENCES102viiLISTOFFIGURESFig.
2.
1:Thedevicemodelingprocess4Fig.
2.
2:FromDCtoCVtoS-parameters.
6Fig.
2.
3:DepictsthisextensionofmodelingtowardsnonlinearHF7Fig.
2.
4:Howharmonicbalancesimulatorswork.
8Fig.
2.
5:ARFequivalentsubcircuitmodelfornMOStransistor.
11Fig.
2.
6:ThecrosssectionofanLDMOStransistor12Fig.
2.
7:Draincurrentversusdrain-sourcevoltage(nMOStransistor)14Fig.
2.
8:Draincurrentversusgate-sourcevoltage(nMOStransistor)14Fig.
2.
9:Draincurrentversusgrainsourcevoltage(pMOSTransistor)15Fig.
2.
10:Draincurrentversusgate-sourcevoltage(pMOS)15Fig.
2.
11:ReverseBiasCharacteristic(a)nMOSFET(b)pMOSFET16Fig.
2.
12:Drain-sourcecurrentversusdrain-sourcevoltage.
19Fig.
2.
13:(a)S11,(b)S12,(c)S21,and(d)S22measuredfrom100MHzto20GHzbiasedatVGS=2.
4VandVDS=5V.
Line:simulated,Symbol:measured21Fig.
3.
1:ApMOStransistorusedintheTDDBexperiment.
24Fig.
3.
2:MechanismsofHotCarrierEffects.
(a)DAHCinjectioninvolvesimpactionizationofcarriersnearthedrainarea;(b)CHEinjectioninvolvespropellingofcarriersinthechanneltowardtheoxideevenbeforetheyreachthedrainarea;(c)SHEinjectioninvolvestrappingofcarriersfromthesubstrate;(d)SGHEinjectioninvolveshotcarriersgeneratedbysecondarycarriers35viiiFig.
3.
3:BanddiagramandexperimentsetupforsubstratehotelectroninjectioninannMOSFET.
37Fig.
3.
4:(a)ΔVthversusfrequencyforn-LDMOSFETwith0.
24umchannellengthstressedatVd=9.
5V,stresstime=10800s.
(b)Δgm.
41Fig.
3.
5:Lifetime(ΔVth=10%)asafunctionof1/Vd,ClosecirclesareDClifetimemeasurement,Opencircleisforthedynamicdegradationexperiments.
43Fig.
4.
1:AnequivalentMOSFETgatecircuitshowingjustCgs,CgdandRg.
52Fig.
4.
2:Turn-ontransientoftheMOSFET53Fig.
4.
3:Turn-offtransientoftheMOSFET.
54Fig.
4.
4:Combinationofgatechargeandcapacitancetoobtainswitchingtimes.
57Fig.
4.
5:Sketchshowingdefinitionofturn-onandturn-offtimes.
59Fig.
4.
6:AsimplifiedschematicofthefullbridgeDC-DCconverter60Fig.
4.
7:Aschematicofaclass-Cpoweramplifier.
62Fig.
5.
1:Transconductanceandthresholdvoltageasafunctionofstresstime.
65Fig.
5.
2:Normalizedon-resistancechangeasafunctionofstresstime.
66Fig.
5.
3:Normalizedon-resistancedegradationversusnormalizedthresholdvoltagedegradation67Fig.
5.
4:(a)Normalizedthresholdvoltagechangeversusdutycycle,(b)normalizedtransconductancechangeversusdutycycle,and(c)normalizeddraincurrentdegradationversusdrain-sourcevoltageatVGS=2.
4V.
71ixFig.
5.
5:(a)gate-draincapacitanceversusgate-drainvoltage,(b)gate-sourcecapacitancevs.
gate-sourcevoltage,and(c)gate-bodycapacitancevs.
gate-bodyvoltagefordifferentstresstimes.
74Fig.
5.
6:Gateresistanceversusgate-drainvoltage.
76Fig.
5.
7:(a)S11,(b)S12,(c)S21,and(d)S22measuredfrom100MHzto20GHzbiasedatVGS=2.
4VandVDS=5V.
Inthoseplotslinewithopencircles:fresh,linewithinverseopentriangles:50%dutycycledynamicstress,linewithxmarks:DCstress.
Thestresstimeis10800s.
79Fig.
5.
8:Cutofffrequencyversusgate-sourcevoltage.
Thedrain-sourcevoltageis5V.
81Fig.
5.
9:Thecomparisonbetweensimulationandmeasurement,Drain-sourcecurrentversusdrain-sourcevoltage,afterstressed.
83Fig.
5.
10:Agatechargetestcircuit.
85Fig.
5.
11:Gate-sourceanddrain-sourcevoltagesversustime86Fig.
5.
12:Enlargedgate-sourcevoltageversustimebeforeandafterstress.
87Fig.
5.
13:Simulatedvoltagewaveformsoftheprimarysideofthetransformer.
(a)Simulationfrom0usto10us;(b)Detailsinthecircleshownin(a)91Fig.
5.
14:Simulatedvoltagewaveformsoftheprimarysideofthetransformer.
(a)Simulationfrom0usto10us;(b)Detailsinthecircleshownin(a)93Fig.
5.
15:Efficiencycurvesstresstimeis300s.
94Fig.
5.
16:(a)Outputpowerversusinputpowerand(b)power-addedefficiencyversusinputpower.
Thestresstimeis10800s.
97Fig.
6.
1:Aproposedcompleteflowtocomputereliabilitycircuitsimulation.
101xLISTOFTABLESTable1:NMOSDCperformance.
13Table2:PMOSDCperformance.
13Table3:ProposedlevelsofpowerMOSFETmodelvalidation.
18Table4:Keytransistorparameterchangessubjecttotwodifferentstressconditions.
.
.
.
.
80Table5:ParametershiftsduetoHCstress.
84xiLISTOFACRONYMSANDABBREVIATIONSACAlternatingCurrentBDBreakdownBPFBandPassFilterBSIMBerkeleyShort-ChannelIGFETModelCHEChannelHotElectronCMOSComplementaryMetalOxideSemiconductorC-VCapacitanceversusVoltageCVSConstantVoltageStressDAHCDrainAvalancheHotCarrierDCDirectCurrentDSBDouble-SideBandDUTDevice-Under-TestEOSElectrostaticDischargeESDElectricalOver-stressFOMFigureofMeritHBDHardBreakdownHCHotCarrierHCIHotCarrierInjectionHFHighFrequencyICIntegratedCircuitIIP3InputThird-OrderInterceptPointxiiIM3Third-OrderIntermodulationDistortionIVCurrentversusVoltageKCLKirchhoff'sCurrentLawKVLKirchhoff'sVoltageLawLCRInductanceCapacitanceResistanceLDLateralDopingDrainLFLowFrequencyMOSFETMetalOxideSemiconductorFieldEffectTransistorNBCombinedNBTIandBreakdownStressNBHCombinedNBTI,Breakdown,andHCStressNBTINegativeBiasTemperatureInstabilityNFNoiseFigureNMOSFETN-typeMOSFieldEffectTransistorNQSNon-Quasi-StaticPAPowerAmplifierPAEPowerAddedEfficiencyPLLPhase-LockedLoopPMOSFETP-typeMOSFieldEffectTransistorRFRadioFrequencySBDSoftBreakdownSGHESecondaryGeneratedHotElectronSHESubstrateHotElectronxiiiSOASafeOperationAreaSOCSystemonChipSOISilicon-on-InsulatorSSSmallSignalTDDBTimeDependentDielectricBreakdownVCOVoltageControlledOscillatorVLSIVery-Large-ScaleIntegrationxiv1CHAPTERONE:INTRODUCTION1.
1MotivationOneofthemainproblemsencounteredwhenscalingdownbeenthehotcarrierinduceddegradationofMOSFETs.
Thisproblemhasbeenstudiedintensivelyduringthepastdecade,underbothstaticanddynamicstressconditions.
Inthisperiodithasevolvedfromamoreorlessacademicresearchtopictooneofthemoststringentconstraintsguaranteeingthelifetimeofsub-microndevices[1].
Newprocessandtechnologyadvancesthedevelopmentofsemiconductorsindustry.
Welldefineddeviceisextensivelyimprovedtomeetthestringentrequirementsofmodernelectronicsmarket.
Reliabilitymodelhasbeenintroducedintothecircuitdesignstageinordertoreducethefinalproductcost.
Therefore,reliabilityresearchcan'tstayattheartificialexperimentsetup.
Therealcircuitoperationenvironmenthastobeconsidered.
Ontheotherhand,notonlyisthedeviceleveldegradationisnecessarytomeetthelifetime,butalsocircuitlevelreliabilitymodelhastobeproducedtocircuitdesignerssothattheycanconsiderthesereliabilityeffectsintheearlystagesofdesigntomakesurethereareenoughmarginsforcircuitstofunctioncorrectlyovertheirentirelifetime.
Withthehelpofpreviouscolleagues'workattheChipDesignandReliabilityLaboratory(CDRL)atUCF[2]-[5],thisresearchfocusesonthesubmicronlateraldopeddrain(LD)MOSFETs,continuestheworkofreliabilitymodelingandcircuitsimulationsinitsflows,offersnewsuggestionstoenhanceHCIcircuitrobustness.
11.
2ResearchGoalsTheresearchpresentedherefocusesonthefollowingissues:1.
Understandingofhotcarrierreliabilitymechanisminthesub-micron0.
25umlateraldopeddrain(LD)MOSFETsunderstaticanddynamicstress2.
DevicemodelingofdegradedLDMOSFETs3.
PerformancedegradationinLDMOSFETstypicalapplicationcircumstancegate-chargetransfercircuitandRFPowerAmplifier1.
3OutlinesInchapter2,acompletedevicemodelingprocessisintroduced.
Anunderstandingofthevoltagestress-inducedreliabilityissue–Hotcarrier,BreakdownandNBTIinMOSFETsispresentedinChapter3,withfocusingonthehotcarriereffectmechanism.
Inchapter4,anaccurateandpracticalparameterextractionisusedtoobtainthemodelparametersofLDMOSFETs,withtheexperimentverification.
Inchapter5,thegatechargetransferperformanceisexaminedtodemonstratethehotcarriereffect,whichisthemostimportantperformancecharacteristicforDC-DCconverterdesign;Thehot-carrierinjectionexperimentinwhichdynamicstresswithdifferentdutycycleispresentedtounderstandthedynamicstressontheLDMOSFETanditseffectonRFcircuit.
Finally,theconclusionismade,andthecompletereliabilitysolution,includingmodelextraction,calibrationtosiliconandfull-chipreliabilitysimulationandanalysis,isproposed.
22CHAPTERTWO:DEVICEMODELINGPROCESS2.
1IntroductionTheuseofprofessionaltoolsisaprerequisitetodevelopaccuratedevicemodels,fromDCtoGHz,includingnoisemodelingandnonlinearHFeffects,withinareasonabletime.
Withtechnologygoingfasterandfastertowardsultra-highfrequencies,circuitdesignscanonlybeaccurateandright-the-first-timeiftheunderlyingdevicemodelsareaccuratelymodeledwithphysicallymeaningfulmodelparameters.
Inordertosuccessfullydesignchipswithhigherintegrationandhighertransmissionspeed,theworkofmodelingengineerstodevelopaccuratedevicemodelsuptotensofGigahertzbecomesmoreandmorechallenging.
Anabsoluteprerequisiteforachievingthisgoalareaccuratemeasurements,checkedfordataconsistency,accurateinstrumentcalibration,andcorrectde-embedding.
Furthermore,today'shigh-frequencycomponentsrequirealotofflexibilityfortheparameterextractionanddevicemodelingprocess[6].
2.
2GeneralProcessAnideaofthegeneraldevicemodelingprocessisdepictedinFig.
2.
1.
3Fig.
2.
1:ThedevicemodelingprocessForagivendevice,anadequatemodelisselectedfirst.
Thiscanbeasinglemodel(likefortransistors),oracomposedsub-circuitconsistingofstandarddevices.
Next,themodelequations,whicharesolvedforthemodelparametersduringmodelparameterextraction,giveaclearindicationaboutwhatkindofmeasurementsandwhattypeofstimulussweepsarerequiredforcharacterization.
Afterallthesemeasurementshavebeenperformed,theparametersoftheselectedmodelarereset.
Thismeans,themodelbecomesaverysimpleone:nobiasdependency,andnofrequencydependency.
Then,duringtheparameterextractionprocess,moreandmoremodelparametersareextracted,andtheselectedmodelwillfitmoreandmorepreciselythemeasureddevice.
Thisextractionprocessisusuallyacombinationofdirectparameterdeterminationoutofthemeasureddata,followedinteractivelybyparameterfine-tuningwithanoptimizer.
4Forageneraltransistormodelingasanexample,themeasurementoftheDCperformancewithrespecttoitsinputandoutputcharacteristicsaswellasitstransferfunctionisdonefirst,followedbytheso-calledCVmodeling,i.
e.
thecharacterizationofthedepletioncapacitancesat1MHz.
Finally,theS-parametersofthetransistoraswellasofthedummydevices(contactpadcapacitancesandinductances)aremeasured.
ThedummydevicesconsistofanOPENdummy(representingthecontactpadsandtheopenconnectionlinestothedevice-under-test(DUT),aSHORT(thedeviceisreplacedbyametalplane,thusshortingbothportstogroundatthelocationofthedevice),andaTHRU(thedeviceisreplacedbyastrip-linebetweenport1andport2ofthenetworkanalyzer).
Afterthede-embeddingprocesshasbeenverified(bymodelingtheTHRUdummydeviceforexample),theS-parametersoftheinnerdevice-under-testarede-embedded(OPENandSHORTdummyde-embedding)andthedevicemodelingcanbeapplied.
ReferringbackagaintoFig.
2.
2,themodelparametersareextractedandfine-tunedforeachsketchedstepbottom-up.
FortheDCcase,itisthenon-linearmodelparameters,fortheCVthejunctioncapacitanceparametersandfortheS-parametersthetransittime,andalsotheparasiticwhichareonlyvisibleatHF(e.
g.
theGateresistanceofaMOStransistor).
5Fig.
2.
2:FromDCtoCVtoS-parametersHowever,weshouldkeepinmindthattheHFapplicationofadeviceisnotnecessarilylinear.
WhileaS-parametermeasurementsbyanetworkanalyzerisusuallyperformedatHF-signallevelsbelow-30dBm(VG)resultsinveryhighelectricfieldsnearthedrain,whichacceleratechannelcarriersintothedrain'sdepletionregion.
StudieshaveshownthattheworsteffectsoccurwhenVD=2VG.
TheaccelerationofthechannelcarrierscausesthemtocollidewithSilatticeatoms,creatingdislodgedelectron-holepairsintheprocess.
Thisphenomenonisknownasimpactionization,withsomeofthedisplacedelectron-hole(e-h)pairsalsogainingenoughenergytoovercometheelectricpotentialbarrierbetweenthesiliconsubstrateandthegateoxide.
Undertheinfluenceofdrain-to-gatefield,hotcarriersthatsurmountthesubstrate-gateoxidebarriergetinjectedintothegateoxidelayerwheretheyare32sometimestrapped.
Thishotcarrierinjectionprocessoccursmainlyinanarrowinjectionzoneatthedrainendofthedevicewherethelateralfieldisatitsmaximum.
HotcarrierscanbetrappedattheSi-SiO2interface(hencereferredtoas'interfacestates')orwithintheoxideitself,formingaspacecharge(volumecharge)thatincreasesovertimeasmorechargesaretrapped.
Thesetrappedchargesshiftsomeofthecharacteristicsofthedevice,suchasitsthresholdvoltage(Vth)anditsconveyedconductance(gm).
Injectedcarriersdonotgettrappedinthegateoxidebecomegatecurrent.
Ontheotherhand,majorityoftheholesfromthee-hpairsgeneratedbyimpactionizationflowbacktothesubstrate,comprisingalarge≈V.
Channelcarriersthattravelfromthesourcetothedrainaresometimesdriventowardsthegateoxideevenbeforetheyreachthedrainbecauseofthehighgatevoltage.
Substratehotelectron(SHE)injectionoccurswhenthesubstratebackbiasisverypositiveorverynegative,i.
e.
,VBportionofthesubstrate'sdriftcurrent.
Excessivesubstratecurrentmaythereforebeanindicationofhotcarrierdegradation.
Ingrosscases,abnormallyhighsubstratecurrentcanupsetthebalanceofcarrierflowandfacilitatelatch-up.
Channelhotelectron(CHE)injectionoccurswhenboththegatevoltageandthedrainvoltagearesignificantlyhigherthanthesourcevoltage,with|VB|>>0.
Underthiscondition,carriersofonetypeinthesubstratearedrivenbythesubstratefieldtowardtheSi-SiO2interface.
Astheymovetowardthesubstrate-oxideinterface,theyfurthergainkineticenergyfromthehighfieldinsurfacedepletionregion.
Theyeventuallyovercomethesurfaceenergybarrierandgetinjectedintothegateoxide,wheresomeofthemaretrapped.
Substratehotelectron(SHE)injectionoccurswhenthesubstratebackbiasisverypositiveorverynegative,Underthiscondition,carriersofonetypeinthesubstratearedrivenbythesubstratefieldtowardtheSi-33SiO2interface.
Astheymovetowardthesubstrate-oxideinterface,theyfurthergainkineticenergyfromthehighfieldinsurfacedepletionregion.
Theyeventuallyovercomethesurfaceenergybarrierandgetinjectedintothegateoxide,wheresomeofthemaretrapped.
Secondarygeneratedhotelectron(SGHE)injectioninvolvesthegenerationofhotcarriersfromimpactionizationinvolvingasecondarycarrierthatwaslikewisecreatedbyanearlierincidentofimpactionization.
ThisoccursunderconditionssimilartoDAHC,i.
e.
,theappliedvoltageatthedrainishighorVD>VG,whichisthedrivingconditionforimpactionization.
Themaindifference,however,istheinfluenceofthesubstrate'sbackbiasinthehotcarriergeneration.
Thesebackbiasresultsinafieldthattendstodrivethehotcarriersgeneratedbythesecondarycarrierstowardthesurfaceregion,wheretheyfurthergainkineticenergytoovercomethesurfaceenergybarrier.
Hotcarriereffectsarebroughtaboutoraggravatedbyreductionsindevicedimensionswithoutcorrespondingreductionsinoperatingvoltages,resultinginhigherelectricfieldsinternaltothedevice.
Problemsduetohotcarrierinjectionthereforeconstituteamajorobstacletowardshighercircuitdensities.
Recentstudieshaveevenshownthatvoltagereductionalonewillnoteliminatehotcarriereffects,whichwereobservedtomanifestevenatreduceddrainvoltages,e.
g.
,1.
8V.
Thus,optimumdesignofdevicestominimize,ifnotprevent,hotcarriereffectsisthebestsolutionforhotcarrierproblems.
Commondesigntechniquesforpreventinghotcarriereffectsinclude:1)increaseinchannellengths;2)n+/n-doublediffusionofsourcesanddrains;3)useofgradeddrainjunctions;4)introductionofself-alignedn-regionsbetweenthechannelandthen+junctionstocreateanoffsetgate;and5)useofburiedp+channels.
Hotcarrierphenomenaareacceleratedbylowtemperature,mainlybecausethisconditionreduceschargedetrapping.
34Fig.
3.
2:MechanismsofHotCarrierEffects.
(a)DAHCinjectioninvolvesimpactionizationofcarriersnearthedrainarea;(b)CHEinjectioninvolvespropellingofcarriersinthechanneltowardtheoxideevenbeforetheyreachthedrainarea;(c)SHEinjectioninvolvestrappingofcarriersfromthesubstrate;(d)SGHEinjectioninvolveshotcarriersgeneratedbysecondarycarriers353.
2HotCarrierInjectionofLDMOSFETsHerewegiveourpresentunderstandingofthehotcarrierdegradationproblem.
Themechanismthatisthebasisofthehotcarrierdegradationishotelectroninjection.
Theidealtooltostudythephenomenaistheuniformhotelectroninjectiontechnique.
InthetechniquetheLDMOSFETsarestressedunderartificialconditions,butthefieldandeffluenceconditionscanstudythedegradationofdevicesatroomtemperatureinordertogainabetterinsightintheinterfacedegradationmechanismsunderbothhotholeandhotelectroninjection.
Thisisthesubjectofthefirstpartofthepaper.
Inthesecondpartofthepaper,thedegradationofLDMOSFETsunderthemorerealisticconditionsofchannelhotcarrierinjectionisreviewed.
Thedifferentdegradationmechanismsunderstaticstressconditionsareintroduced,lifetimedeterminationmethodsarcbrieflydescribedandsomeimportantprocess-relatedfactorsandeffectswillbehighlighted.
Goingtoevenmorerealisticconditions,thedegradationunderdynamicstressconditionsisdescribed,emphasizingtheinfluenceofthemeasurementset-up,thecomparisonwithstaticstress.
Thestrategyforimprovinghotcarrierreliabilityandaforecastofthehotcarrierreliabilityproblemissummarizedinthefinalpart.
Theexperimentalset-upandaschematicbanddiagram,illustratingthesubstratehotelectroninjectiontechnique,areshowninFig.
3.
3.
[1].
ThegateoftheMOSFETisbiasedatacertainvoltage;sourceanddrainaregrounded,whilethewellisheldatahighreversevoltage.
Minoritycarriers(electrons)areinjectedintothewellfromtheunderlyingsubstratebyforward-biasingthewell-substratejunctiondiode.
Mostoftheinjectedelectronswillbeheatedinandgainahighenergy.
IftheirenergyishigherthantheSi-SiO2energybarrier,theyhaveahigh36probabilityofbeinginjectedintotheoxide.
Theoxidefieldofinjectionisdeterminedbythegate-to-sourcedrainvoltage;thesiliconfield,andthustheenergyoftheinjectedcarriers,isdeterminedbythewell-to-source/drainvoltageandthesubstratedoping,andtheinjectedcurrentcanbecontrolledbytheforwardcurrentfromthewell-substratediode.
Therefore,allimportantparametersthatcaninfluencethedegradationcanbecontrolledseparately.
Fig.
3.
3:BanddiagramandexperimentsetupforsubstratehotelectroninjectioninannMOSFETFirstofallitisimportanttounderstandthedifferentdegradationmechanismsthatplayaroleundervariousstressconditionsandfordifferenttransistortypes.
Next,amethodforthelifetimedeterminationandextrapolationtowardsnormaloperatingconditionshastobeestablished.
Finally,anumberofprocessingrelatedfactorsthatcaninfluencethedegradationandthehotcarrierlifetimewillbediscussed.
371)Degradationmechanisms.
Thehotcarrierdegradationmechanismsunderstaticconditionshavebeenextensivelystudiedduringthelastdecade,andthereexistsmoreorlessaconsensusonaconsistentpictureofthedegradationmechanismsforbothn-typeandp-typeMOSFETs.
Afulldescriptionfallsbeyondthescopeofthispaper,butcanbefoundin[29]–[31].
ThemaindifferencewithLDn-MOSdevicesisthatforthistypeofMOSFETthemaximumcurrentdegradationisdominatedbyaseriesresistanceincreaseofthen-region,duetoelectrontrappinginthespacerabovethisregion[1].
2)Lifetimedetermination.
Asforallreliabilityfailuremechanisms,itisimportanttobeabletopredictthelifetimeofacomponentordeviceunderoperatingconditions.
Suchlifetimemethodsarealwaysbasedonexperimentsinwhichthefailuremechanismisaccelerated,eitherbytemperatureorbyhighvoltagesorhighcurrents.
Duringtheexperimentadegradationparameterrelevantforthedamageismonitored,andthelifetimeisdefinedasthetimetakentoreachacertainshiftinthisdegradationmonitor.
Forthehotcarrierdegradationmechanism,severalacceleratedlifetimedeterminationmethodshavebeenproposedinthepast.
Theyare,however,allbasedonaccelerationofthedegradationbyincreased(drain)voltages,sincehotcarrierdegradationisoneofthefewmechanismsthatisnotacceleratedbyanincreaseofthetemperature[32].
Mostacceleratedlifetimedeterminationmethodsarebasedontheluckyelectronmodel[33].
,1()exp()itenditemINtctWqEφλΔ=(19)38wherewisthewidthofthedevice,Φit,eistheenergyanelectronmustpossessinordertocreateaninterfacetrapandλeisthehotelectronmeanfreepath.
AmeasurefortheelectricalfieldEmisthemultiplicationfactorM=Isub/Id,givenby:12exp()subdMIMcIqeφλ==(20)Ifoneplotsthelifetimeasafunctionofthemultificationfactoronadoublelogarithmicscale,accordingto(13)oneobtainsastraightlinewithslopem,wheremisanindicationoftheenergyoftheelectronsthatarecausingthedamage.
,3ieimdsubdIIccWIφφτ3M==(21)Inasimplifiedformof(2.
1)thelifetimeisrelatedtothedrainvoltage,andthusthepowersupplyvoltage,as4exp()dBcVτ=(22)Plotthelogarithmofthelifetimeτasafunctionof1/Vdyieldsagainastraightline.
Thelattermethodhastheadvantagethatthelifetimecanbedirectlyrelatedtothepowersupplyvoltage,butitisonlyvalidinanarrowrangeofgatevoltages,nearthemaximumofthesubstratecurrent.
Formonitoringthedegradation,severalparametershavebeenusedelectricalparameters,likeΔVt/Vt,Δgm/gmandΔId/Id,whichmeasurethechangeoftheelectricalcharacteristics,aswellasmorephysicalparameters,likethechargepumpingcurrent,whichismoreameasureoftherealdamageoftheinterface[30,34].
Theshiftoftheelectricalparametersisdeterminedbothby39theHot-carrierdegradationinsub-filmMOSFETsamountofdamageitselfandbytheinfluenceofthedamageontheelectricalcharacteristics.
3)InfluenceofprocessingWhenunderstandingthedegradationmechanismsforthetypeofMOSFETsandhavingatone'sdisposalthemethodsandmodelsforthedeterminationofthehotcarrierlifetime,itisimportanttounderstandtheprocessingfactorsandtheparametersthataffectthehotcarrierresistanceofthedevices.
Inthisrespect,threeparametersareofmajorimportance[1]:(i)Theamountofhotcarriergenerationandinjectioninthechannel(ii)Theamountofphysicaldamage,generatedbytheinjectedhotcarriers(iii)TheinfluencethisdamagehasontheelectricalcharacteristicsoftheMOSFETAllprocessingfactorsthatcaninfluencethehotcarrierresistancehaveanimpactononeofthesethreeparameters.
Indigitalcircuits,thedevicesareseldomstressedunderstaticconditions.
Althoughthestaticdegradationconditions,treatedintheprevioussectionarealreadymorerealistic,theyarestillnotrelevantforthewaveformsthedevicesseeinrealoperation.
Therefore,itismandatorytostudythedegradationofthedevicesunderthemostrealistic,i.
e.
dynamic,conditionsandtoknowwhicheffectshavetobetakenintoaccountinordertoextrapolatetheresultsdeducedunderstaticstressconditionsinareliableway.
40(a)(b)Fig.
3.
4:(a)ΔVthversusfrequencyforn-LDMOSFETwith0.
24umchannellengthstressedatVd=9.
5V,stresstime=10800s.
(b)Δgm41Takingintoaccounttheinfluenceoftheseimperfectionsofthemeasurementsetup,arenewedstudyofhotcarrierinduceddynamicdegradationeffectshasbeencarriedout,showingthatforallstudiedcasesthedegradationbehavesquasi-statically.
Atypicalmeasurementthatisusedtoverifythequasi-staticnatureofthedegradationbehavior,andthatisverysensitivetonon-quasi-staticeffectsoccurringduringtheedgesofthegatevoltagepulse,istheconstantpulseshapeexperimentinwhichtheriseandfalltimesareaconstantportionoftheperiodofgatevoltagepulse.
Thismeansthatwhenthefrequencyisincreased,riseandfalltimesaredecreased.
ThisisillustratedinFig.
3.
4wherethelifetimecurve(fullline)isextrapolatedbasedonstaticstressexperimentsandcomparedwithresultsofdynamicstressconditions.
42Fig.
3.
5:Lifetime(ΔVth=10%)asafunctionof1/Vd,ClosecirclesareDClifetimemeasurement,Opencircleisforthedynamicdegradationexperiments.
Oneofthekeyfactorsforimprovingthehotcarrierreliabilityisthedrainengineering,whichdeterminestheamountofhotcarriergenerationforagivensupplyvoltageandtheinfluenceofacertainphysicaldamageontheelectricalcharacteristics,theotheristheoxidequality,whichdeterminestheamountofphysicaldamageforagivenhotcarrierinjectioneffluence.
Inordertoreducetheselateralelectricfieldsforagivensupplyvoltageanddimension,lightlydopeddrain(LD)structureshavebeenusedsuccessfullyforthe1.
2umdownto0.
7umgenerationsfora5Vsupplyvoltage[35].
Inthesedevicesthepeakofthelateralfieldisloweredbyreducingthedopingconcentrationnearthedrainandbyprovidingasmoothjunction43transitioninsteadofanabruptone.
Byself-alignedprocessing,then-regionislocatedunderneathaspaceroxideandconnectsthechanneltothehighlydopedjunction.
BecausethegatehasonlylimitedcontrolovertheunderlyingLDregion,thechannelcurrentisindeedextremelysensitivetothebuild-upofnegativechargeinthespaceroxide.
ThedegradationbehavioroftheseLDdevicesisthereforequitedifferentfromthatintheconventionaltransistorsandischaracterizedbyaseriousincreasewithtimeoftheseriesresistanceandacorrespondingdecreaseofthechannelcurrent.
Severaladvanceddrain-engineeredstructureshavethereforebeenproposedwhichattempttoovercomethemajordrawbacksoftheLDapproach,beingthereducedcurrentdriveduetothen+-gateoffsetandthespacer-induceddegradation[36]–[39].
Besidesthesuppressionofhotcarriergenerationbyalternativedrainengineeringtechniques,itisequallyimportanttominimizethedamageintheoxideforagivenhotcarrierinjectioneffluence.
Inthepastyears,alotofattentionhasbeenpaidtotheuseofnitridedoxidesand/oroxynitridesforimproveddielectricreliability[40]–[44].
Suchsiliconoxynitridedielectricsarecomposedprimarilyofsilicondioxide,butwithasmallfractionofnitrogenbuild-upattheinterface.
Therearedifferentapproachesforobtainingsuchnitridedoxides.
Intheso-calledROXNOXprocess(re-oxidizednitridedoxide),thenitridationconsistsfirstofanoxidationin02,followedbyanitridationstepinNH3,andfinallyareoxidationagainin02[41].
Inanotherapproach,N2Oisusedasthenitridationgas.
Inthisapproach,thenitridationcanbedonebygrowingtheoxideinpure02,followedbyanitridationstepinN2O,orthedielectriccanbedirectlygrowninN2Oambient[42].
44Concerningtheinfluenceofthenitridationonthechargetrappingandinterfacetrapgeneration,thepictureisrathercomplicated.
Firstofall,interfacetrapgenerationisfoundtobesuppressedbythenitridation.
Thisisattributedtothepresenceofnitrogenatthesilicon-oxideinterface,whichreducesthenumberofstrainedSi-4bondsattheinterface,whichnormallyactasinterfacetrapprecursors.
Dielectricswithhighernitrogencontentarethereforemoreeffectiveinthesuppressionoftheinterfacetrapgeneration.
Inall,hotcarrierinjectiondescribesthephenomenabywhichcarriersgainsufficientenergytobeinjectedintothegateoxide.
ThisoccursascarriersmovealongthechannelofMOSFETandexperienceimpactionizationnearthedrainendofthedevice.
Thedamagecanoccurattheinterface,withintheoxideand/orwithinthesidewallspacer.
Interface-stategenerationandchargetrappinginducedbythismechanismresultintransistorparameterdegradation,typicallyasswitchingfrequencydegradationratherthana"hard'functionalfailure.
IthasbeendemonstratedthatthehotcarrierreliabilityproblemhasevolvedfromamoreorlessacademictopictowardsarealbottlenecktothefurtherscalingdownofMOSFETtechnologies.
Themaindegradationmechanismshavebeenreviewed,underuniformandnon-uniformstaticanddynamicconditions;someimportantprocessing-relatedeffectshavebeenillustrated,andthestrategiesfortheimprovementofthehotcarrierlifetimehavebeenbrieflydiscussed.
HerearesomeconstraintsandlimitationsaboutHCIeffectdiscussed[63]–[70]:HCI-inducedtransistordegradationiswellmodeledbypeaksubstrate-currentforthen-channelsandpeakgatecurrentforthep-channels,atleastfortransistorsat>0.
25μm.
45Forsub-0.
25μmP-channel,thedrivecurrenttendstodecreaselikeNMOSafterhotcarrierstress.
Forsub-0.
25μmP-channel,worstcaselifetimeoccursatmaximumsubstratecurrentstress.
TheTFmodelisthesameasN-channel.
Thedrive-currentsforthen-channeltransistorstendtodecreaseafterHCIstressing,thep-channeldrivecurrenttendstodecrease.
Theoff-stateleakagecanincreasedramatically[70],especiallyforinitiallyhighcurrent-drivep-channels.
HCI-inducedtransistordegradationmodelingseemstobeaccurate,buttheextrapolationfromtransistordegradationtocircuit-leveldegradationisuncertainandshouldbethefocusoffutureresearchefforts.
ThereisgrowingevidencethatHCIphysicsmaybestartingtochangeat0.
25μmandsmaller,leadingchangingworst-casestressconditions[67].
Precisevoltagemodels(ratherthansubstratecurrentorgatecurrent)wouldbeveryuseful.
HCIevaluationsarealmostalwaysperformedonteststructuresratherthanproductsanddoneunderdcconditions,thusthecalculatedlifetimeshouldbeconsideredaFigureofMeritforprocesscomparison.
Ashort"lifetime"observedwithdcteststructuresdoesNOTimplyunacceptableproductperformanceunderacconditions.
Typically,HCIdegradationcausesreducedcircuitspeedratherthancatastrophicfailure;althoughclearlyalargeenoughspeedreductioncancausedevicefailure.
46Forproductswherethesubstrateorgatecurrentisunknown,largevoltageaccelerationispossiblebecausegateandsubstratecurrentareexponentialtothereciprocalgateoxideelectricfield.
TherehavebeenreportsthatthetemperaturedependentofsubstratecurrenthaspositiveactivationenergywhenVddislowerthan2.
5V.
ThetemperaturedependentmodelforlowerVddisstillunderinvestigation.
Also,themodelswhichdescribethedegradationinducedbyHCIaresummarizedas:npAtΔ=(23)where,pistheparameterofinterest(Vt,gm,Idsat,etc.
),A=materialdependentparameter,t=time,n=empiricallydeterminedexponentwhichisafunctionofstressingvoltage,temperatureandeffectivetransistorchannellength.
N-channelModelN-channeldevicesuseanEyringmodel(whichmakesthepracticalassumptionofmathematicallyseparableandindependentvariables):(24)()exp(/NsubaTFBIEkT=)where:B=arbitraryscalefactor(functionofproprietaryfactorslikedopingprofile,sidewallspacing,dimensions,etc.
)Isub=peaksubstratecurrentduringstressingN=2to4,typically347Ea=-0.
1eVto-0.
2eVP-channelModel(25)()exp(/)MgateaTFBIEkT=where:B=arbitraryscalefactor(functionofproprietaryfactors,suchasdopingprofiles,sidewallspacingdimensions,etc.
)Igate=peakgatecurrentduringstressing.
M=2to4Ea=-0.
1eVto-0.
2eVA"roughrule-of-thumb",forthesubstratecurrentversusvoltagedependenceofP-channeldevicesispeaksubstratecurrentdoublesforeach0.
5Vincreaseinsource-drainvoltage(Vds).
484CHAPTERFOUR:CIRCUITDESIGNANDPERFORMANCEANALYSIS4.
1IntroductionDCtoDCconvertersareimportantinportableelectronicdevicessuchascellularphonesandlaptopcomputers,whicharesuppliedwithpowerfrombatteries.
Suchelectronicdevicesoftencontainseveralsub-circuitswitheachsub-circuitrequiringauniquevoltageleveldifferentthanthatsuppliedbythebattery(sometimeshigherorlowerthanthebatteryvoltage,andpossiblyevennegativevoltage).
Additionally,thebatteryvoltagedeclinesasitsstoredpowerisdrained.
DCtoDCconvertersofferamethodofgeneratingmultiplecontrolledvoltagesfromasinglevariablebatteryvoltage,therebysavingspaceinsteadofusingmultiplebatteriestosupplydifferentpartsofthedevice.
Poweramplifiers,alsoknownasPAs,areusedinthetransmitsideofRFcircuits,typicallytodriveantennas.
Poweramplifierstypicallytradeoffefficiencyandlinearity,andthistradeoffisveryimportantinafullymonolithicimplementation.
Higherefficiencyleadstoextendedbatterylife,andthisisespeciallyimportantintherealizationofsmall,portableproducts.
Therearesomeadditionalchallengesspecificallyrelatedtobeingfullyintegrated.
Integratedcircuitstypicallyhavealimitedpowersupplyvoltagetoavoidbreakdown,aswellasametalmigrationlimitforcurrent.
Thus,simplyachievingthedesiredoutputpowercanbeachallenge.
Poweramplifiersdissipatepowerandgenerateheat,whichhastoberemoved.
Duetothesmallsizeofintegratedcircuits,thisisachallengingexerciseindesignandpackaging.
49Severalrecentoverviewpresentationshavehighlightedthespecialproblemswithachievinghighefficiencyandlinearityinfullyintegratedpoweramplifiers.
4.
2CircuitDesign4.
2.
1DC-DCConverterSwitchingbehaviorofpowerMOSFETsinpracticalapplicationcircuitsandshowsthereader/designerhowtochoosetherightdevicefortheapplicationusingthespecificationstypicallyprovidedonmanufacturerdatasheets.
ThearticlegoesthroughseveralmethodsofassessingtheswitchingperformanceofpowerMOSFETsandcomparestheseagainstpracticalresults.
ThecomparisonshowsthatdatasheetvaluescanbeusedtoobtainareasonableindicationoftheswitchingperformanceofaMOSFETaswellasitsswitchinglosses,butcalculatedswitchingtransientswillalwaysbeshorterthanthoseactuallyachieved.
Therefore,maximumparametersfromthedatasheetshouldalwaysbeusedtogiverealisticresults[71].
TogetafundamentalunderstandingoftheswitchingbehaviorofaMOSFET,itisbestfirsttoconsiderthedeviceinisolationandwithoutanyexternalinfluences.
Undertheseconditions,anequivalentcircuitoftheMOSFETgateisillustratedinFig.
4.
1,wherethegateconsistsofaninternalgateresistance(Rg),andtwoinputcapacitors,(CgsandCgd).
Withthissimpleequivalentcircuititispossibletoobtaintheoutputvoltageresponseforastepgatevoltage.
ThevoltageVgsistheactualvoltageatthegateofthedevice,anditisthispointthatshouldbeconsideredwhenanalyzingtheswitchingbehaviorofthedevice.
IfastepinputisappliedatVgs_app,thenthefollowingholdstrue:50_gsappgsggVViR=(26)ggsgdiii=+(27)gsgsgsdViCdt=(28)andsinceVDSisfixedgsgdgddViCdt=(29)therefore:_gsappgsgsgsgsgdgVVdVVCCRdtdt=+(30)and_()gsgsappgsgsgdgdVdtVVCC=+R(31)giving_ln()()gsappgsgsgdgtVVCCR=+k+(32)()'_gsgdgtCCRgsgsappVVke+=(33)51whent=0,Vgs=0,therefore()_(1)gsgdgtCCRgsgsappVVe+=(34)Thisgivesanindicationofhowlongtheactualgatevoltage(Vgs)takestogettothethresholdvoltage.
Fig.
4.
1:AnequivalentMOSFETgatecircuitshowingjustCgs,CgdandRgWhentheMOSFETisconsideredwithadditionalparasites,itbecomesincreasinglydifficulttomanipulatetheseequationsmanuallyforsuchapracticalcircuit.
Ifthesesecond-order,orparasitic,componentsareignored,thenitispossibletocomeupwithformulasfortheturn-onandturn-offtimeperiodsoftheMOSFET.
ThesearegiveninEquations10throughto15andtheresultingwaveformsareshowninFig.
4.
2andFig.
4.
3.
Theseequationsarebasedonthosedevelopedby[72],whereRgistheinternalgateresistance,Rg_appistheexternalgateresistance,VtistheMOSFETthresholdvoltage,andVGpisthegateplateauvoltage.
521__1()()ln(1ggappgsgdth)gsapptRRCCVV=++(35)2__1()()ln(1ggappgsgdgp)gsapptRRCCVV=++(36)_3_()()gsfggappgdgsappgpVVRRCtVV+=(37)VFisthevoltageacrosstheMOSFETwhenconductingfullloadcurrentandVDSisthevoltageacrosstheMOSFETwhenitisoff.
Thisgivesanaccuratet1andt2whenusingdatasheetvalues,butthetimeperiodt3isdifficulttocalculatesinceCgdchangeswithVDS.
Fig.
4.
2:Turn-ontransientoftheMOSFET53Usingthesameprinciplesforturn-off,theformulasfortheswitchingtransientsaregivenbelow:_4_()()ln()gsappggappgdgsgpVtRRCCV=++(38)5_()(dsFggappgdgpVVtRRCV)=+(39)6_gpggappgdgstVtRRCCV=++(40)Inthisinstance,t4andt6canbecalculatedaccurately,butitistheformulafort5whichismoredifficulttosolve,sinceduringthistimeperiodVDSwillchange,causingCgstoalsochange.
Thereforesomemethodisrequiredtocalculatet3andt5withoutusingthedynamicCgd.
Fig.
4.
3:Turn-offtransientoftheMOSFETLookingatthegatechargewaveform[2]inFig.
4.
4,QgsisdefinedasthechargefromtheorigintothestartoftheMillerPlateau(VGP);QgdisdefinedasthechargefromVGPtotheendof54theplateau;andQgisdefinedasthechargefromtheorigintothepointonthecurveatwhichthedrivingvoltageVGSequalstheactualgatevoltageofthedevice.
55Fig.
4.
4:SketchshowingbreakdownofgatechargeTheriseinVGSduringt2(Fig.
4.
4)isbroughtaboutbychargingCgsandCgd.
DuringthistimeVDSdoesnotchangeandassuchCgdandCdsstayrelativelyconstant,sincetheyvaryasafunctionofVDS.
AtthistimeCgsisgenerallylargerthanCgdandthereforethemajorityofdrivecurrentflowsintoCgsratherthanintoCgd.
Thiscurrent,throughCgdandCds,dependsonthetimederivativeoftheproductofthecapacitanceanditsvoltage.
ThegatechargecanthereforebeassumedtobeQgs.
ThenextpartofthewaveformistheMillerPlateau.
Itisgenerallyacceptedthatthepointatwhichthegatechargefiguregoesintotheplateauregioncoincideswiththepeakvalueofthepeakcurrent.
However,thekneeinthegatechargeactuallydependsontheproduct(CgdVGD)withrespecttotime.
Thismeansifthereisasmallvalueofdraincurrentandlargevalueofoutputimpedance,thenIDScanactuallyreachitsmaximumvalueaftertheleftkneeoccurs.
However,itcanbeassumedthatthemaximumvalueofthecurrentwillbeclosetothisknee56pointandthroughoutthisapplicationnoteitisassumedthatthegatevoltageatthekneepointcorrespondstotheloadcurrent,IDS.
TheslopeoftheMillerPlateauisgenerallyshowntohaveazero,oranear-zeroslope,butthisgradientdependsonthedivisionofdrivecurrentbetweenCgdandCgs.
Iftheslopeisnon-zerothensomeofthedrivecurrentisflowingintoCgs.
IftheslopeiszerothenallthedrivecurrentisflowingintoCgd.
ThishappensiftheCgdVGDproductincreasesveryquicklyandallthedrivecurrentisbeingusedtoaccommodatethechangeinvoltageacrossCgd.
Assuch,QgdisthechargeinjectedintothegateduringthetimethedeviceisintheMillerPlateau.
Itshouldbenotedthatoncetheplateauisfinished(whenVDSreachesitson-statevalue),CgdbecomesconstantagainandthebulkofthecurrentflowsintoCgsagain.
Thegradientisnotassteepasitwasinthefirstperiod(t2),becauseCgdismuchlargerandcloserinmagnitudetothatofCgs.
Fig.
4.
4:CombinationofgatechargeandcapacitancetoobtainswitchingtimesTheobjectiveofthisnoteistousedatasheetvaluestopredicttheswitchingtimesoftheMOSFETandhenceallowtheestimationofswitchinglosses.
Sinceitisthetimefromtheendoft1totheendoft3thatcausestheturn-onloss,itisnecessarytoobtainthistime(Fig.
4.
2).
57Combining(35)and(36)itispossibletoobtaintherisetimeofthecurrent(tir=t2-t1)andbecauseVDSstaysconstantduringthistimethenitispossibletousethespecifieddatasheetvalueofCissattheappropriateVDSvalue.
Assumingthetransfercharacteristicisconstant,thenVGPcanbesubstitutedforVth+IDS/gfs,hence:_@__()()ln(()dsfsgsappthVirggappiss)fsGSapptDSgVVtRRCgVVI=+(41)____()(()((_)))gddDSFggappvfdsDSDFDgsappthfsQVVRRtIVVVVg+=+(42)ItisdifficulttouseavalueofCgdforthefalltimeperiodofVDS(tvf=t3).
Thereforeifthedatasheetvalueofgatechargeisused(Qgd_d)anddividedbythevoltageswingseenonthedrainconnection(VDS_DminusVF_D)thenthiseffectivelygivesavalueforCgdbasedonthedatasheettransient.
Similarlyfortheturn-offtransition,thevoltagerisetime(tvr=t5)is:___()(()()_)gddDSFggappvrdsDSDFDtfsQVVRRtIVVVg+=+(43)andthecurrentfalltime(tif=t6)is:@_()()()ln(dsdstfsVtfggappisstIVgtRRCV+=+)t(44)Thedefinitionoftheturn-onandturn-offtimesgiveninthedatasheetcanbeseeninFig.
4.
5.
Thesedefinitionscanbeequatedtotheequationsdescribedaboveandareshownhere:()1donirtt≈+(45)58rvttf≈(46)()4dofftt≈(47)fvrtt≈(48)Fig.
4.
5:Sketchshowingdefinitionofturn-onandturn-offtimesTheminimumswitchingtransientswerecalculatedusingtheappropriatevalueoftheparameters,whichresultedinproducingtheshortestswitchingtransientvalue.
Insomecircumstancesthismeantthatthemaximumvalueofaparameterwasusedtocalculatetheminimumswitchingtransientandviceversaforthemaximumswitchingtransients.
TheriseandfalltimesforpowerMOSFETscanbeapproximatedwithrelativeeasewhenevaluatedinisolation.
Bypluggingindatasheetvaluesintotheformulasderivedabove,wecangetareasonableindicationoftheswitchingperformanceoftheMOSFETaswellastheswitchinglosses.
However,sincesecondorderparasiticisnotincludedtheanalyticalequations59willalwaysbeshorterthanthoseactuallyachieved.
Hencethemaximumparametersfromthedatasheetshouldalwaysbeusedtogiverealisticresults.
AfullbridgeDC-DCconvertergivenin[74,75]wasestablishedinCadencewiththeextractedmodelsfromthetestdevice,asshowninFig.
4.
4.
Fig.
4.
6:AsimplifiedschematicofthefullbridgeDC-DCconverter604.
2.
2PowerAmplifierRFLDMOSbecomesincreasinglyimportantinwirelesscommunicationapplications.
LDMOSusedinRFpoweramplifiershashighvoltageingateanddrainsimultaneously.
Thesimplifiedschematicofpoweramplifierunderstudy[76]isshowninFig.
4.
7.
Thesupplyvoltageis3.
3Vandthegatebiasis1.
5V.
Itisoperatedinclass-Cmode.
Thepowersupplyisgivenby(sincos)ccccccVIPθθθπ=(49)Efficiencyforthismaximumpossiblevoltageswingisgivenbymax2sin24(sincos)θθηθθθ=(50)TheactualoutputpowerforanoutputpeakvoltageofVopcanbefoundasafunctionofθ.
61Fig.
4.
7:Aschematicofaclass-Cpoweramplifier625CHAPTER5:DEGRADATIONSUBJECTTOSTRESSSmartpowermanagementapplicationsoftenrequirehighcurrentpowerdevices.
Thesetechnologiescombinebipolar,CMOS,andpowerDMOSonasinglechip.
Then-channellateraldouble-diffusedMOS(orLDMOS)isacommonchoiceforthetransistordriver.
Inaddition,RFLDMOSbecomesincreasinglyimportantinwirelesscommunicationapplications.
Withcontinuousscalingofdevicedimensions,MOStransistorsaremorevulnerabletohighfieldphenomenonsuchashot-electroneffect.
Itisknownthathot-electroninducesMOSLDMOSdevice/circuitdegradations[77]–[83].
LDMOSusedinRFpoweramplifiershashighvoltageingateanddrainsimultaneously.
Thepowerdeviceisforcedtooperateathighelectricfieldandwhilecarryinghighcurrent,sufferingfromacriticalhot-carrierattack.
Recently,Moensetal[84]–[85]explainedtwodifferentandcompetingmechanismsinLDMOShotcarrierbehavior.
Thechannelmobilitydegradationleadstoanincreaseinon-resistanceuponstressingandthehotholeinjectionandtrappingintheaccumulationregiondecreasetheon-resistance.
Brisbinetal[86]discussedlayoutoptimizationofLDMOSarraytoimprovethehotcarrierreliability.
Manzini[87]evaluatedhotcarrierdegradationofn-channelLDMOSforvariousgatelengthsandoxidethicknesses.
Gajadharsing[88]presentedanLDMOStransistorwithimproveddistortioncharacteristicsutilizingadistributedthresholdvoltageconcept.
Smartpowermanagementapplicationscombinebipolar,CMOS,andpowerDMOSonasinglechip.
Then-channellateraldouble-diffusedMOS(LDMOS)isacommonchoiceforthetransistordriver.
Inaddition,RFLDMOSbecomesincreasinglyimportantinwirelesscommunicationapplications.
LDMOSusedinRFpoweramplifiershashighvoltageingateand63drainsimultaneously.
Thepowerdeviceisforcedtooperateathighelectricfieldwhilecarryinghighcurrent,sufferingfromacriticalhot-carrier(HC)attack.
Hot-carrierdegradationssubjecttodynamic(orAC)stresswaveformswerecomparedwiththestaticstresscondition.
Previouspublicationsfocusedonmodeling[89]–[91],physicalmechanism[92]–[95],anddevicedamage[96]–[98].
Withthecompetingdegradationmechanismsinvolvedindeep-submicrometerMOStransistors,theDCevaluationbecomesinaccuratetoestimatetheHCcircuitdegradation.
Dynamicstressconditioncorrelatingtotherealcircuitoperationisrequiredtoinsurethehot-carriercircuitreliabilityinameaningfulway[99]–[102].
Inthiswork,weexaminethethresholdvoltage,transconductance,on-resistance,gatecapacitances,andgatechargeofthen-channelLDMOStransistorsubjecttohotelectronstress.
Transistormodelparametersbeforeandafterstressareextracted.
Thestresseffectonthegatechargeenergyisevaluatedviasimulation.
WestudytheLDMOStransistorhotcarriereffectsubjecttodynamicstressfordifferentdutycycles.
Thehighfrequencyequivalentcircuitmodelisintroduced.
Themodelingresultsareverifiedbyexperimentaldata.
RFcharacteristicssuchass-parametersareexaminedviameasurementandsimulation.
5.
1DeviceDegradation5.
1.
1DCThetransconductancegmrepresentsthesensitivityofdraincurrentwithrespecttogate-sourcebias.
Thethresholdvoltageisdefinedastheminimumgatebiasrequiredturningonthe64conductionchannelbetweenthesourceanddrain.
Fig.
5.
1showsthatthetransconductanceandthresholdvoltageasafunctionofstresstime.
Thetransconductancedecreasesandthethresholdvoltageincreasesafterstress.
Theon-resistanceisanimportantparameterfordeterminingtheswitchingpowerloss.
Theon-resistanceincludesthesourcediffusionresistance,channelresistance,anddriftregionresistance.
FromFig.
5.
2,Ronincreasesabout5%after5.
5hoursofstress.
Fig.
5.
3displaysthenormalizeddegradationofRonversusnormalizedVthdegradation.
ΔRon/RonexhibitsalinearrelationshipwithrespecttoΔVth/VthatlowthresholdvoltagedegradationandthensaturateswhenΔVth/Vthisgreaterthan6%.
050001000015000200000.
5150.
5200.
5250.
5300.
5350.
5400.
545Transconductance(x10-4S)ThresholdVotlage(V)StressTime(s)1.
6001.
6251.
6501.
6751.
7001.
7251.
7501.
7751.
800Fig.
5.
1:Transconductanceandthresholdvoltageasafunctionofstresstime65102103104012345ΔRdson/Rdson(%)StressTime(s)Fig.
5.
2:Normalizedon-resistancechangeasafunctionofstresstime66024681012012345ΔRdson/Rdson(%)ΔVth/Vth(%)Fig.
5.
3:Normalizedon-resistancedegradationversusnormalizedthresholdvoltagedegradation67Inthemeantime,thedynamicstressisappliedintoourexperiment.
Theon-waferLDMOStransistorsaretestedinaCascade12000Probestation.
Agilent4156isusedtosetthehot-electronstressalso.
Apulsegeneratorgeneratessquarewaveformswithadjustablefrequency,amplitude,anddutycycle.
Anoscilloscopeobservesthewaveformsproducedbythefunctiongenerator.
Therearetwostressconditions,namely,1)constantgate-sourcevoltageVGSandconstantgate-drainvoltageVGD(DCstress)and2)constantgate-sourcevoltageandpulsedgate-drainvoltage(dynamicstress).
InthisworktheDCstressisatVGS=3VandVGD=11.
5Vandthedynamicstressispulsedat100MHz.
Thepulsedstressconditionintendstomimicthecircuitoperatingcondition.
Fig.
5.
4(a)and(b)showthenormalizedtransconductancegmandthresholdvoltageVthdegradationsversusdutycyclefordifferentstressconditions.
Thestressexperimentwasstoppedat3600secondsand10800secondsinordertomeasuregm,Vth,andIddata.
BothΔgm/gmandΔVth/Vthincreasewithdutycyclebecauseofmorestresstimeforagivenperiodathighdutycycle.
Forexample,changes1.
5%after10800sofdynamicstressat25%dutycycle,and7.
45%after10800sofDCstress(dutycycleis100%).
Thethresholdvoltagebeforestresswas0.
52V.
ThenormalizedIthVdshiftasafunctionofdrain-sourcevoltageisplottedinFig.
5.
4(c).
ΔId/Iddecreasewithdrain-sourcevoltagebecausethedraincurrentdegradationisenhancedinthelinearregionthanthesaturationregionafterhotelectronstress.
ItisclearinFig.
5.
4(c)thattheDCstressresultsinmoredegradationthanthatofdynamicstress.
680255075100125012345678ΔVth/Vth(%)DutyCycle(%)stressedfor3600sstressedfor10800s(a)6902550751001251.
52.
02.
53.
03.
54.
04.
55.
0Δgm/gm(%)DutyCycle(%)stressedfor3600sstressedfor10800s(b)703.
03.
54.
04.
55.
05.
56.
06.
57.
07.
50.
81.
21.
62.
02.
42.
83.
23.
6ΔId/Id(%)Drain-SourceVoltage(V)50%dutycycleDCstressedfor3600s(c)Fig.
5.
4:(a)Normalizedthresholdvoltagechangeversusdutycycle,(b)normalizedtransconductancechangeversusdutycycle,and(c)normalizeddraincurrentdegradationversusdrain-sourcevoltageatVGS=2.
4V.
5.
1.
2CVUsingAgilent4284ALCRprecisionmeter,capacitancesaremeasuredatdifferentbiases.
Fig.
5.
5(a)showsthegate-draincapacitanceCGDversusgate-drainvoltagebeforeandafterstress.
CGDisanonlinearfunctionofbiasandprovidesafeedbackpathbetweentheinputandtheoutputofthedevice.
Fig.
5.
5(b)showsthegate-sourcecapacitanceversusgate-sourcevoltageandFig.
5.
5(c)showsthegate-bodycapacitanceandgate-bodyvoltagebeforeandafterstress.
71TheexperimentalresultsdemonstratesignificantchangeofCGDandCGBafterhotelectronstress,whileCGSisrelativelyunchanged.
HotelectroninducesinterfacechargeswhichalterthesurfacepotentialandchangeCGDandCGB.
Thetrappedchargeatthedrainendofthechanneldoesn'tchangeCGSmuch.
0.
00.
51.
01.
52.
0-0.
20.
00.
20.
40.
60.
81.
01.
21.
41.
61.
82.
0Gate-DrainCapacitance(pF)Gate-DrainVoltage(V)freshstress10400sstress14400sstress16200sstress19000s(a)72012340.
00.
20.
40.
60.
81.
01.
21.
41.
61.
82.
0Gate-SourceCapacitance(pF)Gate-SourceVoltage(V)freshstress10400sstress14400sstress16200sstress19000s(b)73-2.
0-1.
5-1.
0-0.
50.
00.
40.
60.
81.
01.
21.
41.
61.
82.
0Gate-BodyCapcitance(pF)Gate-BodyVoltage(V)freshstress10400sstress14400sstress16200sstress19000s(c)Fig.
5.
5:(a)gate-draincapacitanceversusgate-drainvoltage,(b)gate-sourcecapacitancevs.
gate-sourcevoltage,and(c)gate-bodycapacitancevs.
gate-bodyvoltagefordifferentstresstimes5.
1.
3RFS-parametersaremeasuredupto20GHz.
The'open','short',and'through'structuressurroundingthedevice-under-testisusedtode-embedparasites.
Fig.
5.
6showstheextractedgateresistanceversusgate-drainvoltageafter10800secondsofdynamicstress(50%dutycycle)andDCstress.
ThegateresistanceincreaseswithgatevoltageandincreasedundertheDCstress.
TheshiftofS-parametersasafunctionofdutycycleisshowninFig.
5.
7.
ThedecreaseinS2174indicatesthereductionofpowergainafterstress.
Thegate-sourceanddrain-sourcevoltagearesetto2.
4Vand5V,respectively,inthisexperiment.
Thedeviceisoperatinginthesaturationregion.
TheinductanceandresistancevaluesusedinthetransistorsimulationareLg=12nH,Ld=96.
9nH,Ls=10nH,Lb=0.
01nH,Rg=251Ω,Rbd=0.
1Ω,Rsb=0.
1Ω,Rbpd=55.
5Ω,andRbps=55.
5Ω.
AllS-parameterschangedafterthedynamicstressof10800seconds.
Fig.
5.
8displaysthecutofffrequencyfTdegradationfrommeasuredS-parameterdataandIC-CAPextractionasafunctionofgate-sourcevoltageafter10800secondsofdynamicstress(50%dutycycle)andDCstress.
Thecutofffrequencydecreasesafterstressduetothereductionintransconductanceandanincreaseingatecapacitance.
TheDCstressdecreasesfTmorethanthatofdynamicstress.
KeydeviceparametricshiftsaresummarizedinTable3.
7501234567824.
024.
424.
825.
225.
626.
026.
426.
827.
227.
6GateResistance(Ω)Gate-SourceVoltage(V)fresh50%dutycycleDCstressedfor10800sFig.
5.
6:Gateresistanceversusgate-drainvoltage76(a)(b)77(c)78(d)Fig.
5.
7:(a)S11,(b)S12,(c)S21,and(d)S22measuredfrom100MHzto20GHzbiasedatVGS=2.
4VandVDS=5V.
Inthoseplotslinewithopencircles:fresh,linewithinverseopentriangles:50%dutycycledynamicstress,linewithxmarks:DCstress.
Thestresstimeis10800s.
79Table4:Keytransistorparameterchangessubjecttotwodifferentstressconditions50%dutycyclestressDCstressParametersafter1hourafter2hrsafter1hourafter2hrsΔVth01.
75%3.
45%5.
87%7.
48%Δk10.
92%2.
15%3.
18%5.
44%Δμ0-2.
39%-4.
77%-5.
76%-8.
12%Ua-3.
16%-4.
72%-4.
89%-7.
32%ΔCgd01.
23%3.
24%4.
41%6.
68%ΔCgs01.
11%2.
23%2.
79%5.
84%BSIM3CoreΔCj1.
18%3.
45%2.
27%4.
37%801.
52.
02.
53.
03.
54.
04.
55.
04.
06.
08.
010.
012.
014.
016.
018.
0CutoffFrequency(GHz)Gate-DrainVoltage(V)DCstress50%dutycyclefreshstressedfor10800sFig.
5.
8:Cutofffrequencyversusgate-sourcevoltage.
Thedrain-sourcevoltageis5V.
815.
2CircuitDegradation5.
2.
1DC-DCConverterTheBSIM3modelparametersforfreshandstresseddevicesareextractedusingIC-CAP.
ThesimulationresultsarecomparedwiththeexperimentaldataasshowninFig.
5.
9.
Goodagreementbetweenthemodelpredictionsandmeasurementforfreshandstressedtransistorsisobtained.
ThefreshandstresseddevicemodelswillbeusedinDC-DCconvertercircuitsimulation.
Thethresholdvoltage(Vth),peaktransconductance(gm,max),on-resistance(Ron),gate-sourcecapacitance(CGS),andgate-draincapacitance(CGD)arereportedandsummarizedinTable4.
820123450.
00.
20.
40.
60.
81.
01.
21.
41.
6VGS=0.
6VVGS=1.
2VVGS=1.
8VVGS=2.
4VDrain-SourceCurrent(mA)Drain-SourceVoltage(V)SimulationExperimentAfterStressFig.
5.
9:Thecomparisonbetweensimulationandmeasurement,Drain-sourcecurrentversusdrain-sourcevoltage,afterstressed83Table5:ParametershiftsduetoHCstressStressTime(s)Vth(V)gm,max(S)Ron(Ω)CGS(pF)CGD(pF)00.
5140.
0447.
880.
3780.
0141200.
5190.
04468.
850.
3810.
0153000.
520.
04479.
00.
3820.
016Fromthedesignpointofview,thegatechargeismoreimportantthangatecapacitancesinceitiseasiertocalculatetheamountofchargeorcurrentrequiredtoturnonthedeviceinadesiredtimeframe.
AtestcircuittodeterminethegatechargeisdisplayedinFig.
5.
10.
Inthiscircuit,asmallcurrentsource(1pA)isconnectedtothegateofthedevicemakingtheswitchingtimevisible.
Aconstantcurrentisinthedrainsothatthegatechargeisrelatedtoagivencurrentandvoltageinthesource-to-drainpath[103]Fig.
5.
11showsthetypicalswitchingwaveformsVGSandVDSbeforeandafterstress.
InFig.
5.
12thesolidlinesrepresentthevoltagewaveformsbeforestressandthedashedlinesrepresentthevoltagewaveformsafterstress.
Whentheswitchturnson,thegate-sourcevoltagebeginstoincreaseuntilitreachesVthatwhichthedraincurrentchargesthegate-sourcecapacitance.
CGScontinuestochargeup,whilethegatevoltagerisesandthedraincurrentincreasesproportionally.
At4.
05sthegate-sourcecapacitanceischargedcompletelyandthedraincurrentreachesthepredeterminedcurrentandstaysconstantwhilethedrainvoltagefalls.
Whenthegate-sourcecapacitanceisfullychargedat4.
05s(VGSremainsthesame),thedrivecurrentnowchargestheMillercapacitanceCGDuntil4.
45sasshowninFig.
5.
13.
InFig.
5.
14theareacoveredbysolidlinerepresentstothegatechargeforthefreshdevice,andtheareaunderthedashlineiscorrespondingtothestresseddevice.
TheinitialslopeofVGS84forfreshandstresseddevicesisaboutthesame.
Thestresseddevice,however,hasasmallertransconductanceandrequireshighervoltageforagivenamountofdraincurrent.
Therefore,QGSforthestresseddeviceislargerthanthatofthefreshdevice.
Thetotalchargerequiredtoturnonthefreshdeviceislessthanthatrequiredforthestresseddevice.
Sincetheenergyistheproductofthegatechargeandthegatevoltage,thefreshdevicerequireslessenergythanthatofthestresseddevicetoturnonadriverdevice.
Fig.
5.
10:Agatechargetestcircuit8502468100.
000.
050.
100.
150.
200.
250.
30Gate-SourceVoltage(V)Drain-SourceVoltage(V)Time(s)freshstressed0.
00.
20.
40.
60.
81.
01.
2Fig.
5.
11:Gate-sourceanddrain-sourcevoltagesversustime863.
03.
54.
04.
55.
05.
50.
40.
50.
60.
7tGS'tGStGDtGD'Gate-SourceVoltage(V)Time(s)freshstressedFig.
5.
12:Enlargedgate-sourcevoltageversustimebeforeandafterstressAfullbridgeDC-DCconverterusingextractedmodelparametersissimulatedinCadence,asshowninFig.
4.
6;InFig.
4.
6theinputvoltageis12V,theoutputvoltageis3.
3V,andtheoutputinductanceis2.
3μH.
Theisolationtransformerturnratiois4to2.
Theswitchingfrequencyis200kHz.
Toinvestigatethestresseffectsontheswitchingperformance.
Theoscillogramsofthegate-to-sourcevoltageneatlydelineatebetweenthechargerequiredforthegate-to-sourcecapacitance,andthechargerequiredforthegate-to-drain,or"Miller"capacitance[104].
Theswitchingperformancesoftransistorsaredeterminedbytheparasiticcapacitances,whichshiftedafterstress.
Theshiftsinswitchingperformancewerecarriedoutbyapplyingthecompactmodel87extractedfromthetestdevicebeforeandafterstressusingIC-CAP.
Initially,theswitchisclosed.
Thegatevoltageanddraincurrentarezero.
Theswitchisopenedatabout5us;thegate-to-sourcecapacitancestartstocharge,andthegate-to-sourcevoltageincreases.
Becausetheshiftsingate-to-sourcecapacitanceduetostress,theVGScurvechangedafterstressinthisperiod.
Nocurrentflowsinthedrainuntilthegatereachesthethresholdvoltage.
Atnextperiod,thegate-to-sourcecapacitancecontinuestocharge,thegatevoltagecontinuestoriseandthedraincurrentrisesproportionally.
Thethresholdvoltagechangedafterstress.
Therefore,thestartrisingpointforthedraincurrentshifts.
Solongastheactualdraincurrentisstillbuildinguptowardstheavailabledraincurrent,ID,thefreewheelingrectifierstaysinconduction,thevoltageacrossitremainslow,andthevoltageacrosstheswitchcontinuestobevirtuallythefullcircuitvoltage,VDD.
Thetopendofthedrain-to-gatecapacitancethereforeremainsatafixedpotential.
WhenthedraincurrentreachesID,andthefreewheelingrectifiershutsoff;thepotentialofthedrainnowisnolongertiedtothesupplyvoltage.
ThedraincurrentnowstaysconstantatthevalueIDenforcedbythecurrentsourcestartstofall.
Sincethegatevoltageisinextricablyrelatedtothedraincurrentbytheintrinsictransfercharacteristicofthedevice,thegatevoltagenowstaysconstantbecausethe"enforced"draincurrentisconstant.
Forthetimebeingtherefore,nofurtherchargeisconsumedbythegate-to-sourcecapacitance,becausethegatevoltageremainsconstant.
Thusthedrivecurrentnowdiverts,initsentirety,intothecapacitanceCGD,andthedrivecircuitchargenowcontributesexclusivelytodischargingtheCGDcapacitance.
DuetotheshiftsinCGDafterstress,theVGS,VDS,anddraincurrentcurvesshiftduetothestressthis.
Thedrainvoltageexcursionduringthenextperiodisrelativelylarge,andhencethetotaldrivechargeistypicallyhigherfortheCGDthanfortheCGS.
WhenthedrainvoltagefallstoavalueequaltoID*RON,and88theswitchdevicenowcomesoutofthe"active"regionofoperation.
Thegatevoltageisnownolongerconstrainedbythetransfercharacteristicofthedevicetorelatetothedraincurrent,andisfreetoincrease.
FromSec.
2,onegetsthatRONdegradedafterstress.
Therefore,thesecondstartrisingpointofVGSchangedafterstress.
Theswitchingperformancesdegradedsignificantlyafterstressfor300seconds.
FortheDC-DCconverterapplication,CGSisthemostimportantcapacitance[75].
Itdominatestheoutputswitchingwaveformsthroughthe'Miller'effects.
Theeffectsofgate-sourcecapacitanceongatevoltage-CGSandcurrentwaveformsaredeterminedbygatedriveinternalimpedance.
FromSec.
2,onegetsthatCGDchanged12.
5%andCGSchanged1%after300secondstress.
Therefore,theperformancedegradationintheDC-DCconverterisanticipated.
TheprimaryvoltageandtransformerprimarycurrentwaveformsaregiveninFig.
5.
13andFig.
5.
14.
OnegetsthattheswitchingperformanceshiftsinthepowerLDMOSFETcanbringslightchangesintheprimaryvoltageandcurrent.
89(a)90(b)Fig.
5.
13:Simulatedvoltagewaveformsoftheprimarysideofthetransformer.
(a)Simulationfrom0usto10us;(b)Detailsinthecircleshownin(a).
Theefficiencyrelatestothetransient(dynamic)performanceoftheswitchingdevices.
Asdiscussedabove,thetransientperformanceofthepowerdevicechangedafterstress.
Althoughthechangesisnotsevere,theefficiencycurvesforthefreshandstresseddevicestellusthatitdegradedsignificantlyafterHCstress,asshowninFig.
5.
14.
91(a)92(b)Fig.
5.
14:Simulatedvoltagewaveformsoftheprimarysideofthetransformer.
(a)Simulationfrom0usto10us;(b)Detailsinthecircleshownin(a).
ThepowerefficiencyversusoutputpowerissimulatedandshowninFig.
5.
15.
Thepowerefficiencyisrelatedtothetransientperformanceoftheswitchingdevices[75].
InFig.
5.
15thepowerefficiencyincreaseswithoutputpower,anddecreasesafterhotelectronstressatagivenoutputpower.
93012345675060708090StressedPowerEfficiency(%)OutputPower(mW)FreshFig.
5.
15:Efficiencycurvesstresstimeis300s.
945.
2.
2PowerAmplifierInthepreviouschapter,bothmeasuredandsimulatedresultsshowthattheFOMsdegradeindeviceafterdynamicstress.
ItispredictivethattheRFcircuitperformancedegradationwillfollow.
GoodagreementbetweensimulationandmeasurementverifythatthedevelopedmodelissuitabletoevaluatetheRFperformancedegradationinRFICs.
ARFpoweramplifier(PA)isgiveninFig.
4.
12.
ThePAisdesignedtooperateintheclass-Cmode[76].
TheLDMOShasthechannellengthof0.
25μm,thechannelwidthof36μm,and80multi-fingers.
Forsingle-toneharmonicdistortionanalysis,alarge-signalsinusoidwith960MHzfrequencyisappliedattheinputtothepowerdeviceandthesteady-statelarge-signalresponseisevaluated.
ThesimulatedpowergainversusinputpowerisshowninFig.
5.
17(a).
Thepower-addedefficiency(PAE)isplottedinFig.
5.
17(b).
Two-tonesimulationsareperformedforthePAat960MHz,with1MHzseparation.
TheHSPICEcircuitsimulationresultsshowthatthePAEandoutputpowerdegradeafterhotcarrierstressandthedegradationisenhancedundertheDCstress.
9504812165101520Outputpower(dBm)Inputpower(dBm)fresh50%dutycycleDCstress(a)9604812160.
00.
10.
20.
30.
4Power-AddedEfficiencyInputpower(dBm)DCstressfresh50%dutycycle(b)Fig.
5.
16:(a)Outputpowerversusinputpowerand(b)power-addedefficiencyversusinputpower.
Thestresstimeis10800s.
5.
3SummaryTheLDMOStransistorsubjecttohotelectronstressisevaluatedexperimentally.
Thethresholdvoltageincreasesandthetransconductancedecreasesafterhotelectronstress.
Transistormodelparametersareextractedandusedinthemodelsimulation.
Themodelpredictionsagreewiththeexperimentaldataforthebothfreshandstresseddevices.
ThegatechargetransfercharacteristicusingtheLDMOSmodelbeforeandafterstressisthensimulated.
Thegatechargerequiredtoturnonthedriverdeviceincreasesafterhotelectronstress.
Afull97bridgeDC-DCconverterissimulatedusingCadenceSPICE.
Thesimulationresultshowsthatthepowerefficiencydecreasesafterhotcarrierstress.
Althoughtheparametersshiftslightlyinour0.
25μmhighvoltageLDMOS,theswitchingperformancesdegradedsignificantly.
AfullbridgeDC-DCconverterwasevaluatedbysimulation.
TheprimaryvoltageandcurrentchangeslightlyduetoHCstress.
However,thekeyperformance–efficiency,suffersfromtheHCstresssignificantly.
RFLDMOSperformancessubjecttodynamicstressarecomparedwiththoseunderDCstress.
TheLDMOSismorevulnerabletoDCstressthandynamicstress.
Then-channelLDMOStransconductancedecreasesandthresholdvoltageincreaseswithstresstime.
Thetransistormodelpredictions(draincurrentandS-parameters)areverifiedwithexperiments.
Goodagreementbetweenthemodelpredictionsandmeasurementdatabeforeandafterstressisobtained.
PoweramplifierRFperformancessuchastheoutputpowerandpower-addedefficiencydegradeafterdynamichotelectronstress.
986CHAPTERSIX:CONCLUSIONS6.
1SummaryFirstofall,thehotcarrierreliabilityonsubmicronLDMOSFETshasbeendemonstrated.
Themaindegradationmechanismshavebeenreviewed,underuniformandnon-uniformstaticanddynamicconditions;someimportantprocessing-relatedeffectshavebeenillustrated,andthestrategiesfortheimprovementofthehotcarrierlifetimehavebeenbrieflydiscussed.
Moreover,thisstudypresentsthatthegatechargetransfercharacteristicshowsgreatvulnerabilityduetothehotcarriereffectontheLDMOSFETs.
Theparameterextractionisusedtosimulatethegatechargetransferperformance.
Measuredresultsareprovidedtoverifyaccuracyofmodels.
Intheend,thediscussionaboutthegatechargetransfercharacteristicprovidesaninsightintothehotcarriereffectonthedrivecircuitdesignofpowerswitchingapplication.
Intheend,theRFperformancedegradationunderthedynamicstresshasbeenstudied.
Differentdutycyclewaveformsareusedtostressthe0.
25umLDMOSFETs.
TheresultshowsthedeviceismorevulnerabletoDCstress(100%dutycycle),comparedtootherdutycyclestress.
Theaclarge-signalmodelfortheLDMOSFETsiscitiedwithimprovedparameterextractionprocedures.
Measurementresulthasbeenusedtoveritytheaccuracyofmodels.
Withthecalibratedmodel,RFperformancecurvesforlarge-signalgain,efficiencyandlinearityofapoweramplifierisexamined.
ThisresearchpresentsasystemthoughtaboutthehotcarriereffectonLDMOSFETs.
996.
2FurtherWorkTheuseofprofessionaltoolsisaprerequisitetodevelopaccuratedevicemodelsandsimulationcircuits,fromDCtoGHz,includingnoisemodelingandnonlinearHFeffects,withinareasonabletime.
Withtechnologygoingfasterandfastertowardsultra-highfrequencies,circuitdesignscanonlybeaccurateandright-the-first-timeiftheunderlyingdevicemodelsareaccuratelymodeledwithphysicallymeaningfulmodelparameters.
Designersneedtolearntodesignforreliabilityandtheyshouldbeeducatedonadditionalreliabilityanalyses.
Thevalueisthereductionoffailureandredesigncosts.
Acompleteflowallowingdigitalandanalogdesignerstocomputereliabilitycircuitsimulationisnecessary.
Reliabilitycircuitsimulationtoolsareexpectedtobuildwiththoseblocks:(1)Stressmeasurement(2)Reliabilityanalysis(3)Extractionandmodeling(4)Circuitsimulationwithreliabilityparametersandspecification.
Thesystem-levelreliabilitycomputer-aidedtoolwillbemynextresearchfocus.
100Fig.
6.
1:Aproposedcompleteflowtocomputereliabilitycircuitsimulation101REFERENCES[1]GGroeseneken,RBellens,GVandenboschandHEMaes,"Hot-carrierdegradationinsubmicrometreMOSFETs:fromuniforminjectiontowardstotherealoperatingconditions",Semicond.
Sci.
Technol.
10(1995)1208-1220[2]Q.
Li,J.
Zhang,W.
Li,andJ.
S.
Yuan,"CMOSRFMixerNo-linearityDesign,"CircuitsandSystems,2001.
MWSCAS2001.
Proceedingsofthe44thIEEE2001MidwestSymposium,vol.
2,pp.
14-17,August2001.
[3]E.
Xiao,J.
S.
YuanandH.
Yang,"Hot-CarrierandSoft-BreakdownEffectsonVCOPerformance,"IEEETrans.
MicrowaveTheoryandTechniques,vol.
50,pp.
2453-2458,November2002.
[4]H.
Yang,J.
S.
Yuan,Y.
Liu,E.
Xiao,"Effectofgate-oxidebreakdownonRFperformance,"IEEETrans.
DeviceandMaterialsReliability,vol.
3,pp.
93-97,September2003.
[5]C.
Yu,"Studyofnano-scaleCMOSdeviceandcircuitreliability",Ph.
D.
Dissertation.
[6]F.
SISCHKA,"Professionalsoftwaretoolsfordevicemodeling",MIXDES2001,Zakopane,POLAND,21–23June2001[7]D.
Schreursetal.
,"Easyandaccurateempiricaltransistormodelparameterestimationfromvectoriallarge-signalmeasurements",IEEEInt.
MicrowaveSymp.
Digest,1999,pp.
753-756.
[8]D.
Schreursetal.
,"Large-signalmodellingandmeasuringgohand-in-hand:accuratealternativestoindirectS-parametermethods",InternationalJournalofRFandMicrowaveComputer-AidedEngineering10(2000),pp.
6-18.
102[9]D.
Schreursetal.
,"Evaluationofnon-linearmodellingtechniquesforMOSFETsbasedonvectoriallarge-signalmeasurements",IEEEInternationalSymposiumonCircuitsandSystems,2000,pp.
II-429-II-432.
[10]http://www-device.
eecs.
berkeley.
edu/~bsim3/intro.
html[11]AgilentIC-CAP2004NonlinearDevicemodelvolume1,p251[12]A.
Moscatelli,C.
Contiero,P.
Galbiati,C.
Raffaglio,"A12VComplementaryRFLDMOSTechnologyDevelopedona0.
18umCMOSPlatform",Proceedingsof2004InternationalSymposiumonPowerSemiconductorDevices&ICs,P37,2004[13]M.
P.
J.
GVersleijen,V.
J.
Bloem,J.
A.
vanSteenwijkandO.
I.
Yanson,"AnewPhysicsBasedDynamicElectroThermalLargeSignalModelforRFLDMOSFETs",2004IEEEMTT-SDigest,P39,2004.
[14]Miller,M.
Dinh,T.
Shumate,E.
"AnewempiricallargesignalmodelforsiliconRFLDMOSFETs",IEEEMTT-SSymposiumonTechnologiesforWirelessApplicationsDigest,1997.
[15]LarsVestling,JohanAnkarcrona,andJorgenOlsson,"AnalysisandDesignofaLow-VoltageHigh-FrequencyLDMOSTransistor",IEEETransactionsonElectronDevices,Vol.
49,No.
6,June2002.
[16]YoungooYang,JaehyokYi,andBummanKim,"AccurateRFLarge-SignalModelofLDMOSFETsincludingSelf-HeatingEffect",IEEETrans.
OnMicrowaveTheoryandTechnique,VOL.
49,NO.
2,Feb.
2001.
103[17]C.
Grelu,N.
Baboux,R.
A.
Bianchi,C.
Plossu,"SwitchingLossOptimizationof20VdevicesIntegratedina0.
13umCMOSTechnologyforPortableApplications",Proceedingsofthe17thInternationalSymposiumonPowerSemiconductorDevices&IC's,May2005.
[18]D.
Muller,A.
Giry,D.
Pache,J.
Mourier,B.
Szelag,A.
Monroy,"ArchitectureOptimizationofAnNchannelLDMOSDeviceDedicatedToRF-powerApplication",Proceedingsofthe17thInternationalSymposiumonPowerSemiconductorDevices&IC's,May2005.
[19]M.
Zhu,P.
Chen,R.
K.
-Y.
Fu,ZhenghuaAn,ChengluLin,andPaulK.
Chu,"Numericalstudyofself-heatingeffectsofMOSFETsfabricatedonSOANsubstrate,"IEEETrans.
ElectronDevices,vol.
51,pp.
901–906,June2004.
[20]G.
E.
Moore,"NoExponentialForever:But'Forever'CanBeDelayed!
,"IEEEInternationalSolid-StateCircuitsConference,February2003.
[21]G.
V.
Groeseneken,"HotCarrierDegradationandESDinSubmicrometerCMOSTechnologies:HowDoTheyInteract,"IEEETrans.
DeviceandMaterialsReliability,vol.
1,pp.
23-32,March2001.
[22]S.
Naseh,M.
J.
DeenandO.
Marinov,"Effectsofhot-carrierstressontheperformanceoftheLC-tankCMOSoscillators,"IEEETrans.
ElectronDevices,vol.
50,pp.
1334-1339,May2003.
[23]http://www.
cadence.
com/whitepapers/5082_ReliabilitySim_FNL_WP.
pdf[24]http://www.
eas.
asu.
edu/~schroder/PublishedPapers/JAPJuly2003-NBTI.
pdf[25]http://www.
ece.
nus.
edu.
sg/stfpage/elelimf/publication/CGEDLDNBTI2002.
pdf[26]C.
Hu,et.
al.
,"AUnifiedGateOxideReliabilityModel",IRPS,1999104[27]P.
E.
Nicollian,et.
al.
,"ExperimentalEvidenceforVoltageDrivenBreakdownModelsinUltrathinGateOxide",IRPS2000.
[28]HitachiSemiconductorDeviceReliabilityHandbook,5thEdition[29]HeremansP,BellensR,GroesenekenG,VonSchwerin.
WeberW,BmxMandMaesHE,"ThemechanismsofhotcarrierdegradationHotCurrierDesignConsiderationsinMOSDevicesandCircuits",(NewYork:VanNostrandReinhold)ch1,1991.
[30]HeremansP,BellensR,GroesenekenGandMaesHE"Consistentmodelforthehotcarrierdegradationinn-channelandp-channelMOSFETs",IEEETrans.
ElectronDevices(35)p2194,1988[31]WoltjerR,HamadaAandTakedaE,"Timedependenceofp-MOSFETHotcarriersdegradationmeasuredandinterpretedconsistentlyovertenordersofmagnitude",IEEETrans.
ElectronDevices(40)p392,1993[32]MisuyKandDoyleB"Theroleofelectrontrapcreationinenhancedhot-carrierdegradationduringACstress",IEEEElectronDeviceLett.
(11)267,I990[33]WeberW,"Dynamicstressexperimentsforunderstandinghot-carrierdegradationphenomena",IEEETrans.
ElectronDevices,(35)p1476,1988[34]HeremansP.
VandenboschG,BellensR.
GroesenekenandMaesHE,"Temperaturedependenceofchannelhotcarrierdegradationinn-channelMOSFETs",IEEETrans.
ElectronDevices(37)p980,1991[35]KakumuM,KinugawaM,HashimotoKandMatsunagaJ,"PowersupplyvoltageforfutureCMOSVLSIinhalfandsubmicrometer",IEDMTech.
Digest.
(399),1986105[36]IzawaR,KureTandTakedaE"Impactofgatedrainoverlappeddevice[GOLD)fordeep-submicrometerVLSI",IEEETrans.
ElectronDevices(35)p2088,1988[37]MievilleJP,VandenboschG,BellensR,GroesenekenC,DefermLandMaesHE"FOND(FullyOverlappedNitridetchdefinedDevice):anewdevicearchitectureforhighreliabilitydeep-submicrometerCMOS-technology",IEDMTech.
Digest(83),1994[38]BellensR,HabasP,GroesenekenG,MaesHE,MievillcIP,VandenboschG,DefermL,"Analysisandoptimizationofthehotcarrierdegradationperformanceof0.
35umfullyoverlappedLDdevices",Proc.
Int.
ReliabilityPhysicsSymp.
p254,1995[39]HoriT,HiraseI,OdakeYandYasuiT,"Deep-submicrometerLarge-Angle-TiltImplantedDrainLATID)Technology",IEEETrans.
ElectronDevices(39)p2312,1992SodiniCGandKrischKS,"SiliconoxynitridegatedielectricsforscaledCMOS",IEDMTech.
Digest,p617,1992[40]SodiniCGandKrischKS,"SiliconoxynitridegatedielectricsforscaledCMOS",IEDMTech.
Digest,p617,1992[41]HoriTNitridedgateoxideCMOStechnologyforimprovedhotcarrierreliabilityProc.
InsulatingFilmsonSemiconductorsIINFOS,p245,1993[42]DitaliA.
MalhewsVandFazanP,"HotcarrierinducedIdegradationofgaledielectricsgrowninnitrousoxideunderacceleratedaging",IEEEElectronDeviceLett.
(13)p538,1992[43]MomoseHS,MorimotoT,OzawaY.
YamabeKandIwaiH,"Electricalcharacteristicsofrapidthermalniuidedoxidegaten-andp-MOSFETswithlessthan1atom%nitrogenconcentration",IEEETrans.
ElectronDevice(41)p546,1994106[44]ChungJ,JengM-C,MoonJE,KOPKandHuC,"Low-voltagehot-electroncurrentsanddegradationindeep-submicrometreMOSFETS",Proc.
Int.
ReliabilityPhysicsSymp.
(NewYork:IEEE)p92,1989[45]K.
BoykoandD.
Gerlach,IEEE-IRPSProceedings,p1(1989).
[46]J.
Suehle,P.
Chaparala,C.
Messick,W.
MillerandK.
Boyko,IEEE-IRPSProceedings,p120(1994).
[47]P.
Charparala,J.
Suehle,C.
MessickandM.
Roush,IEEE-IRPSProceedings,p61(1996).
[48]J.
SuehleandP.
Chaparala,IEEETrans.
Elect.
Device,p801(1997).
[49]M.
Kimura,IEEE-IRPSProceedings,p190(1997).
[50]J.
McPherson,V.
ReddyandH.
Mogul,Appl.
Phys.
Lett.
,Vol71,p1101(1997).
[51]J.
McPhersonandH.
Mogul,Appl.
Phys.
Lett.
,Vol.
71,p3721(1997).
[52]J.
McPhersonandH.
Mogul,IEEE-IRPSProceedings,p47(1998).
[53]E.
AnolickandG.
Nelson,IEEE-IRPSProceedings,p8(1979).
[54]D.
Crook,IEEE-IRPSProceedings,p1(1979).
[55]Berman,IEEE-IRPSProceedings,p204(1991).
[56]J.
McPhersonandD.
Baglee,IEEE-IRPSProceedings,p1(1985).
[57]J.
McPhersonandD.
Baglee,J.
Electrochem.
Soc.
,Vol132,p1903(1985).
[58]J.
McPherson,IEEE-IRPSProceedings,p.
12(1986).
[59]Chen,S.
HollandandC.
Hu,IEEE-IRPSProceedings,p.
24(1985).
[60]J.
Lee,I.
ChenandC.
Hu,IEEE-IRPSProceedings,p.
131(1988).
[61]Moazzami,J.
LeeandC.
Hu,IEEETrans.
Elect.
Devices,Vol.
36,p.
2462(1989).
[62]K.
SchuegraphandC.
Hu,IEEE-IRPSProceedings,p.
7(1993).
107[63]S.
Aur,A.
ChatterjeeandT.
Polgreen,IEEE-IRPSProceedings,p.
15(1988).
[64]E.
Takeda,R.
Izawa,K.
UmedaandR.
Nagai,IEEE-IRPSProceedings,p.
118(1991).
[65]E.
Snyder,D.
Cambell,S.
SwansonandD.
Pierce,IEEE-IRPSProceedings,p.
57(1993).
[66]J.
Wang-Ratkovic,R.
Lacoe,K.
Williams,M.
Song,S.
BrownandG.
Yabiku,IEEE-IRPSProceedings,p.
312(1997).
[67]G.
LaRosa,F.
Guarin,S.
Rauch,A.
Acovic,J.
LukaitisandE.
Crabbe,IEEE-IRPSProceedings,p.
282(1997).
[68]J.
T.
Yue,ULSITechnology,McGraw-Hill,p.
657(1996).
[69]P.
Fang,J.
Yue,andD.
Wollesen,"AMethodtoProjectHot-Carrier-InducedPunchThroughvoltageReductionforDeepSubmicronLDPMOSFETsatRoomandElevatedTemperatures",IEEE-IRPSProceedings,p.
131(1982).
[70]C.
Huang,T.
RostandJ.
McPherson,IEEE-IRWFinalReport,p.
63(1994).
[71]JessBrown,"HowtodevelopingAnalyticalEquationsforDeterminingPowerMOSFETSwitchingTransients",http://www.
powermanagementdesignline.
com/howto/55301342[72]BJBaliga,PowerSemiconductorDevices.
[73]GateChargePrinciplesandUsage,PowerElectronicsEurope,Issue32002,Technology[74]I.
K.
Budihardjo,P.
O.
Lauritzen,andH.
A.
Mantooth,"PerformanceRequirementsforPowerMOSFETModels,"IEEETran.
PowerElec.
,vol.
12,pp.
36-45,January1997[75]S.
J.
Jeon,G.
H.
Cho,"AZero-VoltageandZero-currentSwithcingFullBridgeDC-DCConverterwithTransformerIsolation,"IEEETran.
PowerElec.
,vol.
16,pp.
573-580,September2001.
108[76]T.
H.
Lee,TheDesignofCMOSRadio-FrequencyIntegratedCircuits,CambridgeUniversityPress:NewYork,1998[77]S.
Tam,F.
-C.
Hsu,C.
Hu,R.
S.
Muller,P.
K.
Ko,"Hot-electroncurrentsinveryshortchannelMOSFET's,"IEEEElectronDeviceLetts.
,pp.
249-251,July1983[78]L.
Pantisano,D.
Schreurs,B.
Kaczer,W.
Jeamsaksiri,etc,"RFPerformancevulnerabilitytohotcarrierstressandconsequentbreakdowninlowpower90nmRFCMOS,"Tech.
Dig.
,Int.
ElectronDevicesMeeting,2003,pp.
181-184[79]R.
Subrahmanianm,J.
Y.
Chen,andA.
H.
Johnson,"MOSFETdegradationduetohotcarriereffectathighfrequencies,"IEEEElectronDeviceLetts.
,pp.
21-23,January1990[80]C.
YuandJ.
S.
Yuan,"MOSRFreliabilitysubjecttodynamicvoltagestress-modelingandanalysis,"IEEETrans.
ElectronDevices,pp.
1751-1758,August2005[81]C.
-CCheng,J.
W.
Wu,C.
C.
Lee,J.
H.
Shao,andT.
Wang,"HotcarrierdegradationinLDMOSpowertransistors,"Proceedings,IPFA,2004,pp.
283-286[82]S.
ManziniandC.
Contiero,"Hot-electron-induceddegradationinhigh-voltagesubmicronDMOStransistors",Tech.
Dig.
,ISPSD,1996,pp.
65-68[83]RobertoVersai,AugustoPieracci,"Experimentalstudyofhot-carriereffectsinLDMOStransistors",IEEETrans.
ElectronDevices,p.
1228,1999[84]P.
Moens,F.
Vandenbosch,andG.
Groeseneken,"Hot-carrierdegradationphenomenainlateralandverticalDMOStransistors,"IEEETrans.
ElectronDevices,pp.
623-628,April2004[85]P.
Moens,G.
Vandenbosch,andG.
Groeseneken,"Competinghotcarrierdegradationmechanismsinlateraln-typeDMOStransistors,"Tech.
Dig.
,Int.
Rel.
Phys.
Symp.
,2003,pp.
214-221109[86]D.
Brisbin,A.
Strachan,P.
Chaparala,"1-Dand2-Dhotcarrierlayoutoptimizationofn-LDMOStransistorarrays,"Tech.
Dig.
,Int.
Rel.
Workshop,2002,pp.
120-124[87]S.
Manzini,"Hotcarrierdegradationinaclassofradiofrequencyn-channelLDMOStransistors,"Tech.
Dig.
,Int.
Rel.
Phys.
Symp.
,2006,pp.
337-344[88]J.
R.
Gajadharsing,"LowdistortionRF-LDMOSpowertransistorforwirelesscommunicationsbasestationapplications,"Tech.
Dig.
,Int.
Symp.
MicrowaveTheoryandTech.
2003,pp.
1563-1566[89]Y.
Cheng,C.
-H.
Chen,M.
Matloubian,andM.
J.
Deen,"HighfrequencysmallsignalACandnoisemodelingofMOSFETsforRFICdesign",IEEETrans.
ElectronDevices,pp.
400-408,March2002[90]T.
S.
Syue,T.
P.
Chen,C.
H.
Ang,andL.
Chan,"Anewwaveform-dependentlifetimemodelfordynamicNBTIinPMOStransistor",IEEEInt.
ReliabilityPhysicsSymp.
,April25-292004,pp.
35-39[91]C.
YuandJ.
S.
Yuan,"MOSRFreliabilitysubjecttodynamicvoltagestress-modelingandanalysis,"IEEETrans.
ElectronDevices,pp.
1751-1758,August2005[92]Y.
M.
Mutha,R.
Lal,andR.
V.
Ramgopal,"PhysicalmechanismsforpulsedACstressdegradationinthingateoxideMOSFETs",Int.
PhysicalandFailureAnalysisofIntegratedCircuits,July8-12,2002,pp.
250-253[93]N.
K.
Zous,Y.
J.
Chen,C.
Y.
Chin,w.
J.
Tsai,T.
C.
Lu,M.
S.
Chen,W.
P.
Lu,T.
Wang;S.
C.
Pan,J.
Ku,andC.
-Y.
Lu,"RelationshipbetweenACstressandDCstressontunneloxides",Int.
PhysicalandFailureAnalysisofIntegratedCircuits,July5-8,2004,pp.
119-121110[94]P.
Moens,F.
Vandenbosch,andG.
Groeseneken,"Hot-carrierdegradationphenomenainlateralandverticalDMOStransistors,"IEEETrans.
ElectronDevices,pp.
623-628,April2004[95]P.
Moens,G.
Vandenbosch,andG.
Groeseneken,"Competinghotcarrierdegradationmechanismsinlateraln-typeDMOStransistors,"Int.
Rel.
Phys.
Symp.
,2003,pp.
214-221[96]W.
Weber,"Dynamicstressexperimentsforunderstandinghot-carrierdegradationphenomena",IEEETrans.
ElectronDevices,pp.
1476-1486,September1988[97]A.
B.
JoshiandD.
L.
Kwong,"EffectsofAChotcarrierstressonn-andp-MOSFET'swithoxynitridegatedielectrics",IEEETrans.
ElectronDevices,pp.
671–674,May1994[98]A.
Bravaix,D.
Goguenheim,N.
Revil,andE.
Vincent,"Hot-carrierdamageinAC-stresseddeepsubmicrometerCMOStechnologies",IEEEInternationalIntegratedReliabilityWorkshop,FinalReport,1999[99]R.
Bellens,G.
Groeseneken,P.
Heremans,andH.
E.
Maes,"Hot-carrierdegradationbehaviorofN-andP-channelMOSFET'sunderdynamicoperationconditions",IEEETrans.
ElectronDevices,pp.
1421-1428,August1994[100]W.
-J.
Hsu,B.
J.
Sheu,S.
M.
Gowda,andC.
-G.
Hwang,"Advancedintegrated-circuitreliabilitysimulationincludingdynamicstresseffects",IEEEJ.
Solid-StateCircuits,pp.
247-257.
March1992[101]Y.
LeblebiciandS.
M.
Kang,"Simulationofhot-carrierinducedMOScircuitdegradationforVLSIreliabilityanalysis",IEEETrans.
Reliability,pp.
197–206,June1994[102]W.
-J.
Hsu,S.
M.
Gowda,B.
J.
Sheu,andC.
-G.
Hwang,"Integrated-circuitreliabilitysimulationincludingdynamicstresseffects",CustomIntegratedCircuitsConference,May1991,pp.
4.
2/1-4.
2/4111[103]http://www.
irf.
com/technical-info/appnotes/an-944.
pdf[104]http://www.
powerdesigners.
com/InfoWeb/designcenter/Appnotes_Archive/an-944.
pdf112