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Electronics,Inc.
2590NorthFirstStreet,SanJose,CA95131,U.
S.
A.
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Page1of11Rev.
Date:Feb.
06,2017DESCRIPTIONTheATPA4B08QG8BNRCSWisahighperformance8GBDDR4-2400VLP(VeryLowProfile)RegisteredECCSDRAMmemorymodule.
Itisorganizedas1024Mx72ina288-pinDual-In-LineMemoryModule(DIMM)package.
Themoduleutilizesnine1024Mx8DDR4SDRAMsinFBGApackage.
Themoduleconsistsofa512-byteserialEEPROM,whichcontainsthemoduleconfigurationinformation.
KEYFEATURESHighDensity:8GB(1024Mx72)DIMMRank:1RankCycleTime:0.
83ns(1200MHz)CASLatency:17(DDR4-2400),15(DDR4-2133)Powersupply:VDD=1.
2V±0.
06VVPP=2.
5V±0.
125VVDDSPD=2.
2V~3.
6VSupportECCerrordetectionandcorrectionNominalanddynamicon-dietermination(ODT)fordata,strobe,andmasksignalsLow-powerautoselfrefresh(LPASR)Databusinversion(DBI)fordatabus16internalbanks(x8);4groupsof4bankseachInternalselfcalibrationthroughZQTemperaturecontrolledrefresh(TCR)AsynchronousReset7.
8srefreshintervalatlowerthanTCASE85°C,3.
9srefreshintervalat85°CCS_n:SDRAMsU[0:4]CS0B_n->CS_n:SDRAMsU[5:8]ODT0A->ODT:SDRAMsU[0:4]ODT0B->ODT:SDRAMsU[5:8]CKE0B->CKE:SDRAMsU[5:8]CKE0A->CKE:SDRAMsU[0:4]PARA->PAR,ACT_n:SDRAMsU[0:4]PARB->PAR,ACT_n:SDRAMsU[5:8]A[0:16]B->A[0:16]:DDR4SDRAMs:U5-U8A[0:16]A->A[0:16]:DDR4SDRAMs:U0-U4BA[0:1]A->BA[0:1]:DDR4SDRAMs:U0-U4BA[0:1]B->BA[0:1]:DDR4SDRAMs:U5-U8BG[0:1]B->BG[0:1]:DDR4SDRAMs:U5-U8BA[0:1]QRESET:SDRAMU1~U9Y1(_t,_c)->CK1(_t,_c):SDRAMsU[0:4]Y0(_t,_c)->CK0(_t,_c):SDRAMsU[5:8]CK1CK1CK0CK0REGISTERRESETPARITY,ACT_nCS0_nCKE0BG[0:1]ODT0BG[0:1]A->BG[0:1]:DDR4SDRAMs:U0-U4ALERT_nERROR_IN_nSA[0:2]:SDRAMs:U0~U4C[0:2]B->SA[0:2]:SDRAMs:U5~U8C[0:2]AATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page6of11FUNCTIONALBLOCKDIAGRAM(PART2OF2)DQSDQSDQ0~7U0DQ0~7ZQVSSCKEODTCS_nCS0A_nODT0ACKE0ADQS0DQS0CS_nODTCKEVSSZQU1CS_nODTCKEVSSZQU2CS_nODTCKEVSSZQU3CS_nODTCKEVSSZQDQ0~7U4CB0~7DM0/TDQS9TDQS9TDQSTDQSTDQSTDQSTDQS10DM1/TDQS10DQS1DQS1DQ8~15DQSDQSDQSDQSDQ16~23DQS2DQS2DM2/TDQS11TDQS11TDQSTDQSTDQSTDQSTDQS12DM3/TDQS12DQS3DQS3DQ24~31DQSDQSDQSDQSDQS8DQS8DM8/TDQS17TDQS17TDQSTDQSDQ0~7DQ0~7DQ0~7SA0SA1SA2SCLA0A1A2IntegratedThermalsensorinSPDSDAEVENTEVENTSerialPDw/integratedThermalsensorSDRAMSU0-U8VPPSDRAMSU0-U8VTTVDDVSSSDRAMSU0-U8SDRAMSU0-U8VREFCASDRAMSU0-U8SPDVDDSPDDQ0~7DQ0~7DQ0~7TDQSTDQSTDQS16DM7/TDQS16DQS7DQS7DQ56~63DQSDQSDQSDQSDQ48~55DQS6DQS6DM6/TDQS15TDQS15TDQSTDQSTDQSTDQSTDQS14DM5/TDQS14DQS5DQS5DQ40~47DQSDQSDM4/TDQS13TDQS13TDQSTDQSCS_nODTCKEVSSZQU8CS_nODTCKEVSSZQU7CS_nODTCKEVSSZQU6DQSDQSDQ32~39U5DQ0~7ZQVSSCKEODTCS_nCS0B_nODT0BCKE0BDQS4DQS4AATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page7of11ABSOLUTEMAXIMUMDCRATINGSItemSymbolRatingUnitsNotesVoltageonVDDpinrelativetoVSSVDD-0.
4V~1.
5VV1,3VoltageonVDDQpinrelativetoVSSVDDQ-0.
4V~1.
5VV1,3VoltageonVPPpinrelativetoVSSVPP-0.
4V~3.
0VV4VoltageonanypinrelativetoVSSVIN,VOUT-0.
4V~1.
975VV1StorageTemperatureTSTG-55to+100oC1,2OperatingTemperatureTCASE-40to+95oC1,2,5TA-40to+85oC1,6,7Note:1.
Stressesgreaterthanthoselistedunder"AbsoluteMaximumRatings"maycausepermanentdamagetothedevice.
Thisisastressratingonlyandfunctionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthisspecificationisnotimplied.
Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectreliability2.
StorageTemperatureisthecasesurfacetemperatureonthecenter/topsideoftheDRAM.
Forthemeasurementconditions,pleaserefertoJESD51-2standard.
3.
VDDandVDDQmustbewithin300mVofeachotheratalltimes;andVREFCAmustbenotgreaterthan0.
6xVDDQ,WhenVDDandVDDQarelessthan500mV;VREFCAmaybeequaltoorlessthan300mV4.
VPPmustbeequalorgreaterthanVDD/VDDQatalltimes.
5.
At85-95oCoperationtemperaturerange,doublingrefreshcommandsinfrequencytoa32msperiod(Refreshinterval=3.
9μs)isrequired,andtoentertoselfrefreshmodeatthistemperaturerange,anEMRScommandisrequiredtochangeinternalrefreshrate.
6.
Bothtemperaturespecificationsmustbesatisfied.
7.
OperatingambienttemperaturesurroundingthepackageAC&DCOPERATINGCONDITIONSRecommendedoperatingconditionsItemSymbolMin.
TypicalMax.
UnitsSupplyVoltage1,2,3VDD1.
141.
21.
26VSupplyVoltageforOutput1,2,3VDDQ1.
141.
21.
26VDRAMActivatingPowerSupply3VPP2.
3752.
52.
75VInputreferencevoltagecommand/addressbusVREFCA(DC)0.
49*VDD0.
50*VDD0.
51*VDDVTerminationreferencevoltage(DC)–command/addressbus4VTT0.
49*VDD-20mA0.
50*VDD0.
51*VDD+20mAVInputHighVoltage(DC)VIH(DC)VREF+0.
075-VDDVInputHighVoltage(AC)VIH(AC)VREF+0.
1--VInputLowVoltage(DC)VIL(DC)VSS-VREF-0.
075VInputLowVoltage(AC)VIL(AC)--VREF-0.
1VNote:1.
UnderallconditionsVDDQmustbelessthanorequaltoVDD.
2.
VDDQtrackswithVDD.
ACparametersaremeasuredwithVDDandVDDQtiedtogether.
3.
DCbandwidthislimitedto20MHz.
4.
VTTterminationvoltagesinexcessofspecificationlimitwilladverselyaffectcommandandaddresssignals'voltagemargins,andreducetimingmargins.
RELIABILITYMTBF@25oC(Hours)1FIT@25oC2MTBF@40oC(Hours)1FIT@40oC27,383,0001354,454,000225Note:1.
TheMeanTimebetweenFailures(MTBF)iscalculatedusingapredictionmethodology,BellcorePrediction,whichbasedonreliabilitydataoftheindividualcomponentsinthemodule.
Itassumesnominalvoltage,withallotherparameterswithinspecifiedrange.
2.
FailuresperBillionDevice-HoursAATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page8of11IDDSPECIFICATIONPARAMETER&POWERCONSUMPTION(PART1OF2)ValuesarefortheDDR4SDRAMonlyandarecomputedfromvaluesspecifiedinthevendor'scomponentdatasheet)SymbolProposedConditionsValueUnitsIDD0OperatingOneBankActive-PrechargeCurrent(AL=0)CKE:High;Externalclock:On;tCK,nRC,nRAS,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:HighbetweenACTandPRE;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VDDQ;DM_n:stableat1;BankActivity:Cyclingwithonebankactiveatatime:0,0,1,1,2,2,.
.
.
;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern610mAIPP0OperatingOneBankActive-PrechargeIPPCurrentSameconditionwithIDD036mAIDD1OperatingOneBankActive-Read-PrechargeCurrent(AL=0)CKE:High;Externalclock:On;tCK,nRC,nRAS,nRCD,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:HighbetweenACT,RDandPRE;Command,Address,BankGroupAddress,BankAddressInputs,DataIO:partiallytoggling;DM_n:sta-bleat1;BankActivity:Cyclingwithonebankactiveatatime:0,0,1,1,2,2,.
.
.
;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern830mAIDD2NPrechargeStandbyCurrent(AL=0)CKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksclosed;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern510mAIDD2NTPrechargeStandbyODTCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VSSQ;DM_n:stableat1;BankActivity:allbanksclosed;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:togglingaccording;PatternDetails:RefertoComponentDatasheetfordetailpattern530mAIDD2PPrechargePower-DownCurrentCKE:Low;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:stableat0;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksclosed;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0320mAIDD2QPrechargeQuietStandbyCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:stableat0;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksclosed;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0500mAIDD3NActiveStandbyCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksopen;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern600mAIPP3NActiveStandbyIPPCurrentSameconditionwithIDD3N27mAIDD3PActivePower-DownCurrentCKE:Low;Externalclock:On;tCK,CL:sRefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:stableat0;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksopen;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0360mAIDD4ROperatingBurstReadCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:82;AL:0;CS_n:HighbetweenRD;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:seamlessreaddataburstwithdifferentdatabetweenoneburstandthenextoneaccording;DM_n:stableat1;BankActivity:allbanksopen,RDcommandscyclingthroughbanks:0,0,1,1,2,2,.
.
.
;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern1,330mAAATTPPAA44BB0088QQGG88BBNNRRCCSSEEYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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Page9of11IDDSPECIFICATIONPARAMETER&POWERCONSUMPTION(PART2OF2)ValuesarefortheDDR4SDRAMonlyandarecomputedfromvaluesspecifiedinthevendor'scomponentdatasheet)SymbolProposedConditionsValueUnitsIDD4WOperatingBurstWriteCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:HighbetweenWR;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:seamlesswritedataburstwithdifferentdatabetweenoneburstandthenextone;DM_n:stableat1;BankActivity:allbanksopen,WRcommandscyclingthroughbanks:0,0,1,1,2,2,.
.
.
;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableatHIGH;PatternDetails:RefertoComponentDatasheetfordetailpattern1,190mAIDD5BBurstRefreshCurrent(1XREF)CKE:High;Externalclock:On;tCK,CL,nRFC:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:HighbetweenREF;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VDDQ;DM_n:stableat1;BankActivity:REFcommandeverynRFC;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern2,070mAIPP5BBurstRefreshWriteIPPCurrent(1XREF)SameconditionwithIDD5B162mAIDD6NSelfRefreshCurrent:NormalTemperatureRangeTCASE:0-85°C;LowPowerArraySelfRefresh(LPASR):Normal4;CKE:Low;Externalclock:Off;CK_tandCK_c#:LOW;CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n#,Command,Address,BankGroupAddress,BankAddress,DataIO:High;DM_n:stableat1;BankActivity:Self-Refreshoperation;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:MID-LEVEL220mAIDD6ESelf-RefreshCurrent:ExtendedTemperatureRange)TCASE:0-95°C;LowPowerArraySelfRefresh(LPASR):Extended4;CKE:Low;Externalclock:Off;CK_tandCK_c:LOW;CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n,Command,Address,BankGroupAddress,BankAddress,DataIO:High;DM_n:stableat1;BankActivity:ExtendedTemperatureSelf-Refreshoperation;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:MID-LEVEL310mAIDD6RSelf-RefreshCurrent:ReducedTemperatureRangeTCASE:0-TBD(~35-45)°C;LowPowerArraySelfRefresh(LPASR):Reduced4;CKE:Low;Externalclock:Off;CK_tandCK_c#:LOW;CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n#,Command,Address,BankGroupAddress,BankAddress,DataIO:High;DM_n:stableat1;BankActivity:ExtendedTemperatureSelf-Refreshoperation;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:MID-LEVEL170mAIDD6AAutoSelf-RefreshCurrentTCASE:0-95°C;LowPowerArraySelfRefresh(LPASR):Auto4;PartialArraySelf-Refresh(PASR):FullArray;CKE:Low;Externalclock:Off;CK_tandCK_c#:LOW;CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n#,Command,Address,BankGroupAddress,BankAddress,DataIO:High;DM_n:stableat1;BankActivity:AutoSelf-Refreshoperation;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:MID-LEVEL210mAIDD7OperatingBankInterleaveReadCurrentCKE:High;Externalclock:On;tCK,nRC,nRAS,nRCD,nRRD,nFAW,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:CL-1;CS_n:HighbetweenACTandRDA;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:readdataburstswithdifferentdatabetweenoneburstandthenextone;DM_n:stableat1;BankActivity:twotimesinterleavedcyclingthroughbanks(0,1,.
.
.
7)withdifferentaddressing;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern1,620mAIPP7OperatingBankInterleaveReadIPPCurrentSameconditionwithIDD780mAIDD8MaximumPowerDownCurrent110mAPDIMMPowerConsumptionperDIMMSystemisoperatingat1200MHzclockwithVDD=1.
2V.
Thisparameteriscalculatedatacommonloading.
2,490mWAATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page10of11TIMINGPARAMETERNote:1.
Unit'nCK'representsoneclockcycleoftheinputclock,countingtheactualclockedges.
ParameterSymbolDDR4-2400UnitsMinMaxClockcycletimeatCL=17,CWL=12tCK0.
833<0.
938nsInternalreadcommandtofirstdatatAA14.
1618nsACTtointernalreadorwritedelaytimetRCD14.
16nsPREcommandperiodtRP14.
16nsACTtoACTorREFcommandperiodtRC46.
16nsACTIVEtoPRECHARGEcommandperiodtRAS329*tREFInsAverageclockhighpulsewidthtCH(avg)0.
480.
52tCKAverageclocklowpulsewidthtCL(avg)0.
480.
52tCKDQS,DQStoDQskew,pergroup,peraccesstDQSQ-0.
16psDQoutputholdtimefromDQS,DQStQH0.
76-tCKDQlow-impedancetimefromCK,CKtLZ(DQ)-300150psDQhigh-impedancetimefromCK,CKtHZ(DQ)-150psDQS,DQSREADPreambletRPRE0.
9TBDtCKDQS,DQSdifferentialREADPostambletRPST0.
33TBDtCKDQS,DQSoutputhightimetQSH0.
4-tCKDQS,DQSoutputlowtimetQSL0.
4-tCKDQS,DQSWRITEPreambletWPRE0.
9-tCKDQS,DQSWRITEPostambletWPST0.
33TBDtCKDQS,DQSlow-impedancetime(ReferencedfromRL-1)tLZ(DQS)-300150psDQS,DQShigh-impedancetime(ReferencedfromRL+BL/2)tHZ(DQS)-150psDQS,DQSdifferentialinputlowpulsewidthtDQSL0.
460.
54tCKDQS,DQSdifferentialinputhighpulsewidthtDQSH0.
460.
54tCKDQS,DQSrisingedgetoCK,CKrisingedgetDQSS-0.
270.
27tCKDQS,DQSfallingedgesetuptimetoCK,CKrisingedgetDSS0.
18-tCKDQS,DQSfallingedgeholdtimetoCK,CKrisingedgetDSH0.
18-tCKDLLlockingtimetDLLK768-nCK1InternalREADCommandtoPRECHARGECommanddelaytRTPmax(4nCK,7.
5ns)-Delayfromstartofinternalwritetrans-actiontointernalreadcommandfordifferentbankgrouptWTR_Smax(2nCK,2.
5ns)-Delayfromstartofinternalwritetrans-actiontointernalreadcommandforsamebankgrouptWTR_Lmax(4nCK,7.
5ns)-WRITErecoverytimetWR15-nsModeRegisterSetcommandcycletimetMRD8-nCK1ModeRegisterSetcommandupdatedelaytMODmax(24nCK,15ns)-CAStoCAScommanddelayforsamebankgrouptCCD6-nCK1Autoprechargewriterecovery+prechargetimetDALtWR+roundup(tRP/tCK)nCK1Multi-PurposeRegisterRecoveryTimetMPRR1-nCK1ACTIVEtoACTIVEcommanddelaytosamebankgroupfor1KBpagesizetRRDmax(4nCK,5.
3ns)-Fouractivatewindowfor1KBpagesizetFAWmax(20nCK,21ns)-CommandandAddresssetuptimetoCK,CKreferencedtoVih(ac)/Vil(ac)levelstIS(base)62-psCommandandAddressholdtimefromCK,CKreferencedtoVih(ac)/Vil(ac)levelstIH(base)87-psPower-upandRESETcalibrationtimetZQinit1024-nCK1NormaloperationFullcalibrationtimetZQoper512-nCK1NormaloperationshortcalibrationtimetZQCS128-nCK1ExitResetfromCKEHIGHtoavalidcommandtXPRmax(5nCK,tRFC(min)+10ns)-ExitPowerDownwithDLLontoanyvalidcommand;ExitPrechargePowerDownwithDLLfrozentocommandsnotrequiringalockedDLLtXPmax(4nCK,6ns)-AsynchronousRTTturn-ondelay(Power-DownwithDLLfrozen)tAONAS19nsAsynchronousRTTturn-offdelay(Power-DownwithDLLfrozen)tAOFAS19nsRTTdynamicchangeskewtADC0.
30.
7tCK8GbREFRESHtoREFRESHORREFRESHtoACTIVEcommandintervaltRFC350-nsAverageperiodicrefreshinterval(0°C≤TCASE≤85°C)tREFI7.
87.
8usAverageperiodicrefreshinterval(85°C≤TCASE≤95°C)tREFI3.
93.
9usExitSelfRefreshtocommandsnotrequiringalockedDLLtXStRFC(min)+10ns-ExitSelfRefreshtocommandsrequiringalockedDLLtXSDLLtDLLK(min)-nCK1PowerDownEntrytoExitTimingtPDtCKE(min)9*tREFItCKWritelevelingoutputdelaytWLO09.
5nsWritelevelingoutputerrortWLOETBDTBDnsAATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page11of11PHYSICALDIMENSIONS(UNITSININCHES)(Drawingnottoscale)FrontBackNote:Toleranceonalldimensions±0.
006inch(0.
15mm)unlessotherwisenotedDisclaimer:Nopartofthisdocumentmaybecopiedorreproducedinanyformorbyanymeans,ortransferredtoanythirdparty,withoutthepriorwrittenconsentofanauthorizedrepresentativeofATPElectronics("ATP").
Theinformationinthisdocumentissubjecttochangewithoutnotice.
ATPassumesnoresponsibilityforanyerrorsoromissionsthatmayappearinthisdocument,anddisclaimsresponsibilityforanyconsequencesresultingfromtheuseoftheinformationsetforthherein.
ATPmakesnocommitmentstoupdateortokeepcurrentinformationcontainedinthisdocument.
Theinformationsetforthinthisdocumentisconsideredtobe"Proprietary"and"Confidential"propertyownedbyATP.
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Page1of11Rev.
Date:Feb.
06,2017DESCRIPTIONTheATPA4B08QG8BNRCSWisahighperformance8GBDDR4-2400VLP(VeryLowProfile)RegisteredECCSDRAMmemorymodule.
Itisorganizedas1024Mx72ina288-pinDual-In-LineMemoryModule(DIMM)package.
Themoduleutilizesnine1024Mx8DDR4SDRAMsinFBGApackage.
Themoduleconsistsofa512-byteserialEEPROM,whichcontainsthemoduleconfigurationinformation.
KEYFEATURESHighDensity:8GB(1024Mx72)DIMMRank:1RankCycleTime:0.
83ns(1200MHz)CASLatency:17(DDR4-2400),15(DDR4-2133)Powersupply:VDD=1.
2V±0.
06VVPP=2.
5V±0.
125VVDDSPD=2.
2V~3.
6VSupportECCerrordetectionandcorrectionNominalanddynamicon-dietermination(ODT)fordata,strobe,andmasksignalsLow-powerautoselfrefresh(LPASR)Databusinversion(DBI)fordatabus16internalbanks(x8);4groupsof4bankseachInternalselfcalibrationthroughZQTemperaturecontrolledrefresh(TCR)AsynchronousReset7.
8srefreshintervalatlowerthanTCASE85°C,3.
9srefreshintervalat85°CCS_n:SDRAMsU[0:4]CS0B_n->CS_n:SDRAMsU[5:8]ODT0A->ODT:SDRAMsU[0:4]ODT0B->ODT:SDRAMsU[5:8]CKE0B->CKE:SDRAMsU[5:8]CKE0A->CKE:SDRAMsU[0:4]PARA->PAR,ACT_n:SDRAMsU[0:4]PARB->PAR,ACT_n:SDRAMsU[5:8]A[0:16]B->A[0:16]:DDR4SDRAMs:U5-U8A[0:16]A->A[0:16]:DDR4SDRAMs:U0-U4BA[0:1]A->BA[0:1]:DDR4SDRAMs:U0-U4BA[0:1]B->BA[0:1]:DDR4SDRAMs:U5-U8BG[0:1]B->BG[0:1]:DDR4SDRAMs:U5-U8BA[0:1]QRESET:SDRAMU1~U9Y1(_t,_c)->CK1(_t,_c):SDRAMsU[0:4]Y0(_t,_c)->CK0(_t,_c):SDRAMsU[5:8]CK1CK1CK0CK0REGISTERRESETPARITY,ACT_nCS0_nCKE0BG[0:1]ODT0BG[0:1]A->BG[0:1]:DDR4SDRAMs:U0-U4ALERT_nERROR_IN_nSA[0:2]:SDRAMs:U0~U4C[0:2]B->SA[0:2]:SDRAMs:U5~U8C[0:2]AATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page6of11FUNCTIONALBLOCKDIAGRAM(PART2OF2)DQSDQSDQ0~7U0DQ0~7ZQVSSCKEODTCS_nCS0A_nODT0ACKE0ADQS0DQS0CS_nODTCKEVSSZQU1CS_nODTCKEVSSZQU2CS_nODTCKEVSSZQU3CS_nODTCKEVSSZQDQ0~7U4CB0~7DM0/TDQS9TDQS9TDQSTDQSTDQSTDQSTDQS10DM1/TDQS10DQS1DQS1DQ8~15DQSDQSDQSDQSDQ16~23DQS2DQS2DM2/TDQS11TDQS11TDQSTDQSTDQSTDQSTDQS12DM3/TDQS12DQS3DQS3DQ24~31DQSDQSDQSDQSDQS8DQS8DM8/TDQS17TDQS17TDQSTDQSDQ0~7DQ0~7DQ0~7SA0SA1SA2SCLA0A1A2IntegratedThermalsensorinSPDSDAEVENTEVENTSerialPDw/integratedThermalsensorSDRAMSU0-U8VPPSDRAMSU0-U8VTTVDDVSSSDRAMSU0-U8SDRAMSU0-U8VREFCASDRAMSU0-U8SPDVDDSPDDQ0~7DQ0~7DQ0~7TDQSTDQSTDQS16DM7/TDQS16DQS7DQS7DQ56~63DQSDQSDQSDQSDQ48~55DQS6DQS6DM6/TDQS15TDQS15TDQSTDQSTDQSTDQSTDQS14DM5/TDQS14DQS5DQS5DQ40~47DQSDQSDM4/TDQS13TDQS13TDQSTDQSCS_nODTCKEVSSZQU8CS_nODTCKEVSSZQU7CS_nODTCKEVSSZQU6DQSDQSDQ32~39U5DQ0~7ZQVSSCKEODTCS_nCS0B_nODT0BCKE0BDQS4DQS4AATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page7of11ABSOLUTEMAXIMUMDCRATINGSItemSymbolRatingUnitsNotesVoltageonVDDpinrelativetoVSSVDD-0.
4V~1.
5VV1,3VoltageonVDDQpinrelativetoVSSVDDQ-0.
4V~1.
5VV1,3VoltageonVPPpinrelativetoVSSVPP-0.
4V~3.
0VV4VoltageonanypinrelativetoVSSVIN,VOUT-0.
4V~1.
975VV1StorageTemperatureTSTG-55to+100oC1,2OperatingTemperatureTCASE-40to+95oC1,2,5TA-40to+85oC1,6,7Note:1.
Stressesgreaterthanthoselistedunder"AbsoluteMaximumRatings"maycausepermanentdamagetothedevice.
Thisisastressratingonlyandfunctionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthisspecificationisnotimplied.
Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectreliability2.
StorageTemperatureisthecasesurfacetemperatureonthecenter/topsideoftheDRAM.
Forthemeasurementconditions,pleaserefertoJESD51-2standard.
3.
VDDandVDDQmustbewithin300mVofeachotheratalltimes;andVREFCAmustbenotgreaterthan0.
6xVDDQ,WhenVDDandVDDQarelessthan500mV;VREFCAmaybeequaltoorlessthan300mV4.
VPPmustbeequalorgreaterthanVDD/VDDQatalltimes.
5.
At85-95oCoperationtemperaturerange,doublingrefreshcommandsinfrequencytoa32msperiod(Refreshinterval=3.
9μs)isrequired,andtoentertoselfrefreshmodeatthistemperaturerange,anEMRScommandisrequiredtochangeinternalrefreshrate.
6.
Bothtemperaturespecificationsmustbesatisfied.
7.
OperatingambienttemperaturesurroundingthepackageAC&DCOPERATINGCONDITIONSRecommendedoperatingconditionsItemSymbolMin.
TypicalMax.
UnitsSupplyVoltage1,2,3VDD1.
141.
21.
26VSupplyVoltageforOutput1,2,3VDDQ1.
141.
21.
26VDRAMActivatingPowerSupply3VPP2.
3752.
52.
75VInputreferencevoltagecommand/addressbusVREFCA(DC)0.
49*VDD0.
50*VDD0.
51*VDDVTerminationreferencevoltage(DC)–command/addressbus4VTT0.
49*VDD-20mA0.
50*VDD0.
51*VDD+20mAVInputHighVoltage(DC)VIH(DC)VREF+0.
075-VDDVInputHighVoltage(AC)VIH(AC)VREF+0.
1--VInputLowVoltage(DC)VIL(DC)VSS-VREF-0.
075VInputLowVoltage(AC)VIL(AC)--VREF-0.
1VNote:1.
UnderallconditionsVDDQmustbelessthanorequaltoVDD.
2.
VDDQtrackswithVDD.
ACparametersaremeasuredwithVDDandVDDQtiedtogether.
3.
DCbandwidthislimitedto20MHz.
4.
VTTterminationvoltagesinexcessofspecificationlimitwilladverselyaffectcommandandaddresssignals'voltagemargins,andreducetimingmargins.
RELIABILITYMTBF@25oC(Hours)1FIT@25oC2MTBF@40oC(Hours)1FIT@40oC27,383,0001354,454,000225Note:1.
TheMeanTimebetweenFailures(MTBF)iscalculatedusingapredictionmethodology,BellcorePrediction,whichbasedonreliabilitydataoftheindividualcomponentsinthemodule.
Itassumesnominalvoltage,withallotherparameterswithinspecifiedrange.
2.
FailuresperBillionDevice-HoursAATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page8of11IDDSPECIFICATIONPARAMETER&POWERCONSUMPTION(PART1OF2)ValuesarefortheDDR4SDRAMonlyandarecomputedfromvaluesspecifiedinthevendor'scomponentdatasheet)SymbolProposedConditionsValueUnitsIDD0OperatingOneBankActive-PrechargeCurrent(AL=0)CKE:High;Externalclock:On;tCK,nRC,nRAS,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:HighbetweenACTandPRE;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VDDQ;DM_n:stableat1;BankActivity:Cyclingwithonebankactiveatatime:0,0,1,1,2,2,.
.
.
;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern610mAIPP0OperatingOneBankActive-PrechargeIPPCurrentSameconditionwithIDD036mAIDD1OperatingOneBankActive-Read-PrechargeCurrent(AL=0)CKE:High;Externalclock:On;tCK,nRC,nRAS,nRCD,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:HighbetweenACT,RDandPRE;Command,Address,BankGroupAddress,BankAddressInputs,DataIO:partiallytoggling;DM_n:sta-bleat1;BankActivity:Cyclingwithonebankactiveatatime:0,0,1,1,2,2,.
.
.
;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern830mAIDD2NPrechargeStandbyCurrent(AL=0)CKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksclosed;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern510mAIDD2NTPrechargeStandbyODTCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VSSQ;DM_n:stableat1;BankActivity:allbanksclosed;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:togglingaccording;PatternDetails:RefertoComponentDatasheetfordetailpattern530mAIDD2PPrechargePower-DownCurrentCKE:Low;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:stableat0;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksclosed;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0320mAIDD2QPrechargeQuietStandbyCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:stableat0;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksclosed;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0500mAIDD3NActiveStandbyCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksopen;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern600mAIPP3NActiveStandbyIPPCurrentSameconditionwithIDD3N27mAIDD3PActivePower-DownCurrentCKE:Low;Externalclock:On;tCK,CL:sRefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:stableat1;Command,Address,BankGroupAddress,BankAddressInputs:stableat0;DataIO:VDDQ;DM_n:stableat1;BankActivity:allbanksopen;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0360mAIDD4ROperatingBurstReadCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:82;AL:0;CS_n:HighbetweenRD;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:seamlessreaddataburstwithdifferentdatabetweenoneburstandthenextoneaccording;DM_n:stableat1;BankActivity:allbanksopen,RDcommandscyclingthroughbanks:0,0,1,1,2,2,.
.
.
;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern1,330mAAATTPPAA44BB0088QQGG88BBNNRRCCSSEEYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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Page9of11IDDSPECIFICATIONPARAMETER&POWERCONSUMPTION(PART2OF2)ValuesarefortheDDR4SDRAMonlyandarecomputedfromvaluesspecifiedinthevendor'scomponentdatasheet)SymbolProposedConditionsValueUnitsIDD4WOperatingBurstWriteCurrentCKE:High;Externalclock:On;tCK,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:HighbetweenWR;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:seamlesswritedataburstwithdifferentdatabetweenoneburstandthenextone;DM_n:stableat1;BankActivity:allbanksopen,WRcommandscyclingthroughbanks:0,0,1,1,2,2,.
.
.
;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableatHIGH;PatternDetails:RefertoComponentDatasheetfordetailpattern1,190mAIDD5BBurstRefreshCurrent(1XREF)CKE:High;Externalclock:On;tCK,CL,nRFC:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n:HighbetweenREF;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:VDDQ;DM_n:stableat1;BankActivity:REFcommandeverynRFC;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern2,070mAIPP5BBurstRefreshWriteIPPCurrent(1XREF)SameconditionwithIDD5B162mAIDD6NSelfRefreshCurrent:NormalTemperatureRangeTCASE:0-85°C;LowPowerArraySelfRefresh(LPASR):Normal4;CKE:Low;Externalclock:Off;CK_tandCK_c#:LOW;CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n#,Command,Address,BankGroupAddress,BankAddress,DataIO:High;DM_n:stableat1;BankActivity:Self-Refreshoperation;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:MID-LEVEL220mAIDD6ESelf-RefreshCurrent:ExtendedTemperatureRange)TCASE:0-95°C;LowPowerArraySelfRefresh(LPASR):Extended4;CKE:Low;Externalclock:Off;CK_tandCK_c:LOW;CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n,Command,Address,BankGroupAddress,BankAddress,DataIO:High;DM_n:stableat1;BankActivity:ExtendedTemperatureSelf-Refreshoperation;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:MID-LEVEL310mAIDD6RSelf-RefreshCurrent:ReducedTemperatureRangeTCASE:0-TBD(~35-45)°C;LowPowerArraySelfRefresh(LPASR):Reduced4;CKE:Low;Externalclock:Off;CK_tandCK_c#:LOW;CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n#,Command,Address,BankGroupAddress,BankAddress,DataIO:High;DM_n:stableat1;BankActivity:ExtendedTemperatureSelf-Refreshoperation;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:MID-LEVEL170mAIDD6AAutoSelf-RefreshCurrentTCASE:0-95°C;LowPowerArraySelfRefresh(LPASR):Auto4;PartialArraySelf-Refresh(PASR):FullArray;CKE:Low;Externalclock:Off;CK_tandCK_c#:LOW;CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:0;CS_n#,Command,Address,BankGroupAddress,BankAddress,DataIO:High;DM_n:stableat1;BankActivity:AutoSelf-Refreshoperation;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:MID-LEVEL210mAIDD7OperatingBankInterleaveReadCurrentCKE:High;Externalclock:On;tCK,nRC,nRAS,nRCD,nRRD,nFAW,CL:RefertoComponentDatasheetfordetailpattern;BL:81;AL:CL-1;CS_n:HighbetweenACTandRDA;Command,Address,BankGroupAddress,BankAddressInputs:partiallytoggling;DataIO:readdataburstswithdifferentdatabetweenoneburstandthenextone;DM_n:stableat1;BankActivity:twotimesinterleavedcyclingthroughbanks(0,1,.
.
.
7)withdifferentaddressing;OutputBufferandRTT:EnabledinModeRegisters2;ODTSignal:stableat0;PatternDetails:RefertoComponentDatasheetfordetailpattern1,620mAIPP7OperatingBankInterleaveReadIPPCurrentSameconditionwithIDD780mAIDD8MaximumPowerDownCurrent110mAPDIMMPowerConsumptionperDIMMSystemisoperatingat1200MHzclockwithVDD=1.
2V.
Thisparameteriscalculatedatacommonloading.
2,490mWAATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page10of11TIMINGPARAMETERNote:1.
Unit'nCK'representsoneclockcycleoftheinputclock,countingtheactualclockedges.
ParameterSymbolDDR4-2400UnitsMinMaxClockcycletimeatCL=17,CWL=12tCK0.
833<0.
938nsInternalreadcommandtofirstdatatAA14.
1618nsACTtointernalreadorwritedelaytimetRCD14.
16nsPREcommandperiodtRP14.
16nsACTtoACTorREFcommandperiodtRC46.
16nsACTIVEtoPRECHARGEcommandperiodtRAS329*tREFInsAverageclockhighpulsewidthtCH(avg)0.
480.
52tCKAverageclocklowpulsewidthtCL(avg)0.
480.
52tCKDQS,DQStoDQskew,pergroup,peraccesstDQSQ-0.
16psDQoutputholdtimefromDQS,DQStQH0.
76-tCKDQlow-impedancetimefromCK,CKtLZ(DQ)-300150psDQhigh-impedancetimefromCK,CKtHZ(DQ)-150psDQS,DQSREADPreambletRPRE0.
9TBDtCKDQS,DQSdifferentialREADPostambletRPST0.
33TBDtCKDQS,DQSoutputhightimetQSH0.
4-tCKDQS,DQSoutputlowtimetQSL0.
4-tCKDQS,DQSWRITEPreambletWPRE0.
9-tCKDQS,DQSWRITEPostambletWPST0.
33TBDtCKDQS,DQSlow-impedancetime(ReferencedfromRL-1)tLZ(DQS)-300150psDQS,DQShigh-impedancetime(ReferencedfromRL+BL/2)tHZ(DQS)-150psDQS,DQSdifferentialinputlowpulsewidthtDQSL0.
460.
54tCKDQS,DQSdifferentialinputhighpulsewidthtDQSH0.
460.
54tCKDQS,DQSrisingedgetoCK,CKrisingedgetDQSS-0.
270.
27tCKDQS,DQSfallingedgesetuptimetoCK,CKrisingedgetDSS0.
18-tCKDQS,DQSfallingedgeholdtimetoCK,CKrisingedgetDSH0.
18-tCKDLLlockingtimetDLLK768-nCK1InternalREADCommandtoPRECHARGECommanddelaytRTPmax(4nCK,7.
5ns)-Delayfromstartofinternalwritetrans-actiontointernalreadcommandfordifferentbankgrouptWTR_Smax(2nCK,2.
5ns)-Delayfromstartofinternalwritetrans-actiontointernalreadcommandforsamebankgrouptWTR_Lmax(4nCK,7.
5ns)-WRITErecoverytimetWR15-nsModeRegisterSetcommandcycletimetMRD8-nCK1ModeRegisterSetcommandupdatedelaytMODmax(24nCK,15ns)-CAStoCAScommanddelayforsamebankgrouptCCD6-nCK1Autoprechargewriterecovery+prechargetimetDALtWR+roundup(tRP/tCK)nCK1Multi-PurposeRegisterRecoveryTimetMPRR1-nCK1ACTIVEtoACTIVEcommanddelaytosamebankgroupfor1KBpagesizetRRDmax(4nCK,5.
3ns)-Fouractivatewindowfor1KBpagesizetFAWmax(20nCK,21ns)-CommandandAddresssetuptimetoCK,CKreferencedtoVih(ac)/Vil(ac)levelstIS(base)62-psCommandandAddressholdtimefromCK,CKreferencedtoVih(ac)/Vil(ac)levelstIH(base)87-psPower-upandRESETcalibrationtimetZQinit1024-nCK1NormaloperationFullcalibrationtimetZQoper512-nCK1NormaloperationshortcalibrationtimetZQCS128-nCK1ExitResetfromCKEHIGHtoavalidcommandtXPRmax(5nCK,tRFC(min)+10ns)-ExitPowerDownwithDLLontoanyvalidcommand;ExitPrechargePowerDownwithDLLfrozentocommandsnotrequiringalockedDLLtXPmax(4nCK,6ns)-AsynchronousRTTturn-ondelay(Power-DownwithDLLfrozen)tAONAS19nsAsynchronousRTTturn-offdelay(Power-DownwithDLLfrozen)tAOFAS19nsRTTdynamicchangeskewtADC0.
30.
7tCK8GbREFRESHtoREFRESHORREFRESHtoACTIVEcommandintervaltRFC350-nsAverageperiodicrefreshinterval(0°C≤TCASE≤85°C)tREFI7.
87.
8usAverageperiodicrefreshinterval(85°C≤TCASE≤95°C)tREFI3.
93.
9usExitSelfRefreshtocommandsnotrequiringalockedDLLtXStRFC(min)+10ns-ExitSelfRefreshtocommandsrequiringalockedDLLtXSDLLtDLLK(min)-nCK1PowerDownEntrytoExitTimingtPDtCKE(min)9*tREFItCKWritelevelingoutputdelaytWLO09.
5nsWritelevelingoutputerrortWLOETBDTBDnsAATTPPAA44BB0088QQGG88BBNNRRCCSSWWYYoouurrUUllttiimmaatteeMMeemmoorryySSoolluuttiioonn!
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(408)732-5000Fax(408)732-5055Page11of11PHYSICALDIMENSIONS(UNITSININCHES)(Drawingnottoscale)FrontBackNote:Toleranceonalldimensions±0.
006inch(0.
15mm)unlessotherwisenotedDisclaimer:Nopartofthisdocumentmaybecopiedorreproducedinanyformorbyanymeans,ortransferredtoanythirdparty,withoutthepriorwrittenconsentofanauthorizedrepresentativeofATPElectronics("ATP").
Theinformationinthisdocumentissubjecttochangewithoutnotice.
ATPassumesnoresponsibilityforanyerrorsoromissionsthatmayappearinthisdocument,anddisclaimsresponsibilityforanyconsequencesresultingfromtheuseoftheinformationsetforthherein.
ATPmakesnocommitmentstoupdateortokeepcurrentinformationcontainedinthisdocument.
Theinformationsetforthinthisdocumentisconsideredtobe"Proprietary"and"Confidential"propertyownedbyATP.
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