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EnglishDataSheet:SBVS344TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019具具有有延延时时时时间间和和手手动动复复位位功功能能的的TPS3703-Q1过过压压和和欠欠压压复复位位IC11特特性性1符合汽车类应用要求具有符合AEC-Q100标准的下列特性:–器件温度等级1:–40°C至+125°C的环境工作温度范围–器件HBMESD分类等级2–器件CDMESD分类等级C7B输入电压范围:1.
7V至5.
5V欠压锁定(UVLO):1.
7V低静态电流:7A(最大值)高阈值精度:–±0.
25%(典型值)–±0.
7%(-40°C至+125°C)固定窗口阈值电平–50mV阶跃(500mV至1.
3V)–1.
5V、1.
8V、2.
5V、2.
8V、2.
9V、3.
3V、5V–仅使用UV阈值–窗口公差范围为±3%至±7%用户可调的电压阈值电平内部毛刺抑制和迟滞固定延时时间选项:50s、1ms、5ms、10ms、20ms、100ms、200ms使用单个外部电容器的可编程延时时间选项漏极开路低电平有效UV和OV监控器RESET电压锁存输出模式2应应用用高级驾驶员辅助系统(ADAS)摄像头传感器融合HEV/EV基于FPGA、ASIC和DSP的系统集集成成式式过过压压和和欠欠压压检检测测3说说明明TPS3703-Q1器件是一款集成式过压(OV)和欠压(UV)监控器或复位IC,采用业界最小的6引脚DSE封装.
这款高精度的电压监控器非常适合采用低电压电源轨的系统,并具有非常小的电源容差裕度.
低阈值迟滞可防止在受监控的电压处于正常工作范围内时发出虚假复位信号.
并且内置有毛刺抑制功能和噪声滤波器,进一步消除了错误信号所导致的错误复位.
TPS3703-Q1不需要使用任何外部电阻器来设置过压和欠压复位阈值,因此进一步优化了整体精度、成本、解决方案大小并提高了安全系统的可靠性.
电容器时间(CT)引脚用于在每个器件的两个可用复位延时时间之间进行选择,还可以连接一个电容器以调整复位延时时间.
单独的SENSE输入引脚和VDD引脚可实现高可靠性系统所需的冗余.
此器件的低典型静态电流规格为4.
5A(典型值).
TPS3703-Q1适用于汽车应用,符合AEC-Q1001级标准.
器器件件信信息息(1)器器件件型型号号封封装装封封装装尺尺寸寸((标标称称值值))TPS3703-Q1WSON(6)1.
50mmx1.
50mm(1)如需了解所有可用封装,请参阅数据表末尾的可订购产品附录.
典典型型过过压压精精度度分分布布2TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
ti.
com.
cnCopyright2018–2019,TexasInstrumentsIncorporated目目录录1特特性性.
12应应用用.
13说说明明.
14修修订订历历史史记记录录25DeviceComparisonTable.
36PinConfigurationandFunctions.
47Specifications.
57.
1AbsoluteMaximumRatings57.
2ESDratings.
57.
3RecommendedOperatingConditions.
57.
4ThermalInformation.
67.
5ElectricalCharacteristics.
67.
6TimingRequirements.
67.
7TypicalCharacteristics.
98DetailedDescription138.
1Overview138.
2FunctionalBlockDiagram138.
3FeatureDescription.
138.
4DeviceFunctionalModes.
159ApplicationandImplementation179.
1ApplicationInformation.
179.
2TypicalApplication2210PowerSupplyRecommendations2610.
1PowerSupplyGuidelines.
2611Layout.
2611.
1LayoutGuidelines2611.
2LayoutExample2612器器件件和和文文档档支支持持2712.
1器件命名规则.
2712.
2文档支持.
2912.
3接收文档更新通知2912.
4支持资源.
2912.
5商标.
2912.
6静电放电警告.
2912.
7Glossary.
2913机机械械、、封封装装和和可可订订购购信信息息.
294修修订订历历史史记记录录注:之前版本的页码可能与当前版本有所不同.
ChangesfromRevisionA(May2019)toRevisionBPage已删除仅删除了整篇文档中的OV.
1已更改将整个文档中的阈值公差更改为窗口公差1AddednewvoltagevariantsforwindowandUVonly.
3Addedpinoutdescriptionforpackage.
4已更改functionalblockdiagramforclaritybetweenvariants.
13已添加UVonlynormaloperationcondition.
15已更改equationtocorrectlyreflectresistordivider.
20已更改toR1fromRSENSE20ChangesfromOriginal(November2018)toRevisionAPage已更改将"预告信息"更改为"生产数据"版本.
13TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019Copyright2018–2019,TexasInstrumentsIncorporated5DeviceComparisonTableTable1showsthereleasedversionsoftheTPS3703-Q1,includingthenominalundervoltageandovervoltagethresholds.
Forallpossiblevoltages,windowtolerance,timedelays,andUVthresholdoptions,seeTable7.
ContactTIsalesrepresentativesoronTI'sE2Eforumfordetailsandavailabilityofotheroptions;minimumorderquantitiesapply.
Table1.
DeviceComparisonTablePARTNUMBERVMONTIMEDELAY(ms)WINDOWTOLERANCECTPin=CapacitorCTPin=OpenCTPin=VDDTPS3703B3080DSERQ10.
80VProgrammable1ms20ms±3%TPS3703E4080DSERQ10.
80VProgrammable10ms200ms–4%TPS3703A5090DSERQ10.
90VProgrammable10ms200ms±5%TPS3703A7110DSERQ11.
10VProgrammable10ms200ms±7%TPS3703A4120DSERQ11.
20VProgrammable10ms200ms±4%TPS3703A7120DSERQ11.
20VProgrammable10ms200ms±7%TPS3703A7125DSERQ11.
25VProgrammable10ms200ms±7%TPS3703A4180DSERQ11.
8VProgrammable10ms200ms±4%TPS3703B5180DSERQ11.
8VProgrammable1ms20ms±5%TPS3703A5180DSERQ11.
8VProgrammable10ms200ms±5%TPS3703A7180DSERQ11.
8VProgrammable10ms200ms±7%TPS3703B4250DSERQ12.
5VProgrammable1ms20ms±4%TPS3703A4280DSERQ12.
8VProgrammable10ms200ms±4%TPS3703A7280DSERQ12.
8VProgrammable10ms200ms±7%TPS3703A5290DSERQ12.
9VProgrammable10ms200ms±5%TPS3703A4330DSERQ13.
3VProgrammable10ms200ms±4%TPS3703A7330DSERQ13.
3VProgrammable10ms200ms±7%TPS3703C7500DSERQ15VProgrammable5ms100ms±7%4TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cnCopyright2018–2019,TexasInstrumentsIncorporated6PinConfigurationandFunctionsDSEPackage6-PinWSONTopViewPinFunctionsPINI/ODESCRIPTIONNO.
NAME1SENSEIInputforthemonitoredsupplyvoltagerail.
WhentheSENSEvoltagegoesabovetheovervoltagethresholdorbelowtheundervoltagethreshold,theRESETpinisdrivenlow.
ConnecttoVDDpinifmonitoringVDDsupplyvoltage.
2VDDISupplyvoltageinputpin.
Goodanalogdesignpracticeistoplacea0.
1-μFceramiccapacitorclosetothispin.
3CTICapacitortimedelaypin.
TheCTpinofferstwofixedtimedelaysbyconnectingCTpintoVDDorleavingitfloating.
Delaytimecanbeprogrammedbyconnectinganexternalcapacitorreferencetoground.
4RESETOActive-low,open-drainoutput.
ThispingoeslowwhentheSENSEvoltagerisesabovetheinternallyovervoltagethreshold(VIT+)orbelowtheundervoltagethreshold(VIT–).
Seethetimingdiagramin图24formoredetails.
Connectthispintoapull-upresistorterminatedtothedesiredpull-upvoltage.
5GND—Ground6MRIManualreset(MR),pullthispintoalogiclow(VMR_L)toassertaresetsignal.
AftertheMRpinisdeassertedtheoutputgoeshighaftertheresetdelaytime(tD)expires.
MRcanbeleftfloatingwhennotinuse.
5TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019Copyright2018–2019,TexasInstrumentsIncorporated(1)StressesbeyondvalueslistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.
Thesearestressratingsonly,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperatingConditions.
Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2)Asaresultofthelowdissipatedpowerinthisdevice,itisassumedthatTJ=TA.
7Specifications7.
1AbsoluteMaximumRatingsoveroperatingfree-airtemperaturerange(unlessotherwisenoted)(1)MINMAXUNITVoltageVDD–0.
36VVoltageVRESET–0.
36VVoltageVCT–0.
36VVoltageVSENSE–0.
36VVoltageVMR–0.
36VCurrentIRESET±40mATemperature(2)ContinuoustotalpowerdissipationSeetheThermalInformationOperatingjunctiontemperature,TJ-40150°COperatingfree-airtemperature,TA-40150°CStoragetemperature,Tstg-65150°C(1)AECQ100-002indicatesthatHBMstressingshallbeinaccordancewiththeANSI/ESDA/JEDECJS-001specification7.
2ESDratingsVALUEUNITV(ESD)ElectrostaticdischargeHuman-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1)±2000VCharged-devicemodel(CDM),perAECQ100-011Allpins±500Cornerpins±750(1)CTpinconnectedtoVDDpinrequiresapullupresistor;10kisrecommended.
(2)ThemaximumratingisVDDor5.
5V,whicheverissmaller.
(3)IfthelogicsignaldrivingMRislessthanVDD,thenadditionalcurrentflowsintoVDDandoutofMR.
7.
3RecommendedOperatingConditionsMINNOMMAXUNITVDDSupplypinvoltage1.
75.
5VVSENSEInputpinvoltage05.
5VVCTCTpinvoltage(1)(2)VDDVVRESETOutputpinvoltage05.
5VVMRMRpinVoltage(3)05.
5VIRESETOutputpincurrent0.
310mATJJunctiontemperature(free-airtemperature)-40125℃6TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cnCopyright2018–2019,TexasInstrumentsIncorporated(1)Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplicationreport.
7.
4ThermalInformationTHERMALMETRIC(1)TPS3870-Q1UNITDSE(WSON)PINSRθJAJunction-to-ambientthermalresistance184.
2°C/WRθJC(top)Junction-to-case(top)thermalresistance30.
6°C/WRθJBJunction-to-boardthermalresistance86.
4°C/WΨJTJunction-to-topcharacterizationparameter13.
4°C/WΨJBJunction-to-boardcharacterizationparameter86.
1°C/WRθJC(bot)Junction-to-case(bottom)thermalresistanceN/A°C/W(1)RESETpinisdrivenlowwhenVDDfallsbelowUVLO.
(2)VPORistheminimumVDDvoltagelevelforacontrolledoutputstate.
(3)Hysteresisiswithrespectofthetripoint(VIT-(UV),VIT+(OV)).
(4)VCTvoltagereferstothecomparatorthresholdvoltagethatmeasuresthevoltageleveloftheexternalcapacitoratCTpin.
7.
5ElectricalCharacteristicsAt1.
7V≤VDD≤5.
5V,CT=MR=Open,RESETVoltage(VRESET)=10kΩtoVDD,RESETload=10pF,andovertheoperatingfree-airtemperaturerangeof–40°Cto125°C,unlessotherwisenoted.
TypicalvaluesareatTJ=25°C,typicalconditionsatVDD=3.
3V.
PARAMETERTESTCONDITIONSMINTYPMAXUNITVDDSupplyVoltage1.
75.
5VUVLOUnderVoltageLockout(1)VDDfallingbelow1.
7V1.
21.
7VVPORPoweronresetvoltage(2)VOL(max)=0.
25V,IOUT=15A1VVIT+(OV)Positive-goingthresholdaccuracy-0.
7±0.
250.
7%VIT-(UV)Negative-goingthresholdaccuracy-0.
7±0.
250.
7%VHYSHysteresisVoltage(3)0.
30.
550.
8%IDDSupplycurrentVDD≤5.
5V4.
57AISENSEInputcurrent,SENSEpinVSENSE=5V11.
5AVOLLowleveloutputvoltageVDD=1.
7V,IOUT=0.
4mA250mVVDD=2V,IOUT=3mA250mVVDD=5V,IOUT=5mA250mVILKGOpendrainoutputleakagecurrentVDD=VRESET=5.
5V300nAVMR_LMRlogiclowinput0.
3VVMR_HMRlogichighinput1.
4VVCT_HHighlevelCTpinvoltage1.
4VRMRManualresetInternalpullupresistance100KICTCTpinchargecurrent337375413nAVCTCTpincomparatorthresholdvoltage(4)1.
1331.
151.
167V7.
6TimingRequirementsAt1.
7V≤VDD≤5.
5V,CT=MR=Open,RESETVoltage(VRESET)=10kΩtoVDD,RESETload=10pF,andovertheoperatingfree-airtemperaturerangeof–40°Cto125°C,unlessotherwisenoted.
TypicalvaluesareatTJ=25°C,typicalconditionsatVDD=3.
3V.
MINNOMMAXUNITtDResettimedelay,TPS3870JCT=Open71013mstDResettimedelay,TPS3870JCT=10ktoVDD140200260mstDResettimedelay,TPS3870KCT=Open0.
711.
3mstDResettimedelay,TPS3870KCT=10ktoVDD142026mstDResettimedelay,TPS3870LCT=Open3.
556.
5ms7TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporatedTimingRequirements(continued)At1.
7V≤VDD≤5.
5V,CT=MR=Open,RESETVoltage(VRESET)=10kΩtoVDD,RESETload=10pF,andovertheoperatingfree-airtemperaturerangeof–40°Cto125°C,unlessotherwisenoted.
TypicalvaluesareatTJ=25°C,typicalconditionsatVDD=3.
3V.
MINNOMMAXUNIT(1)5%Overdrivefromthreshold.
Overdrive%=[VSENSE-VIT]/VIT;WhereVITstandsforVIT-(UV)orVIT+(OV)(2)tPDmeasuredfromthreholdtrippoint(VIT-(UV)orVIT+(OV))toRESETVOLvoltage(3)OutputtransitionsfromVOLto90%forrisetimesand90%toVOLforfalltimes.
(4)Duringthepower-onsequence,VDDmustbeatoraboveVDD(MIN)foratleasttSD+tDbeforetheoutputisinthecorrectstate.
tDResettimedelay,TPS3870LCT=10ktoVDD70100130mstDResettimedelay,TPS3870MCT=10ktoVDDCT=Open50stPDPropagationdetectdelay(1)(2)1530stROutputrisetime(1)(3)2.
2stFOutputfalltime(1)(3)0.
2stSDStartupdelay(4)300stGI(VIT-)GlitchImmunityundervoltageVIT-(UV),5%Overdrive(1)3.
5stGI(VIT+)GlitchImmunityovervoltageVIT+(OV),5%Overdrive(1)3.
5stGI(MR)GlitchImmunityMRpin25nstPD(MR)PropagationdelayfromMRlowtoassertRESET500nstMR_WMRpinpulsewidthdurationtoassertRESET1stD(MR)MRresettimedelaytDms图图1.
VoltageThresholdandHysteresisAccuracy8TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporated(1)VDD=2V,RPU=10kΩtoVDD(2)VariantD(timedelaybypass)hasa~40spulseatRESETpinduringpowerupwindow,thisispresentonlywhenthepowercycleofftimeislongerthan10seconds,thisbehaviorwillnotoccurifSENSEpiniswithinwindowofoperationduringVDDpowerup.
图图2.
SENSETimingDiagram9TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporated7.
7TypicalCharacteristicsAtTJ=25°C,VDD=3.
3V,andRPU=10kΩ,unlessotherwisenoted.
Testedacrossmultiplevoltageoptions图图3.
UndervoltageAccuracyvsTemperatureTestedacrossmultiplevoltageoptions图图4.
OvervoltageAccuracyvsTemperatureSampleSizeof100TPS3703A7125units图图5.
UndervoltageAccuracyDistributionSampleSizeof100TPS3703A7125units图图6.
OvervoltageAccuracyDistributionTestedacrossmultiplevoltageoptions图图7.
UndervoltageHysteresisVoltageAccuracyvsTemperatureTestedacrossmultiplevoltageoptions图图8.
OvervoltageHysteresisVoltageAccuracyvsTemperature10TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporatedTypicalCharacteristics(接接下下页页)AtTJ=25°C,VDD=3.
3V,andRPU=10kΩ,unlessotherwisenoted.
Output(RESETPin)=High图图9.
SupplyCurrentvsTemperatureOutput(RESETPin)=Low图图10.
SupplyCurrentvsTemperatureVDD=1.
7V图图11.
SENSEGlitchImmunity(VIT-)vsOverdriveVDD=1.
7V图图12.
SENSEGlitchImmunity(VIT+)vsOverdriveVDD=5.
5V图图13.
SENSEGlitchImmunity(VIT-)vsOverdriveVDD=5.
5V图图14.
SENSEGlitchImmunity(VIT+)vsOverdrive11TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporatedTypicalCharacteristics(接接下下页页)AtTJ=25°C,VDD=3.
3V,andRPU=10kΩ,unlessotherwisenoted.
VDD=1.
7V图图15.
Low-LevelOutputVoltagevsRESETcurrentVDD=5.
5V图图16.
Low-LevelOutputVoltagevsRESETcurrentVDD=1.
7V图图17.
SETThresholdvsTemperatureVDD=5.
5V图图18.
SETThresholdvsTemperature图图19.
CTCurrentvsCTvalue图图20.
RESETTimeoutvsCTCapacitor12TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporatedTypicalCharacteristics(接接下下页页)AtTJ=25°C,VDD=3.
3V,andRPU=10kΩ,unlessotherwisenoted.
图图21.
TimeoutvsCTCapacitor(0.
1to10nF)图图22.
DetectPropagationDelayvsTemperature13TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporated8DetailedDescription8.
1OverviewTheTPS3703-Q1familyofdevicescombinestwovoltagecomparatorsandaprecisionvoltagereferenceforovervoltageandundervoltagedetection.
TheTPS3703-Q1featuresahighlyaccuratewindowthresholdvoltages(±0.
7%overtemperature)andavarietyvoltagethresholdvariants.
TheTPS3703-Q1includestheresistorsusedtosettheovervoltageandundervoltagethresholdsinternaltothedevice.
Theseinternalresistorsallowforlowercomponentcountsandgreatlysimplifiesthedesignbecausenoadditionalmarginsareneededtoaccountfortheaccuracyofexternalresistors.
TPS3703-Q1versionA,BandChasthreetimedelaysettings,twofixedbyconnectingCTpintoVDDthrougharesistorandleavingCTfloatingandaprogrammabletimedelaysettingthatonlyrequiresasinglecapacitorconnectedfromCTpintoground.
ManualReset(MR)allowsforsequencingorhardresetbydrivingtheMRpinbelowVMR_L.
TheTPS3703-Q1isdesignedtoassertactivelowoutputsignalswhenthemonitoredvoltageisoutsidethesafewindow.
Therelationshipbetweenthemonitoredvoltageandthestatesoftheoutputsisshownin表2.
8.
2FunctionalBlockDiagram*Forallpossiblevoltages,windowtolerance,timedelays,andUVthresholdoptions,seeTable7.
8.
3FeatureDescription8.
3.
1VDDTheTPS3703-Q1isdesignedtooperatefromaninputvoltagesupplyrangebetween1.
7Vto5.
5V.
Aninputsupplycapacitorisnotrequiredforthisdevice;however,iftheinputsupplyisnoisygoodanalogpracticeistoplacea1-FcapacitorbetweentheVDDpinandtheGNDpin.
VDDneedstobeatoraboveVDD(MIN)foratleastthestart-updelay(tSD+tD)forthedevicetobefullyfunctional.
8.
3.
2SENSETheTPS3703-Q1combinestwocomparatorswithaprecisionreferencevoltageandatrimmedresistordivider.
Thisconfigurationoptimizesdeviceaccuracybecauseallresistortolerancesareaccountedforintheaccuracyandperformancespecifications.
Bothcomparatorsalsoincludebuilt-inhysteresisthatprovidesnoiseimmunityandensuresstableoperation.
Althoughnotrequiredinmostcases,fornoisyapplicationsgoodanalogdesignpracticeistoplacea1-nFto10-nFbypasscapacitorattheSENSEinputinordertoreducesensitivitytotransientvoltagesonthemonitoredsignal.
WhenmonitoringVDDsupplyvoltage,theSENSEpincanbeconnecteddirectlytoVDD.
Theoutput(RESET)ishighimpedancewhenvoltageattheSENSEpinisbetweenupperandlowerboundaryofthreshold.
14TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporatedFeatureDescription(接接下下页页)8.
3.
3RESETInatypicalTPS3703-Q1application,theRESEToutputisconnectedtoaresetorenableinputofaprocessor[suchasadigitalsignalprocessor(DSP),application-specificintegratedcircuit(ASIC),orotherprocessortype]ortheenableinputofavoltageregulator[suchasaDC-DCconverterorlow-dropoutregulator(LDO)].
TheTPS3703-Q1hasanopendrainactivelowoutputthatrequiresapull-upresistortoholdtheselineshightotherequiredvoltagelogic.
Connectthepull-upresistortothepropervoltagerailtoenabletheoutputtobeconnectedtootherdevicesatthecorrectinterfacevoltagelevels.
Toensurepropervoltagelevels,givesomeconsiderationwhenchoosingthepull-upresistorvalues.
Thepull-upresistorvalueisdeterminedbyVOL,outputcapacitiveloading,andoutputleakagecurrent.
ThesevaluesarespecifiedinSpecifications.
Theopendrainoutputcanbeconnectedasawired-ORlogicwithotheropendrainsignalssuchasanotherTPS3703-Q1RESETpin.
表2describesthescenarioswhentheoutput(RESET)iseitherassertedloworhighimpedance.
图图23.
RESEToutput8.
3.
4CapacitorTime(CT)TheCTpinprovidestheuserthefunctionalityofbothhigh-precision,factory-programmed,resetdelaytimingoptionsanduser-programmable,resetdelaytiming.
TheCTpincanbepulleduptoVDDthrougharesistor,haveanexternalcapacitortoground,orcanbeleftunconnected.
TheconfigurationoftheCTpinisre-evaluatedbythedeviceeverytimethevoltageontheSENSElineentersthevalidwindow(VIT-(UV)eset(MR)Themanualreset(MR)inputallowsaprocessororotherlogiccircuitstoinitiateareset.
AlogiclowonMRcausesRESETtoassert.
AfterMRreturnstoalogichighandtheSENSEpinvoltageiswithinavalidwindow((VIT-(UV)ESETisdeassertedaftertheresetdelaytime(tD).
IfMRisnotcontrolledexternally,thenMRcaneitherbeconnectedtoVDDorleftfloatingbecausetheMRpinisinternallypulleduptoVDD.
Figure图24showstherelationbetweenMRandRESET.
15TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporatedFeatureDescription(接接下下页页)(1)RESETpullsuptoVDDwith10kΩ.
(2)ToinitiateandcontinuetimeresetcounterbothconditionsmustbemetMRpinaboveVMR_HorfloatingandVSENSEbetweenVIT-(UV)+VHYSandVIT+(OV)-VHYS(3)MRisignoredduringoutputRESETlowevent图图24.
ManualResetTimingDiagram8.
4DeviceFunctionalModes表表2.
FunctionalModeTruthTableDESCRIPTIONCONDITIONMRPINVDDPINOUTPUT(RESETPIN)NormalOperationVIT–(UV)VDD(MIN)HighNormalOperation(UVOnly)SENSE>VIT-(UV)OpenoraboveVMR_HVDD>VDD(MIN)HighOverVoltagedetectionSENSE>VIT+(OV)OpenoraboveVMR_HVDD>VDD(MIN)LowUnderVoltagedetectionSENSEVDD(MIN)LowManualresetVIT–(UV)VDD(MIN)LowUVLOengagedVIT–(UV)VDD(MIN))WhenthevoltageonVDDisgreaterthanVDD(MIN)forapproximately(tSD+tD),theRESEToutputstatewillcorrespondtotheSENSEpinvoltagewithrespecttothethresholdlimits,whenSENSEvoltageisoutsideofthresholdlimitstheRESETvoltagewillbelow(VOL).
8.
4.
2UndervoltageLockout(VPOResetvoltage(VPOR),theRESETpinwillbeheldlow,regardlessofthevoltageonSENSEpin.
16TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporated8.
4.
3Power-OnReset(VDDESETsignalisundefinedandisnottoberelieduponforproperdevicefunction.
17TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporated9ApplicationandImplementation注注InformationinthefollowingapplicationssectionsisnotpartoftheTIcomponentspecification,andTIdoesnotwarrantitsaccuracyorcompleteness.
TI'scustomersareresponsiblefordeterminingsuitabilityofcomponentsfortheirpurposes.
Customersshouldvalidateandtesttheirdesignimplementationtoconfirmsystemfunctionality.
9.
1ApplicationInformation9.
1.
1VoltageThresholdAccuracyVoltagemonitoringrequirementsvarydependingonthevoltagesupplytoleranceofthedevicebeingpowered.
DuetothehighprecisionoftheTPS3703-Q1(±0.
7%Max),thedeviceallowsforawidersupplyvoltagemarginsandthresholdheadroomfortighttoleranceapplications.
Forexample,takeaDC/DCregulatorprovidingpowertoacorevoltagerailofanMCU.
TheMCUhasatoleranceof±5%ofthenominaloutputvoltageoftheDC/DC.
Theusersetsanidealvoltagethresholdof±4%whichallowsfor±1%ofthresholdaccuracy.
SincetheTPS3703-Q1thresholdaccuracyishigherthan±1%,theuserhasmoresupplyvoltagemarginwhichcanallowforarelaxedpowersupplydesign.
ThisgivesflexibilitytotheDC/DCtouseasmalleroutputcapacitororinductorbecauseofalargervoltagewindowforvoltagerippleandtransients.
ThereisalsoheadroombetweentheminimumsystemvoltageandvoltagetoleranceoftheMCUtoensurethatthevoltagesupplywillneverbeintheregionofpotentialfailureofmalfunctionwithouttheTPS3703-Q1assertingaresetsignal.
图25illustratesthesupplyundervoltagemarginandaccuracyoftheTPS3703-Q1fortheexampleexplainedabove.
Usingalowaccuracysupervisorwilleatintotheavailablebudgetforthepowersupplyrippleandtransientresponse.
ThisgiveslessflexibilitytotheuserandamorestringentDC/DCconverterdesign.
图图25.
TPS3703-Q1VoltageThresholdAccuracy18TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporatedApplicationInformation(接接下下页页)9.
1.
2CTResetTimeDelayTheTPS3703-Q1featuresthreeoptionsforsettingtheresetdelay(tD):connectingacapacitortotheCTpin,connectingapull-upresistortoVDD,andleavingtheCTpinunconnected.
图26showsaschematicdrawingofallthreeoptions.
TodeterminewhichoptionisconnectedtotheCTpin,aninternalstatemachinecontrolstheinternalpulldowndeviceandmeasuresthepinvoltage.
Thissequenceofeventstakes450μstodeterminewhichtimingoptionisused.
EverytimethevoltageontheSENSElineentersthevalidwindow(VIT-(UV)+VHYSesetDelayTimingTousethefactory-programmedtimingoptions,theCTpinmusteitherbeleftunconnectedorpulleduptoVDDthrougha10kpull-upresistor.
Usingtheseoptionsenablesahigh-precisionresetdelaytiming,asshownin表3.
表表3.
ResetDelayTimeforFactory-ProgrammedResetDelayTimingVARIANTRESETDELAYTIME(tD)VALUECT=CapacitortoGNDCT=FloatingCT=10kΩtoVDDTPS3703AProgrammabletD10200msTPS3703BProgrammabletD120msTPS3703CProgrammabletD5100msTPS3703DN/A5050s9.
1.
2.
2ProgrammableResetDelay-TimingTheTPS3703resettimedelayisbasedoninternalcurrentsource(ICT)tochargeexternalcapacitor(CCT)andreadcapacitorvoltagewithinternalcomparator.
Theminiumvaluecapacitoris250pF.
Thereisnolimitationonmaximumcapacitortheonlyconstrainisimposedbytheinitialvoltageofthecapacitor,ifCTcapiszeroorneartozerothenideallythereisnootherconstraintonthemaxcapacitor.
Thetypicalidealcapacitorvalueneededforagivendelaytimecanbecalculatedusing公式1,whereCCTisinnanofarads(nF)andtDisinms:tD=3.
066*CCT+0.
5ms(1)Tocalculatetheminimumandmaximum-resetdelaytimeuse公式2and公式3,respectively.
tD(min)=2.
7427*CCT+0.
3ms(2)tD(max)=3.
4636*CCT+0.
7ms(3)19TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporatedTheslopeoftheequationisdeterminedbythetimetheCTchargingcurrent(ICT)takestochargetheexternalcapacitoruptotheCTcomparatorthresholdvoltage(VCT).
WhenRESETisasserted,thecapacitorisdischargedthroughtheinternalCTpulldownresistor.
WhentheRESETconditionsarecleared,theinternalprecisioncurrentsourceisenabledandbeginstochargetheexternalcapacitor;whenVCT=1.
15V,RESETisunasserted.
NotethatinordertominimizethedifferencebetweenthecalculatedRESETdelaytimeandtheactualRESETdelaytime,useauseahigh-qualityceramicdielectricCOG,X5R,orX7Rcapacitorandminimizeparasiticboardcapacitancearoundthispin.
表4liststheresetdelaytimeidealcapacitorvaluesforCCT.
表表4.
ResetDelayTimeforIdealCapacitorValuesCCTRESETDELAYTIME(tD),TYPICAL250pF1.
27ms1nF3.
57ms3.
26nF10.
5ms32.
6nF100.
45ms65.
2nF200.
40ms1uF3066.
50ms9.
1.
3RESETLatchModeTheTPS3703-Q1featuresavoltagelatchmodeontheRESETpinwhenconnectingtheCTpintocommonground.
Apull-downresistorisrecommendedtolimitcurrentconsumptionofthesystem.
Inlatchmode,iftheRESETpinislowortriggerslow,thepinwillstaylowregardlessifVSENSEiswithintheacceptablevoltageboundaries(VIT–(UV)ESETpinwilltriggerhighinstantaneouslywithoutanyresetdelay.
Avoltagegreaterthan1.
2Vtorecommendedtoensureaproperunlatch.
Useaseriesresistancetolimitcurrentwhenanunlatchvoltageisapplied.
Formoreinformation,Design2:RESETLatchModegivesanexampleofatypicallatchapplication.
图图27.
RESETLatchCircuit20TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporated9.
1.
4AdjustableVoltageThresholdsTheTPS3703-Q10.
7%maximumaccuracyallowsforadjustablevoltagethresholdsusingexternalresistorswithoutaddingmajorinaccuraciestothedevice.
Incasethatthedesiredmonitoredvoltageisnotavailable,externalresistordividerscanbeusedtosetthedesiredvoltagethresholds.
图28illustratesanexampleofhowtoadjustthevoltagethresholdwithexternalresistordividers.
Theresistorscanbecalculateddependingonthedesiredvoltagethresholdanddevicepartnumber.
TIrecommendsusingthe0.
8VvoltagethresholddevicesuchastheTPS3703B3080becauseofthebypassmodeofinternalresistorladder.
Forexample,considera2.
0Vrailbeingmonitored(VMON)usingtheTPS3703B3080variant.
Using公式4,R1=15kΩgiventhatR2=10kΩ,VMON=2V,andVSENSE=0.
8V.
Thisdeviceistypicallymeanttomonitora0.
8Vrailwith±3%voltagethresholds.
Thismeansthatthedeviceundervoltagethreshold(VIT-(UV))andovervoltagethreshold(VIT-(OV))is0.
776Vand0.
824Vrespectively.
Using公式4,VMON=1.
94VwhenVSENSE=VIT-(UV).
ThiscanbedenotedasVMON-,themonitoredundervoltagethresholdwherethedevicewillassertaresetsignal.
Using公式4again,themonitoredovervoltagethreshold(VMON+)=2.
06VwhenVSENSE=VIT+(OV).
IfawidertoleranceorUVonlythresholdisdesired,useadevicevariantshownonTable7todeterminewhatdevicepartnumbermatchesyourapplication.
VSENSE=VMON*(R2÷(R1+R2))(4)Thereareinaccuraciesthatmustbetakenintoconsiderationwhileadjustingvoltagethresholds.
Asidefromthetoleranceoftheresistordivider,thereisaninternalresistanceoftheSENSEpinthatmayaffecttheaccuracyoftheresistordivider.
Althoughexpectedtobeveryhighimpedance,usersarerecommendedtocalculatethevaluesfordesignspecifications.
Theinternalsenseresistance(RSENSE)canbecalculatedbythesensevoltage(VSENSE)dividedbythesensecurrent(ISENSE)asshownin公式6.
VSENSEcanbecalculatedusing公式4dependingontheresistordividerandmonitoredvoltage.
ISENSEcanbecalculatedusing公式5.
ISENSE=(VMON–VSENSE)÷R1–(VSENSE÷R2)(5)RSENSE=VSENSE÷ISENSE(6)图图28.
AdjustableVoltageThresholdwithExternalResistorDividers21TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporated9.
1.
5ImmunitytoSENSEPinVoltageTransientsTheTPS3703-Q1isimmunetoshortvoltagetransientspikesontheinputpins.
Sensitivitytotransientsdependsonbothtransientdurationandoverdrive(amplitude)ofthetransient.
OverdriveisdefinedbyhowmuchtheVSENSEexceedsthespecifiedthreshold,andisimportanttoknowbecausethesmallertheoverdrive,theslowertheresponseoftheoutputs(RESET).
Thresholdoverdriveiscalculatedasapercentofthethresholdinquestion,asshownin公式7:Overdrive%=|(VSENSE-(VIT-(UV)orVIT+(OV)))/VIT(Nominal)*100%|where:VSENSEisthevoltageattheSENSEpinVIT(Nominal)isthenominalthresholdvoltageVIT-(UV)andVIT+(OV)representtheactualundervoltageorovervoltagetrippingvoltage(7)9.
1.
5.
1HysteresisOvervoltageandundervoltagecomparatorsincludebuilt-inhysteresisthatprovidesnoiseimmunityandensuresstableoperation.
ForexampleifthevoltageontheSENSEpinfallsbelowVIT-(UV)oraboveVIT+(OV),thenRESETisasserted(drivenlow),thenwhenthevoltageontheSENSEpinisbetweenthepositiveandnegativethresholdvoltages,RESETdeassertsaftertheuser-definedRESETdelaytime.
Figure图29showstherelationbetweenVIT-(UV),VIT+(OV)andhysteresisvoltage(VHYS).
图图29.
SENSEPinHysteresis22TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporated9.
2TypicalApplication9.
2.
1Design1:Multi-RailWindowMonitoringforMicrocontrollerPowerRailsAtypicalapplicationfortheTPS3703-Q1isshownin图30.
TheTPS3703-Q1isusedtomonitortwoPMICvoltagerailsthatpowersthecoreandI/Ovoltageofthemicrocontrollerthatrequiresaccurateresetdelayandvoltagesupervision.
ReferencedesignTIDA-050008isanADASpowerreferencethatfocusesonimprovedvoltagesupervision.
ItutilizestheTPS3703-Q1tomonitorthecorevoltagerailofaMCUsimilartothecircuitbelow.
图图30.
TwoTPS3703-Q1MonitoringTwoMicrocontrollerPowerRails9.
2.
1.
1DesignRequirements表表5.
DesignParametersPARAMETERDESIGNREQUIREMENTDESIGNRESULTMonitoredrails3.
3-VI/Onominal,withalertsifoutsideof±8%of3.
3V(includingdeviceaccuracy),200msresetdelayWorstcaseVIT+(OV)=3.
554V(7.
7%),WorstcaseVIT–(UV)=3.
046V(-7.
7%)1.
2-VCOREnominal,withalertsifoutsideof±5%of1.
2V(includingdeviceaccuracy),10msresetdelayWorstcaseVIT+(OV)=1.
256V(4.
7%),WorstcaseVIT–(UV)=1.
144V(-4.
7%)Outputlogicvoltage5-VCMOS5-VCMOSMaximumsystemsupervisioncurrentconsumption50A14A(7AMaxeach)9.
2.
1.
2DetailedDesignProcedureDeterminewhichversionoftheTPS3703-Q1bestsuitsthemonitoredrail(VMON)andwindowtolerancesfoundonTable7.
TheTPS3703-Q1allowsovervoltageandundervoltagemonitoringforprecisevoltagesupervisionofcommonrailsbetween0.
5Vand5.
0V.
Thisapplicationcallsforverytightmonitoringoftherailwithonly±5%ofvariationallowedonthe1.
2Vcorerail.
Toensurethisrequirementismet,theTPS3703-Q1waschosenforits±4%thresholds.
The3.
3VI/Oismoreflexibleandcanoperateupto8%variance.
SincetheTPS3703-Q1comesinvarioustoleranceoptions,the±7%thresholdscanbechosenforthisvoltagerail.
Tocalculatetheworst-caseforVIT+(OV)andVIT-(UV),theaccuracymustalsobetakenintoaccount.
Theworst-caseforVIT+(OV)andVIT-(UV)canbecalculatedshownin公式8and公式9respectively:VIT+(OV-WorstCase)=VMON*(%Threshold+0.
7%)=1.
2*(+4.
7%)=1.
256V(8)VIT-(UV-WorstCase)=VMON*(%Threshold-0.
7%)=1.
2*(-4.
7%)=1.
144V(9)Whentheoutputsswitchtoahighimpedancestate,therisetimeoftheRESETpindependsonthepull-upresistanceandthecapacitanceonthatnode.
Choosepull-upresistorsthatsatisfyboththedownstreamtimingrequirementsandthesinkcurrentrequiredtohaveaVOLlowenoughfortheapplication;10kΩto1MΩresistorsareagoodchoiceforlow-capacitiveloads.
23TPS3703-Q1www.
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2.
1.
3ApplicationCurvesVSENSEStartupfrom0Vto1.
2V,VDD=3.
3V,CT=OPENVRESET=VDD=3.
3V,TPS3703A4120图图31.
TPS3703-Q1SENSEStartUpFunctionVDDStartupfrom0Vto3.
3V,VSENSE=1.
2V,CT=OPENVRESET=VDD=3.
3V,TPS3703A4120图图32.
TPS3703-Q1VDDStartUpFunctionVSENSErampfrom0Vto1.
4V,VDD=3.
3V,CT=OPENVRESET=VDD=3.
3V,TPS3703A4120图图33.
TPS3703-Q1OvervoltageandUndervoltageFunctionVDDrampfrom0Vto3.
3V,VSENSE=1.
2V,CT=OPENVRESET=VDD=3.
3V,TPS3703A4120图图34.
TPS3703-Q1VDDRampUpFunction24TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporated9.
2.
2Design2:RESETLatchModeAnothertypicalapplicationfortheTPS3703-Q1isshownin图30.
TheTPS3703-Q1isusedinaRESETlatchoutputmode.
Inlatchmode,onceRESETdrivenlogiclow,itwillstaylowregardlessofthesensevoltage.
IftheRESETpinislowonstartup,itwillalsostaylowregardlessofsensevoltage.
图图35.
WindowVoltageMonitoringwithRESETLatch9.
2.
2.
1DesignRequirements表表6.
DesignParametersPARAMETERDESIGNREQUIREMENTDESIGNRESULTMonitoredRail1.
2-VCOREnominal,withalertsifoutsideof±5%of1.
2V(includingdeviceaccuracy),LatchwhenRESETislow,untilvoltageisappliedonCTpin.
WorstcaseVIT+(OV)=1.
256V(4.
7%),WorstcaseVIT–(UV)=1.
144V(-4.
7%)Outputlogicvoltage5-VCMOS5-VCMOSMaximumdevicecurrentconsumption15A4.
5A(Typ),7A(Max)9.
2.
2.
2DetailedDesignProcedureTheRESETpincanbelatchedwhentheCTpinisconnectedtoacommongroundwithapull-downresistor.
A10kΩresistorsisrecommendedtolimitcurrentconsumption.
TounlatchthedeviceprovideavoltagetotheCTpinthatisgreaterthantheCTpincomparatorthresholdvoltage,VCT.
Avoltagegreaterthan1.
15Vtorecommendedtoensureaproperunlatch.
Useaseriesresistancetolimitcurrentwhenanunlatchvoltageisapplied.
Togobackintolatchoperation,disconnectthevoltageontheCTpin.
TheRESETpinwilltriggerhighinstanouslywithoutanyresetdelay.
25TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporated9.
2.
2.
3ApplicationCurvesVSENSErampfrom0Vto1.
4V,VDD=3.
3V,VCT=0VVRESET=VDD=3.
3V,TPS3703A4120图图36.
TPS3703-Q1SENSERampLatchFunctionVCTbiasedatleastto1.
15V,VSENSE=1.
2VVRESET=VDD=3.
3V,TPS3703A4120图图37.
TPS3703-Q1CTBiasUnlatchFunctionVSenserampfrom0Vto1.
4V,VDD=3.
3V,VRESET=VDDCTispulleddownafterRESETislow,RESETbecomeslatchedTPS3703A4120图图38.
TPS3703-Q1OvervoltageandUndervoltageLatchFunctionVDDrampupfrom0Vto3.
3V,VSENSE=1.
2V,CT=0VVRESET=VDD=3.
3V,TPS3703A4120图图39.
TPS3703-Q1VDDRampLatchFunction26TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporated10PowerSupplyRecommendations10.
1PowerSupplyGuidelinesThisdeviceisdesignedtooperatefromaninputsupplywithavoltagerangebetween1.
7Vto5.
5V.
Ithasa6-VabsolutemaximumratingontheVDDpin.
Itisgoodanalogpracticetoplacea0.
1-Fto1-FcapacitorbetweentheVDDpinandtheGNDpindependingontheinputvoltagesupplynoise.
IfthevoltagesupplyprovidingpowertoVDDissusceptibletoanylargevoltagetransientthatexceedmaximumspecifications,additionalprecautionsmustbetaken.
SeeSNVA849formoreinformation.
11Layout11.
1LayoutGuidelinesPlacetheexternalcomponentsasclosetothedeviceaspossible.
Thisconfigurationpreventsparasiticerrorsfromoccurring.
AvoidusinglongtracesfortheVDDsupplynode.
TheVDDcapacitor,alongwithparasiticinductancefromthesupplytothecapacitor,canformanLCcircuitandcreateringingwithpeakvoltagesabovethemaximumVDDvoltage.
Avoidusinglongtracesofvoltagetothesensepin.
Longtracesincreaseparasiticinductanceandcauseinaccuratemonitoringanddiagnostics.
Donotrunsensitiveanalogtracesinparallelwithdigitaltraces.
Avoidcrossingdigitalandanalogtracesifpossible,andonlymakeperpendicularcrossingswhenabsolutelynecessary.
11.
2LayoutExample图图40.
RecommendedLayout27TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporated12器器件件和和文文档档支支持持12.
1器器件件命命名名规规则则表7显示了如何根据器件型号来解译器件的功能.
表表7.
器器件件命命名名约约定定说说明明命命名名规规则则值值TPS3703TPS3703延延时时时时间间选选项项::每个器件都有两个固定延时时间,而且可以通过外部电容器器件型号来调节延迟选项窗口(OV和UV)ACT引脚断开=10ms,CT引脚连接到VDD=200ms可使用外部电容器对CT进行编程BCT引脚断开=1ms,CT引脚连接到VDD=20ms可使用外部电容器对CT进行编程CCT引脚断开=5ms,CT引脚连接到VDD=100ms可使用外部电容器对CT进行编程DCT引脚断开=50s,CT引脚连接到VDD=50s无法对CT进行编程仅UVECT引脚断开=10ms,CT引脚连接到VDD=200ms可使用外部电容器对CT进行编程FCT引脚断开=1ms,CT引脚连接到VDD=20ms可使用外部电容器对CT进行编程GCT引脚断开=5ms,CT引脚连接到VDD=100ms可使用外部电容器对CT进行编程HCT引脚断开=50s,CT引脚连接到VDD=50s无法对CT进行编程容容差差选选项项::触发电压或以上述阈值电压百分比形式表示的阈值电压3来自标称值的窗口阈值=OV:3%;UV:-3%4来自标称值的窗口阈值=OV:4%;UV:-4%5来自标称值的窗口阈值=OV:5%;UV:-5%6来自标称值的窗口阈值=OV:6%;UV:-6%7来自标称值的窗口阈值=OV:7%;UV:-7%28TPS3703-Q1ZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019www.
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cn版权2018–2019,TexasInstrumentsIncorporated器器件件命命名名规规则则(接接下下页页)表表7.
器器件件命命名名约约定定(接接下下页页)说说明明命命名名规规则则值值标称监控器阈值电压选项0500.
50V0550.
55V0600.
60V0650.
65V0700.
70V0750.
75V0800.
80V0850.
85V0900.
90V0950.
95V1001.
00V1051.
05V1101.
10V1151.
15V1201.
20V1251.
25V1301.
30V1501.
50V1801.
80V2502.
50V2802.
80V2902.
90V3303.
30V5005.
00V封装DSEWSON-6引脚(1.
5mm*1.
5mm)卷带R大卷带汽车版本Q1Q100AEC29TPS3703-Q1www.
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cnZHCSIZ9B–NOVEMBER2018–REVISEDSEPTEMBER2019版权2018–2019,TexasInstrumentsIncorporated12.
2文文档档支支持持12.
2.
1评评估估模模块块评估模块(EVM)可与TPS3703-Q1配套使用,帮助评估初始电路性能.
TPS3703-Q1评估模块(和相关的用户指南)可在德州仪器(TI)网站上的产品文件夹中获取,也可直接从TIeStore购买.
12.
3接接收收文文档档更更新新通通知知要接收文档更新通知,请导航至ti.
com.
上的器件产品文件夹.
单击右上角的通知我进行注册,即可每周接收产品信息更改摘要.
有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录.
12.
4支支持持资资源源TIE2Esupportforumsareanengineer'sgo-tosourceforfast,verifiedanswersanddesignhelp—straightfromtheexperts.
Searchexistinganswersoraskyourownquestiontogetthequickdesignhelpyouneed.
Linkedcontentisprovided"ASIS"bytherespectivecontributors.
TheydonotconstituteTIspecificationsanddonotnecessarilyreflectTI'sviews;seeTI'sTermsofUse.
12.
5商商标标E2EisatrademarkofTexasInstruments.
Allothertrademarksarethepropertyoftheirrespectiveowners.
12.
6静静电电放放电电警警告告ESD可能会损坏该集成电路.
德州仪器(TI)建议通过适当的预防措施处理所有集成电路.
如果不遵守正确的处理措施和安装程序,可能会损坏集成电路.
ESD的损坏小至导致微小的性能降级,大至整个器件故障.
精密的集成电路可能更容易受到损坏,这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符.
12.
7GlossarySLYZ022—TIGlossary.
Thisglossarylistsandexplainsterms,acronyms,anddefinitions.
13机机械械、、封封装装和和可可订订购购信信息息以下页面包含机械、封装和可订购信息.
这些信息是指定器件的最新可用数据.
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重重要要声声明明和和免免责责声声明明TI均以"原样"提供技术性及可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,不保证其中不含任何瑕疵,且不做任何明示或暗示的担保,包括但不限于对适销性、适合某特定用途或不侵犯任何第三方知识产权的暗示担保.
所述资源可供专业开发人员应用TI产品进行设计使用.
您将对以下行为独自承担全部责任:(1)针对您的应用选择合适的TI产品;(2)设计、验证并测试您的应用;(3)确保您的应用满足相应标准以及任何其他安全、安保或其他要求.
所述资源如有变更,恕不另行通知.
TI对您使用所述资源的授权仅限于开发资源所涉及TI产品的相关应用.
除此之外不得复制或展示所述资源,也不提供其它TI或任何第三方的知识产权授权许可.
如因使用所述资源而产生任何索赔、赔偿、成本、损失及债务等,TI对此概不负责,并且您须赔偿由此对TI及其代表造成的损害.
TI所提供产品均受TI的销售条款(http://www.
ti.
com.
cn/zh-cn/legal/termsofsale.
html)以及ti.
com.
cn上或随附TI产品提供的其他可适用条款的约束.
TI提供所述资源并不扩展或以其他方式更改TI针对TI产品所发布的可适用的担保范围或担保免责声明.
IMPORTANTNOTICE邮寄地址:上海市浦东新区世纪大道1568号中建大厦32楼,邮政编码:200122Copyright2020德州仪器半导体技术(上海)有限公司PACKAGEOPTIONADDENDUMwww.
ti.
com10-Dec-2020Addendum-Page1PACKAGINGINFORMATIONOrderableDeviceStatus(1)PackageTypePackageDrawingPinsPackageQtyEcoPlan(2)Leadfinish/Ballmaterial(6)MSLPeakTemp(3)OpTemp(°C)DeviceMarking(4/5)SamplesTPS3703A4120DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125ABTPS3703A4180DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125ADTPS3703A4280DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125H8TPS3703A4330DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125AETPS3703A5090DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125GWTPS3703A5180DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125GZTPS3703A5290DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125GTTPS3703A7110DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125GXTPS3703A7120DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125H1TPS3703A7125DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125ACTPS3703A7180DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125H2TPS3703A7280DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125H3TPS3703A7330DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125GVTPS3703B3080DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125BATPS3703B4250DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125H6TPS3703B5180DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125GUTPS3703C7500DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125CFTPS3703E4080DSERQ1ACTIVEWSONDSE63000RoHS&GreenNIPDAUAGLevel-1-260C-UNLIM-40to125H7(1)Themarketingstatusvaluesaredefinedasfollows:ACTIVE:Productdevicerecommendedfornewdesigns.
LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect.
PACKAGEOPTIONADDENDUMwww.
ti.
com10-Dec-2020Addendum-Page2NRND:Notrecommendedfornewdesigns.
Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartinanewdesign.
PREVIEW:Devicehasbeenannouncedbutisnotinproduction.
Samplesmayormaynotbeavailable.
OBSOLETE:TIhasdiscontinuedtheproductionofthedevice.
(2)RoHS:TIdefines"RoHS"tomeansemiconductorproductsthatarecompliantwiththecurrentEURoHSrequirementsforall10RoHSsubstances,includingtherequirementthatRoHSsubstancedonotexceed0.
1%byweightinhomogeneousmaterials.
Wheredesignedtobesolderedathightemperatures,"RoHS"productsaresuitableforuseinspecifiedlead-freeprocesses.
TImayreferencethesetypesofproductsas"Pb-Free".
RoHSExempt:TIdefines"RoHSExempt"tomeanproductsthatcontainleadbutarecompliantwithEURoHSpursuanttoaspecificEURoHSexemption.
Green:TIdefines"Green"tomeanthecontentofChlorine(Cl)andBromine(Br)basedflameretardantsmeetJS709Blowhalogenrequirementsof<=1000ppmthreshold.
Antimonytrioxidebasedflameretardantsmustalsomeetthe<=1000ppmthresholdrequirement.
(3)MSL,PeakTemp.
-TheMoistureSensitivityLevelratingaccordingtotheJEDECindustrystandardclassifications,andpeaksoldertemperature.
(4)Theremaybeadditionalmarking,whichrelatestothelogo,thelottracecodeinformation,ortheenvironmentalcategoryonthedevice.
(5)MultipleDeviceMarkingswillbeinsideparentheses.
OnlyoneDeviceMarkingcontainedinparenthesesandseparatedbya"~"willappearonadevice.
IfalineisindentedthenitisacontinuationofthepreviouslineandthetwocombinedrepresenttheentireDeviceMarkingforthatdevice.
(6)Leadfinish/Ballmaterial-OrderableDevicesmayhavemultiplematerialfinishoptions.
Finishoptionsareseparatedbyaverticalruledline.
Leadfinish/Ballmaterialvaluesmaywraptotwolinesifthefinishvalueexceedsthemaximumcolumnwidth.
ImportantInformationandDisclaimer:TheinformationprovidedonthispagerepresentsTI'sknowledgeandbeliefasofthedatethatitisprovided.
TIbasesitsknowledgeandbeliefoninformationprovidedbythirdparties,andmakesnorepresentationorwarrantyastotheaccuracyofsuchinformation.
Effortsareunderwaytobetterintegrateinformationfromthirdparties.
TIhastakenandcontinuestotakereasonablestepstoproviderepresentativeandaccurateinformationbutmaynothaveconducteddestructivetestingorchemicalanalysisonincomingmaterialsandchemicals.
TIandTIsuppliersconsidercertaininformationtobeproprietary,andthusCASnumbersandotherlimitedinformationmaynotbeavailableforrelease.
InnoeventshallTI'sliabilityarisingoutofsuchinformationexceedthetotalpurchasepriceoftheTIpart(s)atissueinthisdocumentsoldbyTItoCustomeronanannualbasis.
TAPEANDREELINFORMATION*AlldimensionsarenominalDevicePackageTypePackageDrawingPinsSPQReelDiameter(mm)ReelWidthW1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W(mm)Pin1QuadrantTPS3703A4120DSERQ1WSONDSE63000178.
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ti.
com27-Sep-2019PackMaterials-Page1*AlldimensionsarenominalDevicePackageTypePackageDrawingPinsSPQLength(mm)Width(mm)Height(mm)TPS3703A4120DSERQ1WSONDSE63000205.
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0PACKAGEMATERIALSINFORMATIONwww.
ti.
com27-Sep-2019PackMaterials-Page2重重要要声声明明和和免免责责声声明明TI均以"原样"提供技术性及可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,不保证其中不含任何瑕疵,且不做任何明示或暗示的担保,包括但不限于对适销性、适合某特定用途或不侵犯任何第三方知识产权的暗示担保.
所述资源可供专业开发人员应用TI产品进行设计使用.
您将对以下行为独自承担全部责任:(1)针对您的应用选择合适的TI产品;(2)设计、验证并测试您的应用;(3)确保您的应用满足相应标准以及任何其他安全、安保或其他要求.
所述资源如有变更,恕不另行通知.
TI对您使用所述资源的授权仅限于开发资源所涉及TI产品的相关应用.
除此之外不得复制或展示所述资源,也不提供其它TI或任何第三方的知识产权授权许可.
如因使用所述资源而产生任何索赔、赔偿、成本、损失及债务等,TI对此概不负责,并且您须赔偿由此对TI及其代表造成的损害.
TI所提供产品均受TI的销售条款(http://www.
ti.
com.
cn/zh-cn/legal/termsofsale.
html)以及ti.
com.
cn上或随附TI产品提供的其他可适用条款的约束.
TI提供所述资源并不扩展或以其他方式更改TI针对TI产品所发布的可适用的担保范围或担保免责声明.
IMPORTANTNOTICE邮寄地址:上海市浦东新区世纪大道1568号中建大厦32楼,邮政编码:200122Copyright2020德州仪器半导体技术(上海)有限公司