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IntelXeonProcessorE5v2andE7v2ProductFamiliesUncorePerformanceMonitoringReferenceManualReferenceNumber:329468-002February20142ReferenceNumber:329468-002INFORMATIONINTHISDOCUMENTISPROVIDEDINCONNECTIONWITHINTELPRODUCTS.
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IntelCorporationReferenceNumber:329468-0023Contents1Introduction51.
1Introduction51.
2UncorePMONOverview.
71.
3SectionReferences81.
4UncorePMON-TypicalControl/CounterLogic91.
5UncorePMUSummaryTables101.
6OnParsingandUsingDerivedEvents.
131.
6.
1OnCommonTermsfoundinDerivedEvents142UncorePerformanceMonitoring152.
1UncorePer-SocketPerformanceMonitoringControl.
152.
1.
1CounterOverflow152.
1.
1.
1FreezingonCounterOverflow.
152.
1.
1.
2PMIonCounterOverflow152.
1.
2SettingupaMonitoringSession152.
1.
3ReadingtheSampleInterval.
172.
1.
4EnablingaNewSampleIntervalfromFrozenCounters182.
1.
5GlobalPerformanceMonitors182.
1.
5.
1GlobalPMONGlobalControl/StatusRegisters.
182.
2UBoxPerformanceMonitoring202.
2.
1OverviewoftheUBox202.
2.
2UBoxPerformanceMonitoringOverview212.
2.
2.
1UBoxPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)212.
2.
3UBoxPerformanceMonitors212.
2.
3.
1UBoxBoxLevelPMONState222.
2.
3.
2UBoxPMONstate-Counter/ControlPairs.
222.
2.
4UBOXBoxEventsOrderedByCode242.
2.
5UBOXBoxPerformanceMonitorEventList242.
3CacheingAgent(Cbo)PerformanceMonitoring252.
3.
1OverviewoftheCBo252.
3.
2CBoPerformanceMonitoringOverview262.
3.
2.
1SpecialNoteonCBoOccupancyEvents.
262.
3.
3CBoPerformanceMonitors.
262.
3.
3.
1CBoBoxLevelPMONState.
322.
3.
3.
2UCBoPMONstate-Counter/ControlPairs332.
3.
3.
3CBoFilterRegisters(Cn_MSR_PMON_BOX_FILTER{0,1}342.
3.
4CBoPerformanceMonitoringEvents.
362.
3.
4.
1AnOverview:362.
3.
4.
2AcronymsfrequentlyusedinCBoEvents:372.
3.
4.
3TheQueues:372.
3.
5CBOBoxEventsOrderedByCode372.
3.
6CBOBoxCommonMetrics(DerivedEvents)382.
3.
7CBOBoxPerformanceMonitorEventList402.
4HomeAgent(HA)PerformanceMonitoring542.
4.
1OverviewoftheHomeAgent542.
4.
2HAPerformanceMonitoringOverview.
542.
4.
2.
1HAPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)552.
4.
2.
2HAPerformanceMonitors.
552.
4.
2.
3HABoxLevelPMONState552.
4.
2.
4HAPMONstate-Counter/ControlPairs.
562.
4.
3HAPerformanceMonitoringEvents582.
4.
3.
1OntheMajorHAStructures:594ReferenceNumber:329468-0022.
4.
4HABoxEventsOrderedByCode.
592.
4.
5HABoxCommonMetrics(DerivedEvents)602.
4.
6HABoxPerformanceMonitorEventList602.
5MemoryController(iMC)PerformanceMonitoring.
762.
5.
1OverviewoftheiMC.
762.
5.
2FunctionalOverview.
762.
5.
3iMCPerformanceMonitoringOverview772.
5.
3.
1iMCPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)772.
5.
4iMCPerformanceMonitors.
782.
5.
4.
1MCBoxLevelPMONState782.
5.
4.
2MCPMONstate-Counter/ControlPairs792.
5.
5iMCPerformanceMonitoringEvents.
812.
5.
5.
1AnOverview:812.
5.
6iMCBoxEventsOrderedByCode.
812.
5.
7iMCBoxCommonMetrics(DerivedEvents)832.
5.
8iMCBoxPerformanceMonitorEventList842.
6IRPPerformanceMonitoring992.
6.
1OverviewoftheR2PCIeBox.
992.
6.
2IRPPerformanceMonitoringOverview992.
6.
3IRPPerformanceMonitors.
992.
6.
3.
1IRPBoxLevelPMONState.
1002.
6.
3.
2IRPPMONstate-Counter/ControlPairs.
1002.
6.
4IRPPerformanceMonitoringEvents.
1012.
6.
4.
1AnOverview.
1012.
6.
5IRPBoxEventsOrderedByCode1012.
6.
6IRPBoxPerformanceMonitorEventList.
1022.
7PowerControl(PCU)PerformanceMonitoring1092.
7.
1OverviewofthePCU1092.
7.
2PCUPerformanceMonitoringOverview1092.
7.
2.
1PCUPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)1102.
7.
3PCUPerformanceMonitors1102.
7.
3.
1PCUBoxLevelPMONState1112.
7.
3.
2PCUPMONstate-Counter/ControlPairs.
1112.
7.
4PCUPerformanceMonitoringEvents1142.
7.
4.
1AnOverview:1142.
7.
5PCUBoxEventsOrderedByCode1152.
7.
6PCUBoxCommonMetrics(DerivedEvents)1172.
7.
7PCUBoxPerformanceMonitorEventList.
1182.
8IntelQPILinkLayerPerformanceMonitoring.
1312.
8.
1OverviewoftheIntelQPIBox.
1312.
8.
2IntelQPIPerformanceMonitoringOverview.
1312.
8.
2.
1QPIPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)1312.
8.
3IntelQPIPerformanceMonitors.
1322.
8.
3.
1IntelQPIBoxLevelPMONState1332.
8.
3.
2IntelQPIPMONstate-Counter/ControlPairs1332.
8.
3.
3IntelQPIRegistersforPacketMask/MatchFacility.
1342.
8.
3.
4IntelQPIExtraRegisters-CompanionstoPMONHW.
1382.
8.
4IntelQPILLPerformanceMonitoringEvents.
1392.
8.
4.
1AnOverview.
1392.
8.
5QPILLBoxEventsOrderedByCode.
1392.
8.
6QPILLBoxCommonMetrics(DerivedEvents)1412.
8.
7QPILLBoxPerformanceMonitorEventList1432.
9R2PCIePerformanceMonitoring.
1632.
9.
1OverviewoftheR2PCIeBox.
163ReferenceNumber:329468-00252.
9.
2R2PCIePerformanceMonitoringOverview.
1632.
9.
2.
1R2PCIePMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)1632.
9.
3R2PCIePerformanceMonitors1642.
9.
3.
1R2PCIeBoxLevelPMONState1642.
9.
3.
2R2PCIePMONstate-Counter/ControlPairs.
1652.
9.
4R2PCIePerformanceMonitoringEvents1662.
9.
4.
1AnOverview1662.
9.
5R2PCIeBoxEventsOrderedByCode1662.
9.
6R2PCIeBoxCommonMetrics(DerivedEvents)1662.
9.
7R2PCIeBoxPerformanceMonitorEventList.
1672.
10R3QPIPerformanceMonitoring.
1732.
10.
1OverviewoftheR3QPIBox.
1732.
10.
2R3QPIPerformanceMonitoringOverview.
1732.
10.
2.
1R3QPIPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)1732.
10.
3R3QPIPerformanceMonitors.
1742.
10.
3.
1R3QPIBoxLevelPMONState1742.
10.
3.
2R3QPIPMONstate-Counter/ControlPairs1752.
10.
4R3QPIPerformanceMonitoringEvents.
1762.
10.
4.
1AnOverview1762.
10.
5R3QPIBoxEventsOrderedByCode.
1772.
10.
6R3QPIBoxCommonMetrics(DerivedEvents)1772.
10.
7R3QPIBoxPerformanceMonitorEventList1772.
11PacketMatchingReference1906ReferenceNumber:329468-002Figures1-1IntelXeonProcessorE7-8800v2familyBlockDiagram.
51-2IntelXeonProcessorE5-2600v2ProductFamilyBlockDiagram.
61-3IntelXeonProcessorE5-1600v2ProductFamilyBlockDiagram.
71-4PerfmonControl/CounterBlockDiagram9Tables1-1Per-BoxPerformanceMonitoringCapabilities81-2MSRSpaceUncorePerformanceMonitoringRegisters101-3PCICFGSpaceUncorePerformanceMonitoringRegisters.
122-1GlobalPerformanceMonitoringControlMSRs.
182-2U_MSR_PMON_GLOBAL_CTLRegister–FieldDefinitions192-3U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitions202-4U_MSR_PMON_GLOBAL_CONFIGRegister–FieldDefinitions202-5U_MSR_PMON_BOX_STATUSRegister–FieldDefinitions222-6U_MSR_PMON_CTL{1-0}Register–FieldDefinitions.
222-7U_MSR_PMON_CTR{1-0}Register–FieldDefinitions232-8U_MSR_PMON_FIXED_CTLRegister–FieldDefinitions.
232-9U_MSR_PMON_FIXED_CTRRegister–FieldDefinitions232-10UnitMasksforEVENT_MSG.
242-11UnitMasksforPHOLD_CYCLES252-12CBoPerformanceMonitoringMSRs.
262-13Cn_MSR_PMON_BOX_CTLRegister–FieldDefinitions.
332-14Cn_MSR_PMON_CTL{3-0}Register–FieldDefinitions332-15Cn_MSR_PMON_CTR{3-0}Register–FieldDefinitions.
342-16Cn_MSR_PMON_BOX_FILTERRegister–FieldDefinitions342-17Cn_MSR_PMON_BOX_FILTER1Register–FieldDefinitions.
352-18OpcodeMatchbyIDIPacketTypeforCn_MSR_PMON_BOX_FILTER.
opc.
352-19UnitMasksforLLC_LOOKUP.
412-20UnitMasksforLLC_VICTIMS412-21UnitMasksforMISC.
422-22UnitMasksforRING_AD_USED.
432-23UnitMasksforRING_AK_USED.
432-24UnitMasksforRING_BL_USED442-25UnitMasksforRING_BOUNCES452-26UnitMasksforRING_IV_USED452-27UnitMasksforRxR_EXT_STARVED.
462-28UnitMasksforRxR_INSERTS.
462-29UnitMasksforRxR_IPQ_RETRY472-30UnitMasksforRxR_IRQ_RETRY.
472-31UnitMasksforRxR_ISMQ_RETRY.
482-32UnitMasksforRxR_OCCUPANCY.
492-33UnitMasksforTOR_INSERTS502-34UnitMasksforTOR_OCCUPANCY512-35UnitMasksforTxR_ADS_USED.
532-36UnitMasksforTxR_INSERTS.
532-37HAPerformanceMonitoringMSRs552-38HA_PCI_PMON_BOX_CTLRegister–FieldDefinitions.
562-39HA_PCI_PMON_BOX_STATUSRegister–FieldDefinitions562-40HA_PCI_PMON_CTL{3-0}Register–FieldDefinitions57ReferenceNumber:329468-00272-41HA_PCI_PMON_CTR{3-0}Register–FieldDefinitions572-42HA_PCI_PMON_BOX_OPCODEMATCHRegister–FieldDefinitions.
582-43HA_PCI_PMON_BOX_ADDRMATCH1Register–FieldDefinitions.
582-44UnitMasksforADDR_OPC_MATCH612-45UnitMasksforBT_OCCUPANCY622-46UnitMasksforBYPASS_IMC.
622-47UnitMasksforCONFLICT_CYCLES632-48UnitMasksforDIRECTORY_LOOKUP642-49UnitMasksforDIRECTORY_UPDATE642-50UnitMasksforIGR_NO_CREDIT_CYCLES.
652-51UnitMasksforIMC_READS.
652-52UnitMasksforIMC_WRITES662-53UnitMasksforIODC_CONFLICTS.
662-54UnitMasksforOSB.
672-55UnitMasksforOSB_EDR672-56UnitMasksforREQUESTS.
672-57UnitMasksforRING_AD_USED682-58UnitMasksforRING_AK_USED692-59UnitMasksforRING_BL_USED.
692-60UnitMasksforRPQ_CYCLES_NO_REG_CREDITS.
702-61UnitMasksforSNOOP_RESP.
712-62UnitMasksforSNP_RESP_RECV_LOCAL722-63UnitMasksforTAD_REQUESTS_G0.
732-64UnitMasksforTAD_REQUESTS_G1.
732-65UnitMasksforTxR_AD_CYCLES_FULL.
742-66UnitMasksforTxR_AK_CYCLES_FULL742-67UnitMasksforTxR_BL742-68UnitMasksforTxR_BL_CYCLES_FULL752-69UnitMasksforTxR_BL_OCCUPANCY752-70UnitMasksforWPQ_CYCLES_NO_REG_CREDITS762-71iMCPerformanceMonitoringMSRs.
782-72MC_CHy_PCI_PMON_BOX_CTLRegister–FieldDefinitions.
792-73MC_CHy_PCI_PMON_BOX_STATUSRegister–FieldDefinitions.
792-74MC_CHy_PCI_PMON_CTL{3-0}Register–FieldDefinitions802-75MC_CHy_PCI_PMON_FIXED_CTLRegister–FieldDefinitions812-76MC_CHy_PCI_PMON_CTR{FIXED,3-0}Register–FieldDefinitions812-77UnitMasksforACT_COUNT842-78UnitMasksforBYP_CMDS842-79UnitMasksforCAS_COUNT852-80UnitMasksforDRAM_REFRESH.
862-81UnitMasksforMAJOR_MODES862-82UnitMasksforPOWER_CKE_CYCLES.
872-83UnitMasksforPOWER_THROTTLE_CYCLES.
882-84UnitMasksforPREEMPTION892-85UnitMasksforPRE_COUNT.
892-86UnitMasksforRD_CAS_PRIO892-87UnitMasksforRD_CAS_RANK0.
902-88UnitMasksforRD_CAS_RANK1.
902-89UnitMasksforRD_CAS_RANK2.
912-90UnitMasksforRD_CAS_RANK3.
912-91UnitMasksforRD_CAS_RANK4.
912-92UnitMasksforRD_CAS_RANK5.
928ReferenceNumber:329468-0022-93UnitMasksforRD_CAS_RANK6922-94UnitMasksforRD_CAS_RANK7932-95UnitMasksforVMSE_WR_PUSH942-96UnitMasksforWMM_TO_RMM.
942-97UnitMasksforWR_CAS_RANK0.
962-98UnitMasksforWR_CAS_RANK1.
962-99UnitMasksforWR_CAS_RANK2.
962-100UnitMasksforWR_CAS_RANK3.
972-101UnitMasksforWR_CAS_RANK4.
972-102UnitMasksforWR_CAS_RANK5.
982-103UnitMasksforWR_CAS_RANK6.
982-104UnitMasksforWR_CAS_RANK7.
992-105IRPPerformanceMonitoringRegisters992-106IRP_PCI_PMON_BOX_CTLRegister–FieldDefinitions1002-107IRP_PCI_PMON_BOX_STATUSRegister–FieldDefinitions1002-108IRP_PCI_PMON_CTL{3-0}Register–FieldDefinitions1012-109IRP{0,1}_PCI_PMON_CTR{1-0}Register–FieldDefinitions1012-110UnitMasksforADDRESS_MATCH.
1032-111UnitMasksforCACHE_ACK_PENDING_OCCUPANCY1032-112UnitMasksforCACHE_OWN_OCCUPANCY.
1032-113UnitMasksforCACHE_READ_OCCUPANCY1042-114UnitMasksforCACHE_TOTAL_OCCUPANCY.
1042-115UnitMasksforCACHE_WRITE_OCCUPANCY.
1052-116UnitMasksforTICKLES1072-117UnitMasksforTRANSACTIONS.
1082-118PCUPerformanceMonitoringMSRs.
1102-119PCU_MSR_PMON_BOX_CTLRegister–FieldDefinitions.
1112-120PCU_MSR_PMON_BOX_STATUSRegister–FieldDefinitions.
1112-121PCU_MSR_PMON_CTL{3-0}Register–FieldDefinitions1122-122PCU_MSR_PMON_CTR{3-0}Register–FieldDefinitions.
1132-123PCU_MSR_PMON_BOX_FILTERRegister–FieldDefinitions1142-124PCU_MSR_CORE_C6_CTRRegister–FieldDefinitions1142-125PCU_MSR_CORE_C3_CTRRegister–FieldDefinitions1142-126PCUConfigurationExamples1152-127UnitMasksforPOWER_STATE_OCCUPANCY1292-128IntelQPIPerformanceMonitoringRegisters1322-129Q_Py_PCI_PMON_BOX_CTLRegister–FieldDefinitions.
1332-130Q_Py_PCI_PMON_BOX_STATUSRegister–FieldDefinitions.
1332-131Q_Py_PCI_PMON_CTL{3-0}Register–FieldDefinitions1342-132Q_Py_PCI_PMON_CTR{3-0}Register–FieldDefinitions.
1342-133Q_Py_PCI_PMON_PKT_MATCH1Registers1352-134Q_Py_PCI_PMON_PKT_MATCH0Registers1352-135Q_Py_PCI_PMON_PKT_MASK1Registers1362-136Q_Py_PCI_PMON_PKT_MASK0Registers1362-137MessageEventsDerivedfromtheMatch/Maskfilters1372-138QPI_RATE_STATUSRegister–FieldDefinitions1382-139UnitMasksforDIRECT2CORE1442-140UnitMasksforRxL_CREDITS_CONSUMED_VN01452-141UnitMasksforRxL_CREDITS_CONSUMED_VN11462-142UnitMasksforRxL_FLITS_G0.
1472-143UnitMasksforRxL_FLITS_G1.
1482-144UnitMasksforRxL_FLITS_G2.
149ReferenceNumber:329468-00292-145UnitMasksforRxL_INSERTS_DRS.
1502-146UnitMasksforRxL_INSERTS_HOM1502-147UnitMasksforRxL_INSERTS_NCB.
1512-148UnitMasksforRxL_INSERTS_NCS.
1512-149UnitMasksforRxL_INSERTS_NDR.
1512-150UnitMasksforRxL_INSERTS_SNP1522-151UnitMasksforRxL_OCCUPANCY_DRS.
1522-152UnitMasksforRxL_OCCUPANCY_HOM1532-153UnitMasksforRxL_OCCUPANCY_NCB1532-154UnitMasksforRxL_OCCUPANCY_NCS1532-155UnitMasksforRxL_OCCUPANCY_NDR.
1542-156UnitMasksforRxL_OCCUPANCY_SNP1542-157UnitMasksforTxL_FLITS_G0.
1562-158UnitMasksforTxL_FLITS_G1.
1562-159UnitMasksforTxL_FLITS_G2.
1572-160UnitMasksforTxR_AD_HOM_CREDIT_ACQUIRED1582-161UnitMasksforTxR_AD_HOM_CREDIT_OCCUPANCY1592-162UnitMasksforTxR_AD_NDR_CREDIT_ACQUIRED.
1592-163UnitMasksforTxR_AD_NDR_CREDIT_OCCUPANCY.
1592-164UnitMasksforTxR_AD_SNP_CREDIT_ACQUIRED1602-165UnitMasksforTxR_AD_SNP_CREDIT_OCCUPANCY1602-166UnitMasksforTxR_BL_DRS_CREDIT_ACQUIRED.
1612-167UnitMasksforTxR_BL_DRS_CREDIT_OCCUPANCY1612-168UnitMasksforTxR_BL_NCB_CREDIT_ACQUIRED.
1612-169UnitMasksforTxR_BL_NCB_CREDIT_OCCUPANCY1622-170UnitMasksforTxR_BL_NCS_CREDIT_ACQUIRED.
1622-171UnitMasksforTxR_BL_NCS_CREDIT_OCCUPANCY1622-172R2PCIePerformanceMonitoringRegisters.
1642-173R2_PCI_PMON_BOX_CTLRegister–FieldDefinitions.
1642-174R2_PCI_PMON_BOX_STATUSRegister–FieldDefinitions.
1652-175R2_PCI_PMON_CTL{3-0}Register–FieldDefinitions1652-176R2_PCI_PMON_CTR{3-0}Register–FieldDefinitions.
1662-177UnitMasksforRING_AD_USED1672-178UnitMasksforRING_AK_USED1682-179UnitMasksforRING_BL_USED.
1692-180UnitMasksforRING_IV_USED1702-181UnitMasksforRxR_AK_BOUNCES1702-182UnitMasksforRxR_CYCLES_NE1702-183UnitMasksforRxR_INSERTS1712-184UnitMasksforRxR_OCCUPANCY1712-185UnitMasksforTxR_CYCLES_FULL.
1712-186UnitMasksforTxR_CYCLES_NE1722-187UnitMasksforTxR_NACK_CCW.
1722-188UnitMasksforTxR_NACK_CW1722-189R3QPIPerformanceMonitoringRegisters1742-190R3_Ly_PCI_PMON_BOX_CTLRegister–FieldDefinitions.
1752-191R3_Ly_PCI_PMON_BOX_STATUSRegister–FieldDefinitions.
1752-192R3_Ly_PCI_PMON_CTL{2-0}Register–FieldDefinitions1762-193R3_Ly_PCI_PMON_CTR{2-0}Register–FieldDefinitions.
1762-194UnitMasksforC_HI_AD_CREDITS_EMPTY1782-195UnitMasksforC_LO_AD_CREDITS_EMPTY1782-196UnitMasksforHA_R2_BL_CREDITS_EMPTY17910ReferenceNumber:329468-0022-197UnitMasksforQPI0_AD_CREDITS_EMPTY.
1792-198UnitMasksforQPI0_BL_CREDITS_EMPTY1792-199UnitMasksforQPI1_AD_CREDITS_EMPTY.
1802-200UnitMasksforQPI1_BL_CREDITS_EMPTY1802-201UnitMasksforRING_AD_USED.
1812-202UnitMasksforRING_AK_USED.
1812-203UnitMasksforRING_BL_USED1822-204UnitMasksforRING_IV_USED1822-205UnitMasksforRxR_CYCLES_NE.
1832-206UnitMasksforRxR_INSERTS.
1842-207UnitMasksforRxR_OCCUPANCY.
1842-208UnitMasksforTxR_NACK_CCW1852-209UnitMasksforTxR_NACK_CW.
1852-210UnitMasksforVN0_CREDITS_REJECT1862-211UnitMasksforVN0_CREDITS_USED.
1862-212UnitMasksforVN1_CREDITS_REJECT1872-213UnitMasksforVN1_CREDITS_USED.
1882-214UnitMasksforVNA_CREDITS_ACQUIRED1892-215UnitMasksforVNA_CREDITS_REJECT1892-216IntelQuickPathInterconnectPacketMessageClasses1902-217OpcodeMatchbyMessageClass1902-218Opcodes(AlphabeticalListing)191§ReferenceNumber:329468-0025IntroductionCHAPTER1INTRODUCTION1.
1INTRODUCTIONTheuncoresub-systemoftheIntelXeonprocessorE7-8800v2E5-2600v2,andE5-1600v2ProductFamiliesareshowninFigure1-1,Figure1-2andFigure1-3.
Theuncoresub-systemconsistsofavarietyofcomponents,rangingfromtheCBoxcachingagenttothepowercontrollerunit(PCU),integratedmemorycontroller(iMC)andhomeagent(HA),tonameafew.
Mostofthesecomponentsprovidesimilarperformancemonitoringcapabilities.
Figure1-1.
IntelXeonProcessorE7-8800v2familyBlockDiagramNOTEThisdiagramrepresentsonepossibleEXconfiguration.
Notallskussupportallfeatures.
Introduction6ReferenceNumber:329468-002Figure1-2.
IntelXeonProcessorE5-2600v2ProductFamilyBlockDiagramNOTEThisdiagramrepresentsonepossibleEPconfiguration.
Notallskussupportallfeatures.
ReferenceNumber:329468-0027IntroductionFigure1-3.
IntelXeonProcessorE5-1600v2ProductFamilyBlockDiagramNOTEThisdiagramrepresentsonepossibleENconfiguration.
Notallskussupportallfeatures.
1.
2UNCOREPMONOVERVIEWTheuncoreperformancemonitoringfacilitiesareorganizedintoper-componentperformancemoni-toring(or'PMON')units.
APMONunitwithinanuncorecomponentmaycontainoneofmoresetsofcounterregisters.
WiththeexceptionoftheUBox,eachPMONunitprovidesaunit-levelcontrolregistertosynchronizeactionsacrossthecounterswithinthebox(e.
g.
tostart/stopcounting).
Eventscanbecollectedbyreadingasetoflocalcounterregisters.
Eachcounterregisterispairedwithadedicatedcontrolregisterusedtospecifywhattocount(i.
e.
throughtheeventselect/umaskfields)andhowtocountit.
Someunitsprovidetheabilitytospecifyadditionalinformationthatcanbeusedto'filter'themonitoredevents(e.
g.
,C-box;seeSection2.
3.
3.
3,"CBoFilterRegisters(Cn_MSR_PMON_BOX_FILTER{0,1})").
EachoftheseboxescommunicateswiththeU-BoxwhichcontainsregisterstocontrolalluncorePMUactivity(asoutlinedinSection2.
1,"UncorePer-SocketPerformanceMonitoringControl").
Uncoreperformancemonitorsrepresentaper-socketresourcethatisnotmeanttobeaffectedbycontextIntroduction8ReferenceNumber:329468-002switchesandthreadmigrationperformedbytheOS,itisrecommendedthatthemonitoringsoftwareagentestablishafixedaffinitybindingtopreventcross-talkofeventcountsfromdifferentuncorePMU.
Theprogramminginterfaceofthecounterregistersandcontrolregistersfallintotwoaddressspaces:AccessedbyMSRarePMONregisterswithintheCbounits,PCU,andU-Box,seeTable1-2.
AccessbyPCIdeviceconfigurationspacearePMONregisterswithintheHA,iMC,QPI,R2PCIeandR3QPIunits,seeTable1-3.
Irrespectiveoftheaddress-spacedifferenceandwithonlyminorexceptions,thebit-granularlayoutofthecontrolregisterstoprogrameventcode,unitmask,start/stop,andsignalfilteringviathreshold/edgedetectarethesame.
Softwaremaybenotifiedofanoverflowinguncorecounteronanycore.
Thegeneralperformancemonitoringcapabilitiesofeachboxareoutlinedinthefollowingtable.
1.
3SECTIONREFERENCESThefollowingsectionsprovideabreakdownoftheperformancemonitoringcapabilitiesforeachbox.
Section2.
1,"UncorePer-SocketPerformanceMonitoringControl"Section2.
2,"UBoxPerformanceMonitoring"Section2.
3,"CacheingAgent(Cbo)PerformanceMonitoring"Section2.
4,"HomeAgent(HA)PerformanceMonitoring"Section2.
5,"MemoryController(iMC)PerformanceMonitoring"Section2.
6,"IRPPerformanceMonitoring"Section2.
7,"PowerControl(PCU)PerformanceMonitoring"Section2.
8,"IntelQPILinkLayerPerformanceMonitoring"Section2.
9,"R2PCIePerformanceMonitoring"Section2.
10,"R3QPIPerformanceMonitoring"Section2.
11,"PacketMatchingReference"Table1-1.
Per-BoxPerformanceMonitoringCapabilitiesBox#Boxes#Counters/Box#QueueEnabledPacketMatch/MaskFiltersBitWidthC-Boxupto1541Y44HAupto244Y48iMCupto2(eachwith4channels)4(+1)(perchannel)4N48PCU14(+2)4N48QPIupto2(2or3ports)4(perport)4Y48R2PCIe141N44R3QPIupto2(2or3links)3(perlink)1N44U-Box12(+1)0N44IRP144N48ReferenceNumber:329468-0029Introduction1.
4UNCOREPMON-TYPICALCONTROL/COUNTERLOGICFollowingisadiagramofthestandardperfmoncounterblockillustratinghoweventinformationisroutedandstoredwithineachcounterandhowitspairedcontrolregisterhelpstoselectandfiltertheincominginformation.
DetailsforhowcontrolbitsaffecteventinformationispresentedineachoftheboxsubsectionsofChapter2,withsomesummaryinformationbelow.
NOTE:ThePCUusesanadaptationofthisblock(refertoSection2.
7.
3,"PCUPerformanceMonitors"moreinformation).
Alsonotethatonlyasubsetoftheavailablecontrolbitsarepresentedinthediagram.
Figure1-4.
PerfmonControl/CounterBlockDiagramSelectingWhatToMonitor:Themaintaskofaconfigurationregisteristoselecttheeventtobemonitoredbyitsrespectivedatacounter.
Settingthe.
ev_seland.
umaskfieldsperformstheeventselection.
TellingHWthattheControlRegisterIsSet:.
enbitmustbesetto1toenablecounting.
OncecountinghasbeenenabledintheboxandgloballevelofthePerformanceMonitoringHierarchy(refertoSection2.
1.
2,"SettingupaMonitoringSession"formoreinformation),thepaireddataregisterwillbegintocollectevents.
Additionalcontrolbitsinclude:Introduction10ReferenceNumber:329468-002NotificationafterXevents:.
-insteadofmanuallystoppingthecountersatintervals(oftenwallclocktime)pre-determinedbysoftware,hardwarecanbesettonotifymonitoringsoftwarewhenasetnumberofeventshasoccurred.
TheOverflowEnablebitisprovidedforjustthatpurpose.
SeeSection2.
1.
1,"CounterOverflow"formoreinformationonhowtousethismechanism.
ApplyingaThresholdtoIncomingEvents:.
thresh-sincemostcounterscanincrementbyavaluegreaterthan1,athresholdcanbeappliedtogenerateaneventbasedontheoutcomeofthecompar-ison.
Ifthe.
threshissettoanon-zerovalue,thatvalueiscomparedagainsttheincomingcountforthateventineachcycle.
Iftheincomingcountis>=thethresholdvalue,thentheeventcountcapturedinthedataregisterwillbeincrementedby1.
Usingthethresholdfieldtogenerateadditionaleventscanbeparticularlyusefulwhenappliedtoaqueueoccupancycount.
Forexample,ifaqueueisknowntocontaineightentries,itmaybeusefultoknowhowoftenitcontains6ormoreentries(i.
e.
AlmostFull)orwhenitcontains1ormoreentries(i.
e.
NotEmpty).
NOTEForIntelXeonProcessorE5v2andE7v2ProductFamiliesthe.
edge_detbitfollowthethresholdcomparisoninsequence.
Ifauserwishestoapplythesebitstoeventsthatonlyincrementby1percycle,.
threshmustbesetto0x1.
CountingStateTransitionsInsteadofper-CycleEvents:.
edge_det-Ratherthanaccumulatingtherawcounteachcycle(foreventsthatcanincrementby1percycle),theregistercancapturetran-sitionsfromnoeventtoaneventincoming(i.
e.
the'RisingEdge').
1.
5UNCOREPMUSUMMARYTABLESFollowingisalistoftheregistersprovidedintheUncoreforPerformanceMonitoring.
ItshouldbenotedthattheUncorePerformanceMonitorsaresplitbetweenMSRspace(U,CBoandPCU)andPCICFGspace.
Table1-2.
MSRSpaceUncorePerformanceMonitoringRegistersBoxMSRAddressesDescriptionC-BoxCountersC-Box140xED9-0xED6CounterRegisters0xED4,0xEDACounterFilters0xED3-0xED0CounterConfigRegisters0xEC4BoxControlC-Box130xEB9-0xEB6CounterRegisters0xEB4,0xEBACounterFilters0xEB3-0xEB0CounterConfigRegisters0xEA4BoxControlC-Box120xE99-0xE96CounterRegisters0xE94,0xE9ACounterFilters0xE93-0xE90CounterConfigRegisters0xE84BoxControlC-Box110xE79-0xE76CounterRegisters0xE74,0xE7ACounterFiltersReferenceNumber:329468-00211Introduction0xE73-0xE70CounterConfigRegisters0xE64BoxControlC-Box100xE59-0xE56CounterRegisters0xE54,0xE5ACounterFilters0xE53-0xE50CounterConfigRegisters0xE44BoxControlC-Box90xE39-0xE36CounterRegisters0xE34,0xE3ACounterFilters0xE33-0xE30CounterConfigRegisters0xE24BoxControlC-Box80xE19-0xE16CounterRegisters0xE14,0xE1ACounterFilters0xE13-0xE10CounterConfigRegisters0xE04BoxControlC-Box70xDF9-0xDF6CounterRegisters0xDF4,0xDFACounterFilters0xDF3-0xDF0CounterConfigRegisters0xDE4BoxControlC-Box60xDD9-0xDD6CounterRegisters0xDD4,0xDDACounterFilters0xDD3-0xDD0CounterConfigRegisters0xDC4BoxControlC-Box50xDB9-0xDB6CounterRegisters0xDB4,0xDBACounterFilters0xDB3-0xDB0CounterConfigRegisters0xDA4BoxControlC-Box40xD99-0xD96CounterRegisters0xD94,0xD9ACounterFilters0xD93-0xD90CounterConfigRegisters0xD84BoxControlC-Box30xD79-0xD76CounterRegisters0xD74,0xD7ACounterFilters0xD73-0xD70CounterConfigRegisters0xD64BoxControlC-Box20xD59-0xD56CounterRegisters0xD54,0xD5ACounterFilters0xD53-0xD50CounterConfigRegisters0xD55,0xD44BoxStatus/ControlC-Box10xD39-0xD36CounterRegisters0xD34,0xD3ACounterFilters0xD33-0xD30CounterConfigRegistersTable1-2.
MSRSpaceUncorePerformanceMonitoringRegistersBoxMSRAddressesDescriptionIntroduction12ReferenceNumber:329468-0020xD24BoxControlC-Box00xD19-0xD16CounterRegisters0xD14,0xD1ACounterFilters0xD13-0xD10CounterConfigRegisters0xD04BoxControlPCUCounters0xC39-0xC36CounterRegisters0xC35,0xC24BoxControl/Status0xC34CounterFilters0xC33-0xC30CounterConfigRegisters0x3FC-0x3FDFixedCounters(Non-PMON)U-BoxCountersForU-Box0xC17-0xC16CounterRegisters0xC15BoxStatus0xC11-0xC10CounterConfigRegisters0xC09-0xC08FixedCounter/ConfigRegisterU-BoxCountersForGlobalControl0xC06Misc0xC01-0xC00GlobalControl/StatusTable1-3.
PCICFGSpaceUncorePerformanceMonitoringRegistersBoxPCICFGRegisterAddressesDescriptionHA0D14:F1HA1D30:F1F8-F4BoxControl/StatusE4-D8CounterConfigRegistersBC-A0CounterRegisters48-40Opcode/AddrMatchFiltersiMC0D16:F4,5,0,1F(4,5,0,1)ForChannel0,1,2,3iMC1D30:F4,5,0,1F(4,5,0,1)ForChannel0,1,2,3F8-F4BoxControl/StatusF0CounterConfigRegister(Fixed)E4-D8CounterConfigRegisters(General)D4-D0CounterRegister(Fixed)BC-A0CounterRegisters(General)IRPD5:F6Table1-2.
MSRSpaceUncorePerformanceMonitoringRegistersBoxMSRAddressesDescriptionReferenceNumber:329468-00213Introduction1.
6ONPARSINGANDUSINGDERIVEDEVENTSFormanyofthesectionsinthechaptercoveringthePerformanceMonitoringcapabilitiesofeachbox,asetofcommonlymeasuredmetricsor'DerivedEvents'havebeenincluded.
Forthemostpart,thesederivedeventsaresimplemathematicalcombinationsofeventsfoundwithinthebox.
(e.
g.
[SAMPLE])However,therearesomeextensionstothenotationusedbythemetrics.
FollowingisabreakdownofaDerivedEventtoillustratemanyofthenotationsused.
Tocalculate"AverageNumberofDataReadEntriesthatMisstheLLCwhentheTORisnotempty".
(TOR_OCCUPANCY.
MISS_OPCODE/COUNTER0_OCCUPANCY{edge_det,thresh=0x1}))with:Cn_MSR_PMON_BOX_FILTER.
opc=0x182.
Requiresprogramminganextracontrolregister(oftenforfiltering):Forasinglefield:with:Register_Name.
field=value1Formultiplefields:with:Register_Name.
{field1,field2,.
.
.
}={value1,value2,.
.
.
}F8-F4BoxControl/StatusE4-E0&DC-D8CounterConfigRegistersC0-B8&B0-A0CounterRegistersQPI0D8,9:F2D(8,9)forPort0,1QPI1D24:F2D24forPort2F8-F4BoxControl/StatusE4-D8CounterConfigRegistersBC-A0CounterRegistersQPI0Mask/MatchD8,9:F6D(8,9)forPort0,1QPI1Mask/MatchD24:F6D24forPort223C-238Mask0,122C-228Match0,1QPI0MiscD8:F0D8forPort0,1QPI1MiscD24:F0D24forPort2D4QPIRateStatusR2PCIeD19:F1F8-F4BoxControl/StatusE4-D8CounterConfigRegistersBC-A0CounterRegistersR3QPI0D19:F5,6F(5,6)forLink0,1R3QPI1D18:F5F5forLink2F8-F4BoxControl/StatusE0-D8CounterConfigRegistersB4-A0CounterRegistersTable1-3.
PCICFGSpaceUncorePerformanceMonitoringRegistersBoxPCICFGRegisterAddressesDescriptionIntroduction14ReferenceNumber:329468-002e.
g.
with:Cn_MSR_PMON_BOX_FILTER.
{opc,nid}={0x182,my_node}RequiresreadingafixeddataregisterForthecasewherethemetricrequirestheinformationcontainedinafixeddataregister,themnemonicfortheregisterwillbeincludedintheequation.
Softwarewillberesponsibleforconfiguringthedataregisterandsettingittostartcountingwiththeothereventsusedbythemetric.
e.
g.
POWER_THROTTLE_CYCLES.
RANKx/MC_Chy_PCI_PMON_CTR_FIXEDRequiresmoreinputtosoftwaretodeterminethespecificevent/subeventInsomecases,theremaybemultipleevents/subeventsthatcoverthesameinformationacrossmultiplelikehardwareunits.
Ratherthanmanufacturingaderivedeventforeachcombination,thederivedeventwillusealowercasevariableintheeventname.
e.
g.
POWER_CKE_CYCLES.
RANKx/MC_Chy_PCI_PMON_CTR_FIXEDwhere'x'isavariabletocovereventsPOWER_CKE_CYCLES.
RANK0throughPOWER_CKE_CYCLES.
RANK7Requiressettingextracontrolbitsintheregistertheeventhasbeenprogrammedin:event_name[.
subevent_name]{ctrl_bit[=value],}e.
g.
COUNTER0_OCCUPANCY{edge_det,thresh=0x1}NOTE:Ifthereisno[=value]specifieditisassumedthatthebitmustbesetto1.
Requiresgatheringofextrainformationoutsidethebox(oftenforcommonterms):SeefollowingsectionforabreakdownofcommontermsfoundinDerivedEvents.
1.
6.
1OnCommonTermsfoundinDerivedEventsToconvertaLatencytermfromacountofclockstoacountofnanoseconds:(LatencyMetric)-{Box}_CLOCKTICKS*(1000/UNCORE_FREQUENCY)ToconvertaBandwidthtermfromacountofrawbytesattheoperatingclocktoGB/sec:((TrafficMetricinBytes)/(TOTAL_INTERVAL/(TSC_SPEED*1000000)))/GB_CONVERSIONe.
g.
ForREAD_MEM_BW,aneventderivedfromiMC:CAS_COUNT.
RD*64,whichistheamountofmemorybandwidthconsumedbyreadrequests,put'READ_MEM_BW'intothebandwidthtermtoconvertthemeasurementfromrawbytestoGB/sec.
FollowingaresomeothertermsthatmaybefoundwithinMetricsandhowtheyshouldbeinterpreted.
GB_CONVERSION:1024^3TSC_SPEED:TimeStampCounterfrequencyinMHzTOTAL_INTERVAL:Overallsampleinterval(TSC)fortheinstructionsretiredevent.
Typicallyusedtocomputeapersendmetric.
DividingtheTOTAL_INTERVALbyCPU_SPEED*1,000,000isthenumberofsecondsinthesampleinterval.
TOTAL_PROC_CYC:TotalnumberofCPUcyclesforaprocessoreventvalue.
UsedwithprocessoreventdatatodeterminetimeorworkpertimeasinMB/sec.
QPI_LINKS:2-3forIntelXeonProcessorE5-2600v2ProductFamily.
IMC_CHANNELS:Upto8forIvyBridge-EPmicroarchitecture.
§ReferenceNumber:329468-00215UncorePerformanceMonitoringUncorePer-SocketPerformanceMonitoringControlCHAPTER2UNCOREPERFORMANCEMONITORING2.
1UNCOREPER-SOCKETPERFORMANCEMONITORINGCONTROLTomanagethelargenumberofcounterregistersdistributedacrossmanyunitsandcollecteventdataefficiently,thissectiondescribesthehierarchicaltechniquetostart/stop/restarteventcountingthatasoftwareagentmayneedtoperformduringamonitoringsession.
2.
1.
1CounterOverflowIfabox'scounteroverflows,itcansendanoverflowmessagetoaglobalPMONmanager(theUBox).
Todoso,theboxwiththeoverflowingcountermustbeallowedtobroadcastanoverflowmessage(the.
ov_enintheindividualcounter'scontrolregistermustbesetto1).
TheoverflowwillthenbepickedupandtheboxsendingtheoverflowwillberecordedintheUBox.
Eachboxintheuncorewithperformancemonitorsmaybeconfiguredtorespondtothisoverflowwithtwobasicactions:2.
1.
1.
1FreezingonCounterOverflowUponreceiptofanoverflowmessagefromanybox,theUBoxwillasserttheglobalfreezesignal.
Oncetheglobalfreezehasbeendetected,eachboxwilldisable(or'freeze')allofitscounters.
NOTE:theboxcontainingtheoverflowingcounterwillbefrozenfirstandtherewillasomedelaybeforeeachoftheotherboxesreceivestheoverflowmessage.
2.
1.
1.
2PMIonCounterOverflowUponreceiptoftheoverflowmessage,theUBoxcansendaPMIsignaltothecoreexecutingthemonitoringsoftware.
Todoso,theU_MSR_PMON_GLOBAL_CTL.
pmi_core_selfilemustbesettopointtothecorethemonitoringsoftwareisexecutingon.
2.
1.
2SettingupaMonitoringSessionOnHWreset,allthecountersaredisabled.
Enablingishierarchical.
Sothefollowingsteps,whichincludeprogrammingtheeventcontrolregistersandenablingthecounterstobegincollectingevents,mustbetakentosetupamonitoringsession.
Section2.
1.
3coversthestepstostop/re-startcounterregistersduringamonitoringsession.
GlobalSettingsintheUBox:(NOTE:NecessaryforU-Boxmonitoring).
a)FreezealltheuncorecountersbysettingU_MSR_PMON_GLOBAL_CTL.
frz_allto1OR(ifboxlevelfreezecontrolpreferred):a)Freezethebox'scounterswhilesettingupthemonitoringsession.
e.
g.
,setCn_MSR_PMON_BOX_CTL.
frzto1Foreacheventtobemeasuredwithineachbox:b)EnablecountingforeachmonitorUncorePerformanceMonitoringUncorePer-SocketPerformanceMonitoringControl16ReferenceNumber:329468-002e.
g.
SetC0_MSR_PMON_CTL2.
ento1NOTERecommended:setthe.
enbitforallcountersineachboxauserintendstomonitor,andleftaloneforthedurationofthemonitoringsession.
NOTEForcaseswherethereisnosharingofthesecountersamongsoftwareagentsindepen-dentlysamplingthecounters,softwarecouldsettheenablebitsforallcountersitintendstouseduringthesetupphase.
Forcaseswheresharingisexpected,eachagentcouldusetheindividualenablebitsinordertoperformsamplingratherthanusingthebox-levelfreezefromsteps(a)and(d).
c)Selecteventtomonitoriftheeventcontrolregisterhasn'tbeenprogrammed:Programthe.
ev_seland.
umaskbitsinthecontrolregisterwiththeencodingsnecessarytocapturetherequestedeventalongwithanysignalconditioningbits(.
thresh/.
edge_det)usedtoqualifytheevent.
e.
g.
SetC0_MSR_PMON_CT2.
{ev_sel,umask}to{0x03,0x1}inordertocaptureLLC_VICTIMS.
M_STATEinCBo0'sC0_MSR_PMON_CTR2.
NOTEItisalsoimportanttoprogramanyadditionalfilterregistersusedtofurtherqualifytheevents(e.
g.
settingtheopcodematchfieldinCn_MSR_BOX_FILTERtoqualifyTOR_INSERTSbyaspecificopcode).
Backtotheboxlevel:d)Resetcountersineachboxtoensurenostalevalueshavebeenacquiredfromprevioussessions.
Resettingthecontrolregisters,particularlythosethatwon'tbeusedisalsorecommendediffornootherreasonthantopreventerrantoverflows.
Toresetboththecountersandcontrolregisters,writethefollowingregisters:ForeachCBo,setCn_MSR_PMON_BOX_CTL[1:0]to0x3.
SetHA_PCI_PMON_BOX_CTL[1:0]to0x3.
NOTEIntheHA,whenmeasuringanOccupancycount,itwillbenecessarytosetthe.
q_occ_rstbitto1ineachcontrolregistersettomeasureanOccupancycount(e.
g.
TRACKER_OCCUPANCY).
ForeachIntelQPIPort,setQ_Py_PCI_PMON_BOX_CTL[1:0]to0x3.
ForeachDRAMChannel,setMC_CHy_PCI_PMON_BOX_CTL[1:0]to0x3.
SetPCU_MSR_PMON_BOX_CTL[1:0]to0x3.
ForeachLink,setR3_Ly_PCI_PMON_BOX_CTL[1:0]to0x3.
SetR2_PCI_PMON_BOX_CTL[1:0]to0x3.
NOTETheUBoxcountersdonothaveaBoxControlregister.
Thecounterswillneedtobemanuallyresetbywritinga0ineachdataregister.
ReferenceNumber:329468-00217UncorePerformanceMonitoringUncorePer-SocketPerformanceMonitoringControlMonitoring:e)Selecthowtogatherdata.
Ifpolling,skiptof.
Ifsampling:Tosetupasampleinterval,softwarecanpre-programthedataregisterwithavalueof[2^(registerbitwidth-upto48)-sampleintervallength].
Doingsoallowssoftware,throughuseofthepmimechanism,tobenotifiedwhenthenumberofeventsinthesamplehavebeencaptured.
Capturingaperformancemonitoringsampleevery'Xcycles'(thefixedcounterintheUBoxcountsuncoreclockcycles)isacommonuseofthismechanism.
i.
e.
Tostopcountingandreceivenotificationwhenthe1,000,000thidleflitistransmittedfromQPIonPort0-setQ_P0_PCI_PMON_CTR1to(2^48-1000)-setQ_P0_PCI_PMON_CTL1.
ev_selto0x0-setQ_P0_PCI_PMON_CTL1.
umaskto0x1-setU_MSR_PMON_GLOBAL_CTL.
pmi_core_seltowhichcorethemonitoringthreadisexecutingon.
f)EnablecountingatthegloballevelbysettingtheU_MSR_PMON_GLOBAL_CTL.
unfrz_allbitto1.
ORf)Enablecountingattheboxlevelbyunfreezingthecountersineachboxe.
g.
setCn_MSR_PMON_BOX_CTL.
frzto0Andwiththat,countingwillbegin.
NOTETheUBoxdoesnothaveaBoxControlregister,sothere'snobox-levelfreezetohelpisolatetheUBoxfromagentscountinginotherboxes.
Onceenabledandprogrammedwithavalidevent,theUBoxcounterswillcollectevents.
Forsomewhatbettersynchronization,ausercankeeptheU_MSR_PMON_CTL.
ev_selat0x0whileenabledandwriteitwithavalidvaluejustpriortounfreezingtheregistersinotherboxes.
2.
1.
3ReadingtheSampleIntervalSoftwarecanpollthecounterswheneveritchooses,orwaittobenotifiedthatacounterhasover-flowed(byreceivingaPMI).
a)Polling-beforereading,itisrecommendedthatsoftwarefreezethecountersineachboxwithactivecounters(bysetting*_PMON_BOX_CTL.
frzto1).
Afterreadingtheeventcountsfromthecounterregisters,themonitoringagentcanchoosetoresettheeventcountstoavoidevent-countwrap-around;orresumethecounterregisterwithoutresettingtheirvalues.
Thelatterchoicewillrequirethemonitoringagenttocheckandadjustforpotentialwrap-aroundsituations.
b)Frozencounters-Ifsoftwaresetthecounterstofreezeonoverflowandsendnotificationwhenithappens,thenextquestionis:WhocausedthefreezeOverflowbitsarestoredhierarchicallywithintheuncore.
First,softwareshouldreadtheU_MSR_PMON_GLOBAL_STATUS.
ov_*bitstodeterminewhichbox(es)sentanoverflow.
Thenreadthatbox's*_PMON_GLOBAL_STATUS.
ovfieldtofindtheoverflowingcounter.
NOTEMorethanonecountermayoverflowatanygiventime.
UncorePerformanceMonitoringUncorePer-SocketPerformanceMonitoringControl18ReferenceNumber:329468-0022.
1.
4EnablingaNewSampleIntervalfromFrozenCountersa)Clearalluncorecounters:Foreachboxinwhichcountingoccurred,set*_PMON_BOX_CTL.
rst_ctrsto1.
b)Clearalloverflowbits.
ThisincludesclearingU_MSR_PMON_GLOBAL_STATUS.
ov_*aswellasany*_BOX_STATUSregistersthathavetheiroverflowbitsset.
e.
g.
Ifcounter3inQPIPort1overflowed,inordertocleartheoverflowbitsoftwareshouldsetQ_P1_PCI_PMON_BOX_STATUS.
ov[3]to1.
c)Createthenextsample:Reinitializethesamplebysettingthemonitoringdataregisterto(2^48-sample_interval).
OrsetupanewsampleintervalasoutlinedinSection2.
1.
2,"SettingupaMonitoringSession".
d)Re-enablecounting:SetU_MSR_PMON_GLOBAL_CTL.
unfrz_allto1.
2.
1.
5GlobalPerformanceMonitorsTable2-1.
GlobalPerformanceMonitoringControlMSRs2.
1.
5.
1GlobalPMONGlobalControl/StatusRegistersThefollowingregistersrepresentstategoverningallPMUsintheuncore,bothtoexertglobalcontrolandcollectbox-levelinformation.
U_MSR_PMON_GLOBAL_CTLcontainsabitthatcanfreeze(.
frz_all)alltheuncorecounters.
Ifanoverflowisdetectedinanyoftheuncore'sPMONregisters,itwillbesummarizedinU_MSR_PMON_GLOBAL_STATUS.
Thisregisteraccumulatesoverflowssenttoitfromtheotheruncoreboxes.
Toresettheseoverflowbits,ausermustsetthecorrespondingbitsinU_MSR_PMON_GLOBAL_STATUSto1,whichwillacttoclearthem.
MSRNameMSRAddressSize(bits)DescriptionU_MSR_PMON_GLOBAL_CONFIG0x0C0632UBoxPMONGlobalConfigurationU_MSR_PMON_GLOBAL_STATUS0x0C0132UBoxPMONGlobalStatusU_MSR_PMON_GLOBAL_CTL0x0C0032UBoxPMONGlobalControlReferenceNumber:329468-00219UncorePerformanceMonitoringUncorePer-SocketPerformanceMonitoringControlTable2-2.
U_MSR_PMON_GLOBAL_CTLRegister–FieldDefinitionsFieldBitsAttrHWResetValDescriptionfrz_all31WO0Freezealluncoreperformancemonitors.
wk_on_pmi30RW0IfPMIeventrequestedtosendtocore.
.
.
0-Sendeventtocoresalreadywoken1-WakeanysleepingcoreandsendPMItoallcores.
unfrz_all29WO0Unfreezealluncoreperformancemonitors.
rsv28:27RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
rsv26:15RV0Reservedpmi_core_sel14:0RW0PMICoreSelectEx:IfcounteroverflowissenttoUBox.
.
.
000000000000000-NoPMIsent000000000000001-SendPMItocore0000000001000000-SendPMItocore6000000001100010-SendPMItocore2,5&6etc.
NOTE:Ifwk_on_pmiissetto1,awakewillbesenttoanysleepingcoreinthemaskpriortosendingthePMI.
UncorePerformanceMonitoringUBoxPerformanceMonitoring20ReferenceNumber:329468-002Table2-3.
U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitionsTable2-4.
U_MSR_PMON_GLOBAL_CONFIGRegister–FieldDefinitions2.
2UBOXPERFORMANCEMONITORING2.
2.
1OverviewoftheUBoxTheUBoxservesasthesystemconfigurationcontrollerwithinthephysicalprocessor.
Inthiscapacity,theUBoxactsasthecentralunitforavarietyoffunctions:FieldBitsAttrHWResetValDescriptionrsv31:27RV0Reservedov_rp26RW1C0SetifoverflowisdetectedfromanR2PCIePMONregister.
NOTE:Writeof'1'willclearthebit.
ov_rq125RW1C0SetifoverflowisdetectedfromanR3QPI1PMONregister.
NOTE:Writeof'1'willclearthebit.
ov_rq024RW1C0SetifoverflowisdetectedfromanR3QPI0PMONregister.
NOTE:Writeof'1'willclearthebit.
ov_q123RW1C0SetifoverflowisdetectedfromaQPI1PMONregister.
NOTE:Writeof'1'willclearthebit.
ov_q022RW1C0SetifoverflowisdetectedfromaQPI0PMONregister.
NOTE:Writeof'1'willclearthebit.
ov_m121RW1C0SetifoverflowisdetectedfromaniMC1PMONregister.
NOTE:Writeof'1'willclearthebit.
ov_m020RW1C0SetifoverflowisdetectedfromaniMC0PMONregister.
NOTE:Writeof'1'willclearthebit.
ov_h119RW1C0SetifoverflowisdetectedfromanHA1PMONregister.
NOTE:Writeof'1'willclearthebit.
ov_h018RW1C0SetifoverflowisdetectedfromanHA0PMONregister.
NOTE:Writeof'1'willclearthebit.
ov_c[14-0]17:3RW1C0SetifoverflowisdetectedfromaCBoPMONregister,1bitforeachCBowherebit5correspondsCBo0,etc.
NOTE:Writeof'1'willclearthebit.
ov_p2RW1C0SetifoverflowisdetectedfromaPCUPMONregister.
NOTE:Writeof'1'willclearthebit.
ov_u1RW1C0SetifoverflowisdetectedfromaUBoxPMONregister.
NOTE:Writeof'1'willclearthebit.
ov_u_fixed0RW1C0SetifoverflowisdetectedfromUBoxfixedPMONregister.
NOTE:Writeof'1'willclearthebit.
FieldBitsAttrHWResetValDescriptionrsv31:4RV0Reservednum_c3:0RW8NumberofsetsofCBoPMONcounters.
ReferenceNumber:329468-00221UncorePerformanceMonitoringUBoxPerformanceMonitoringThemasterforreadingandwritingphysicallydistributedregistersacrossphysicalprocessorusingtheMessageChannel.
TheUBoxistheintermediaryforinterrupttraffic,receivinginterruptsfromthesystemanddispatchinginterruptstotheappropriatecore.
TheUBoxservesasthesystemlockmasterusedwhenquiescingtheplatform(e.
g.
,IntelQPIbuslock).
2.
2.
2UBoxPerformanceMonitoringOverviewTheUBoxsupportseventmonitoringthroughtwoprogrammable44-bitwidecounters(U_MSR_PMON_CTR{1:0}),anda48-bitfixedcounterwhichincrementseachu-clock.
Eachofthesecounterscanbeprogrammed(U_MSR_PMON_CTL{1:0})tomonitoranyUBoxevent.
Forinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerformanceMonitoringControl".
2.
2.
2.
1UBoxPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)IfanoverflowisdetectedfromaUBoxperformancecounteranditsoverflowenablebit(U_MSR_PMON_CTLx.
ov_en)hasbeensetto1,theoverflowbitissetattheboxlevel(U_MSR_PMON_BOX_STATUS.
ov)andthefreezesignalisbroadcasttootherboxes.
WhenthegloballogicintheUBoxreceivestheoverflowsignal,theU_MSR_PMON_GLOBAL_STATUS.
ov_ubitisset(seeTable2-3,"U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitions")andaPMIcanbegenerated.
Onceafreezehasoccurred,inordertoseeanewfreeze,theoverflowresponsibleforthefreezemustbeclearedbysettingthecorrespondingbitinU_MSR_PMON_BOX_STATUS.
ovandU_MSR_PMON_GLOBAL_STATUs.
ov_uto1.
Assumingallthecountershavebeenlocallyenabled(.
enbitincontrolregistersmeanttomonitorevents)andtheoverflowbit(s)hasbeencleared,theUBoxispreparedforanewsampleinterval.
Oncetheglobalcontrolshavebeenre-enabled(Section2.
1.
4,"EnablingaNewSampleIntervalfromFrozenCounters"),countingwillresume.
2.
2.
3UBoxPerformanceMonitorsMSRNameMSRAddressSize(bits)DescriptionU_MSR_PMON_CTR10x0C1764U-BoxPMONCounter1U_MSR_PMON_CTR00x0C1664U-BoxPMONCounter0U_MSR_PMON_BOX_STATUS0x0C1532U-BoxPMONBox-WideStatusU_MSR_PMON_CTL10x0C1164U-BoxPMONControlforCounter1U_MSR_PMON_CTL00x0C1032U-BoxPMONControlforCounter0U_MSR_PMON_UCLK_FIXED_CTR0x0C0964U-BoxPMONUCLKFixedCounterU_MSR_PMON_UCLK_FIXED_CTL0x0C0832U-BoxPMONUCLKFixedCounterControlUncorePerformanceMonitoringUBoxPerformanceMonitoring22ReferenceNumber:329468-0022.
2.
3.
1UBoxBoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsintheUBox.
IfanoverflowisdetectedfromoneoftheUBoxPMONregisters,thecorrespondingbitintheU_MSR_PMON_BOX_STATUS.
ovfieldwillbeset.
Toresettheseoverflowbits,ausermustwriteavalueof'1'tothem(whichwillclearthebits).
Table2-5.
U_MSR_PMON_BOX_STATUSRegister–FieldDefinitions2.
2.
3.
2UBoxPMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutoftheUBoxperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst).
Table2-6.
U_MSR_PMON_CTL{1-0}Register–FieldDefinitionsFieldBitsAttrHWResetValDescriptionrsv31:2RV0Reservedov1:0RW1C0IfanoverflowisdetectedfromthecorrespondingUBOXPMONregister,it'soverflowbitwillbeset.
NOTE:Writeof'1'willclearthebit.
FieldBitsAttrHWResetValDescriptionrsv31:29RV0Reservedthresh28:24RW0Thresholdusedincountercomparison.
rsv23RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
en22RW0LocalCounterEnable.
rsv21RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov_en20RW0Whenthisbitissetto1andthecorrespondingcounteroverflows,atheUBoxcountersexceptionissenttotheUBox.
Whenthisbitisassertedandthecorrespondingcounteroverflows,itsoverflowbitissetinthelocalstatusregister(U_MSR_PMON_BOX_STATUS.
ov)andtheglobalstatusregisterU_MSR_PMON_GLOBAL_STATUS.
ov_u.
rsv19RV0Reservededge_det18RW0Whensetto1,ratherthanmeasuringtheeventineachcycleitisactive,thecorrespondingcounterwillincrementwhena0to1transition(i.
e.
risingedge)isdetected.
When0,thecounterwillincrementineachcyclethattheeventisasserted.
NOTE:.
edge_detisinseriesfollowing.
thresh.
Duetothis,the.
threshfieldmustbesettoanon-0value.
Foreventsthatincrementbynomorethan1percycle,set.
threshto0x1.
rst17WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
rsv16RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ReferenceNumber:329468-00223UncorePerformanceMonitoringUBoxPerformanceMonitoringTheUBoxperformancemonitordataregistersare44-bitwide.
Acounteroverflowoccurswhenacarryoutfrombit43isdetected.
SoftwarecanforcealluncorecountingtofreezeafterNeventsbypreloadingamonitorwithacountvalueof244-Nandsettingthecontrolregistertosendanoverflowmessagetothegloballogic.
Duringtheintervaloftimebetweenoverflowandglobaldisable,thecountervaluewillwrapandcontinuetocollectevents.
Ifaccessible,softwarecancontinuouslyreadthedataregisterswithoutdisablingeventcollection.
Table2-7.
U_MSR_PMON_CTR{1-0}Register–FieldDefinitionsTheGlobalUBoxPMONregistersalsoincludeafixedcounterthatincrementsatUCLKforeachcycleitisenabled.
Table2-8.
U_MSR_PMON_FIXED_CTLRegister–FieldDefinitionsTable2-9.
U_MSR_PMON_FIXED_CTRRegister–FieldDefinitionsumask15:8RW0Selectsubeventstobecountedwithintheselectedevent.
ev_sel7:0RW0Selecteventtobecounted.
FieldBitsAttrHWResetValDescriptionrsv63:44RV0Reservedevent_count43:0RW-V044-bitperformanceeventcounterFieldBitsAttrHWResetValDescriptionrsv31:23RV0Reserveden22RW-V0LocalCounterEnablersv21RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov_en20RW-V0Whenthisbitissetto1andthecorrespondingcounteroverflows,atheUBoxcountersexceptionissenttotheUBox.
Whenthisbitisassertedandthecorrespondingcounteroverflows,itsoverflowbitissetinthelocalstatusregister(U_MSR_PMON_BOX_STATUS.
ov)andtheglobalstatusregisterU_MSR_PMON_GLOBAL_STATUS.
ov_u_fixed.
rsv19:0RV0ReservedFieldBitsAttrHWResetValDescriptionrsv63:44RV0Reservedevent_count43:0RW-V048-bitperformanceeventcounterFieldBitsAttrHWResetValDescriptionUncorePerformanceMonitoringUBoxPerformanceMonitoring24ReferenceNumber:329468-0022.
2.
4UBOXBoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasuredUBOXBoxevents.
2.
2.
5UBOXBoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsfortheUBOXBox.
EVENT_MSGTitle:VLWReceivedCategory:EVENT_MSGEventsEventCode:0x42Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:VirtualLogicalWire(legacy)messagewerereceivedfromUncore.
SpecifythethreadtofilteronusingNCUPMONCTRLGLCTR.
ThreadID.
LOCK_CYCLESTitle:IDILock/SplitLockCyclesCategory:LOCKEventsEventCode:0x44Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberoftimesanIDILock/SplitLocksequencewasstarted.
PHOLD_CYCLESTitle:CyclesPHOLDAsserttoAckCategory:PHOLDEventsEventCode:0x45Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:PHOLDcycles.
FilterfromsourceCoreID.
SymbolNameEventCodeCtrsExtraSelectBitMaxInc/CycDescriptionEVENT_MSG0x420-101VLWReceivedLOCK_CYCLES0x440-101IDILock/SplitLockCyclesPHOLD_CYCLES0x450-101CyclesPHOLDAsserttoAckRACU_REQUESTS0x460-101RACURequestTable2-10.
UnitMasksforEVENT_MSGExtensionumask[15:8]DescriptionVLW_RCVDbxxxxxxx1MSI_RCVDbxxxxxx1xIPI_RCVDbxxxxx1xxDOORBELL_RCVDbxxxx1xxxINT_PRIObxxx1xxxxReferenceNumber:329468-00225UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringRACU_REQUESTSTitle:RACURequestCategory:RACUEventsEventCode:0x46Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NOTE:ThiswillbedroppedbecausePHOLDisnotimplementedthisway.
2.
3CACHEINGAGENT(CBO)PERFORMANCEMONITORING2.
3.
1OverviewoftheCBoTheLLCcoherenceengine(CBo)managestheinterfacebetweenthecoreandthelastlevelcache(LLC).
AllcoretransactionsthataccesstheLLCaredirectedfromthecoretoaCBoviatheringinter-connect.
TheCBoisresponsibleformanagingdatadeliveryfromtheLLCtotherequestingcore.
ItisalsoresponsibleformaintainingcoherencebetweenthecoreswithinthesocketthatsharetheLLC;generatingsnoopsandcollectingsnoopresponsesfromthelocalcoreswhentheMESIFprotocolrequiresit.
So,iftheCBofieldingthecorerequestindicatesthatacorewithinthesocketownstheline(foracoherentread),therequestissnoopedtothatlocalcore.
ThatsameCBowillthensnoopallpeerswhichmighthavetheaddresscached(othercores,remotesockets,etc)andsendtherequesttotheappropriateHomeAgentforconflictchecking,memoryrequestsandwritebacks.
Intheprocessofmaintainingcachecoherencywithinthesocket,theCBoisthegatekeeperforallIntelQuickPathInterconnect(IntelQPI)messagesthatoriginateinthecoreandisresponsibleforensuringthatallIntelQPImessagesthatpassthroughthesocket'sLLCremaincoherent.
TheCBomanageslocalconflictsbyensuringthatonlyonerequestisissuedtothesystemforaspecificcacheline.
TheuncoreofIntelXeonProcessorsbasedontheIvyBridge-EPmicroarchitecturecontainsmultipleinstancesoftheCBo,eachassignedtomanageadistinct2.
5MBsliceoftheprocessor'stotalLLCcapacity.
Aslicethatcanbeupto20-waysetassociative.
Forprocessorswithfewerthanfullypopu-lated2.
5MBLLCslices,theCBoBoxesormissingsliceswillstillbeactiveandtrackringtrafficcausedbytheirco-locatedcoreeveniftheyhavenoLLCrelatedtraffictotrack(i.
e.
hits/misses/snoops).
EveryphysicalmemoryaddressinthesystemisuniquelyassociatedwithasingleCBoinstanceviaaproprietaryhashingalgorithmthatisdesignedtokeepthedistributionoftrafficacrosstheCBoinstancesrelativelyuniformforawiderangeofpossibleaddresspatterns.
ThisenablestheindividualCBoinstancestooperateindependently,eachmanagingitssliceofthephysicaladdressspacewithoutanyCBoinagivensocketeverneedingtocommunicatewiththeotherCBosinthatsamesocket.
Table2-11.
UnitMasksforPHOLD_CYCLESExtensionumask[15:8]DescriptionASSERT_TO_ACKbxxxxxxx1AsserttoACKUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring26ReferenceNumber:329468-0022.
3.
2CBoPerformanceMonitoringOverviewEachoftheCBosintheuncoresupportseventmonitoringthroughfour44-bitwidecounters(Cn_MSR_PMON_CTR{3:0}).
EventprogrammingintheCBoisrestrictedsuchthateacheventscanonlybemeasuredincertaincounterswithintheCBo.
Forexample,counter0isdedicatedtooccu-pancyevents.
Noothercountermaybeusedtocaptureoccupancyevents.
CBocounter0canincrementbyamaximumof20percycle;counters1-3canincrementby1percycle.
Someuncoreperformanceeventsthatmonitortransactionactivitiesrequireadditionaldetailsthatmustbeprogrammedinafilterregister.
EachCboprovidestwofilterregistersandallowsonlyonesucheventtobeprogrammedatagiventime,seeSection2.
3.
3.
3.
Forinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerfor-manceMonitoringControl".
2.
3.
2.
1SpecialNoteonCBoOccupancyEventsAlthoughonlycounter0supportsoccupancyevents,itispossibletoprogramcounters1-3tomonitorthesameoccupancyeventbyselectingthe"OCCUPANCY_COUNTER0"eventcodeoncounters1-3.
Thisallows:Thresholding2.
3.
3CBoPerformanceMonitorsTable2-12.
CBoPerformanceMonitoringMSRsMSRNameMSRAddressSize(bits)DescriptionCBo0PMONRegistersGenericCountersC0_MSR_PMON_CTR30x0D1964CBo0PMONCounter3C0_MSR_PMON_CTR20x0D1864CBo0PMONCounter2C0_MSR_PMON_CTR10x0D1764CBo0PMONCounter1C0_MSR_PMON_CTR00x0D1664CBo0PMONCounter0Box-LevelFilterC0_MSR_PMON_BOX_FILTER0x0D1432CBo0PMONFilterC0_MSR_PMON_BOX_FILTER10x0D1A32CBo0PMONFilter1GenericCounterControlC0_MSR_PMON_CTL30x0D1332CBo0PMONControlforCounter3C0_MSR_PMON_CTL20x0D1232CBo0PMONControlforCounter2C0_MSR_PMON_CTL10x0D1132CBo0PMONControlforCounter1C0_MSR_PMON_CTL00x0D1032CBo0PMONControlforCounter0Box-LevelControl/StatusC0_MSR_PMON_BOX_CTL0x0D0432CBo0PMONBox-WideControlCBo1PMONRegistersGenericCountersC1_MSR_PMON_CTR30x0D3964CBo1PMONCounter3C1_MSR_PMON_CTR20x0D3864CBo1PMONCounter2ReferenceNumber:329468-00227UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringC1_MSR_PMON_CTR10x0D3764CBo1PMONCounter1C1_MSR_PMON_CTR00x0D3664CBo1PMONCounter0Box-LevelFilterC1_MSR_PMON_BOX_FILTER0x0D3432CBo1PMONFilterC1_MSR_PMON_BOX_FILTER10x0D3A32CBo1PMONFilter1GenericCounterControlC1_MSR_PMON_CTL30x0D3332CBo1PMONControlforCounter3C1_MSR_PMON_CTL20x0D3232CBo1PMONControlforCounter2C1_MSR_PMON_CTL10x0D3132CBo1PMONControlforCounter1C1_MSR_PMON_CTL00x0D3032CBo1PMONControlforCounter0Box-LevelControl/StatusC1_MSR_PMON_BOX_CTL0x0D2432CBo1PMONBox-WideControlCBo2PMONRegistersGenericCountersC2_MSR_PMON_CTR30x0D5964CBo2PMONCounter3C2_MSR_PMON_CTR20x0D5864CBo2PMONCounter2C2_MSR_PMON_CTR10x0D5764CBo2PMONCounter1C2_MSR_PMON_CTR00x0D5664CBo2PMONCounter0Box-LevelFilterC2_MSR_PMON_BOX_FILTER0x0D5432CBo2PMONFilterC2_MSR_PMON_BOX_FILTER10x0D5A32CBo2PMONFilter1GenericCounterControlC2_MSR_PMON_CTL30x0D5332CBo2PMONControlforCounter3C2_MSR_PMON_CTL20x0D5232CBo2PMONControlforCounter2C2_MSR_PMON_CTL10x0D5132CBo2PMONControlforCounter1C2_MSR_PMON_CTL00x0D5032CBo2PMONControlforCounter0Box-LevelControl/StatusC2_MSR_PMON_BOX_CTL0x0D4432CBo2PMONBox-WideControlCBo3PMONRegistersGenericCountersC3_MSR_PMON_CTR30x0D7964CBo3PMONCounter3C3_MSR_PMON_CTR20x0D7864CBo3PMONCounter2C3_MSR_PMON_CTR10x0D7764CBo3PMONCounter1C3_MSR_PMON_CTR00x0D7664CBo3PMONCounter0Box-LevelFilterC3_MSR_PMON_BOX_FILTER0x0D7432CBo3PMONFilterC3_MSR_PMON_BOX_FILTER10x0D7A32CBo3PMONFilter1GenericCounterControlC3_MSR_PMON_CTL30x0D7332CBo3PMONControlforCounter3C3_MSR_PMON_CTL20x0D7232CBo3PMONControlforCounter2MSRNameMSRAddressSize(bits)DescriptionUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring28ReferenceNumber:329468-002C3_MSR_PMON_CTL10x0D7132CBo3PMONControlforCounter1C3_MSR_PMON_CTL00x0D7032CBo3PMONControlforCounter0Box-LevelControl/StatusC3_MSR_PMON_BOX_CTL0x0D6432CBo3PMONBox-WideControlCBo4PMONRegistersGenericCountersC4_MSR_PMON_CTR30x0D9964CBo4PMONCounter3C4_MSR_PMON_CTR20x0D9864CBo4PMONCounter2C4_MSR_PMON_CTR10x0D9764CBo4PMONCounter1C4_MSR_PMON_CTR00x0D9664CBo4PMONCounter0Box-LevelFilterC4_MSR_PMON_BOX_FILTER0x0D9432CBo4PMONFilterC4_MSR_PMON_BOX_FILTER10x0D9A32CBo4PMONFilter1GenericCounterControlC4_MSR_PMON_CTL30x0D9332CBo4PMONControlforCounter3C4_MSR_PMON_CTL20x0D9232CBo4PMONControlforCounter2C4_MSR_PMON_CTL10x0D9132CBo4PMONControlforCounter1C4_MSR_PMON_CTL00x0D9032CBo4PMONControlforCounter0Box-LevelControl/StatusC4_MSR_PMON_BOX_CTL0x0D8432CBo4PMONBox-WideControlCBo5PMONRegistersGenericCountersC5_MSR_PMON_CTR30x0DB964CBo5PMONCounter3C5_MSR_PMON_CTR20x0DB864CBo5PMONCounter2C5_MSR_PMON_CTR10x0DB764CBo5PMONCounter1C5_MSR_PMON_CTR00x0DB664CBo5PMONCounter0Box-LevelFilterC5_MSR_PMON_BOX_FILTER0x0DB432CBo5PMONFilterC5_MSR_PMON_BOX_FILTER10x0DBA32CBo5PMONFilter1GenericCounterControlC5_MSR_PMON_CTL30x0DB332CBo5PMONControlforCounter3C5_MSR_PMON_CTL20x0DB232CBo5PMONControlforCounter2C5_MSR_PMON_CTL10x0DB132CBo5PMONControlforCounter1C5_MSR_PMON_CTL00x0DB032CBo5PMONControlforCounter0Box-LevelControl/StatusC5_MSR_PMON_BOX_CTL0x0DA432CBo5PMONBox-WideControlCBo6PMONRegistersGenericCountersC6_MSR_PMON_CTR30x0DD964CBo6PMONCounter3MSRNameMSRAddressSize(bits)DescriptionReferenceNumber:329468-00229UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringC6_MSR_PMON_CTR20x0DD864CBo6PMONCounter2C6_MSR_PMON_CTR10x0DD764CBo6PMONCounter1C6_MSR_PMON_CTR00x0DD664CBo6PMONCounter0Box-LevelFilterC6_MSR_PMON_BOX_FILTER0x0DD432CBo6PMONFilterC6_MSR_PMON_BOX_FILTER10x0DDA32CBo6PMONFilter1GenericCounterControlC6_MSR_PMON_CTL30x0DD332CBo6PMONControlforCounter3C6_MSR_PMON_CTL20x0DD232CBo6PMONControlforCounter2C6_MSR_PMON_CTL10x0DD132CBo6PMONControlforCounter1C6_MSR_PMON_CTL00x0DD032CBo6PMONControlforCounter0Box-LevelControl/StatusC6_MSR_PMON_BOX_CTL0x0DC432CBo6PMONBox-WideControlCBo7PMONRegistersGenericCountersC7_MSR_PMON_CTR30x0DF964CBo7PMONCounter3C7_MSR_PMON_CTR20x0DF864CBo7PMONCounter2C7_MSR_PMON_CTR10x0DF764CBo7PMONCounter1C7_MSR_PMON_CTR00x0DF664CBo7PMONCounter0Box-LevelFilterC7_MSR_PMON_BOX_FILTER0x0DF432CBo7PMONFilterC7_MSR_PMON_BOX_FILTER10x0DFA32CBo7PMONFilter1GenericCounterControlC7_MSR_PMON_CTL30x0DF332CBo7PMONControlforCounter3C7_MSR_PMON_CTL20x0DF232CBo7PMONControlforCounter2C7_MSR_PMON_CTL10x0DF132CBo7PMONControlforCounter1C7_MSR_PMON_CTL00x0DF032CBo7PMONControlforCounter0Box-LevelControl/StatusC7_MSR_PMON_BOX_CTL0x0DE432CBo7PMONBox-WideControlCBo8PMONRegistersGenericCountersC8_MSR_PMON_CTR30x0E1964CBo8PMONCounter3C8_MSR_PMON_CTR20x0E1864CBo8PMONCounter2C8_MSR_PMON_CTR10x0E1764CBo8PMONCounter1C8_MSR_PMON_CTR00x0E1664CBo8PMONCounter0Box-LevelFilterC8_MSR_PMON_BOX_FILTER0x0E1432CBo8PMONFilterC8_MSR_PMON_BOX_FILTER10x0E1A32CBo8PMONFilter1GenericCounterControlC8_MSR_PMON_CTL30x0E1332CBo8PMONControlforCounter3MSRNameMSRAddressSize(bits)DescriptionUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring30ReferenceNumber:329468-002C8_MSR_PMON_CTL20x0E1232CBo8PMONControlforCounter2C8_MSR_PMON_CTL10x0E1132CBo8PMONControlforCounter1C8_MSR_PMON_CTL00x0E1032CBo8PMONControlforCounter0Box-LevelControl/StatusC8_MSR_PMON_BOX_CTL0x0E0432CBo8PMONBox-WideControlCBo9PMONRegistersGenericCountersC9_MSR_PMON_CTR30x0E3964CBo9PMONCounter3C9_MSR_PMON_CTR20x0E3864CBo9PMONCounter2C9_MSR_PMON_CTR10x0E3764CBo9PMONCounter1C9_MSR_PMON_CTR00x0E3664CBo9PMONCounter0Box-LevelFilterC9_MSR_PMON_BOX_FILTER0x0E3432CBo9PMONFilterC9_MSR_PMON_BOX_FILTER10x0E3A32CBo9PMONFilter1GenericCounterControlC9_MSR_PMON_CTL30x0E3332CBo9PMONControlforCounter3C9_MSR_PMON_CTL20x0E3232CBo9PMONControlforCounter2C9_MSR_PMON_CTL10x0E3132CBo9PMONControlforCounter1C9_MSR_PMON_CTL00x0E3032CBo9PMONControlforCounter0Box-LevelControl/StatusC9_MSR_PMON_BOX_CTL0x0E2432CBo9PMONBox-WideControlCBo10PMONRegistersGenericCountersC10_MSR_PMON_CTR30x0E5964CBo10PMONCounter3C10_MSR_PMON_CTR20x0E5864CBo10PMONCounter2C10_MSR_PMON_CTR10x0E5764CBo10PMONCounter1C10_MSR_PMON_CTR00x0E5664CBo10PMONCounter0Box-LevelFilterC10_MSR_PMON_BOX_FILTER0x0E5432CBo10PMONFilterC10_MSR_PMON_BOX_FILTER10x0E5A32CBo10PMONFilter1GenericCounterControlC10_MSR_PMON_CTL30x0E5332CBo10PMONControlforCounter3C10_MSR_PMON_CTL20x0E5232CBo10PMONControlforCounter2C10_MSR_PMON_CTL10x0E5132CBo10PMONControlforCounter1C10_MSR_PMON_CTL00x0E5032CBo10PMONControlforCounter0Box-LevelControl/StatusC10_MSR_PMON_BOX_CTL0x0E4432CBo10PMONBox-WideControlCBo11PMONRegistersGenericCountersMSRNameMSRAddressSize(bits)DescriptionReferenceNumber:329468-00231UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringC11_MSR_PMON_CTR30x0E7964CBo11PMONCounter3C11_MSR_PMON_CTR20x0E7864CBo11PMONCounter2C11_MSR_PMON_CTR10x0E7764CBo11PMONCounter1C11_MSR_PMON_CTR00x0E7664CBo11PMONCounter0Box-LevelFilterC11_MSR_PMON_BOX_FILTER0x0E7432CBo11PMONFilterC11_MSR_PMON_BOX_FILTER10x0E7A32CBo11PMONFilter1GenericCounterControlC11_MSR_PMON_CTL30x0E7332CBo11PMONControlforCounter3C11_MSR_PMON_CTL20x0E7232CBo11PMONControlforCounter2C11_MSR_PMON_CTL10x0E7132CBo11PMONControlforCounter1C11_MSR_PMON_CTL00x0E7032CBo11PMONControlforCounter0Box-LevelControl/StatusC11_MSR_PMON_BOX_CTL0x0E6432CBo11PMONBox-WideControlCBo12PMONRegistersGenericCountersC12_MSR_PMON_CTR30x0E9964CBo12PMONCounter3C12_MSR_PMON_CTR20x0E9864CBo12PMONCounter2C12_MSR_PMON_CTR10x0E9764CBo12PMONCounter1C12_MSR_PMON_CTR00x0E9664CBo12PMONCounter0Box-LevelFilterC12_MSR_PMON_BOX_FILTER0x0E9432CBo12PMONFilterC12_MSR_PMON_BOX_FILTER10x0E9A32CBo12PMONFilter1GenericCounterControlC12_MSR_PMON_CTL30x0E9332CBo12PMONControlforCounter3C12_MSR_PMON_CTL20x0E9232CBo12PMONControlforCounter2C12_MSR_PMON_CTL10x0E9132CBo12PMONControlforCounter1C12_MSR_PMON_CTL00x0E9032CBo12PMONControlforCounter0Box-LevelControl/StatusC12_MSR_PMON_BOX_CTL0x0E8432CBo12PMONBox-WideControlCBo13PMONRegistersGenericCountersC13_MSR_PMON_CTR30x0EB964CBo13PMONCounter3C13_MSR_PMON_CTR20x0EB864CBo13PMONCounter2C13_MSR_PMON_CTR10x0EB764CBo13PMONCounter1C13_MSR_PMON_CTR00x0EB664CBo13PMONCounter0Box-LevelFilterC13_MSR_PMON_BOX_FILTER0x0EB432CBo13PMONFilterC13_MSR_PMON_BOX_FILTER10x0EBA32CBo13PMONFilter1GenericCounterControlMSRNameMSRAddressSize(bits)DescriptionUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring32ReferenceNumber:329468-0022.
3.
3.
1CBoBoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsintheCBo.
InthecaseoftheCBo,theCn_MSR_PMON_BOX_CTLregisterprovidestheabilitytomanuallyfreezethecountersinthebox(.
frz)andresetthegenericstate(.
rst_ctrsand.
rst_ctrl).
C13_MSR_PMON_CTL30x0EB332CBo13PMONControlforCounter3C13_MSR_PMON_CTL20x0EB232CBo13PMONControlforCounter2C13_MSR_PMON_CTL10x0EB132CBo13PMONControlforCounter1C13_MSR_PMON_CTL00x0EB032CBo13PMONControlforCounter0Box-LevelControl/StatusC13_MSR_PMON_BOX_CTL0x0EA432CBo13PMONBox-WideControlCBo14PMONRegistersGenericCountersC14_MSR_PMON_CTR30x0ED964CBo14PMONCounter3C14_MSR_PMON_CTR20x0ED864CBo14PMONCounter2C14_MSR_PMON_CTR10x0ED764CBo14PMONCounter1C14_MSR_PMON_CTR00x0ED664CBo14PMONCounter0Box-LevelFilterC14_MSR_PMON_BOX_FILTER0x0ED432CBo14PMONFilterC14_MSR_PMON_BOX_FILTER10x0EDA32CBo14PMONFilter1GenericCounterControlC14_MSR_PMON_CTL30x0ED332CBo14PMONControlforCounter3C14_MSR_PMON_CTL20x0ED232CBo14PMONControlforCounter2C14_MSR_PMON_CTL10x0ED132CBo14PMONControlforCounter1C14_MSR_PMON_CTL00x0ED032CBo14PMONControlforCounter0Box-LevelControl/StatusC14_MSR_PMON_BOX_CTL0x0EC432CBo14PMONBox-WideControlMSRNameMSRAddressSize(bits)DescriptionReferenceNumber:329468-00233UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringTable2-13.
Cn_MSR_PMON_BOX_CTLRegister–FieldDefinitions2.
3.
3.
2UCBoPMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutoftheCBoperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst).
Table2-14.
Cn_MSR_PMON_CTL{3-0}Register–FieldDefinitionsTheCBoperformancemonitordataregistersare44bwide.
Acounteroverflowoccurswhenacarryoutfrombit43isdetected.
SoftwarecanforcealluncorecountingtofreezeafterNeventsbypreloadingamonitorwithacountvalueof244-NandsettingthecontrolregistertosendanoverflowFieldBitsAttrHWResetValDescriptionrsv31:18RV0Reservedrsv17:16RV0Reserved;SWmustwriteto1elsebehaviorisundefined.
rsv15:9RV0Reservedfrz8WO0Freeze.
Ifsetto1thecountersinthisboxwillbefrozen.
rsv7:2RV0Reservedrst_ctrs1WO0ResetCounters.
Whensetto1,theCounterRegisterswillberesetto0.
rst_ctrl0WO0ResetControl.
Whensetto1,theCounterControlRegisterswillberesetto0.
FieldBitsAttrHWResetValDescriptionthresh31:24RW-V0Thresholdusedincountercomparison.
rsv23RV0Reserved;SWmustwriteto0elsebehaviorisundefined.
en22RW-V0LocalCounterEnable.
rsv21:20RV0Reserved;SWmustwriteto0elsebehaviorisundefined.
tid_en19RW-V0TIDFilterEnableedge_det18RW-V0Whensetto1,ratherthanmeasuringtheeventineachcycleitisactive,thecorrespondingcounterwillincrementwhena0to1transition(i.
e.
risingedge)isdetected.
When0,thecounterwillincrementineachcyclethattheeventisasserted.
NOTE:.
edge_detisinseriesfollowing.
thresh.
Duetothis,the.
threshfieldmustbesettoanon-0value.
Foreventsthatincrementbynomorethan1percycle,set.
threshto0x1.
rst17WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
rsv16RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
umask15:8RW-V0Selectsubeventstobecountedwithintheselectedevent.
ev_sel7:0RW-V0Selecteventtobecounted.
UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring34ReferenceNumber:329468-002messagetotheUBox(refertoSection2.
1.
1,"CounterOverflow").
Duringtheintervaloftimebetweenoverflowandglobaldisable,thecountervaluewillwrapandcontinuetocollectevents.
Ifaccessible,softwarecancontinuouslyreadthedataregisterswithoutdisablingeventcollection.
Table2-15.
Cn_MSR_PMON_CTR{3-0}Register–FieldDefinitions2.
3.
3.
3CBoFilterRegisters(Cn_MSR_PMON_BOX_FILTER{0,1})Inadditiontogenericeventcounting,eachCBoprovidesapairofFILTERregistersthatallowausertofiltervarioustrafficasitappliestospecificevents(seeEventSectionformoreinformation).
LLC_LOOKUPmaybefilteredbythecachelinestate,whileTOR_INSERTSandTOR_OCCUPANCYmaybefilteredbytheopcodeofthequeuedrequestaswellasthecorrespondingNodeID.
AnyoftheCBoeventsmaybefilteredbyThread/Core-ID.
Todoso,thecontrolregister's.
tid_enbitmustbesetto1andthetidfieldintheFILTERregisterfilledout.
NOTEOnlyoneofthesefilteringcriteriamaybeappliedatatime.
Table2-16.
Cn_MSR_PMON_BOX_FILTERRegister–FieldDefinitionsFieldBitsAttrHWResetValDescriptionrsv63:44RV0Reservedevent_count43:0RW-V044-bitperformanceeventcounterFieldBitsAttrHWResetValDescriptionrsv31:23RV0Reserved.
SWmustsetto0elsebehaviorisundefinedstate22:17RW0SelectstatetomonitorforLLC_LOOKUPevent.
Settingmultiplebitsinthisfieldwillallowausertotrackmultiplestates.
b1x1xxx-'M'state.
bx1xxxx-'F'state.
bxx1xxx-'M'statebxxx1xx-'E'state.
bxxxx1x-'S'state.
bxxxxx1-'I'state.
rsv16:5RV0Reserved.
SWmustsetto0elsebehaviorisundefinedtid4:000[4]Non-threadrelateddata[3:1]Core-ID[0]Thread1/0When.
tid_enis0;thespecifiedcounterwillcountALLeventsThread-ID0x1Fisreservedfornon-associatedrequestssuchas:-LLCvictims-PMSeq-ExternalSnoopsReferenceNumber:329468-00235UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringTable2-17.
Cn_MSR_PMON_BOX_FILTER1Register–FieldDefinitionsRefertoTable2-218,"Opcodes(AlphabeticalListing)"fordefinitionsoftheopcodesfoundinthefollowingtable.
Table2-18.
OpcodeMatchbyIDIPacketTypeforCn_MSR_PMON_BOX_FILTER.
opcFieldBitsAttrHWResetValDescriptionisoc31RW0MatchonISOCRequestsnc30RW0MatchonNon-CoherentRequestsrsv29RV0Reserved.
SWmustwrite0elsebehaviorisundefined.
opc(7bIDIOpcodew/top2b0x3)28:20RW0MatchonOpcode(seeTable2-18,"OpcodeMatchbyIDIPacketTypeforCn_MSR_PMON_BOX_FILTER.
opc")NOTE:OnlytracksopcodesthatcomefromtheIRQ.
Itisnotpossibletotracksnoops(fromIPQ)orothertransactionsfromtheISMQ.
rsv19:15RV0Reservednid15:0RW0MatchonTargetNodeIDopcValueOpcodeDefn0x180RFODemandDataRFO-ReadforOwnershiprequestsfromcoreforlinestobecachedinE0x181CRdDemandCodeRead-Fullcache-linereadrequestsfromcoreforlinestobecachedinS,typicallyforcode0x182DRdDemandDataRead-Fullcache-linereadrequestsfromcoreforlinestobecachedinSorE,typicallyfordata0x187PRdPartialReads(UC)-Partialreadrequestsof0-32B(IIOcanbeupto64B).
Uncacheable.
0x18CWCiLFStreamingStore-Full-Writeinvalidateforfullcachelineofwritecombiningstores0x18DWCiLStreamingStore-Partial-Writeinvalidateforpartialcachelineofwritecombiningstores0x190PrefRFOPrefetchRFOintoLLCbutdon'tpasstoL2.
IncludesHints0x191PrefCodePrefetchCodeintoLLCbutdon'tpasstoL2.
IncludesHints0x192PrefDataPrefetchDataintoLLCbutdon'tpasstoL2.
IncludesHints0x193PCIWiLPCIeWrite(full-non-allocating)-PartiallineMMIOwritetransactionsfromIIO(P2P).
Notusedforcoherenttransactions.
Uncacheable.
0x194PCIWiLFPCIeWrite(partial-non-allocating)-FulllineMMIOwritetransactionsfromIIO(P2P).
Notusedforcoherenttransactions.
Uncacheable0x19CPCIItoMPCIeWrite(allocating)-SimilartoItoM-requestsexclusiveownershipbutdoesnotrequiredatareadandIIOdoesnotguaranteeitwillmodifylineUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring36ReferenceNumber:329468-0022.
3.
4CBoPerformanceMonitoringEvents2.
3.
4.
1AnOverview:TheperformancemonitoringeventswithintheCBoincludealleventsinternaltotheLLCaswellaseventswhichtrackringrelatedactivityattheCBo/Coreringstops.
CBoperformancemonitoringeventscanbeusedtotrackLLCaccessrates,LLChit/missrates,LLCevic-tionandfillrates,andtodetectevidenceofbackpressureontheLLCpipelines.
Inaddition,theCBohasperformancemonitoringeventsfortrackingMESIstatetransitionsthatoccurasaresultofdatasharingacrosssocketsinamulti-socketsystem.
Andfinally,thereareeventsintheCBofortrackingringtrafficattheCBo/Coresinkinjectpoints.
EveryeventintheCBoisfromthepointofviewoftheLLCandisnotassociatedwithanyspecificcoresinceallcoresinthesocketsendtheirLLCtransactionstoallCBosinthesocket.
However,theCBoprovidesathread-idfieldintheCn_MSR_PMON_BOX_FILTERregisterwhichcanbeappliedtotheCBoeventstoobtaintheinteractionsbetweenspecificcoresandthreads.
ThereareseparatesetsofcountersforeachCBoinstance.
Foranyevent,togetanaggregatecountofthateventfortheentireLLC,thecountsacrosstheCBoinstancesmustbeaddedtogether.
ThecountscanbeaveragedacrosstheCBoinstancestogetaviewofthetypicalcountofaneventfromtheperspectiveoftheindividualCBos.
Individualper-CBodeviationsfromtheaveragecanbeusedtoiden-tifyhot-spottingacrosstheCBosorotherevidencesofnon-uniformityinLLCbehavioracrosstheCBos.
Suchhot-spottingshouldberare,thougharepetitivepollingonafixedphysicaladdressisoneobviousexampleofacasewhereananalysisofthedeviationsacrosstheCBoswouldindicatehot-spotting.
0x19DPCIWrUpdatePCIeWriteUpdate(priorgenerationuncoreinIntelXeonprocessorE5-2600ProductFamily)-seePCIRMW,exceptdoesnotreturndatabacktoIIOfromownershipreadrequest.
0x19EPCIRdCurPCIereadcurrent-ReadCurrentrequestsfromIIO.
Usedtoreaddatawithoutchangingstate.
0x19EPCIRMWPCIeRead-Modify-Write(priorgenerationuncoreinIntelXeonprocessorE5-2600ProductFamily)-Read-Modify-WriterequestfromIIO.
UncoregainsownershipandreturnlatestdatafollowedbyfulllinewritebackfromIIO==atomicflow.
Aftertransaction,LLCstateisM.
0x1C4WbMtoIRequestwritebackModifiedinvalidateline-EvictfullM-statecachelinefromcore.
Guaranteescorehasnocachedcopies.
0x1C5WbMtoERequestwritebackModifiedsettoExclusive-EvictfullM-statecachelinefromcore.
0x1C8ItoMRequestInvalidateLine-RequestExclusiveOwnershipofcacheline0x1E4PCINSRdPCIeNon-SnoopRead-Non-snoopreadrequestsoffullcachelinesfromIIO.
(SWmustguaranteecoherency)0x1E5PCINSWrPCIeNon-SnoopWrite(partial)-Non-snoopwriterequestsofpartialcachelinesfromIIO.
Alwaysuncacheable.
0x1E6PCINSWrFPCIeNon-SnoopWrite(full)-Non-snoopwriterequestsoffullcachelinesfromIIO.
Alwaysuncacheable.
opcValueOpcodeDefnReferenceNumber:329468-00237UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring2.
3.
4.
2AcronymsfrequentlyusedinCBoEvents:TheRings:AD(Address)Ring-CoreRead/WriteRequestsandIntelQPISnoops.
CarriesIntelQPIrequestsandsnoopresponsesfromCtoQPI.
BL(BlockorData)Ring-Data==2transfersfor1cachelineAK(Acknowledge)Ring-AcknowledgesQPItoCBoandCBotoCore.
CarriessnoopresponsesfromCoretoCBo.
IV(Invalidate)Ring-CBoSnooprequestsofcorecachesInternalCBoQueues:IRQ-IngressRequestQueueonADRing.
Associatedwithrequestsfromcore.
IPQ-IngressProbeQueueonADRing.
AssociatedwithsnoopsfromQPILL.
ISMQ-IngressSubsequentMessages(responsequeue).
Associatedwithmessagesresponsestoingressrequests(e.
g.
dataresponses,QPIcompletemessages,coresnoopresponsemessagesandGOresetqueue).
TOR-TableOfRequests.
TrackspendingCBotransactions.
QPI_IGR-QPIcreditsforADorBLring.
CreditstoaccesstheQPIarenecessarytobroadcastsnoops.
RxR(akaIGR)/TxR(akaEGR)-Ingress(requestsfromtheCores)andEgress(requestsheadedfortheRing)queues2.
3.
4.
3TheQueues:Thereareseveralinternaloccupancyqueuecounters,eachofwhichis5bitswideanddedicatedtoitsqueue:IRQ,IPQ,ISMQ,QPI_IGR,IGR,EGRandtheTOR.
2.
3.
5CBOBoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasuredCBOBoxevents.
SymbolNameEventCodeCtrsMaxInc/CycDescriptionCLOCKTICKS0x000-31UncoreClocksTxR_INSERTS0x020-11EgressAllocationsTxR_ADS_USED0x040-11RING_BOUNCES0x050-11NumberofLLCresponsesthatbouncedontheRing.
RING_SRC_THRTL0x070-11RxR_OCCUPANCY0x11020IngressOccupancyRxR_EXT_STARVED0x120-11IngressArbiterBlockingCyclesRxR_INSERTS0x130-11IngressAllocationsRING_AD_USED0x1b2-31ADRingInUseRING_AK_USED0x1c2-31AKRingInUseRING_BL_USED0x1d2-31BLRinginUseRING_IV_USED0x1e2-31IVRinginUseUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring38ReferenceNumber:329468-0022.
3.
6CBOBoxCommonMetrics(DerivedEvents)ThefollowingtablesummarizesmetricscommonlycalculatedfromCBOBoxevents.
COUNTER0_OCCUPANCY0x1f1-320Counter0OccupancyRxR_IPQ_RETRY0x310-11ProbeQueueRetriesRxR_IRQ_RETRY0x320-11IngressRequestQueueRejectsRxR_ISMQ_RETRY0x330-11ISMQRetriesLLC_LOOKUP0x340-11CacheLookupsTOR_INSERTS0x350-11TORInsertsTOR_OCCUPANCY0x36020TOROccupancyLLC_VICTIMS0x370-11LinesVictimizedMISC0x390-11CboMiscSymbolName:DefinitionEquationAVG_INGRESS_DEPTH:AverageDepthoftheIngressQueuethroughthesampleintervalRxR_OCCUPANCY.
IRQ/SAMPLE_INTERVALAVG_INGRESS_LATENCY:AverageLatencyofRequeststhroughtheIngressQueueinUncoreClocksRxR_OCCUPANCY.
IRQ/RxR_INSERTS.
IRQAVG_INGRESS_LATENCY_WHEN_NE:AverageLatencyofRequeststhroughtheIngressQueueinUncoreClockswhenIngressQueuehasatleastoneentryRxR_OCCUPANCY.
IRQ/COUNTER0_OCCUPANCY{edge_det,thresh=0x1}AVG_TOR_DRDS_MISS_WHEN_NE:AverageNumberofDataReadEntriesthatMisstheLLCwhentheTORisnotempty.
(TOR_OCCUPANCY.
MISS_OPCODE/COUNTER0_OCCUPANCY{edge_det,thresh=0x1}))with:Cn_MSR_PMON_BOX_FILTER1.
opc=0x182AVG_TOR_DRDS_WHEN_NE:AverageNumberofDataReadEntrieswhentheTORisnotempty.
(TOR_OCCUPANCY.
OPCODE/COUNTER0_OCCUPANCY{edge_det,thresh=0x1})with:Cn_MSR_PMON_BOX_FILTER1.
opc=0x182AVG_TOR_DRD_HIT_LATENCY:AverageLatencyofDataReadsthroughtheTORthathittheLLC((TOR_OCCUPANCY.
OPCODE-TOR_OCCUPANCY.
MISS_OPCODE)/(TOR_INSERTS.
OPCODE-TOR_INSERTS.
MISS_OPCODE))with:Cn_MSR_PMON_BOX_FILTER.
opc=0x182AVG_TOR_DRD_LATENCY:AverageLatencyofDataReadEntriesmakingtheirwaythroughtheTOR(TOR_OCCUPANCY.
OPCODE/TOR_INSERTS.
OPCODE)with:Cn_MSR_PMON_BOX_FILTER1.
opc=0x182AVG_TOR_DRD_LOC_MISS_LATENCY:AverageLatencyofDataReadsthroughtheTORthatmisstheLLCandweresatisfiedbyLocalMemory(TOR_OCCUPANCY.
MISS_OPCODE/TOR_INSERTS.
MISS_OPCODE)with:Cn_MSR_PMON_BOX_FILTER1.
{opc,nid}={0x182,my_node}AVG_TOR_DRD_MISS_LATENCY:AverageLatencyofDataReadsthroughtheTORthatmisstheLLC(TOR_OCCUPANCY.
MISS_OPCODE/TOR_INSERTS.
MISS_OPCODE)with:Cn_MSR_PMON_BOX_FILTER1.
opc=0x182AVG_TOR_DRD_REM_MISS_LATENCY:AverageLatencyofDataReadsthroughtheTORthatmisstheLLCandweresatisfiedbyaRemotecacheorRemoteMemory(TOR_OCCUPANCY.
MISS_OPCODE/TOR_INSERTS.
MISS_OPCODE)with:Cn_MSR_PMON_BOX_FILTER.
{opc,nid}={0x182,other_nodes}CYC_INGRESS_BLOCKED:CyclestheIngressRequestQueuearbiterwasBlockedRxR_EXT_STARVED.
IRQ/SAMPLE_INTERVALSymbolNameEventCodeCtrsMaxInc/CycDescriptionReferenceNumber:329468-00239UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringCYC_USED_DNEVEN:CyclesUsedintheDowndirection,EvenpolarityRING_BL_USED.
DN_EVEN/SAMPLE_INTERVALCYC_USED_DNODD:CyclesUsedintheDowndirection,OddpolarityRING_BL_USED.
DN_ODD/SAMPLE_INTERVALCYC_USED_UPEVEN:CyclesUsedintheUpdirection,EvenpolarityRING_BL_USED.
UP_EVEN/SAMPLE_INTERVALCYC_USED_UPODD:CyclesUsedintheUpdirection,OddpolarityRING_BL_USED.
UP_ODD/SAMPLE_INTERVALFAST_STR_LLC_MISS:NumberofItoM(faststring)operationsthatmisstheLLCTOR_INSERTS.
MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x1C8FAST_STR_LLC_REQ:NumberofItoM(faststring)operationsthatreferencetheLLCTOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x1C8INGRESS_REJ_V_INS:RatioofIngressRequestEntriesthatwererejectedvs.
insertedRxR_INSERTS.
IRQ_REJECTED/RxR_INSERTS.
IRQIO_READ_BW:IOReadBandwidthinMB-DiskorNetworkReads(TOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x19C+TOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
opc=0x1E6)*64/1000000IO_WRITE_BW:IOWriteBandwidthinMB-DiskorNetworkWrites(TOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x19E+TOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
opc=0x1E4)*64/1000000LLC_DRD_MISS_PCT:LLCDataReadmissratioLLC_LOOKUP.
DATA_READ(Cn_MSR_PMON_BOX_FILTER0.
state=0x1)/LLC_LOOKUP.
DATA_READ(Cn_MSR_PMON_BOX_FILTER.
state=0x3F)LLC_DRD_RFO_MISS_TO_LOC_MEM:LLCDataReadandRFOmissessatisfiedbylocalmemory.
(TOR_INSERTS.
NID_MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
{opc,nid}={0x182,my_node}+TOR_INSERTS.
NID_MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
{opc,nid}={0x180,my_node})/(TOR_INSERTS.
NID_MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
{opc,nid}={0x182,0xF}+TOR_INSERTS.
NID_MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
{opc,nid}={0x180,0xF})LLC_DRD_RFO_MISS_TO_REM_MEM:LLCDataReadandRFOmissessatisfiedbyaremotecacheorremotememory.
(TOR_INSERTS.
NID_MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
{opc,nid}={0x182,other_nodes}+TOR_INSERTS.
NID_MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
{opc,nid}={0x180,other_nodes})/(TOR_INSERTS.
NID_MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
{opc,nid}={0x182,0xF}+TOR_INSERTS.
NID_MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
{opc,nid}={0x180,0xF})LLC_MPI:LLCMissesPerInstruction(code,read,RFOandprefetches)LLC_LOOKUP.
ANY(Cn_MSR_PMON_BOX_FILTER0.
state=0x1)/INST_RETIRED.
ALL(onCore)LLC_PCIE_DATA_BYTES:LLCwritemiss(disk/networkreads)bandwidthinMBTOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x19C*64LLC_RFO_MISS_PCT:LLCRFOMissRatio(TOR_INSERTS.
MISS_OPCODE/TOR_INSERTS.
OPCODE)with:Cn_MSR_PMON_BOX_FILTER1.
opc=0x180SymbolName:DefinitionEquationUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring40ReferenceNumber:329468-0022.
3.
7CBOBoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsfortheCBOBox.
CLOCKTICKSTitle:UncoreClocksCategory:UCLKEventsEventCode:0x00Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:COUNTER0_OCCUPANCYTitle:Counter0OccupancyCategory:OCCUPANCYEventsEventCode:0x1fMax.
Inc/Cyc:.
20,RegisterRestrictions:1-3Definition:SinceoccupancycountscanonlybecapturedintheCbo's0counter,thiseventallowsausertocaptureoccupancyrelatedinformationbyfilteringtheCb0occupancycountcapturedinCounter0.
Thefilteringavailableisfoundinthecontrolregister-threshold,invertandedgedetect.
E.
g.
settingthresholdto1caneffectivelymonitorhowmanycyclesthemonitoredqueuehasanentry.
MEM_WB_BYTES:DatawrittenbacktomemoryinNumberofBytesLLC_VICTIMS.
M_STATE*64PARTIAL_PCI_READS:NumberofpartialPCIreadsTOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x195PARTIAL_PCI_WRITES:NumberofpartialPCIwritesTOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x1E5PCIE_DATA_BYTES:DatafromPCIeinNumberofBytes(TOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x194+TOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER.
opc=0x19C)*64RING_THRU_DNEVEN_BYTES:RingthroughputintheDowndirection,EvenpolarityinBytesRING_BL_USED.
DN_EVEN*32RING_THRU_DNODD_BYTES:RingthroughputintheDowndirection,OddpolarityinBytesRING_BL_USED.
DN_ODD*32RING_THRU_UPEVEN_BYTES:RingthroughputintheUpdirection,EvenpolarityinBytesRING_BL_USED.
UP_EVEN*32RING_THRU_UPODD_BYTES:RingthroughputintheUpdirection,OddpolarityinBytesRING_BL_USED.
UP_ODD*32STREAMED_FULL_STORES:NumberofStreamedStore(ofFullCacheLine)TransactionsTOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x18CSTREAMED_PART_STORES:NumberofStreamedStore(ofPartialCacheLine)TransactionsTOR_INSERTS.
OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x18DUC_READS:UncacheableReadTransactionsTOR_INSERTS.
MISS_OPCODEwith:Cn_MSR_PMON_BOX_FILTER1.
opc=0x187SymbolName:DefinitionEquationReferenceNumber:329468-00241UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringLLC_LOOKUPTitle:CacheLookupsCategory:CACHEEventsEventCode:0x34Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberoftimestheLLCwasaccessed-thisincludescode,data,prefetchesandhintscomingfromL2.
Thishasnumerousfiltersavailable.
Notethenon-standardfilteringequation.
Thiseventwillcountrequeststhatlookupthecachemultipletimeswithmulti-pleincrements.
OnemustALWAYSsetfiltermaskbit0andselectastateorstatestomatch.
Oth-erwise,theeventwillcountnothing.
CBoGlCtrl[22:17]bitscorrespondto[M'FMESI]state.
NOTE:Bit0oftheumaskmustalwaysbesetforthisevent.
Thisallowsustomatchagivenstate(orstates).
ThestateisprogrammedinCn_MSR_PMON_BOX_FILTER.
state.
Thestatefieldisabitmask,soyoucanselect(andmonitor)multiplestatesatatime.
0=I(miss),1=S,2=E,3=M,4=F.
Forexample,ifyouwantedtomonitorFandShits,youcouldset10010binthe5-bitstatefield.
Tomonitoranylookup,setthefieldto0x1F.
LLC_VICTIMSTitle:LinesVictimizedCategory:CACHEEventsEventCode:0x37Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Countsthenumberoflinesthatwerevictimizedonafill.
Thiscanbefilteredbythestatethatthelinewasin.
Table2-19.
UnitMasksforLLC_LOOKUPExtensionumask[15:8]FilterDepDescriptionDATA_READb00000011CBoFilter0[23:17]DataReadRequestReadtransactionsWRITEb00000101CBoFilter0[23:17]WriteRequestsWritebacktransactionsfromL2totheLLCThisincludesallwritetransactions--bothCacheableandUC.
REMOTE_SNOOPb00001001CBoFilter0[23:17]ExternalSnoopRequestFiltersforonlysnooprequestscomingfromtheremotesocket(s)throughtheIPQ.
ANYb00010001CBoFilter0[23:17]AnyRequestFiltersforanytransactionoriginatingfromtheIPQorIRQ.
ThisdoesnotincludelookupsoriginatingfromtheISMQ.
NIDb01000001CBoFilter0[23:17]LookupsthatMatchNIDQualifyoneoftheothersubeventsbytheTargetNID.
TheNIDisprogrammedinCn_MSR_PMON_BOX_FILTER.
nid.
InconjunctionwithSTATE=I,itispossibletomonitormissestospecificNIDsinthesystem.
Table2-20.
UnitMasksforLLC_VICTIMSExtensionumask[15:8]FilterDepDescriptionM_STATEbxxxxxxx1LinesinMstateE_STATEbxxxxxx1xLinesinEstateS_STATEbxxxxx1xxLinesinSStateUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring42ReferenceNumber:329468-002MISCTitle:CboMiscCategory:MISCEventsEventCode:0x39Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:MiscellaneouseventsintheCbo.
RING_AD_USEDTitle:ADRingInUseCategory:RINGEventsEventCode:0x1bMax.
Inc/Cyc:.
1,RegisterRestrictions:2-3Definition:CountsthenumberofcyclesthattheADringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
Wereallyhavetworings--aclockwiseringandacoun-ter-clockwisering.
Ontheleftsideofthering,the"UP"directionisontheclockwiseringand"DN"isonthecounter-clockwisering.
Ontherightsideofthering,thisisreversed.
ThefirsthalfoftheCBosareontheleftsideofthering,andthe2ndhalfareontherightsideofthering.
Inotherwords(forexample),ina4cpart,Cbo0UPADisNOTthesameringasCBo2UPADbecausetheyareonoppositesidesofthering.
NOTE:Ona2columnimplementation(e.
g.
10cores)UP_EVENisactuallyUP_VR0_EVEN+UP_VR1_EVEN(similarlyforODD/DN).
Inanycycle,aringstopcanseeuptoonepacketmovingintheUPdirectionandonepacketmovingintheDNdirection.
MISSbxxxx1xxxNIDbx1xxxxxxCBoFilter1[15:0]VictimizedLinesthatMatchNIDQualifyoneoftheothersubeventsbytheTargetNID.
TheNIDisprogrammedinCn_MSR_PMON_BOX_FILTER.
nid.
InconjunctionwithSTATE=I,itispossibletomonitormissestospecificNIDsinthesystem.
Table2-21.
UnitMasksforMISCExtensionumask[15:8]DescriptionRSPI_WAS_FSEbxxxxxxx1SilentSnoopEvictionCountsthenumberoftimeswhenaSnoophitinFSEstatesandtriggeredasilenteviction.
ThisisusefulbecausethisinformationislostinthePREencodings.
WC_ALIASINGbxxxxxx1xWriteCombiningAliasingCountsthenumberoftimesthataUSWCwrite(WCIL(F))transactionhitintheLLCinMstate,triggeringaWBMtoIfollowedbytheUSWCwrite.
ThisoccurswhenthereisWCaliasing.
STARTEDbxxxxx1xxRFO_HIT_Sbxxxx1xxxRFOHitSNumberoftimesthatanRFOhitinSstate.
ThisisusefulfordeterminingifitmightbegoodforaworkloadtouseRspIWBinsteadofRspSWB.
Table2-20.
UnitMasksforLLC_VICTIMSExtensionumask[15:8]FilterDepDescriptionReferenceNumber:329468-00243UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringRING_AK_USEDTitle:AKRingInUseCategory:RINGEventsEventCode:0x1cMax.
Inc/Cyc:.
1,RegisterRestrictions:2-3Definition:CountsthenumberofcyclesthattheAKringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
Wereallyhavetworings--aclockwiseringandacounter-clockwisering.
Ontheleftsideofthering,the"UP"directionisontheclockwiseringand"DN"isonthecounter-clockwisering.
Ontherightsideofthering,thisisreversed.
ThefirsthalfoftheCBosareontheleftsideofthering,andthe2ndhalfareontherightsideofthering.
Inotherwords(forexample),ina4cpart,Cbo0UPADisNOTthesameringasCBo2UPADbecausetheyareonoppositesidesofthering.
NOTE:Ona2columnimplementation(e.
g.
10C)UP_EVENisactuallyUP_VR0_EVEN+UP_VR1_EVEN(similarlyforODD/DN).
Inanycycle,aringstopcanseeuptoonepacketmovingintheUPdirectionandonepacketmovingintheDNdirection.
Table2-22.
UnitMasksforRING_AD_USEDExtensionumask[15:8]DescriptionUP_VR0_EVENbxxxxxxx1UpandEvenonVring0FiltersfortheUpandEvenringpolarityonVirtualRing0.
UP_VR0_ODDbxxxxxx1xUpandOddonVring0FiltersfortheUpandOddringpolarityonVirtualRing0.
DOWN_VR0_EVENbxxxxx1xxDownandEvenonVring0FiltersfortheDownandEvenringpolarityonVirtualRing0.
DOWN_VR0_ODDbxxxx1xxxDownandOddonVring0FiltersfortheDownandOddringpolarityonVirtualRing0.
UP_VR1_EVENbxxx1xxxxUpandEvenonVRing1FiltersfortheUpandEvenringpolarityonVirtualRing1.
UP_VR1_ODDbxx1xxxxxUpandOddonVRing1FiltersfortheUpandOddringpolarityonVirtualRing1.
UPb00110011UpDOWN_VR1_EVENbx1xxxxxxDownandEvenonVRing1FiltersfortheDownandEvenringpolarityonVirtualRing1.
DOWN_VR1_ODDb1xxxxxxxDownandOddonVRing1FiltersfortheDownandOddringpolarityonVirtualRing1.
DOWNb11001100DownTable2-23.
UnitMasksforRING_AK_USEDExtensionumask[15:8]DescriptionUP_VR0_EVENbxxxxxxx1UpandEvenonVring0FiltersfortheUpandEvenringpolarityonVirtualRing0.
UP_VR0_ODDbxxxxxx1xUpandOddonVring0FiltersfortheUpandOddringpolarityonVirtualRing0.
DOWN_VR0_EVENbxxxxx1xxDownandEvenonVring0FiltersfortheDownandEvenringpolarityonVirtualRing0.
DOWN_VR0_ODDbxxxx1xxxDownandOddonVring0FiltersfortheDownandOddringpolarityonVirtualRing0.
UP_VR1_EVENbxxx1xxxxUpandEvenonVRing1FiltersfortheUpandEvenringpolarityonVirtualRing1.
UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring44ReferenceNumber:329468-002RING_BL_USEDTitle:BLRinginUseCategory:RINGEventsEventCode:0x1dMax.
Inc/Cyc:.
1,RegisterRestrictions:2-3Definition:CountsthenumberofcyclesthattheBLringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
Wereallyhavetworings--aclockwiseringandacoun-ter-clockwisering.
Ontheleftsideofthering,the"UP"directionisontheclockwiseringand"DN"isonthecounter-clockwisering.
Ontherightsideofthering,thisisreversed.
ThefirsthalfoftheCBosareontheleftsideofthering,andthe2ndhalfareontherightsideofthering.
Inotherwords(forexample),ina4cpart,Cbo0UPADisNOTthesameringasCBo2UPADbecausetheyareonoppositesidesofthering.
NOTE:Ona2columnimplementation(e.
g.
10C)UP_EVENisactuallyUP_VR0_EVEN+UP_VR1_EVEN(similarlyforODD/DN).
Inanycycle,aringstopcanseeuptoonepacketmovingintheUPdirectionandonepacketmovingintheDNdirection.
UP_VR1_ODDbxx1xxxxxUpandOddonVRing1FiltersfortheUpandOddringpolarityonVirtualRing1.
UPb00110011UpDOWN_VR1_EVENbx1xxxxxxDownandEvenonVRing1FiltersfortheDownandEvenringpolarityonVirtualRing1.
DOWN_VR1_ODDb1xxxxxxxDownandOddonVRing1FiltersfortheDownandOddringpolarityonVirtualRing1.
DOWNb11001100DownTable2-24.
UnitMasksforRING_BL_USEDExtensionumask[15:8]DescriptionUP_VR0_EVENbxxxxxxx1UpandEvenonVring0FiltersfortheUpandEvenringpolarityonVirtualRing0.
UP_VR0_ODDbxxxxxx1xUpandOddonVring0FiltersfortheUpandOddringpolarityonVirtualRing0.
DOWN_VR0_EVENbxxxxx1xxDownandEvenonVring0FiltersfortheDownandEvenringpolarityonVirtualRing0.
DOWN_VR0_ODDbxxxx1xxxDownandOddonVring0FiltersfortheDownandOddringpolarityonVirtualRing0.
UP_VR1_EVENbxxx1xxxxUpandEvenonVRing1FiltersfortheUpandEvenringpolarityonVirtualRing1.
UP_VR1_ODDbxx1xxxxxUpandOddonVRing1FiltersfortheUpandOddringpolarityonVirtualRing1.
UPb00110011UpDOWN_VR1_EVENbx1xxxxxxDownandEvenonVRing1FiltersfortheDownandEvenringpolarityonVirtualRing1.
DOWN_VR1_ODDb1xxxxxxxDownandOddonVRing1FiltersfortheDownandOddringpolarityonVirtualRing1.
DOWNb11001100DownTable2-23.
UnitMasksforRING_AK_USEDExtensionumask[15:8]DescriptionReferenceNumber:329468-00245UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringRING_BOUNCESTitle:NumberofLLCresponsesthatbouncedontheRing.
Category:RINGEventsEventCode:0x05Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:RING_IV_USEDTitle:IVRinginUseCategory:RINGEventsEventCode:0x1eMax.
Inc/Cyc:.
1,RegisterRestrictions:2-3Definition:CountsthenumberofcyclesthattheIVringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
RING_SRC_THRTLTitle:Category:RINGEventsEventCode:0x07Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:RxR_EXT_STARVEDTitle:IngressArbiterBlockingCyclesCategory:INGRESSEventsEventCode:0x12Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Countscyclesinexternalstarvation.
Thisoccurswhenoneoftheingressqueuesisbeingstarvedbytheotherqueues.
Table2-25.
UnitMasksforRING_BOUNCESExtensionumask[15:8]DescriptionAD_IRQbxxxxxx1xAKbxxxxx1xxAcknowledgementstocoreBLbxxxx1xxxDataResponsestocoreIVbxxx1xxxxSnoopsofprocessor'scache.
Table2-26.
UnitMasksforRING_IV_USEDExtensionumask[15:8]DescriptionANYb00001111AnyFiltersanypolarityUPb00110011UpFiltersforUppolarityDOWNb11001100DownFiltersforDownpolarityUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring46ReferenceNumber:329468-002RxR_INSERTSTitle:IngressAllocationsCategory:INGRESSEventsEventCode:0x13Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsnumberofallocationspercycleintothespecifiedIngressqueue.
NOTE:IRQ_REJECTEDshouldnotbeORedwiththeotherumasks.
RxR_IPQ_RETRYTitle:ProbeQueueRetriesCategory:INGRESS_RETRYEventsEventCode:0x31Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Numberoftimesasnoop(probe)requesthadtoretry.
Filtersexisttocoversomeofthecommoncasesretries.
Table2-27.
UnitMasksforRxR_EXT_STARVEDExtensionumask[15:8]DescriptionIRQbxxxxxxx1IPQIRQisexternallystarvedandthereforeweareblockingtheIPQ.
IPQbxxxxxx1xIRQIPQisexternallystarvedandthereforeweareblockingtheIRQ.
PRQbxxxxx1xxIRQisblockingtheingressqueueandcausingthestarvation.
ISMQ_BIDSbxxxx1xxxISMQ_BIDNumberoftimesthattheISMQBid.
Table2-28.
UnitMasksforRxR_INSERTSExtensionumask[15:8]DescriptionIRQbxxxxxxx1IRQIRQ_REJbxxxxxx1xIRQRejectedIPQbxxxxx1xxIPQVFIFObxxx1xxxxVFIFOCountsthenumberofallocationsintotheIRQOrderingFIFO.
InthepriorgenerationuncoreinIntelXeonprocessorE5-2600ProductFamily,itisnecessarytokeepIOrequestsinorder.
Therefore,theyareallocatedintoanorderingFIFOthatsitsnexttotheIRQ,andmustbesatisfiedfromtheFIFOinorder(withrespecttoeachother).
Thisevent,inconjunctionwiththeOccupancyAccumulatorevent,canbeusedtocalculateaveragelifetimeintheFIFO.
TransactionsareallocatedintotheFIFOassoonastheyentertheCachebo(andtheIRQ)andaredeallocatedfromtheFIFOassoonastheyaredeallocatedfromtheIRQ.
ReferenceNumber:329468-00247UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringRxR_IRQ_RETRYTitle:IngressRequestQueueRejectsCategory:INGRESS_RETRYEventsEventCode:0x32Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Table2-29.
UnitMasksforRxR_IPQ_RETRYExtensionumask[15:8]DescriptionANYbxxxxxxx1AnyRejectCountsthenumberoftimesthatarequestformtheIPQwasretriedbecauseofaTORreject.
TORrejectsfromtheIPQcanbecausedbytheEgressbeingfullorAddressConflicts.
FULLbxxxxxx1xNoEgressCreditsCountsthenumberoftimesthatarequestformtheIPQwasretriedbecauseofaTORrejectfromtheEgressbeingfull.
IPQrequestsmakeuseoftheADEgressforregularresponses,theBLegresstoforwarddata,andtheAKegresstoreturncredits.
ADDR_CONFLICTbxxxxx1xxAddressConflictCountsthenumberoftimesthatarequestformtheIPQwasretriedbecauseofaTORrejectfromanaddressconflicts.
AddressconflictsoutoftheIPQshouldberare.
Theywillgenerallyonlyoccuriftwodifferentsocketsaresendingrequeststothesameaddressatthesametime.
Thisisatrue"conflict"case,unliketheIPQAddressConflictwhichiscommonlycausedbyprefetchingcharacteristics.
QPI_CREDITSbxxx1xxxxNoQPICreditsTable2-30.
UnitMasksforRxR_IRQ_RETRYExtensionumask[15:8]DescriptionANYbxxxxxxx1AnyRejectCountsthenumberofIRQretriesthatoccur.
RequestsfromtheIRQareretriediftheyarerejectedfromtheTORpipelineforavarietyofreasons.
SomeofthemostcommonreasonsincludeiftheEgressisfull,therearenoRTIDs,orthereisaPhysicalAddressmatchtoanotheroutstandingrequest.
FULLbxxxxxx1xNoEgressCreditsCountsthenumberoftimesthatarequestfromtheIRQwasretriedbecauseitfailedtoacquireanentryintheEgress.
Theegressisthebufferthatqueuesupforallocatingontothering.
IRQrequestscanmakeuseofallfourringsandallfourEgresses.
Ifanyofthequeuesthatagivenrequestneedstomakeuseofarefull,therequestwillberetried.
ADDR_CONFLICTbxxxxx1xxAddressConflictCountsthenumberoftimesthatarequestfromtheIRQwasretriedbecauseofanaddressmatchintheTOR.
Inordertomaintaincoherency,requeststothesameaddressarenotallowedtopasseachotherupintheCbo.
Therefore,ifthereisanoutstandingrequesttoagivenaddress,onecannotissueanotherrequesttothataddressuntilitiscomplete.
Thiscomesupmostcommonlywithprefetches.
OutstandingprefetchesoccasionallywillnotcompletetheirmemoryfetchandademandrequesttothesameaddresswillthensitintheIRQandgetretrieduntiltheprefetchfillsthedataintotheLLC.
Therefore,itwillnotbeuncommontoseethiscaseinhighbandwidthstreamingworkloadswhentheLLCPrefetcherinthecoreisenabled.
UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring48ReferenceNumber:329468-002RxR_ISMQ_RETRYTitle:ISMQRetriesCategory:INGRESS_RETRYEventsEventCode:0x33Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberoftimesatransactionflowingthroughtheISMQhadtoretry.
TransactionpassthroughtheISMQasresponsesforrequeststhatalreadyexistintheCbo.
Someexamplesinclude:whendataisreturnedorwhensnoopresponsescomebackfromthecores.
RTIDbxxxx1xxxNoRTIDsCountsthenumberoftimesthatrequestsfromtheIRQwereretriedbecausetherewerenoRTIDsavailable.
RTIDsarerequiredafterarequestmissestheLLCandneedstosendsnoopsand/orrequeststomemory.
IftherearenoRTIDsavailable,requestswillqueueupintheIRQandretryuntilonebecomesavailable.
NotethattherearemultipleRTIDpoolsforthedifferentsockets.
TheremaybecaseswherethelocalRTIDsareallused,butrequestsdestinedforremotememorycanstillacquireanRTIDbecausethereareremoteRTIDsavailable.
Thiseventdoesnotprovideanyfilteringforthiscase.
QPI_CREDITSbxxx1xxxxNoQPICreditsNumberofrequestsrejectsbecauseoflackofQPIIngresscredits.
ThesecreditsarerequiredinordertosendtransactionstotheQPIagent.
PleaseseetheQPI_IGR_CREDITSeventsformoreinformation.
IIO_CREDITSbxx1xxxxxNoIIOCreditsNumberoftimesarequestattemptedtoacquiretheNCS/NCBcreditforsendingmessagesonBLtotheIIO.
ThereisasinglecreditineachCBothatissharedbetweentheNCSandNCBmessageclassesforsendingtransactionsontheBLring(suchasreaddata)totheIIO.
Table2-31.
UnitMasksforRxR_ISMQ_RETRYExtensionumask[15:8]DescriptionANYbxxxxxxx1AnyRejectCountsthetotalnumberoftimesthatarequestfromtheISMQretriedbecauseofaTORreject.
ISMQrequestsgenerallywillnotneedtoretry(oratleastISMQretriesarelesscommonthanIRQretries).
ISMQrequestswillretryiftheyarenotabletoacquireaneededEgresscredittogetontothering,orforcacheevictionsthatneedtoacquireanRTID.
MostISMQrequestsalreadyhaveanRTID,soevictionretrieswillbelesscommonhere.
FULLbxxxxxx1xNoEgressCreditsCountsthenumberoftimesthatarequestfromtheISMQretriedbecauseofaTORrejectcausedbyalackofEgresscredits.
Theegressisthebufferthatqueuesupforallocatingontothering.
IfanyoftheEgressqueuesthatagivenrequestneedstomakeuseofarefull,therequestwillberetried.
RTIDbxxxx1xxxNoRTIDsCountsthenumberoftimesthatarequestfromtheISMQretriedbecauseofaTORrejectcausedbynoRTIDs.
M-statecacheevictionsareservicedthroughtheISMQ,andmustacquireanRTIDinordertowritebacktomemory.
IfnoRTIDsareavailable,theywillberetried.
QPI_CREDITSbxxx1xxxxNoQPICreditsTable2-30.
UnitMasksforRxR_IRQ_RETRYExtensionumask[15:8]DescriptionReferenceNumber:329468-00249UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringRxR_OCCUPANCYTitle:IngressOccupancyCategory:INGRESSEventsEventCode:0x11Max.
Inc/Cyc:.
20,RegisterRestrictions:0Definition:CountsnumberofentriesinthespecifiedIngressqueueineachcycle.
NOTE:IRQ_REJECTEDshouldnotbeOredwiththeotherumasks.
TOR_INSERTSTitle:TORInsertsCategory:TOREventsEventCode:0x35Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofentriessuccessfullyinsertedintotheTORthatmatchqualifica-tionsspecifiedbythesubevent.
Thereareanumberofsubevent'filters'butonlyasubsetofthesubeventcombinationsarevalid.
SubeventsthatrequireanopcodeorNIDmatchrequiretheCn_MSR_PMON_BOX_FILTER.
{opc,nid}fieldtobeset.
If,forexample,onewantedtocountDRDLocalMisses,oneshouldselect"MISS_OPC_MATCH"andsetCn_MSR_PMON_BOX_FILTER.
opctoDRD(0x182).
IIO_CREDITSbxx1xxxxxNoIIOCreditsNumberoftimesarequestattemptedtoacquiretheNCS/NCBcreditforsendingmessagesonBLtotheIIO.
ThereisasinglecreditineachCBothatissharedbetweentheNCSandNCBmessageclassesforsendingtransactionsontheBLring(suchasreaddata)totheIIO.
WB_CREDITSb1xxxxxxxNoWBCreditsRetriesofwritestolocalmemoryduetolackofHTWBcreditsTable2-32.
UnitMasksforRxR_OCCUPANCYExtensionumask[15:8]DescriptionIRQb00000001IRQIRQ_REJECTEDb00000010IRQRejectedIPQb00000100IPQVFIFOb00010000VFIFOAccumulatesthenumberofusedentriesintheIRQOrderingFIFOineachcycle.
InthepriorgenerationuncoreinIntelXeonprocessorE5-2600ProductFamily,itisnecessarytokeepIOrequestsinorder.
Therefore,theyareallocatedintoanorderingFIFOthatsitsnexttotheIRQ,andmustbesatisfiedfromtheFIFOinorder(withrespecttoeachother).
Thisevent,inconjunctionwiththeAllocationsevent,canbeusedtocalculateaveragelifetimeintheFIFO.
ThiseventcanbeusedinconjunctionwiththeNotEmptyeventtocalculateaveragequeueoccupancy.
TransactionsareallocatedintotheFIFOassoonastheyentertheCachebo(andtheIRQ)andaredeallocatedfromtheFIFOassoonastheyaredeallocatedfromtheIRQ.
Table2-31.
UnitMasksforRxR_ISMQ_RETRYExtensionumask[15:8]DescriptionUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring50ReferenceNumber:329468-002Table2-33.
UnitMasksforTOR_INSERTSExtensionumask[15:8]FilterDepDescriptionOPCODEb00000001CBoFilter1[28:20]OpcodeMatchTransactionsinsertedintotheTORthatmatchanopcode(matchedbyCn_MSR_PMON_BOX_FILTER.
opc)MISS_OPCODEb00000011CBoFilter1[28:20]MissOpcodeMatchMisstransactionsinsertedintotheTORthatmatchanopcode.
EVICTIONb00000100EvictionsEvictiontransactionsinsertedintotheTOR.
Evictionscanbequick,suchaswhenthelineisintheF,S,orEstatesandnocorevalidbitsareset.
TheycanalsobelongerifeitherCVbitsareset(sothecoresneedtobesnooped)and/orifthereisaHitM(inwhichcaseitisnecessarytowritetherequestouttomemory).
ALLb00001000AllAlltransactionsinsertedintotheTOR.
ThisincludesrequeststhatresideintheTORforashorttime,suchasLLCHitsthatdonotneedtosnoopcoresorrequeststhatgetrejectedandhavetoberetriedthroughoneoftheingressqueues.
TheTORismorecommonlyabottleneckinskewswithsmallercorecounts,wheretheratioofRTIDstoTORentriesislarger.
NotethattherearereservedTORentriesforvariousrequesttypes,soitispossiblethatagivenrequesttypebeblockedwithanoccupancythatislessthan20.
AlsonotethatgenerallyrequestswillnotbeabletoarbitrateintotheTORpipelineiftherearenoavailableTORslots.
WBb00010000WritebacksWritetransactionsinsertedintotheTOR.
Thisdoesnotinclude"RFO",butactualoperationsthatcontaindatabeingsentfromthecore.
LOCAL_OPCODEb00100001CBoFilter1[28:20]LocalMemory-OpcodeMatchedAlltransactions,satisfiedbyanopcode,insertedintotheTORthataresatisfiedbylocallyHOMedmemory.
MISS_LOCAL_OPCODEb00100011CBoFilter1[28:20]MissestoLocalMemory-OpcodeMatchedMisstransactions,satisfiedbyanopcode,insertedintotheTORthataresatisfiedbylocallyHOMedmemory.
LOCALb00101000LocalMemoryAlltransactionsinsertedintotheTORthataresatisfiedbylocallyHOMedmemory.
MISS_LOCALb00101010MissestoLocalMemoryMisstransactionsinsertedintotheTORthataresatisfiedbylocallyHOMedmemory.
NID_OPCODEb01000001CBoFilter1[28:20],CBoFilter1[15:0]NIDandOpcodeMatchedTransactionsinsertedintotheTORthatmatchaNIDandanopcode.
NID_MISS_OPCODEb01000011CBoFilter1[28:20],CBoFilter1[15:0]NIDandOpcodeMatchedMissMisstransactionsinsertedintotheTORthatmatchaNIDandanopcode.
NID_EVICTIONb01000100CBoFilter1[15:0]NIDMatchedEvictionsNIDmatchedevictiontransactionsinsertedintotheTOR.
ReferenceNumber:329468-00251UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringTOR_OCCUPANCYTitle:TOROccupancyCategory:TOREventsEventCode:0x36Max.
Inc/Cyc:.
20,RegisterRestrictions:0Definition:Foreachcycle,thiseventaccumulatesthenumberofvalidentriesintheTORthatmatchqualificationsspecifiedbythesubevent.
Thereareanumberofsubevent'filters'butonlyasubsetofthesubeventcombinationsarevalid.
SubeventsthatrequireanopcodeorNIDmatchrequiretheCn_MSR_PMON_BOX_FILTER.
{opc,nid}fieldtobeset.
If,forexample,onewantedtocountDRDLocalMisses,oneshouldselect"MISS_OPC_MATCH"andsetCn_MSR_PMON_BOX_FILTER.
opctoDRD(0x182).
NID_ALLb01001000CBoFilter1[15:0]NIDMatchedAllNIDmatched(matchesanRTIDdestination)transactionsinsertedintotheTOR.
TheNIDisprogrammedinCn_MSR_PMON_BOX_FILTER.
nid.
InconjunctionwithSTATE=I,itispossibletomonitormissestospecificNIDsinthesystem.
NID_MISS_ALLb01001010CBoFilter1[15:0]NIDMatchedMissAllAllNIDmatchedmissrequeststhatwereinsertedintotheTOR.
NID_WBb01010000CBoFilter1[15:0]NIDMatchedWritebacksNIDmatchedwritetransactionsinsertedintotheTOR.
REMOTE_OPCODEb10000001CBoFilter1[28:20]RemoteMemory-OpcodeMatchedAlltransactions,satisfiedbyanopcode,insertedintotheTORthataresatisfiedbyremotecachesorremotememory.
MISS_REMOTE_OPCODEb10000011CBoFilter1[28:20]MissestoRemoteMemory-OpcodeMatchedMisstransactions,satisfiedbyanopcode,insertedintotheTORthataresatisfiedbyremotecachesorremotememory.
REMOTEb10001000RemoteMemoryAlltransactionsinsertedintotheTORthataresatisfiedbyremotecachesorremotememory.
MISS_REMOTEb10001010MissestoRemoteMemoryMisstransactionsinsertedintotheTORthataresatisfiedbyremotecachesorremotememory.
Table2-34.
UnitMasksforTOR_OCCUPANCYExtensionumask[15:8]FilterDepDescriptionOPCODEb00000001CBoFilter1[28:20]OpcodeMatchTORentriesthatmatchanopcode(matchedbyCn_MSR_PMON_BOX_FILTER.
opc).
MISS_OPCODEb00000011CBoFilter1[28:20]MissOpcodeMatchTORentriesformisstransactionsthatmatchanopcode.
ThisgenerallymeansthattherequestwassenttomemoryorMMIO.
EVICTIONb00000100EvictionsNumberofoutstandingevictiontransactionsintheTOR.
Evictionscanbequick,suchaswhenthelineisintheF,S,orEstatesandnocorevalidbitsareset.
TheycanalsobelongerifeitherCVbitsareset(sothecoresneedtobesnooped)and/orifthereisaHitM(inwhichcaseitisnecessarytowritetherequestouttomemory).
Table2-33.
UnitMasksforTOR_INSERTSExtensionumask[15:8]FilterDepDescriptionUncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoring52ReferenceNumber:329468-002ALLb00001000AnyAllvalidTORentries.
ThisincludesrequeststhatresideintheTORforashorttime,suchasLLCHitsthatdonotneedtosnoopcoresorrequeststhatgetrejectedandhavetoberetriedthroughoneoftheingressqueues.
TheTORismorecommonlyabottleneckinskewswithsmallercorecounts,wheretheratioofRTIDstoTORentriesislarger.
NotethattherearereservedTORentriesforvariousrequesttypes,soitispossiblethatagivenrequesttypebeblockedwithanoccupancythatislessthan20.
AlsonotethatgenerallyrequestswillnotbeabletoarbitrateintotheTORpipelineiftherearenoavailableTORslots.
MISS_ALLb00001010MissAllNumberofoutstandingmissrequestsintheTOR.
'Miss'meanstheallocationrequiresanRTID.
ThisgenerallymeansthattherequestwassenttomemoryorMMIO.
WBb00010000WritebacksWritetransactionsintheTOR.
Thisdoesnotinclude"RFO",butactualoperationsthatcontaindatabeingsentfromthecore.
LOCAL_OPCODEb00100001CBoFilter1[28:20]LocalMemory-OpcodeMatchedNumberofoutstandingtransactions,satisfiedbyanopcode,intheTORthataresatisfiedbylocallyHOMedmemory.
MISS_LOCAL_OPCODEb00100011CBoFilter1[28:20]MissestoLocalMemory-OpcodeMatchedNumberofoutstandingMisstransactions,satisfiedbyanopcode,intheTORthataresatisfiedbylocallyHOMedmemory.
LOCALb00101000MISS_LOCALb00101010NID_OPCODEb01000001CBoFilter1[28:20],CBoFilter1[15:0]NIDandOpcodeMatchedTORentriesthatmatchaNIDandanopcode.
NID_MISS_OPCODEb01000011CBoFilter1[28:20],CBoFilter1[15:0]NIDandOpcodeMatchedMissNumberofoutstandingMissrequestsintheTORthatmatchaNIDandanopcode.
NID_EVICTIONb01000100CBoFilter1[15:0]NIDMatchedEvictionsNumberofoutstandingNIDmatchedevictiontransactionsintheTOR.
NID_ALLb01001000CBoFilter1[15:0]NIDMatchedNumberofNIDmatchedoutstandingrequestsintheTOR.
TheNIDisprogrammedinCn_MSR_PMON_BOX_FILTER.
nid.
InconjunctionwithSTATE=I,itispossibletomonitormissestospecificNIDsinthesystem.
NID_MISS_ALLb01001010CBoFilter1[15:0]NIDMatchedNumberofoutstandingMissrequestsintheTORthatmatchaNID.
NID_WBb01010000CBoFilter1[15:0]NIDMatchedWritebacksNIDmatchedwritetransactionsintheTOR.
REMOTE_OPCODEb10000001CBoFilter1[28:20]RemoteMemory-OpcodeMatchedNumberofoutstandingtransactions,satisfiedbyanopcode,intheTORthataresatisfiedbyremotecachesorremotememory.
Table2-34.
UnitMasksforTOR_OCCUPANCYExtensionumask[15:8]FilterDepDescriptionReferenceNumber:329468-00253UncorePerformanceMonitoringCacheingAgent(Cbo)PerformanceMonitoringTxR_ADS_USEDTitle:Category:EGRESSEventsEventCode:0x04Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:TxR_INSERTSTitle:EgressAllocationsCategory:EGRESSEventsEventCode:0x02Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberofallocationsintotheCboEgress.
TheEgressisusedtoqueueuprequestsdestinedforthering.
MISS_REMOTE_OPCODEb10000011CBoFilter1[28:20]MissestoRemoteMemory-OpcodeMatchedNumberofoutstandingMisstransactions,satisfiedbyanopcode,intheTORthataresatisfiedbyremotecachesorremotememory.
REMOTEb10001000MISS_REMOTEb10001010Table2-35.
UnitMasksforTxR_ADS_USEDExtensionumask[15:8]DescriptionADbxxxxxxx1OntoADRingAKbxxxxxx1xOntoAKRingBLbxxxxx1xxOntoBLRingTable2-36.
UnitMasksforTxR_INSERTSExtensionumask[15:8]DescriptionAD_CACHEbxxxxxxx1AD-CacheboRingtransactionsfromtheCachebodestinedfortheADring.
Someexampleincludeoutboundrequests,snooprequests,andsnoopresponses.
AK_CACHEbxxxxxx1xAK-CacheboRingtransactionsfromtheCachebodestinedfortheAKring.
ThisiscommonlyusedforcreditreturnsandGOresponses.
BL_CACHEbxxxxx1xxBL-CacheboRingtransactionsfromtheCachebodestinedfortheBLring.
Thisiscommonlyusedtosenddatafromthecachetovariousdestinations.
IV_CACHEbxxxx1xxxIV-CacheboRingtransactionsfromtheCachebodestinedfortheIVring.
Thisiscommonlyusedforsnoopstothecores.
AD_COREbxxx1xxxxAD-CoreboRingtransactionsfromtheCorebodestinedfortheADring.
Thisiscommonlyusedforoutboundrequests.
Table2-34.
UnitMasksforTOR_OCCUPANCYExtensionumask[15:8]FilterDepDescriptionUncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring54ReferenceNumber:329468-0022.
4HOMEAGENT(HA)PERFORMANCEMONITORING2.
4.
1OverviewoftheHomeAgentTheHAisresponsiblefortheprotocolsideofmemoryinteractions,includingcoherentandnon-coherenthomeagentprotocols(asdefinedintheIntelQuickPathInterconnectSpecification).
Addi-tionally,theHAisresponsiblefororderingmemoryreads/writes,cominginfromthemodularRing,toagivenaddresssuchthattheiMC(memorycontroller).
Inotherwords,itisthecoherencyagentresponsibleforguardingthememorycontroller.
AllrequestsformemoryattachedtothecouplediMCmustfirstbeorderedthroughtheHA.
Assuch,itprovidesseveralfunctions:InterfacebetweenRingandiMC:Regardlessofthememorytechnology,theHomeAgentreceivesmemoryreadandwriterequestsfromthemodularring.
Itchecksthememorytransactiontype,detectsandresolvesthecoherentconflict,andfinallyschedulesacorrespondingtransactiontothememorycontroller.
Itisalsoresponsibleforreturningtheresponseandcompletiontotherequester.
ConflictManager:Allrequestsmustgothroughconflictmanagementlogicinordertoensurecoherentconsistency.
Inotherwords,theviewofdatamustbethesameacrossallcoherencyagentsregardlessofwhoisreadingormodifyingthedata.
OnIntelQPI,thehomeagentisresponsiblefortrackingallrequeststoagivenaddressandensuringthattheresultsareconsistent.
MemoryAccessOrderingControl:TheHomeAgentguaranteestheorderingofRAW,WAWandWAR.
HomeSnoopProtocolSupport(forpartswithDirectorySupport):TheHomeAgentsupportsIntelQPI'shomesnoopprotocolbyinitiatingsnoopsonbehalfofrequests.
Closelytiedtothedirectoryfeature,thehomeagenthastheabilitytoissuesnoopstothepeercachingagentsforrequestsbasedonthedirectoryinformation.
DirectorySupport:Inordertosatisfyperformancerequirementsforthe4socketandscalableDPsegments,theHomeAgentimplementsasnoopdirectorywhichtracksallcachelinesresidingbehindthisHomeAgent.
ThisdirectoryisusedtoreducethesnooptrafficwhenIntelQPIbandwidthwouldotherwisebestrained.
Thedirectoryisnotintendedfortypical2Stopologies.
2.
4.
2HAPerformanceMonitoringOverviewTheHABoxsupportseventmonitoringthroughfour48-bitwidecounters(HA_PCI_PMON_CTR{3:0}).
Eachofthesecounterscanbeprogrammed(HA_PCI_PMON_CTL{3:0})tocaptureanyHAevent.
TheHAcounterswillincrementbyamaximumof8bpercycle.
AK_COREbxx1xxxxxAK-CoreboRingtransactionsfromtheCorebodestinedfortheAKring.
ThisiscommonlyusedforsnoopresponsescomingfromthecoreanddestinedforaCachebo.
BL_COREbx1xxxxxxBL-CoreboRingtransactionsfromtheCorebodestinedfortheBLring.
Thisiscommonlyusedfortransferringwritebackdatatothecache.
Table2-36.
UnitMasksforTxR_INSERTSExtensionumask[15:8]DescriptionReferenceNumber:329468-00255UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringForinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerformanceMonitoringControl".
2.
4.
2.
1HAPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)IfaoverflowisdetectedfromanHAperformancecounterenabledtocommunicateitsoverflow(HAn_PCI_PMON_CTL.
ov_enissetto1),theoverflowbitissetattheboxlevel(HAn_PCI_PMON_BOX_STATUS.
ov)andanoverflowmessageissenttotheUBox.
WhentheUBoxreceivestheoverflowsignal,theU_MSR_PMON_GLOBAL_STATUS.
ov_hbitisset(seeTable2-3,"U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitions")andaPMIcanbegenerated.
Onceafreezehasoccurred,inordertoseeanewfreeze,theoverflowresponsibleforthefreeze,mustbeclearedbysettingthecorrespondingbitinHAn_PCI_PMON_BOX_STATUS.
ovandU_MSR_PMON_GLOBAL_STATUs.
ov_hto1.
Assumingallthecountershavebeenlocallyenabled(.
enbitincontrolregistersmeanttomonitorevents)andtheoverflowbit(s)hasbeencleared,theHAispreparedforanewsampleinterval.
Oncetheglobalcontrolshavebeenre-enabled(Section2.
1.
4,"EnablingaNewSampleIntervalfromFrozenCounters"),countingwillresume.
2.
4.
2.
2HAPerformanceMonitorsTable2-37.
HAPerformanceMonitoringMSRs2.
4.
2.
3HABoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsintheHABox.
RegisterNamePCICFGAddressSize(bits)DescriptionPCICFGBaseAddressDev:FuncHA0PMONRegistersD14:F1HA1PMONRegistersD28:F1Box-LevelControl/StatusHAn_PCI_PMON_BOX_STATUSF832HAnPMONBox-WideStatusHAn_PCI_PMON_BOX_CTLF432HAnPMONBox-WideControlGenericCounterControlHAn_PCI_PMON_CTL3E432HAnPMONControlforCounter3HAn_PCI_PMON_CTL2E032HAnPMONControlforCounter2HAn_PCI_PMON_CTL1DC32HAnPMONControlforCounter1HAnnPCI_PMON_CTL0D832HAnPMONControlforCounter0GenericCountersHAn_PCI_PMON_CTR3BC+B832x2HAnPMONCounter3HAn_PCI_PMON_CTR2B4+B032x2HAnPMONCounter2HAn_PCI_PMON_CTR1AC+A832x2HAnPMONCounter1HAn_PCI_PMON_CTR0A4+A032x2HAnPMONCounter0Box-LevelFilterHAn_PCI_PMON_BOX_OPCODEMATCH4832HAnPMONOpcodeMatchHAn_PCI_PMON_BOX_ADDRMATCH14432HAnPMONAddressMatch1HAn_PCI_PMON_BOX_ADDRMATCH04032HAnPMONAddressMatch0UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring56ReferenceNumber:329468-002InthecaseoftheHA,theHA_PCI_PMON_BOX_CTLregisterprovidestheabilitytomanuallyfreezethecountersinthebox(.
frz)andresetthegenericstate(.
rst_ctrsand.
rst_ctrl).
IfanoverflowisdetectedfromoneoftheHAPMONregisters,thecorrespondingbitintheHA_PCI_PMON_BOX_STATUS.
ovfieldwillbeset.
Toresettheseoverflowbits,ausermustwriteavalueof'1'tothem(whichwillclearthebits).
Table2-38.
HA_PCI_PMON_BOX_CTLRegister–FieldDefinitionsUTable2-39.
HA_PCI_PMON_BOX_STATUSRegister–FieldDefinitions2.
4.
2.
4HAPMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutoftheHAperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst,.
ov_en).
FieldBitsAttrHWResetValDescriptionig31:18RV0Ignoredrsv17:16RV0Reserved;SWmustwriteto1elsebehaviorisundefined.
ig15:9RV0Ignoredfrz8WO0Freeze.
Ifsetto1thecountersinthisboxwillbefrozen.
ig7:2RV0Ignoredrst_ctrs1WO0ResetCounters.
Whensetto1,theCounterRegisterswillberesetto0.
rst_ctrl0WO0ResetControl.
Whensetto1,theCounterControlRegisterswillberesetto0.
FieldBitsAttrHWResetValDescriptionig31:5RV0Ignoredrsv4RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov3:0RW1C0IfanoverflowisdetectedfromthecorrespondingHA_PCI_PMON_CTRregister,it'soverflowbitwillbeset.
NOTE:Writeof'1'willclearthebit.
ReferenceNumber:329468-00257UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringTable2-40.
HA_PCI_PMON_CTL{3-0}Register–FieldDefinitionsTheHAperformancemonitordataregistersare48-bitwide.
Acounteroverflowoccurswhenacarryoutfrombit47isdetected.
SoftwarecanforcealluncorecountingtofreezeafterNeventsbypreloadingamonitorwithacountvalueof248-NandsettingthecontrolregistertosendanoverflowmessagetotheUBox(refertoSection2.
1.
1,"CounterOverflow").
Duringtheintervaloftimebetweenoverflowandglobaldisable,thecountervaluewillwrapandcontinuetocollectevents.
Ifaccessible,softwarecancontinuouslyreadthedataregisterswithoutdisablingeventcollection.
Table2-41.
HA_PCI_PMON_CTR{3-0}Register–FieldDefinitionsFieldBitsAttrHWResetValDescriptionthresh31:24RW-V0Thresholdusedincountercomparison.
rsv23RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
en22RW-V0LocalCounterEnable.
rsv21RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov_en20RW-V0Whenthisbitisassertedandthecorrespondingcounteroverflows,itsoverflowbitissetinthelocalstatusregister(HA_PCI_PMON_BOX_STATUS.
ov)andanoverflowissentonthemessagechanneltotheUBox.
WhentheoverflowisreceivedbytheUBox,thebitcorrespondingtothisHAwillbesetinU_MSR_PMON_GLOBAL_STATUS.
ov_h{1,0}.
ig19RV0Ignorededge_det18RW-V0Whensetto1,ratherthanmeasuringtheeventineachcycleitisactive,thecorrespondingcounterwillincrementwhena0to1transition(i.
e.
risingedge)isdetected.
When0,thecounterwillincrementineachcyclethattheeventisasserted.
NOTE:.
edge_detisinseriesfollowing.
thresh,Duetothis,the.
threshfieldmustbesettoanon-0value.
Foreventsthatincrementbynomorethan1percycle,set.
threshto0x1.
rst17WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
q_occ_rst16WO0Whensetto1,clearqueueoccupancycounterimplicatedbyeventselect.
NOTE:Sincequeueoccupancycountersneverdropbelowzero,itispossibleforthecountersto'catchup'withtherealoccupancyofthequeueinquestionwhentherealoccupancydropstozero.
umask15:8RW-V0Selectsubeventstobecountedwithintheselectedevent.
ev_sel7:0RW-V0Selecteventtobecounted.
FieldBitsAttrHWResetValDescriptionig63:48RV0Ignoredevent_count47:0RW-V048-bitperformanceeventcounterUncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring58ReferenceNumber:329468-002Inadditiontogenericeventcounting,eachHAprovidesapairofAddressMatchregistersandanOpcodeMatchregisterthatallowausertofilterincomingpackettrafficaccordingtothepacketOpcode,MessageClassandPhysicalAddress.
TheADDR_OPC_MATCH.
FILTeventisprovidedtocapturethefiltermatchasanevent.
Thefieldsarelaidoutasfollows:NOTERefertoTable2-216,"IntelQuickPathInterconnectPacketMessageClasses"andTable2-218,"Opcodes(AlphabeticalListing)"todeterminetheencodingsoftheHAOpcodeMatchRegisterfield.
Table2-42.
HA_PCI_PMON_BOX_OPCODEMATCHRegister–FieldDefinitionsTable2-43.
HA_PCI_PMON_BOX_ADDRMATCH1Register–FieldDefinitionsNOTEHA_PCI_PMON_BOX_ADDRMATCH0Register–FieldDefinitions2.
4.
3HAPerformanceMonitoringEventsTheperformancemonitoringeventswithintheHAincludealleventsinternaltotheHAaswellaseventswhichtrackringrelatedactivityattheHAringstops.
InternaleventsincludetheabilitytotrackDirec-toryActivity,Direct2CoreActivity,iMCRead/WriteTraffic,timespentdealingwithConflicts,etc.
FieldBitsAttrHWResetValDescriptionig31:6RV0Ignoredopc5:0RWS0Matchtoincomingopcode[5:4]area2bversionoftheMessageClassrepresentingADRingtraffic00-HOM001-HOM110-NDR11-SNP[3:0]QPIOpcode-SeeOpcodeMatchbyMessageClassreferredtoinNOTEFieldBitsAttrHWResetValDescriptionig31:14RV0Ignoredhi_addr13:0RWS0MatchtothisSystemAddress-MostSignificant14bofcachealignedaddress[45:32]FieldBitsHWResetValHWResetValDescriptionlo_addr31:6RWS0MatchtothisSystemAddress-LeastSignificant26bofcachealignedaddress[31:6]ig5:0RV0IgnoredReferenceNumber:329468-00259UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringiMCRPQ/WPQEventsDeterminecyclestheHAisstuckwithoutcreditsintotheiMCsread/writequeues.
2.
4.
3.
1OntheMajorHAStructures:The128-entryTF(TrackerFile)holdsalltransactionsthatarriveintheHAfromthetimetheyarriveuntiltheyarecompletedandleavetheHA.
Transactionscouldstayinthisstructuremuchlongerthantheyareneeded.
TFisthecriticalresourceeachtransactionneedsbeforebeingsenttotheiMC(memorycontroller)TFaverageoccupancy==(validcnt*128/cycles)TFaveragelatency==(validcnt*128/inserts)OtherInternalHAQueuesofInterest:TxR(akaEGR)-TheHAhasEgress(responses)queuesforeachring(AD,AK,BL)aswellasqueuestotrackcreditstheHAhastopushtrafficontothoserings.
2.
4.
4HABoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasuredHABoxevents.
SymbolNameEventCodeCtrsMaxInc/CycDescriptionCLOCKTICKS0x000-31uclksREQUESTS0x010-31ReadandWriteRequestsCONFLICT_CYCLES0x0b0-31ConflictChecksDIRECTORY_LOOKUP0x0c0-31DirectoryLookupsDIRECTORY_UPDATE0x0d0-31DirectoryUpdatesTxR_AK0x0e0-31OutboundRingTransactionsonAKTxR_BL0x100-31OutboundDRSRingTransactionstoCacheDIRECT2CORE_COUNT0x110-31Direct2CoreMessagesSentDIRECT2CORE_CYCLES_DISABLED0x120-31CycleswhenDirect2CorewasDisabledDIRECT2CORE_TXN_OVERRIDE0x130-31NumberofReadsthathadDirect2CoreOverriddenBYPASS_IMC0x140-31HAtoiMCBypassRPQ_CYCLES_NO_REG_CREDITS0x150-34iMCRPQCreditsEmpty-RegularIMC_READS0x170-34HAtoiMCNormalPriorityReadsIssuedWPQ_CYCLES_NO_REG_CREDITS0x180-34HAiMCCHN0WPQCreditsEmpty-RegularIMC_WRITES0x1a0-31HAtoiMCFullLineWritesIssuedTAD_REQUESTS_G00x1b0-32HARequeststoaTADRegion-Group0TAD_REQUESTS_G10x1c0-32HARequeststoaTADRegion-Group1IMC_RETRY0x1e0-31RetryEventsADDR_OPC_MATCH0x200-31QPIAddress/OpcodeMatchSNOOP_RESP0x210-31SnoopResponsesReceivedIGR_NO_CREDIT_CYCLES0x220-31CycleswithoutQPIIngressCreditsUncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring60ReferenceNumber:329468-0022.
4.
5HABoxCommonMetrics(DerivedEvents)ThefollowingtablesummarizesmetricscommonlycalculatedfromHABoxevents.
2.
4.
6HABoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsfortheHABox.
TxR_AD_CYCLES_FULL0x2a0-31ADEgressFullTxR_AK_CYCLES_FULL0x320-31AKEgressFullTxR_BL_OCCUPANCY0x340-320BLEgressOccupancyTxR_BL_CYCLES_FULL0x360-31BLEgressFullRING_AD_USED0x3e0-31HAADRinginUseRING_AK_USED0x3f0-31HAAKRinginUseRING_BL_USED0x400-31HABLRinginUseDIRECTORY_LAT_OPT0x410-31DirectoryLatOptReturnBT_CYCLES_NE0x420-31BTCyclesNotEmptyBT_OCCUPANCY0x430-3512BTOccupancyBT_BYPASS0x520-31BTBypassOSB0x530-31OSBSnoopBroadcastOSB_EDR0x540-31OSBEarlyDataReturnIODC_INSERTS0x560-31IODCInsertsIODC_CONFLICTS0x570-31IODCConflictsIODC_OLEN_WBMTOI0x580-31NumIODC0LengthWritesIGR_CREDITS_AD_QPI20x590-31ADQPILink2CreditAccumulatorIGR_CREDITS_BL_QPI20x5a0-31BLQPILink2CreditAccumulatorSNP_RESP_RECV_LOCAL0x600-31SnoopResponsesReceivedLocalSymbolName:DefinitionEquationPCT_CYCLES_BL_FULL:PercentageoftimetheBLEgressQueueisfullTxR_BL_CYCLES_FULL.
ALL/SAMPLE_INTERVALPCT_CYCLES_D2C_DISABLED:PercentageoftimethatDirect2Corewasdisabled.
DIRECT2CORE_CYCLES_DISABLED/SAMPLE_INTERVALPCT_RD_REQUESTS:PercentageofHAtrafficthatisfromReadRequestsREQUESTS.
READS/(REQUESTS.
READS+REQUESTS.
WRITES)PCT_WR_REQUESTS:PercentageofHAtrafficthatisfromWriteRequestsREQUESTS.
WRITES/(REQUESTS.
READS+REQUESTS.
WRITES)SymbolNameEventCodeCtrsMaxInc/CycDescriptionReferenceNumber:329468-00261UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringADDR_OPC_MATCHTitle:QPIAddress/OpcodeMatchCategory:ADDR_OPCODE_MATCHEventsEventCode:0x20Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:BT_BYPASSTitle:BTBypassCategory:BT(BackupTracker)EventsEventCode:0x52Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftransactionsthatbypasstheBT(fifo)toHTBT_CYCLES_NETitle:BTCyclesNotEmptyCategory:BT(BackupTracker)EventsEventCode:0x42Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CyclestheBackupTracker(BT)isnotempty.
TheBTistheactualHOMtrackerintheprocessor.
NOTE:WillnotcountcaseHTisemptyandaBypasshappens.
BT_OCCUPANCYTitle:BTOccupancyCategory:BT(BackupTracker)EventsEventCode:0x43Max.
Inc/Cyc:.
512,RegisterRestrictions:0-3Definition:AccumulatestheoccupancyoftheHABTpoolineverycycle.
Thiscanbeusedwiththe"notempty"stattocalculateaveragequeueoccupancyorthe"allocations"statinordertocal-culateaveragequeuelatency.
HABTsareallocatedassoonasarequestenterstheHAandisTable2-44.
UnitMasksforADDR_OPC_MATCHExtensionumask[15:8]FilterDepDescriptionADDRbxxxxxxx1HA_AddrMatch0[31:6],HA_AddrMatch1[13:0]AddressOPCbxxxxxx1xHA_OpcodeMatch[5:0]OpcodeFILTb00000011HA_AddrMatch0[31:6],HA_AddrMatch1[13:0],HA_OpcodeMatch[5:0]Address&OpcodeMatchADbxxxxx1xxHA_OpcodeMatch[5:0]ADOpcodesBLbxxxx1xxxHA_OpcodeMatch[5:0]BLOpcodesAKbxxx1xxxxHA_OpcodeMatch[5:0]AKOpcodesUncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring62ReferenceNumber:329468-002releasedafterthesnoopresponseanddatareturn(orpostinthecaseofawrite)andtheresponseisreturnedonthering.
BYPASS_IMCTitle:HAtoiMCBypassCategory:BYPASSEventsEventCode:0x14Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberoftimeswhentheHAwasabletobypasswasattempted.
Thisisalatencyoptimizationforsituationswhenthereislightloadingsonthememorysubsystem.
Thiscanbefilteredbywhenthebypasswastakenandwhenitwasnot.
NOTE:OnlyreadtransactionsuseiMCbypass.
CLOCKTICKSTitle:uclksCategory:UCLKEventsEventCode:0x00Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofuclksintheHA.
ThiswillbeslightlydifferentthanthecountintheUboxbecauseofenable/freezedelays.
TheHAisontheothersideofthediefromthefixedUboxuclkcounter,sothedriftcouldbesomewhatlargerthaninunitsthatarecloserliketheQPIAgent.
CONFLICT_CYCLESTitle:ConflictChecksCategory:CONFLICTSEventsEventCode:0x0bMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Table2-45.
UnitMasksforBT_OCCUPANCYExtensionumask[15:8]DescriptionLOCALb00000001LocalREMOTEb00000010RemoteREADS_LOCALb00000100ReadsLocalREADS_REMOTEb00001000ReadsRemoteWRITES_LOCALb00010000WritesLocalWRITES_REMOTEb00100000WritesRemoteTable2-46.
UnitMasksforBYPASS_IMCExtensionumask[15:8]DescriptionTAKENbxxxxxxx1TakenFilterfortransactionsthatsucceededintakingthebypass.
NOT_TAKENbxxxxxx1xNotTakenFilterfortransactionsthatcouldnottakethebypass.
ReferenceNumber:329468-00263UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringDIRECT2CORE_COUNTTitle:Direct2CoreMessagesSentCategory:DIRECT2COREEventsEventCode:0x11Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofDirect2CoremessagessentNOTE:WillnotbeimplementedsinceOUTBOUND_TX_BL:0x1willcountDRStoCOREwhichiseffectivelythesamethingasD2Ccount.
DIRECT2CORE_CYCLES_DISABLEDTitle:CycleswhenDirect2CorewasDisabledCategory:DIRECT2COREEventsEventCode:0x12Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesinwhichDirect2CorewasdisabledDIRECT2CORE_TXN_OVERRIDETitle:NumberofReadsthathadDirect2CoreOverriddenCategory:DIRECT2COREEventsEventCode:0x13Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofReadswhereDirect2CoreoverriddenDIRECTORY_LAT_OPTTitle:DirectoryLatOptReturnCategory:DIRECTORYEventsEventCode:0x41Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:DirectoryLatencyOptimizationDataReturnPathTaken.
WhendirectorymodeisenabledandthedirectoryretunedforareadisDir=I,thendatacanbereturnedusingafasterpathifcertainconditionsaremet(credits,freepipeline,etc).
Table2-47.
UnitMasksforCONFLICT_CYCLESExtensionumask[15:8]DescriptionCONFLICTbxxxxxx1xConflictDetectedCountsthenumberofcyclesthatwearehandlingconflicts.
LASTbxxxxx1xxLastinconflictchainCounteverylastconflictinconflictchain.
Canbeusedtocomputetheaverageconflictchainlengthas(#Ackcnflts/#LastConflictor)+1.
Thiscanbeusedtogiveafeelfortheconflictchainlengthswhileanalyzinglockkernels.
ACKCNFLTSbxxxx1xxxAcknowledgeConflictsCountthenumberofAckcnfltsCMP_FWDSbxxx1xxxxCmpFwdsCountthenumberofCmp_Fwd.
Thiswillgivethenumberoflateconflicts.
UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring64ReferenceNumber:329468-002DIRECTORY_LOOKUPTitle:DirectoryLookupsCategory:DIRECTORYEventsEventCode:0x0cMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberoftransactionsthatlookedupthedirectory.
Canbefilteredbyrequeststhathadtosnoopandthosethatdidnothaveto.
NOTE:OnlyvalidforpartsthatimplementtheDirectory.
DIRECTORY_UPDATETitle:DirectoryUpdatesCategory:DIRECTORYEventsEventCode:0x0dMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofdirectoryupdatesthatwererequired.
Theseresultinwritestothememorycontroller.
Thiscanbefilteredbydirectorysetsanddirectoryclears.
NOTE:OnlyvalidforpartsthatimplementtheDirectory.
IGR_CREDITS_AD_QPI2Title:ADQPILink2CreditAccumulatorCategory:QPI_IGR_CREDITSEventsEventCode:0x59Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:AccumulatesthenumberofcreditsavailabletotheQPILink2ADIngressbuffer.
IGR_CREDITS_BL_QPI2Title:BLQPILink2CreditAccumulatorCategory:QPI_IGR_CREDITSEventsEventCode:0x5aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Table2-48.
UnitMasksforDIRECTORY_LOOKUPExtensionumask[15:8]DescriptionSNPbxxxxxxx1SnoopNeededFiltersfortransactionsthathadtosendoneormoresnoopsbecausethedirectorybitwasset.
NO_SNPbxxxxxx1xSnoopNotNeededFiltersfortransactionsthatdidnothavetosendanysnoopsbecausethedirectorybitwasclear.
Table2-49.
UnitMasksforDIRECTORY_UPDATEExtensionumask[15:8]DescriptionSETbxxxxxxx1DirectorySetFilterfordirectorysets.
Thisoccurswhenaremotereadtransactionrequestsmemory,bringingittoaremotecache.
CLEARbxxxxxx1xDirectoryClearFilterfordirectoryclears.
ThisoccurswhensnoopsweresentandallreturnedwithRspI.
ANYbxxxxxx11AnyDirectoryUpdateReferenceNumber:329468-00265UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringDefinition:AccumulatesthenumberofcreditsavailabletotheQPILink2BLIngressbuffer.
IGR_NO_CREDIT_CYCLESTitle:CycleswithoutQPIIngressCreditsCategory:QPI_IGR_CREDITSEventsEventCode:0x22Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhentheHAdoesnothavecreditstosendmessagestotheQPIAgent.
Thiscanbefilteredbythedifferentcreditpoolsandthedifferentlinks.
IMC_READSTitle:HAtoiMCNormalPriorityReadsIssuedCategory:IMC_READSEventsEventCode:0x17Max.
Inc/Cyc:.
4,RegisterRestrictions:0-3Definition:Countofthenumberofreadsissuedtoanyofthememorycontrollerchannels.
Thiscanbefilteredbythepriorityofthereads.
NOTE:Doesnotcountreadsusingthebypasspath.
ThatiscountedseparatelyinHA_IMC.
BYPASS.
IMC_RETRYTitle:RetryEventsCategory:IMC_MISCEventsEventCode:0x1eMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:IMC_WRITESTitle:HAtoiMCFullLineWritesIssuedCategory:IMC_WRITESEventsEventCode:0x1aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthetotalnumberoffulllinewritesissuedfromtheHAintothememorycon-troller.
Thiscountsforallfourchannels.
Itcanbefilteredbyfull/partialandISOCH/non-ISOCH.
Table2-50.
UnitMasksforIGR_NO_CREDIT_CYCLESExtensionumask[15:8]DescriptionAD_QPI0bxxxxxxx1ADtoQPILink0AD_QPI1bxxxxxx1xADtoQPILink1BL_QPI0bxxxxx1xxBLtoQPILink0BL_QPI1bxxxx1xxxBLtoQPILink1Table2-51.
UnitMasksforIMC_READSExtensionumask[15:8]DescriptionNORMALb00000001NormalPriorityUncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring66ReferenceNumber:329468-002IODC_CONFLICTSTitle:IODCConflictsCategory:IODCEventsEventCode:0x57Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:IODC_INSERTSTitle:IODCInsertsCategory:IODCEventsEventCode:0x56Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:IODCAllocationsIODC_OLEN_WBMTOITitle:NumIODC0LengthWritesCategory:IODCEventsEventCode:0x58Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumIODC0LengthWritebacksMtoI-Allofwhicharedropped.
OSBTitle:OSBSnoopBroadcastCategory:OSB(OpportunisticSnoopBroadcast)EventsEventCode:0x53Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountofOSBsnoopbroadcasts.
Countsby1perrequestcausingOSBsnoopstobebroadcast.
DoesnotcountallthesnoopsgeneratedbyOSB.
Table2-52.
UnitMasksforIMC_WRITESExtensionumask[15:8]DescriptionFULLbxxxxxxx1FullLineNon-ISOCHPARTIALbxxxxxx1xPartialNon-ISOCHFULL_ISOCHbxxxxx1xxISOCHFullLinePARTIAL_ISOCHbxxxx1xxxISOCHPartialALLb00001111AllWritesTable2-53.
UnitMasksforIODC_CONFLICTSExtensionumask[15:8]DescriptionANYbxxxxxxx1AnyConflictLASTbxxxxx1xxLastConflictReferenceNumber:329468-00267UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringOSB_EDRTitle:OSBEarlyDataReturnCategory:OSB(OpportunisticSnoopBroadcast)EventsEventCode:0x54Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberoftransactionsthatbroadcastsnoopduetoOSB,butfoundcleandatainmemoryandwasabletodoearlydatareturnREQUESTSTitle:ReadandWriteRequestsCategory:TRACKEREventsEventCode:0x01Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthetotalnumberofreadrequestsmadeintotheHomeAgent.
Readsincludeallreadopcodes(includingRFO).
Writesincludeallwrites(streaming,evictions,HitM,etc).
Table2-54.
UnitMasksforOSBExtensionumask[15:8]DescriptionREADS_LOCALbxxxxxx1xLocalReadsINVITOE_LOCALbxxxxx1xxLocalInvItoEREMOTEbxxxx1xxxRemoteTable2-55.
UnitMasksforOSB_EDRExtensionumask[15:8]DescriptionALLbxxxxxxx1AllREADS_LOCAL_Ibxxxxxx1xReadstoLocalIREADS_REMOTE_Ibxxxxx1xxReadstoRemoteIREADS_LOCAL_Sbxxxx1xxxReadstoLocalSREADS_REMOTE_Sbxxx1xxxxReadstoRemoteSTable2-56.
UnitMasksforREQUESTSExtensionumask[15:8]DescriptionREADS_LOCALbxxxxxxx1LocalReadsThisfilterincludesonlyreadrequestscomingfromthelocalsocket.
ThisisagoodproxyforLLCReadMisses(includingRFOs)fromthelocalsocket.
READS_REMOTEbxxxxxx1xRemoteReadsThisfilterincludesonlyreadrequestscomingfromtheremotesocket.
ThisisagoodproxyforLLCReadMisses(includingRFOs)fromtheremotesocket.
READSb00000011ReadsIncomingreadrequests.
ThisisagoodproxyforLLCReadMisses(includingRFOs).
WRITES_LOCALbxxxxx1xxLocalWritesThisfilterincludesonlywritescomingfromthelocalsocket.
WRITES_REMOTEbxxxx1xxxRemoteWritesThisfilterincludesonlywritescomingfromremotesockets.
UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring68ReferenceNumber:329468-002RING_AD_USEDTitle:HAADRinginUseCategory:RINGEventsEventCode:0x3eMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheADringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10C)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
RING_AK_USEDTitle:HAAKRinginUseCategory:RINGEventsEventCode:0x3fMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3WRITESb00001100WritesIncomingwriterequests.
INVITOE_LOCALbxxx1xxxxLocalInvItoEsThisfilterincludesonlyInvItoEscomingfromthelocalsocket.
INVITOE_REMOTEbxx1xxxxxRemoteInvItoEsThisfilterincludesonlyInvItoEscomingfromremotesockets.
Table2-57.
UnitMasksforRING_AD_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
CW_VR1_EVENbxxx1xxxxClockwiseandEvenonVRing1FiltersfortheClockwiseandEvenringpolarityonVirtualRing1.
CW_VR1_ODDbxx1xxxxxClockwiseandOddonVRing1FiltersfortheClockwiseandOddringpolarityonVirtualRing1.
CWb00110011ClockwiseCCW_VR1_EVENbx1xxxxxxCounterclockwiseandEvenonVRing1FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing1.
CCW_VR1_ODDb1xxxxxxxCounterclockwiseandOddonVRing1FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing1.
CCWb11001100CounterclockwiseTable2-56.
UnitMasksforREQUESTSExtensionumask[15:8]DescriptionReferenceNumber:329468-00269UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringDefinition:CountsthenumberofcyclesthattheAKringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10C)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
RING_BL_USEDTitle:HABLRinginUseCategory:RINGEventsEventCode:0x40Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheBLringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10C)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
Table2-58.
UnitMasksforRING_AK_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
CW_VR1_EVENbxxx1xxxxClockwiseandEvenonVRing1FiltersfortheClockwiseandEvenringpolarityonVirtualRing1.
CW_VR1_ODDbxx1xxxxxClockwiseandOddonVRing1FiltersfortheClockwiseandOddringpolarityonVirtualRing1.
CWb00110011ClockwiseCCW_VR1_EVENbx1xxxxxxCounterclockwiseandEvenonVRing1FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing1.
CCW_VR1_ODDb1xxxxxxxCounterclockwiseandOddonVRing1FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing1.
CCWb11001100CounterclockwiseTable2-59.
UnitMasksforRING_BL_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring70ReferenceNumber:329468-002RPQ_CYCLES_NO_REG_CREDITSTitle:iMCRPQCreditsEmpty-RegularCategory:RPQ_CREDITSEventsEventCode:0x15Max.
Inc/Cyc:.
4,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhenthereareno"regular"creditsavailableforpostingreadsfromtheHAintotheiMC.
Inordertosendreadsintothememorycontroller,theHAmustfirstacquireacreditfortheiMC'sRPQ(readpendingqueue).
Thisqueueisbrokenintoregularcredits/buffersthatareusedbygeneralreads,and"special"requestssuchasISOCHreads.
ThiscountonlytrackstheregularcreditsCommonhighbandwidthworkloadsshouldbeabletomakeuseofalloftheregularbuffers,butitwillbedifficult(anduncommon)tomakeuseofboththeregularandspe-cialbuffersatthesametime.
Onecanfilterbasedonthememorycontrollerchannel.
Oneormorechannelscanbetrackedatagiventime.
SNOOP_RESPTitle:SnoopResponsesReceivedCategory:SNP_RESPEventsEventCode:0x21Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthetotalnumberofRspIsnoopresponsesreceived.
Wheneverasnoopsareissued,oneormoresnoopresponseswillbereturneddependingonthetopologyofthesystem.
Insystemslargerthan2s,whenmultiplesnoopsarereturnedthiswillcountallthesnoopsthatarereceived.
Forexample,if3snoopswereissuedandreturnedRspI,RspS,andRspSFwd;theneachofthesesub-eventswouldincrementby1.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
CW_VR1_EVENbxxx1xxxxClockwiseandEvenonVRing1FiltersfortheClockwiseandEvenringpolarityonVirtualRing1.
CW_VR1_ODDbxx1xxxxxClockwiseandOddonVRing1FiltersfortheClockwiseandOddringpolarityonVirtualRing1.
CWb00110011ClockwiseCCW_VR1_EVENbx1xxxxxxCounterclockwiseandEvenonVRing1FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing1.
CCW_VR1_ODDb1xxxxxxxCounterclockwiseandOddonVRing1FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing1.
CCWb11001100CounterclockwiseTable2-60.
UnitMasksforRPQ_CYCLES_NO_REG_CREDITSExtensionumask[15:8]DescriptionCHN0b00000001Channel0Filterformemorycontrollerchannel0only.
CHN1b00000010Channel1Filterformemorycontrollerchannel1only.
CHN2b00000100Channel2Filterformemorycontrollerchannel2only.
CHN3b00001000Channel3Filterformemorycontrollerchannel3only.
Table2-59.
UnitMasksforRING_BL_USEDExtensionumask[15:8]DescriptionReferenceNumber:329468-00271UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringSNP_RESP_RECV_LOCALTitle:SnoopResponsesReceivedLocalCategory:SNP_RESPEventsEventCode:0x60Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofsnoopresponsesreceivedforaLocalrequestTable2-61.
UnitMasksforSNOOP_RESPExtensionumask[15:8]DescriptionRSPIbxxxxxxx1RspIFiltersforsnoopsresponsesofRspI.
RspIisreturnedwhentheremotecachedoesnothavethedata,orwhentheremotecachesilentlyevictsdata(suchaswhenanRFOhitsnon-modifieddata).
RSPSbxxxxxx1xRspSFiltersforsnoopresponsesofRspS.
RspSisreturnedwhenaremotecachehasdatabutisnotforwardingit.
ItisawaytolettherequestingsocketknowthatitcannotallocatethedatainEstate.
NodataissentwithSRspS.
RSPIFWDbxxxxx1xxRspIFwdFiltersforsnoopresponsesofRspIFwd.
ThisisreturnedwhenaremotecachingagentforwardsdataandtherequestingagentisabletoacquirethedatainEorMstates.
ThisiscommonlyreturnedwithRFOtransactions.
ItcanbeeitheraHitMoraHitFE.
RSPSFWDbxxxx1xxxRspSFwdFiltersforasnoopresponseofRspSFwd.
Thisisreturnedwhenaremotecachingagentforwardsdatabutholdsontoitscurrentcopy.
ThisiscommonfordataandcodereadsthathitinaremotesocketinEorFstate.
RSP_WBbxxx1xxxxRsp*WBFiltersforasnoopresponseofRspIWBorRspSWB.
Thisisreturnedwhenanon-RFOrequesthitsinMstate.
DataandCodeReadscanreturneitherRspIWBorRspSWBdependingonhowthesystemhasbeenconfigured.
InvItoEtransactionswillalsoreturnRspIWBbecausetheymustacquireownership.
RSP_FWD_WBbxx1xxxxxRsp*Fwd*WBFiltersforasnoopresponseofRsp*Fwd*WB.
Thissnoopresponseisonlyusedin4ssystems.
ItisusedwhenasnoopHITM'sinaremotecachingagentanditdirectlyforwardsdatatoarequestor,andsimultaneouslyreturnsdatatothehometobewrittenbacktomemory.
RSPCNFLCTbx1xxxxxxRSPCNFLCT*FiltersforsnoopsresponsesofRspConflict.
ThisisreturnedwhenasnoopfindsanexistingoutstandingtransactioninaremotecachingagentwhenitCAMsthatcachingagent.
Thistriggersconflictresolutionhardware.
ThiscoversbothRspCnflctandRspCnflctWbI.
UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring72ReferenceNumber:329468-002TAD_REQUESTS_G0Title:HARequeststoaTADRegion-Group0Category:TADEventsEventCode:0x1bMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberofHArequeststoagivenTADregion.
Thereareupto11TAD(tar-getaddressdecode)regionsineachhomeagent.
AllrequestsdestinedforthememorycontrollermustfirstbedecodedtodeterminewhichTADregiontheyarein.
ThiseventisfilteredbasedontheTADregionID,andcoversregions0to7.
Thiseventisusefulforunderstandinghowapplicationsareusingthememorythatisspreadacrossthedifferentmemoryregions.
Itisparticularlyusefulfor"Monroe"systemsthatusetheTADtoenableindividualchannelstoenterself-refreshtosavepower.
Table2-62.
UnitMasksforSNP_RESP_RECV_LOCALExtensionumask[15:8]DescriptionRSPIbxxxxxxx1RspIFiltersforsnoopsresponsesofRspI.
RspIisreturnedwhentheremotecachedoesnothavethedata,orwhentheremotecachesilentlyevictsdata(suchaswhenanRFOhitsnon-modifieddata).
RSPSbxxxxxx1xRspSFiltersforsnoopresponsesofRspS.
RspSisreturnedwhenaremotecachehasdatabutisnotforwardingit.
ItisawaytolettherequestingsocketknowthatitcannotallocatethedatainEstate.
NodataissentwithSRspS.
RSPIFWDbxxxxx1xxRspIFwdFiltersforsnoopresponsesofRspIFwd.
ThisisreturnedwhenaremotecachingagentforwardsdataandtherequestingagentisabletoacquirethedatainEorMstates.
ThisiscommonlyreturnedwithRFOtransactions.
ItcanbeeitheraHitMoraHitFE.
RSPSFWDbxxxx1xxxRspSFwdFiltersforasnoopresponseofRspSFwd.
Thisisreturnedwhenaremotecachingagentforwardsdatabutholdsontoitscurrentcopy.
ThisiscommonfordataandcodereadsthathitinaremotesocketinEorFstate.
RSPxWBbxxx1xxxxRsp*WBFiltersforasnoopresponseofRspIWBorRspSWB.
Thisisreturnedwhenanon-RFOrequesthitsinMstate.
DataandCodeReadscanreturneitherRspIWBorRspSWBdependingonhowthesystemhasbeenconfigured.
InvItoEtransactionswillalsoreturnRspIWBbecausetheymustacquireownership.
RSPxFWDxWBbxx1xxxxxRsp*FWD*WBFiltersforasnoopresponseofRsp*Fwd*WB.
Thissnoopresponseisonlyusedin4ssystems.
ItisusedwhenasnoopHITM'sinaremotecachingagentanditdirectlyforwardsdatatoarequestor,andsimultaneouslyreturnsdatatothehometobewrittenbacktomemory.
RSPCNFLCTbx1xxxxxxRspCnflctFiltersforsnoopsresponsesofRspConflict.
ThisisreturnedwhenasnoopfindsanexistingoutstandingtransactioninaremotecachingagentwhenitCAMsthatcachingagent.
Thistriggersconflictresolutionhardware.
ThiscoversbothRspCnflctandRspCnflctWbI.
OTHERb1xxxxxxxOtherFiltersforallothersnoopresponses.
ReferenceNumber:329468-00273UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringTAD_REQUESTS_G1Title:HARequeststoaTADRegion-Group1Category:TADEventsEventCode:0x1cMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberofHArequeststoagivenTADregion.
Thereareupto11TAD(targetaddressdecode)regionsineachhomeagent.
Allrequestsdestinedforthememorycon-trollermustfirstbedecodedtodeterminewhichTADregiontheyarein.
ThiseventisfilteredbasedontheTADregionID,andcoversregions8to10.
Thiseventisusefulforunderstandinghowapplicationsareusingthememorythatisspreadacrossthedifferentmemoryregions.
Itisparticularlyusefulfor"Monroe"systemsthatusetheTADtoenableindividualchannelstoenterself-refreshtosavepower.
TxR_AD_CYCLES_FULLTitle:ADEgressFullCategory:EGRESSEventsEventCode:0x2aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:ADEgressFullTable2-63.
UnitMasksforTAD_REQUESTS_G0Extensionumask[15:8]DescriptionREGION0b00000001TADRegion0FiltersrequestmadetoTADRegion0REGION1b00000010TADRegion1FiltersrequestmadetoTADRegion1REGION2b00000100TADRegion2FiltersrequestmadetoTADRegion2REGION3b00001000TADRegion3FiltersrequestmadetoTADRegion3REGION4b00010000TADRegion4FiltersrequestmadetoTADRegion4REGION5b00100000TADRegion5FiltersrequestmadetoTADRegion5REGION6b01000000TADRegion6FiltersrequestmadetoTADRegion6REGION7b10000000TADRegion7FiltersrequestmadetoTADRegion7Table2-64.
UnitMasksforTAD_REQUESTS_G1Extensionumask[15:8]DescriptionREGION8b00000001TADRegion8FiltersrequestmadetoTADRegion8REGION9b00000010TADRegion9FiltersrequestmadetoTADRegion9REGION10b00000100TADRegion10FiltersrequestmadetoTADRegion10REGION11b00001000TADRegion11FiltersrequestmadetoTADRegion11UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoring74ReferenceNumber:329468-002TxR_AKTitle:OutboundRingTransactionsonAKCategory:OUTBOUND_TXEventsEventCode:0x0eMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:TxR_AK_CYCLES_FULLTitle:AKEgressFullCategory:EGRESSEventsEventCode:0x32Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:AKEgressFullTxR_BLTitle:OutboundDRSRingTransactionstoCacheCategory:OUTBOUND_TXEventsEventCode:0x10Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofDRSmessagessentoutontheBLring.
Thiscanbefilteredbythedestination.
Table2-65.
UnitMasksforTxR_AD_CYCLES_FULLExtensionumask[15:8]DescriptionSCHED0bxxxxxxx1Scheduler0Filterforcyclesfullfromschedulerbank0SCHED1bxxxxxx1xScheduler1Filterforcyclesfullfromschedulerbank1ALLbxxxxxx11AllCyclesfullfrombothschedulersTable2-66.
UnitMasksforTxR_AK_CYCLES_FULLExtensionumask[15:8]DescriptionSCHED0bxxxxxxx1Scheduler0Filterforcyclesfullfromschedulerbank0SCHED1bxxxxxx1xScheduler1Filterforcyclesfullfromschedulerbank1ALLbxxxxxx11AllCyclesfullfrombothschedulersTable2-67.
UnitMasksforTxR_BLExtensionumask[15:8]DescriptionDRS_CACHEbxxxxxxx1DatatoCacheFilterfordatabeingsenttothecache.
ReferenceNumber:329468-00275UncorePerformanceMonitoringHomeAgent(HA)PerformanceMonitoringTxR_BL_CYCLES_FULLTitle:BLEgressFullCategory:EGRESSEventsEventCode:0x36Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:BLEgressFullTxR_BL_OCCUPANCYTitle:BLEgressOccupancyCategory:BL_EGRESSEventsEventCode:0x34Max.
Inc/Cyc:.
20,RegisterRestrictions:0-3Definition:BLEgressOccupancyWPQ_CYCLES_NO_REG_CREDITSTitle:HAiMCCHN0WPQCreditsEmpty-RegularCategory:WPQ_CREDITSEventsEventCode:0x18Max.
Inc/Cyc:.
4,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhenthereareno"regular"creditsavailableforpostingwritesfromtheHAintotheiMC.
Inordertosendwritesintothememorycontroller,theHAmustfirstacquireacreditfortheiMC'sWPQ(writependingqueue).
Thisqueueisbrokenintoregularcredits/buffersthatareusedbygeneralwrites,and"special"requestssuchasISOCHwrites.
ThiscountonlytrackstheregularcreditsCommonhighbandwidthworkloadsshouldbeabletomakeuseofalloftheregularbuffers,butitwillbedifficult(anduncommon)tomakeuseofboththeDRS_COREbxxxxxx1xDatatoCoreFilterfordatabeingsentdirectlytotherequestingcore.
DRS_QPIbxxxxx1xxDatatoQPIFilterfordatabeingsenttoaremotesocketoverQPI.
Table2-68.
UnitMasksforTxR_BL_CYCLES_FULLExtensionumask[15:8]DescriptionSCHED0bxxxxxxx1Scheduler0Filterforcyclesfullfromschedulerbank0SCHED1bxxxxxx1xScheduler1Filterforcyclesfullfromschedulerbank1ALLbxxxxxx11AllCyclesfullfrombothschedulersTable2-69.
UnitMasksforTxR_BL_OCCUPANCYExtensionumask[15:8]DescriptionSCHED0b00000001Scheduler0Filterforoccupancyfromschedulerbank0SCHED1b00000010Scheduler1Filterforoccupancyfromschedulerbank1Table2-67.
UnitMasksforTxR_BLExtensionumask[15:8]DescriptionUncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring76ReferenceNumber:329468-002regularandspecialbuffersatthesametime.
Onecanfilterbasedonthememorycontrollerchan-nel.
Oneormorechannelscanbetrackedatagiventime.
2.
5MEMORYCONTROLLER(IMC)PERFORMANCEMONITORING2.
5.
1OverviewoftheiMCTheintegratedMemoryControllerprovidestheinterfacetoDRAMandcommunicatestotherestoftheuncorethroughtheHomeAgent(i.
e.
theiMCdoesnotconnecttotheRing).
InconjunctionwiththeHA,thememorycontrolleralsoprovidesavarietyofRASfeatures,suchasECC,lockstep,memoryaccessretry,memoryscrubbing,thermalthrottling,mirroring,andranksparing.
2.
5.
2FunctionalOverviewThememorycontrolleristheinterfacebetweenthehomeHomeAgent(HA)andDRAM,translatingreadandwritecommandsintospecificmemorycommandsandschedulesthemwithrespecttomemorytiming.
TheothermainfunctionofthememorycontrollerisadvancedECCsupport.
BecauseofthedatapathaffinitytotheHAdatapath,theHAispairedwiththememorycontroller.
TheuncoreofIvyBridge-EPmicroarchitecturecansupportuptofourchannelsofDDR3ormetaRAM.
ForDDR3,thenumberofDIMMsperchanneldependsonthespeeditisrunningandthepackage.
ThreeorfourDDR3memorychannelsDIMMtechnologiessupported-UDIMMDDR3-SR-x8andx16datawidths;DR-x8,datawidth-RDIMMDDR3-SR,DRandQR-x4andx8datawidths-LRDIMMDDR3-QR;x4andx8datawidthwithdirectmaporwithrankmultiplicationDRAMspeedssupported-800,1067,1333,1600and1867MT/sSupportsuptomaximumofeightranksperchannelSupportsECCRDIMMandLRDIMMandbothECCandnon-ECCUDIMMSProcessorssupporting4memorychannelspairchannel0&1andchannel2&3forlockstepmode;otherwisetheprocessorpairschannels2&3only.
Processorsupporting4memorychannelsalsosupportchannel0&1mirroringaswellaschannel2&3mirroring;otherwisetheprocessoronlysupportschannels2&3mirroring.
SupportforunbufferedDDR3andregisteredDDR3UptofourindependentDDR3channelsTable2-70.
UnitMasksforWPQ_CYCLES_NO_REG_CREDITSExtensionumask[15:8]DescriptionCHN0b00000001Channel0Filterformemorycontrollerchannel0only.
CHN1b00000010Channel1Filterformemorycontrollerchannel1only.
CHN2b00000100Channel2Filterformemorycontrollerchannel2only.
CHN3b00001000Channel3Filterformemorycontrollerchannel3only.
ReferenceNumber:329468-00277UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringEightindependentbanksperrankSupportforDDR3frequenciesof800,1067,1333,1600GT/s.
ThespeedachievableisdependentonthenumberofDIMMsperchannel.
UptothreeDIMMsperchannel(dependsonthespeed)Supportfor512Mb,1Gb,2Gb,and4GbDIMMsSupportforx4,x8andx16datalinespernativeDDR3deviceECCsupport(correctanyerrorwithinax4device)Lockstepsupportforx8chipfailOpenorclosedpagepolicyChannelMirroringpersocketDemandandPatrolScrubbingsupportMemoryInitializationPoisoningSupportSupportforLR-DIMMs(loadreduced)forabufferedmemorysolutiondemandinghighercapacitymemorysubsytems.
SupportforlowvoltageDDR3(LV-DDR3,1.
35V)2.
5.
3iMCPerformanceMonitoringOverviewTheiMCsupportseventmonitoringthroughfour48-bitwidecounters(MC_CHy_PCI_PMON_CTR{3:0})andonefixedcounter(MC_CHy_PCI_PMON_FIXED_CTR)foreachDRAMchannel(ofwhichthereare4)theMCisattachedto.
Eachofthesecounterscanbeprogrammed(MC_CHy_PCI_PMON_CTL{3:0})tocaptureanyMCevent.
TheMCcounterswillincre-mentbyamaximumof8bpercycle.
Forinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerformanceMonitoringControl".
2.
5.
3.
1iMCPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)IfanoverflowisdetectedfromanMCperformancecounterenabledtocommunicateitsoverflow(MC_CHy_PCI_PMON_CTL.
ov_enissetto1),theoverflowbitissetattheboxlevel(MC_CHy_PCI_PMON_BOX_STATUS.
ov)andanoverflowmessageissenttotheUBox.
WhentheUBoxreceivestheoverflowsignal,theU_MSR_PMON_GLOBAL_STATUS.
ov_mbitoverflowisset(seeTable2-3,"U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitions")andaPMIcanbegener-ated.
Onceafreezehasoccurred,inordertoseeanewfreeze,theoverflowfieldresponsibleforthefreeze,mustbeclearedbysettingthecorrespondingbitinMC_PCI_PMON_BOX_STATUS.
ovandU_MSR_PMON_GLOBAL_STATU.
ov_m.
Assumingallthecountershavebeenlocallyenabled(.
enbitindataregistersmeanttomonitorevents)andtheoverflowbit(s)hasbeencleared,theiMCispreparedforanewsampleinterval.
Oncetheglobalcontrolshavebeenre-enabled(Section2.
1.
4,"EnablingaNewSampleIntervalfromFrozenCounters"),countingwillresume.
UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring78ReferenceNumber:329468-0022.
5.
4iMCPerformanceMonitorsTable2-71.
iMCPerformanceMonitoringMSRs2.
5.
4.
1MCBoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsintheMCBoxes.
InthecaseoftheMC,theMC_CHy_PCI_PMON_BOX_CTLregisterprovidestheabilitytomanuallyfreezethecountersinthebox(.
frz)andresetthegenericstate(.
rst_ctrsand.
rst_ctrl).
IfanoverflowisdetectedfromoneoftheMCBoxPMONregisters,thecorrespondingbitintheMC_CHy_PCI_PMON_BOX_STATUS.
ovfieldwillbeset.
Toresettheseoverflowbits,ausermustwriteavalueof'1'tothem(whichwillclearthebits).
RegisterNamePCICFGAddressSize(bits)DescriptionPCICFGBaseAddressDev:FuncMC0Channel0PMONRegistersD16:F4MC0Channel1PMONRegistersD16:F5MC0Channel2PMONRegistersD16:F0MC0Channel3PMONRegistersD16:F1MC1Channel0PMONRegistersD30:F4MC1Channel1PMONRegistersD30:F5MC1Channel2PMONRegistersD30:F0MC1Channel3PMONRegistersD30:F1Box-LevelControl/StatusMC_CHy_PCI_PMON_BOX_STATUSF832MCChannelyPMONBox-WideStatusMC_CHy_PCI_PMON_BOX_CTLF432MCChannelyPMONBox-WideControlGenericCounterControlMC_CHy_PCI_PMON_FIXED_CTLF032MCChannelyPMONControlforFixedCounterMC_CHy_PCI_PMON_CTL3E432MCChannelyPMONControlforCounter3MC_CHy_PCI_PMON_CTL2E032MCChannelyPMONControlforCounter2MC_CHy_PCI_PMON_CTL1DC32MCChannelyPMONControlforCounter1MC_CHy_PCI_PMON_CTL0D832MCChannelyPMONControlforCounter0GenericCountersMC_CHy_PCI_PMON_FIXED_CTRD4+D032x2MCChannelyPMONFixedCounterMC_CHy_PCI_PMON_CTR3BC+B832x2MCChannelyPMONCounter3MC_CHy_PCI_PMON_CTR2B4+B032x2MCChannelyPMONCounter2MC_CHy_PCI_PMON_CTR1AC+A832x2MCChannelyPMONCounter1MC_CHy_PCI_PMON_CTR0A4+A032x2MCChannelyPMONCounter0ReferenceNumber:329468-00279UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringTable2-72.
MC_CHy_PCI_PMON_BOX_CTLRegister–FieldDefinitionsUTable2-73.
MC_CHy_PCI_PMON_BOX_STATUSRegister–FieldDefinitions2.
5.
4.
2MCPMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutoftheMCperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst,.
ov_en).
FieldBitsAttrHWResetValDescriptionig31:18RV0Ignoredrsv17:16RV0Reserved;SWmustwriteto1elsebehaviorisundefined.
ig15:9RV0Ignoredfrz8WO0Freeze.
Ifsetto1thecountersinthisboxwillbefrozen.
ig7:2RV0Ignoredrst_ctrs1WO0ResetCounters.
Whensetto1,theCounterRegisterswillberesetto0.
rst_ctrl0WO0ResetControl.
Whensetto1,theCounterControlRegisterswillberesetto0.
FieldBitsAttrHWResetValDescriptionig31:6RV0Ignoredrsv5RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov4:0RW1C0IfanoverflowisdetectedfromthecorrespondingMC_CHy_PCI_PMON_CTRregister,it'soverflowbitwillbeset.
NOTE:Writeof'1'willclearthebit.
Bit4-overflowfor*_PMON_CTR4Bit1-overflowfor*_PMON_CTR1Bit0-overflowforthefixedcounterUncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring80ReferenceNumber:329468-002Table2-74.
MC_CHy_PCI_PMON_CTL{3-0}Register–FieldDefinitionsAllMCperformancemonitordataregistersare48-bitwide.
Acounteroverflowoccurswhenacarryoutfrombit47isdetected.
SoftwarecanforcealluncorecountingtofreezeafterNeventsbypreloadingamonitorwithacountvalueof248-NandsettingthecontrolregistertosendanoverflowmessagetotheUBox(refertoSection2.
1.
1,"CounterOverflow").
Duringtheintervaloftimebetweenoverflowandglobaldisable,thecountervaluewillwrapandcontinuetocollectevents.
Ifaccessible,softwarecancontinuouslyreadthedataregisterswithoutdisablingeventcollection.
ThisisacounterthatalwaystracksthenumberofDRAMclocks(dclks-halfofDDRspeed)intheiMC.
Thedclkneverchangesfrequency(onagivensystem),andthereforeisagoodmeasureofwallclock(unliketheUncoreclockwhichcanchangefrequencybasedonsystemload).
Thisclockisgenerallyabitslowerthantheuclk(~800MHzto~1.
066GHz)andthereforehaslessfidelity.
FieldBitsAttrHWResetValDescriptionthresh31:24RW-V0Thresholdusedincountercomparison.
rsv23RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
en22RW-V0LocalCounterEnable.
rsv21RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov_en20RW-V0Whenthisbitisassertedandthecorrespondingcounteroverflows,itsoverflowbitissetinthelocalstatusregister(MC_CHy_PCI_PMON_BOX_STATUS.
ov)andanoverflowissentonthemessagechanneltotheUBox.
WhentheoverflowisreceivedbytheUBox,thebitcorrespondingtothisMCwillbesetinU_MSR_PMON_GLOBAL_STATUS.
ov_m{1,0}.
ig19RV0Ignorededge_det18RW-V0Whensetto1,ratherthanmeasuringtheeventineachcycleitisactive,thecorrespondingcounterwillincrementwhena0to1transition(i.
e.
risingedge)isdetected.
When0,thecounterwillincrementineachcyclethattheeventisasserted.
NOTE:.
edge_detisinseriesfollowing.
thresh.
Duetothis,the.
threshfieldmustbesettoanon-0value.
Foreventsthatincrementbynomorethan1percycle,set.
threshto0x1.
rst17WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
rsv16RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
umask15:8RW-V0Selectsubeventstobecountedwithintheselectedevent.
ev_sel7:0RW-V0Selecteventtobecounted.
ReferenceNumber:329468-00281UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringTable2-75.
MC_CHy_PCI_PMON_FIXED_CTLRegister–FieldDefinitionsTable2-76.
MC_CHy_PCI_PMON_CTR{FIXED,3-0}Register–FieldDefinitions2.
5.
5iMCPerformanceMonitoringEvents2.
5.
5.
1AnOverview:AsamplingofeventsavailableformonitoringintheiMC:Translatedcommands:VariousReadandWriteCAScommandsMemorycommands:CAS,Precharge,Refresh,Preemptions,etc,Pagehitsandpagemisses.
PageClosingEventsControlofpowerconsumption:ThermalThrottlingbyRank,TimespentinCKEONmode,etc.
andmanymore.
InternaliMCQueues:RPQ-ReadPendingQueue.
NOTE:HAalsotrackssomeinformationrelatedtotheiMC'sRPQ.
WPQ-WritePendingQueue.
NOTE:HAalsotrackssomeinformationrelatedtotheiMC'sWPQ.
2.
5.
6iMCBoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasurediMCBoxevents.
FieldBitsAttrHWResetValDescriptionig31:24RV0Ignoredrsv23RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
en22RW-V0LocalCounterEnable.
rsv21RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov_en20RW-V0Whenthisbitisassertedandthecorrespondingcounteroverflows,aPMIexceptionissenttotheUBox.
rst19WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
ig18:0RV0IgnoredFieldBitsAttrHWResetValDescriptionig63:48RV0Ignoredevent_count47:0RW-V048-bitperformanceeventcounterUncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring82ReferenceNumber:329468-002SymbolNameEventCodeCtrsMaxInc/CycDescriptionDCLOCKTICKS0x000-31DRAMClockticksACT_COUNT0x010-31DRAMActivateCountPRE_COUNT0x020-31DRAMPrechargecommands.
CAS_COUNT0x040-31DRAMRD_CASandWR_CASCommands.
DRAM_REFRESH0x050-31NumberofDRAMRefreshesIssuedDRAM_PRE_ALL0x060-31DRAMPrechargeAllCommandsMAJOR_MODES0x070-31CyclesinaMajorModePREEMPTION0x080-31ReadPreemptionCountECC_CORRECTABLE_ERRORS0x090-31ECCCorrectableErrorsRPQ_INSERTS0x100-31ReadPendingQueueAllocationsRPQ_CYCLES_NE0x110-31ReadPendingQueueNotEmptyWPQ_INSERTS0x200-31WritePendingQueueAllocationsWPQ_CYCLES_NE0x210-31WritePendingQueueNotEmptyWPQ_CYCLES_FULL0x220-31WritePendingQueueFullCyclesWPQ_READ_HIT0x230-31WritePendingQueueCAMMatchWPQ_WRITE_HIT0x240-31WritePendingQueueCAMMatchPOWER_THROTTLE_CYCLES0x410-31ThrottleCyclesforRank0POWER_PCU_THROTTLING0x420-31POWER_SELF_REFRESH0x430-30Clock-EnabledSelf-RefreshPOWER_CKE_CYCLES0x830-316CKE_ON_CYCLESbyRankPOWER_CHANNEL_DLLOFF0x840-31ChannelDLLOFFCyclesPOWER_CHANNEL_PPD0x850-34ChannelPPDCyclesPOWER_CRITICAL_THROTTLE_CYCLES0x860-31CriticalThrottleCyclesVMSE_WR_PUSH0x900-31VMSEWRPUSHissuedVMSE_MXB_WR_OCCUPANCY0x910-332VMSEMXBwritebufferoccupancyRD_CAS_PRIO0xa00-31BYP_CMDS0xa10-31RD_CAS_RANK00xb00-31RD_CASAccesstoRank0RD_CAS_RANK10xb10-31RD_CASAccesstoRank1RD_CAS_RANK20xb20-31RD_CASAccesstoRank2RD_CAS_RANK30xb30-31RD_CASAccesstoRank3RD_CAS_RANK40xb40-31RD_CASAccesstoRank4RD_CAS_RANK50xb50-31RD_CASAccesstoRank5RD_CAS_RANK60xb60-31RD_CASAccesstoRank6RD_CAS_RANK70xb70-31RD_CASAccesstoRank7WR_CAS_RANK00xb80-31WR_CASAccesstoRank0WR_CAS_RANK10xb90-31WR_CASAccesstoRank1WR_CAS_RANK20xba0-31WR_CASAccesstoRank2WR_CAS_RANK30xbb0-31WR_CASAccesstoRank3WR_CAS_RANK40xbc0-31WR_CASAccesstoRank4WR_CAS_RANK50xbd0-31WR_CASAccesstoRank5ReferenceNumber:329468-00283UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring2.
5.
7iMCBoxCommonMetrics(DerivedEvents)ThefollowingtablesummarizesmetricscommonlycalculatedfromiMCBoxevents.
WR_CAS_RANK60xbe0-31WR_CASAccesstoRank6WR_CAS_RANK70xbf0-31WR_CASAccesstoRank7WMM_TO_RMM0xc00-31TransitionfromWMMtoRMMbecauseoflowthresholdWRONG_MM0xc10-31NotgettingtherequestedMajorModeSymbolName:DefinitionEquationMEM_BW_READS:Memorybandwidthconsumedbyreads.
Expressedinbytes.
(CAS_COUNT.
RD*64)MEM_BW_TOTAL:Totalmemorybandwidth.
Expressedinbytes.
MEM_BW_READS+MEM_BW_WRITESMEM_BW_WRITES:MemorybandwidthconsumedbywritesExpressedinbytes.
(CAS_COUNT.
WR*64)PCT_CYCLES_CRITICAL_THROTTLE:ThepercentageofcyclesallDRAMranksincriticalthermalthrottlingPOWER_CRITICAL_THROTTLE_CYCLES/MC_Chy_PCI_PMON_CTR_FIXEDPCT_CYCLES_DLLOFF:ThepercentageofcyclesallDRAMranksinCKEslow(DLOFF)modePOWER_CHANNEL_DLLOFF/MC_Chy_PCI_PMON_CTR_FIXEDPCT_CYCLES_DRAM_RANKx_IN_CKE:ThepercentageofcyclesDRAMrank(x)spentinCKEONmode.
POWER_CKE_CYCLES.
RANKx/MC_Chy_PCI_PMON_CTR_FIXEDPCT_CYCLES_DRAM_RANKx_IN_THR:ThepercentageofcyclesDRAMrank(x)spentinthermalthrottling.
POWER_THROTTLE_CYCLES.
RANKx/MC_Chy_PCI_PMON_CTR_FIXEDPCT_CYCLES_PPD:ThepercentageofcyclesallDRAMranksinPPDmodePOWER_CHANNEL_PPD/MC_Chy_PCI_PMON_CTR_FIXEDPCT_CYCLES_SELF_REFRESH:ThepercentageofcyclesMemoryisinselfrefreshpowermodePOWER_SELF_REFRESH/MC_Chy_PCI_PMON_CTR_FIXEDPCT_RD_REQUESTS:Percentageofreadrequestsfromtotalrequests.
RPQ_INSERTS/(RPQ_INSERTS+WPQ_INSERTS)PCT_REQUESTS_PAGE_EMPTY:PercentageofmemoryrequeststhatresultedinPageEmpty(ACT_COUNT-PRE_COUNT.
PAGE_MISS)/(CAS_COUNT.
RD+CAS_COUNT.
WR)PCT_REQUESTS_PAGE_HIT:PercentageofmemoryrequeststhatresultedinPageHits1-(PCT_REQUESTS_PAGE_EMPTY+PCT_REQUESTS_PAGE_MISS)PCT_REQUESTS_PAGE_MISS:PercentageofmemoryrequeststhatresultedinPageMissesPRE_COUNT.
PAGE_MISS/(CAS_COUNT.
RD+CAS_COUNT.
WR)PCT_WR_REQUESTS:Percentageofwriterequestsfromtotalrequests.
WPQ_INSERTS/(RPQ_INSERTS+WPQ_INSERTS)SymbolNameEventCodeCtrsMaxInc/CycDescriptionUncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring84ReferenceNumber:329468-0022.
5.
8iMCBoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsfortheiMCBox.
ACT_COUNTTitle:DRAMActivateCountCategory:ACTEventsEventCode:0x01Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofDRAMActivatecommandssentonthischannel.
Activatecom-mandsareissuedtoopenupapageontheDRAMdevicessothatitcanbereadorwrittentowithaCAS.
OnecancalculatethenumberofPageMissesbysubtractingthenumberofPageMisspre-chargesfromthenumberofActivates.
BYP_CMDSTitle:Category:BYPASSCommandEventsEventCode:0xa1Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CAS_COUNTTitle:DRAMRD_CASandWR_CASCommands.
Category:PREEventsEventCode:0x04Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:DRAMRD_CASandWR_CASCommandsTable2-77.
UnitMasksforACT_COUNTExtensionumask[15:8]DescriptionRDbxxxxxxx1ActivateduetoReadWRbxxxxxx1xActivateduetoWriteBYPbxxxx1xxxActivateduetoWriteTable2-78.
UnitMasksforBYP_CMDSExtensionumask[15:8]DescriptionACTbxxxxxxx1ACTcommandissuedby2cyclebypassCASbxxxxxx1xCAScommandissuedby2cyclebypassPREbxxxxx1xxPREcommandissuedby2cyclebypassReferenceNumber:329468-00285UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringDCLOCKTICKSTitle:DRAMClockticksCategory:DCLKEventsEventCode:0x00Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:DRAM_PRE_ALLTitle:DRAMPrechargeAllCommandsCategory:DRAM_PRE_ALLEventsEventCode:0x06Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberoftimesthattheprechargeallcommandwassent.
DRAM_REFRESHTitle:NumberofDRAMRefreshesIssuedCategory:DRAM_REFRESHEventsEventCode:0x05Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofrefreshesissued.
Table2-79.
UnitMasksforCAS_COUNTExtensionumask[15:8]DescriptionRD_REGbxxxxxxx1AllDRAMRD_CAS(w/andw/outauto-pre)CountsthetotalnumberorDRAMReadCAScommandsissuedonthischannel.
ThisincludesbothregularRDCAScommandsaswellasthosewithimplicitPrecharge.
AutoPreisonlyusedinsystemsthatareusingclosedpagepolicy.
Wedonotfilterbasedonmajormode,asRD_CASisnotissuedduringWMM(withtheexceptionofunderfills).
RD_UNDERFILLbxxxxxx1xUnderfillReadIssuedCountsthenumberofunderfillreadsthatareissuedbythememorycontroller.
Thiswillgenerallybeaboutthesameasthenumberofpartialwrites,butmaybeslightlylessbecauseofpartialshittingintheWPQ.
WhileitispossibleforunderfillstobeissuedinbothWMMandRMM,thiseventcountsboth.
RDb00000011AllDRAMReads(RD_CAS+Underfills)CountsthetotalnumberofDRAMReadCAScommandsissuedonthischannel(includingunderfills).
WR_WMMbxxxxx1xxDRAMWR_CAS(w/andw/outauto-pre)inWriteMajorModeCountsthetotalnumberorDRAMWriteCAScommandsissuedonthischannelwhileinWrite-Major-Mode.
WR_RMMbxxxx1xxxDRAMWR_CAS(w/andw/outauto-pre)inReadMajorModeCountsthetotalnumberofOpportunisticDRAMWriteCAScommandsissuedonthischannelwhileinRead-Major-Mode.
WRb00001100AllDRAMWR_CAS(bothModes)CountsthetotalnumberofDRAMWriteCAScommandsissuedonthischannel.
ALLb00001111AllDRAMWR_CAS(w/andw/outauto-pre)CountsthetotalnumberofDRAMCAScommandsissuedonthischannel.
RD_WMMbxxx1xxxxReadCASissuedinWMMRD_RMMbxx1xxxxxReadCASissuedinRMMUncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring86ReferenceNumber:329468-002ECC_CORRECTABLE_ERRORSTitle:ECCCorrectableErrorsCategory:ECCEventsEventCode:0x09Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofECCerrorsdetectedandcorrectedbytheiMConthischannel.
ThiscounterisonlyusefulwithECCDRAMdevices.
Thiscountwillincrementonetimeforeachcor-rectionregardlessofthenumberofbitscorrected.
TheiMCcancorrectupto4biterrorsinindepen-dentchannelmodeand8biterrorsinlockstepmode.
MAJOR_MODESTitle:CyclesinaMajorModeCategory:MAJOR_MODESEventsEventCode:0x07Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthetotalnumberofcyclesspentinamajormode(selectedbyafilter)onthegivenchannel.
Majormodesarechannel-wide,andnotaper-rank(orDIMMorbank)mode.
POWER_CHANNEL_DLLOFFTitle:ChannelDLLOFFCyclesCategory:POWEREventsEventCode:0x84Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcycleswhenalltheranksinthechannelareinCKESlow(DLLOFF)mode.
NOTE:IBT=InputBufferTermination=OffTable2-80.
UnitMasksforDRAM_REFRESHExtensionumask[15:8]DescriptionPANICbxxxxxx1xHIGHbxxxxx1xxTable2-81.
UnitMasksforMAJOR_MODESExtensionumask[15:8]DescriptionREADbxxxxxxx1ReadMajorModeReadMajorModeisthedefaultmodefortheiMC,asreadsaregenerallymorecriticaltoforwardprogressthanwrites.
WRITEbxxxxxx1xWriteMajorModeThismodeistriggeredwhentheWPQhitshighoccupancyandcauseswritestobehigherprioritythanreads.
Thiscancauseblipsintheavailablereadbandwidthinthesystemandtemporarilyincreasereadlatenciesinordertoachievebetterbusutilizationsandhigherbandwidth.
PARTIALbxxxxx1xxPartialMajorModeThismajormodeisusedtodrainstarvedunderfillreads.
Regularreadsandwritesareblockedandonlyunderfillreadswillbeprocessed.
ISOCHbxxxx1xxxIsochMajorModeWegroupthesetwomodestogethersothatwecanusefourcounterstotrackeachofthemajormodesatonetime.
ThesemajormodesareusedwheneverthereisanISOCHtxninthememorycontroller.
Inthesemode,onlyISOCHtransactionsareprocessed.
ReferenceNumber:329468-00287UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringPOWER_CHANNEL_PPDTitle:ChannelPPDCyclesCategory:POWEREventsEventCode:0x85Max.
Inc/Cyc:.
4,RegisterRestrictions:0-3Definition:NumberofcycleswhenalltheranksinthechannelareinPPDmode.
IfIBT=offisenabled,thenthiscanbeusedtocountthosecycles.
Ifitisnotenabled,thenthiscancountthenumberofcycleswhenthatcouldhavebeentakenadvantageof.
NOTE:IBT=InputBufferTermination=OnPOWER_CKE_CYCLESTitle:CKE_ON_CYCLESbyRankCategory:POWEREventsEventCode:0x83Max.
Inc/Cyc:.
16,RegisterRestrictions:0-3Definition:NumberofcyclesspentinCKEONmode.
Thefilterallowsyoutoselectaranktomonitor.
IfmultipleranksareinCKEONmodeatonetime,thecounterwillONLYincrementbyoneratherthandoingaccumulation.
Multiplecounterswillneedtobeusedtotrackmultiplerankssimultaneously.
ThereisnodistinctionbetweenthedifferentCKEmodes(APD,PPDS,PPDF).
Thiscanbedeterminedbasedonthesystemprogramming.
TheseeventsshouldcommonlybeusedwithInverttogetthenumberofcyclesinpowersavingmode.
EdgeDetectisalsousefulhere.
MakesurethatyoudoNOTuseInvertwithEdgeDetect(thisjustconfusesthesystemandisnotnecessary).
POWER_CRITICAL_THROTTLE_CYCLESTitle:CriticalThrottleCyclesCategory:POWEREventsEventCode:0x86Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhentheiMCisincriticalthermalthrottling.
Whenthishappens,alltrafficisblocked.
Thisshouldberareunlesssomethingbadisgoingonintheplat-form.
Thereisnofilteringbyrankforthisevent.
POWER_PCU_THROTTLINGTitle:Category:POWEREventsEventCode:0x42Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Table2-82.
UnitMasksforPOWER_CKE_CYCLESExtensionumask[15:8]DescriptionRANK0b00000001DIMMIDRANK1b00000010DIMMIDRANK2b00000100DIMMIDRANK3b00001000DIMMIDRANK4b00010000DIMMIDRANK5b00100000DIMMIDRANK6b01000000DIMMIDRANK7b10000000DIMMIDUncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring88ReferenceNumber:329468-002POWER_SELF_REFRESHTitle:Clock-EnabledSelf-RefreshCategory:POWEREventsEventCode:0x43Max.
Inc/Cyc:.
0,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhentheiMCisinself-refreshandtheiMCstillhasaclock.
ThishappensinsomepackageC-states.
Forexample,thePCUmayasktheiMCtoenterself-refresheventhoughsomeofthecoresarestillprocessing.
OneuseofthisisforMonroetechnology.
Self-refreshisrequiredduringpackageC3andC6,butthereisnoclockintheiMCatthistime,soitisnotpossibletocountthesecases.
POWER_THROTTLE_CYCLESTitle:ThrottleCyclesforRank0Category:POWEREventsEventCode:0x41Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhiletheiMCisbeingthrottledbyeitherthermalcon-straintsorbythePCUthrottling.
Itisnotpossibletodistinguishbetweenthetwo.
Thiscanbefil-teredbyrank.
Ifmultipleranksareselectedandarebeingthrottledatthesametime,thecounterwillonlyincrementby1.
PREEMPTIONTitle:ReadPreemptionCountCategory:PREEMPTIONEventsEventCode:0x08Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberoftimesareadintheiMCpreemptsanotherreadorwrite.
Gener-allyreadstoanopenpageareissuedaheadofrequeststoclosedpages.
Thisimprovesthepagehitrateofthesystem.
However,highpriorityrequestscancausepagesofactiverequeststobeclosedinordertogetthemout.
Thiswillreducethelatencyofthehigh-priorityrequestattheexpenseoflowerbandwidthandincreasedoverallaveragelatency.
Table2-83.
UnitMasksforPOWER_THROTTLE_CYCLESExtensionumask[15:8]DescriptionRANK0bxxxxxxx1DIMMIDThermalthrottlingisperformedperDIMM.
Wesupport3DIMMsperchannel.
ThisIDallowsustofilterbyID.
RANK1bxxxxxx1xDIMMIDRANK2bxxxxx1xxDIMMIDRANK3bxxxx1xxxDIMMIDRANK4bxxx1xxxxDIMMIDRANK5bxx1xxxxxDIMMIDRANK6bx1xxxxxxDIMMIDRANK7b1xxxxxxxDIMMIDReferenceNumber:329468-00289UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringPRE_COUNTTitle:DRAMPrechargecommands.
Category:PREEventsEventCode:0x02Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofDRAMPrechargecommandssentonthischannel.
RD_CAS_PRIOTitle:Category:CASEventsEventCode:0xa0Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Table2-84.
UnitMasksforPREEMPTIONExtensionumask[15:8]DescriptionRD_PREEMPT_RDbxxxxxxx1ReadoverReadPreemptionFilterforwhenareadpreemptsanotherread.
RD_PREEMPT_WRbxxxxxx1xReadoverWritePreemptionFilterforwhenareadpreemptsawrite.
Table2-85.
UnitMasksforPRE_COUNTExtensionumask[15:8]DescriptionPAGE_MISSbxxxxxxx1PrechargesduetopagemissCountsthenumberofDRAMPrechargecommandssentonthischannelasaresultofpagemisses.
ThisdoesnotincludeexplicitprechargecommandssentwithCAScommandsinAuto-Prechargemode.
ThisdoesnotincludePREcommandssentasaresultofthepageclosecounterexpiration.
PAGE_CLOSEbxxxxxx1xPrechargeduetotimerexpirationCountsthenumberofDRAMPrechargecommandssentonthischannelasaresultofthepageclosecounterexpiring.
Thisdoesnotincludeimplicitprechargecommandssentinauto-prechargemode.
RDbxxxxx1xxPrechargeduetoreadWRbxxxx1xxxPrechargeduetowriteBYPbxxx1xxxxPrechargeduetobypassTable2-86.
UnitMasksforRD_CAS_PRIOExtensionumask[15:8]DescriptionLOWbxxxxxxx1ReadCASissuedwithLOWpriorityMEDbxxxxxx1xReadCASissuedwithMEDIUMpriorityHIGHbxxxxx1xxReadCASissuedwithHIGHpriorityPANICbxxxx1xxxReadCASissuedwithPANICNONISOCHpriority(starved)UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring90ReferenceNumber:329468-002RD_CAS_RANK0Title:RD_CASAccesstoRank0Category:CASEventsEventCode:0xb0Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:RD_CAS_RANK1Title:RD_CASAccesstoRank1Category:CASEventsEventCode:0xb1Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:RD_CAS_RANK2Title:RD_CASAccesstoRank2Category:CASEventsEventCode:0xb2Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Table2-87.
UnitMasksforRD_CAS_RANK0Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-88.
UnitMasksforRD_CAS_RANK1Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7ReferenceNumber:329468-00291UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringRD_CAS_RANK3Title:RD_CASAccesstoRank3Category:CASEventsEventCode:0xb3Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:RD_CAS_RANK4Title:RD_CASAccesstoRank4Category:CASEventsEventCode:0xb4Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Table2-89.
UnitMasksforRD_CAS_RANK2Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-90.
UnitMasksforRD_CAS_RANK3Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-91.
UnitMasksforRD_CAS_RANK4Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring92ReferenceNumber:329468-002RD_CAS_RANK5Title:RD_CASAccesstoRank5Category:CASEventsEventCode:0xb5Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:RD_CAS_RANK6Title:RD_CASAccesstoRank6Category:CASEventsEventCode:0xb6Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-92.
UnitMasksforRD_CAS_RANK5Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-93.
UnitMasksforRD_CAS_RANK6Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-91.
UnitMasksforRD_CAS_RANK4Extensionumask[15:8]DescriptionReferenceNumber:329468-00293UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringRD_CAS_RANK7Title:RD_CASAccesstoRank7Category:CASEventsEventCode:0xb7Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:RPQ_CYCLES_NETitle:ReadPendingQueueNotEmptyCategory:RPQEventsEventCode:0x11Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheReadPendingQueueisnotempty.
Thiscanthenbeusedtocalculatetheaverageoccupancy(inconjunctionwiththeReadPendingQueueOccu-pancycount).
TheRPQisusedtoschedulereadsouttothememorycontrollerandtotracktherequests.
RequestsallocateintotheRPQsoonaftertheyenterthememorycontroller,andneedcreditsforanentryinthisbufferbeforebeingsentfromtheHAtotheiMC.
TheydeallocateaftertheCAScommandhasbeenissuedtomemory.
Thisfilteristobeusedinconjunctionwiththeoccupancyfiltersothatonecancorrectlytracktheaverageoccupanciesforschedulableentriesandscheduledrequests.
RPQ_INSERTSTitle:ReadPendingQueueAllocationsCategory:RPQEventsEventCode:0x10Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofallocationsintotheReadPendingQueue.
Thisqueueisusedtoschedulereadsouttothememorycontrollerandtotracktherequests.
RequestsallocateintotheRPQsoonaftertheyenterthememorycontroller,andneedcreditsforanentryinthisbufferbeforebeingsentfromtheHAtotheiMC.
TheydeallocateaftertheCAScommandhasbeenissuedtomemory.
ThisincludesbothISOCHandnon-ISOCHrequests.
VMSE_MXB_WR_OCCUPANCYTitle:VMSEMXBwritebufferoccupancyCategory:VMSEEventsEventCode:0x91Max.
Inc/Cyc:.
32,RegisterRestrictions:0-3Definition:Table2-94.
UnitMasksforRD_CAS_RANK7Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring94ReferenceNumber:329468-002VMSE_WR_PUSHTitle:VMSEWRPUSHissuedCategory:VMSEEventsEventCode:0x90Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:WMM_TO_RMMTitle:TransitionfromWMMtoRMMbecauseoflowthresholdCategory:MAJOR_MODESEventsEventCode:0xc0Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:WPQ_CYCLES_FULLTitle:WritePendingQueueFullCyclesCategory:WPQEventsEventCode:0x22Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhentheWritePendingQueueisfull.
WhentheWPQisfull,theHAwillnotbeabletoissueanyadditionalreadrequestsintotheiMC.
ThiscountshouldbesimilarcountintheHAwhichtracksthenumberofcyclesthattheHAhasnoWPQcredits,justsomewhatsmallertoaccountforthecreditreturnoverhead.
WPQ_CYCLES_NETitle:WritePendingQueueNotEmptyCategory:WPQEventsEventCode:0x21Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheWritePendingQueueisnotempty.
Thiscanthenbeusedtocalculatetheaveragequeueoccupancy(inconjunctionwiththeWPQOccupancyAccu-mulationcount).
TheWPQisusedtoschedulewriteouttothememorycontrollerandtotrackthewrites.
RequestsallocateintotheWPQsoonaftertheyenterthememorycontroller,andneedcred-itsforanentryinthisbufferbeforebeingsentfromtheHAtotheiMC.
TheydeallocateafterbeingissuedtoDRAM.
Writerequeststhemselvesareabletocomplete(fromtheperspectiveoftherestofthesystem)assoontheyhave"posted"totheiMC.
Thisisnottobeconfusedwithactuallyper-formingthewritetoDRAM.
Therefore,theaveragelatencyforthisqueueisactuallynotusefulfordeconstructionintermediatewritelatencies.
Table2-95.
UnitMasksforVMSE_WR_PUSHExtensionumask[15:8]DescriptionWMMbxxxxxxx1VMSEwritePUSHissuedinWMMRMMbxxxxxx1xVMSEwritePUSHissuedinRMMTable2-96.
UnitMasksforWMM_TO_RMMExtensionumask[15:8]DescriptionLOW_THRESHbxxxxxxx1TransitionfromWMMtoRMMbecauseofstarvecounterSTARVEbxxxxxx1xVMSE_RETRYbxxxxx1xxReferenceNumber:329468-00295UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringWPQ_INSERTSTitle:WritePendingQueueAllocationsCategory:WPQEventsEventCode:0x20Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofallocationsintotheWritePendingQueue.
Thiscanthenbeusedtocalculatetheaveragequeuinglatency(inconjunctionwiththeWPQoccupancycount).
TheWPQisusedtoschedulewriteouttothememorycontrollerandtotrackthewrites.
RequestsallocateintotheWPQsoonaftertheyenterthememorycontroller,andneedcreditsforanentryinthisbufferbeforebeingsentfromtheHAtotheiMC.
TheydeallocateafterbeingissuedtoDRAM.
Writerequeststhemselvesareabletocomplete(fromtheperspectiveoftherestofthesystem)assoontheyhave"posted"totheiMC.
WPQ_READ_HITTitle:WritePendingQueueCAMMatchCategory:WPQEventsEventCode:0x23Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberoftimesarequesthitsintheWPQ(write-pendingqueue).
TheiMCallowswritesandreadstopassupotherwritestodifferentaddresses.
Beforeareadorawriteisissued,itwillfirstCAMtheWPQtoseeifthereisawritependingtothataddress.
Whenreadshit,theyareabletodirectlypulltheirdatafromtheWPQinsteadofgoingtomemory.
Writesthathitwilloverwritetheexistingdata.
Partialwritesthathitwillnotneedtodounderfillreadsandwillsimplyupdatetheirrelevantsections.
WPQ_WRITE_HITTitle:WritePendingQueueCAMMatchCategory:WPQEventsEventCode:0x24Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberoftimesarequesthitsintheWPQ(write-pendingqueue).
TheiMCallowswritesandreadstopassupotherwritestodifferentaddresses.
Beforeareadorawriteisissued,itwillfirstCAMtheWPQtoseeifthereisawritependingtothataddress.
Whenreadshit,theyareabletodirectlypulltheirdatafromtheWPQinsteadofgoingtomemory.
Writesthathitwilloverwritetheexistingdata.
Partialwritesthathitwillnotneedtodounderfillreadsandwillsimplyupdatetheirrelevantsections.
WRONG_MMTitle:NotgettingtherequestedMajorModeCategory:MAJOR_MODESEventsEventCode:0xc1Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:WR_CAS_RANK0Title:WR_CASAccesstoRank0Category:CASEventsEventCode:0xb8Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring96ReferenceNumber:329468-002WR_CAS_RANK1Title:WR_CASAccesstoRank1Category:CASEventsEventCode:0xb9Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:WR_CAS_RANK2Title:WR_CASAccesstoRank2Category:CASEventsEventCode:0xbaMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Table2-97.
UnitMasksforWR_CAS_RANK0Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-98.
UnitMasksforWR_CAS_RANK1Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-99.
UnitMasksforWR_CAS_RANK2Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3ReferenceNumber:329468-00297UncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoringWR_CAS_RANK3Title:WR_CASAccesstoRank3Category:CASEventsEventCode:0xbbMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:WR_CAS_RANK4Title:WR_CASAccesstoRank4Category:CASEventsEventCode:0xbcMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-100.
UnitMasksforWR_CAS_RANK3Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-101.
UnitMasksforWR_CAS_RANK4Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-99.
UnitMasksforWR_CAS_RANK2Extensionumask[15:8]DescriptionUncorePerformanceMonitoringMemoryController(iMC)PerformanceMonitoring98ReferenceNumber:329468-002WR_CAS_RANK5Title:WR_CASAccesstoRank5Category:CASEventsEventCode:0xbdMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:WR_CAS_RANK6Title:WR_CASAccesstoRank6Category:CASEventsEventCode:0xbeMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:WR_CAS_RANK7Title:WR_CASAccesstoRank7Category:CASEventsEventCode:0xbfMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Table2-102.
UnitMasksforWR_CAS_RANK5Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7Table2-103.
UnitMasksforWR_CAS_RANK6Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7ReferenceNumber:329468-00299UncorePerformanceMonitoringIRPPerformanceMonitoring2.
6IRPPERFORMANCEMONITORING2.
6.
1OverviewoftheR2PCIeBoxIRPisresponsibleformaintainingcoherencyforIIOtrafficthatneedstobecoherent(e.
g.
cross-socketP2P).
2.
6.
2IRPPerformanceMonitoringOverviewTheIRPBoxsupportseventmonitoringthroughtwosetsoftwo48bwidecounters(IRP{0,1}_PCI_PMON_CTR/CTL{1:0}).
EachofthesefourcounterscanbeprogrammedtocountanyIRPevent.
TheIRPcounterscanincrementbyamaximumof8bpercycle.
Forinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerformanceMonitoringControl".
2.
6.
3IRPPerformanceMonitorsTable2-105.
IRPPerformanceMonitoringRegistersTable2-104.
UnitMasksforWR_CAS_RANK7Extensionumask[15:8]DescriptionBANK0bxxxxxxx1Bank0BANK1bxxxxxx1xBank1BANK2bxxxxx1xxBank2BANK3bxxxx1xxxBank3BANK4bxxx1xxxxBank4BANK5bxx1xxxxxBank5BANK6bx1xxxxxxBank6BANK7b1xxxxxxxBank7RegisterNamePCICFGAddressSize(bits)DescriptionPCICFGBaseAddressDev:FuncIRPPMONRegistersD5:F6Box-LevelControl/StatusIRP_PCI_PMON_BOX_STATUSF832IRPPMONBox-WideStatusIRP_PCI_PMON_BOX_CTLF432IRPPMONBox-WideControlGenericCounterControlIRP1_PCI_PMON_CTL1E432IRP1PMONControlforCounter1IRP1_PCI_PMON_CTL0E032IRP1PMONControlforCounter0IRP0_PCI_PMON_CTL1DC32IRP0PMONControlforCounter1IRP0_PCI_PMON_CTL0D832IRP0PMONControlforCounter0UncorePerformanceMonitoringIRPPerformanceMonitoring100ReferenceNumber:329468-0022.
6.
3.
1IRPBoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsintheIRPBox.
InthecaseoftheIRP,theIRP_PCI_PMON_BOX_CTLregisterprovidestheabilitytomanuallyfreezethecountersinthebox(.
frz)andresetthegenericstate(.
rst_ctrsand.
rst_ctrl).
Table2-106.
IRP_PCI_PMON_BOX_CTLRegister–FieldDefinitionsUTable2-107.
IRP_PCI_PMON_BOX_STATUSRegister–FieldDefinitions2.
6.
3.
2IRPPMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutoftheIRPperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst).
GenericCountersIRP1_PCI_PMON_CTR1C064IRP1PMONCounter1IRP1_PCI_PMON_CTR0B864IRP1PMONCounter0IRP0_PCI_PMON_CTR1B064IRP0PMONCounter1IRP0_PCI_PMON_CTR0A064IRP0PMONCounter0FieldBitsAttrHWResetValDescriptionig31:18RV0Ignoredrsv17:16RV0Reserved;SWmustwriteto1elsebehaviorisundefined.
ig15:9RV0Ignoredfrz8WO0Freeze.
Ifsetto1thecountersinthisboxwillbefrozen.
ig7:2RV0Ignoredrst_ctrs1WO0ResetCounters.
Whensetto1,theCounterRegisterswillberesetto0.
rst_ctrl0WO0ResetControl.
Whensetto1,theCounterControlRegisterswillberesetto0.
FieldBitsAttrHWResetValDescriptionig31:4RV0Ignoredov3:0RW1C0IfanoverflowisdetectedfromthecorrespondingIRP_PCI_PMON_CTRregister,it'soverflowbitwillbeset.
NOTE:Writeof'1'willclearthebit.
RegisterNamePCICFGAddressSize(bits)DescriptionReferenceNumber:329468-002101UncorePerformanceMonitoringIRPPerformanceMonitoringTable2-108.
IRP_PCI_PMON_CTL{3-0}Register–FieldDefinitionsIfaccessible,softwarecancontinuouslyreadthedataregisterswithoutdisablingeventcollection.
Table2-109.
IRP{0,1}_PCI_PMON_CTR{1-0}Register–FieldDefinitions2.
6.
4IRPPerformanceMonitoringEvents2.
6.
4.
1AnOverviewIRPprovideseventstotrackinformationrelatedtoallthetrafficpassingthroughit'sboundaries.
WriteCacheOccupancyIngress/EgressTraffic-byRingTypeStallsawaitingCredits2.
6.
5IRPBoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasuredIRPBoxevents.
FieldBitsAttrHWResetValDescriptionthresh31:24RW-V0Thresholdusedincountercomparison.
rsv23RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
en22RW-V0LocalCounterEnable.
rsv21:20RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ig19RV0Ignorededge_det18RW-V0Whensetto1,ratherthanmeasuringtheeventineachcycleitisactive,thecorrespondingcounterwillincrementwhena0to1transition(i.
e.
risingedge)isdetected.
When0,thecounterwillincrementineachcyclethattheeventisasserted.
NOTE:.
edge_detisinseriesfollowing.
thresh.
Duetothis,the.
threshfieldmustbesettoanon-0value.
Foreventsthatincrementbynomorethan1percycle,set.
threshto0x1.
rst17WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
rsv16RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
umask15:8RW-V0Selectsubeventstobecountedwithintheselectedevent.
ev_sel7:0RW-V0Selecteventtobecounted.
FieldBitsAttrHWResetValDescriptionig63:44RV0Ignoredevent_count43:0RW-V044-bitperformanceeventcounterUncorePerformanceMonitoringIRPPerformanceMonitoring102ReferenceNumber:329468-0022.
6.
6IRPBoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsfortheIRPBox.
ADDRESS_MATCHTitle:AddressMatch(Conflict)CountCategory:ADDRESS_MATCHEventsEventCode:0x17Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Countsthenumberoftimeswhenaninboundwrite(fromadevicetomemoryoranotherdevice)hadanaddressmatchwithanotherrequestinthewritecache.
SymbolNameEventCodeCtrsMaxInc/CycDescriptionCLOCKTICKS0x000-11ClocksintheIRPRxR_BL_DRS_INSERTS0x010-11BLIngressOccupancy-DRSRxR_BL_NCB_INSERTS0x020-11BLIngressOccupancy-NCBRxR_BL_NCS_INSERTS0x030-11BLIngressOccupancy-NCSRxR_BL_DRS_CYCLES_FULL0x040-11RxR_BL_NCB_CYCLES_FULL0x050-11RxR_BL_NCS_CYCLES_FULL0x060-11RxR_BL_DRS_OCCUPANCY0x070-124RxR_BL_NCB_OCCUPANCY0x080-124RxR_BL_NCS_OCCUPANCY0x090-124RxR_AK_INSERTS0x0a0-11AKIngressOccupancyRxR_AK_CYCLES_FULL0x0b0-11RxR_AK_OCCUPANCY0x0c0-124TxR_REQUEST_OCCUPANCY0x0d0-11OutboundRequestQueueOccupancyTxR_DATA_INSERTS_NCB0x0e0-11OutboundReadRequestsTxR_DATA_INSERTS_NCS0x0f0-11OutboundReadRequestsCACHE_READ_OCCUPANCY0x100-1128OutstandingReadOccupancyCACHE_WRITE_OCCUPANCY0x110-1128OutstandingWriteOccupancyCACHE_TOTAL_OCCUPANCY0x120-1128TotalWriteCacheOccupancyCACHE_OWN_OCCUPANCY0x130-1128OutstandingWriteOwnershipOccupancyCACHE_ACK_PENDING_OCCUPANCY0x140-1128WriteAckPendingOccupancyTRANSACTIONS0x150-11InboundTransactionCountTICKLES0x160-11TickleCountADDRESS_MATCH0x170-11AddressMatch(Conflict)CountTxR_AD_STALL_CREDIT_CYCLES0x180-11NoADEgressCreditStallsTxR_BL_STALL_CREDIT_CYCLES0x190-11NoBLEgressCreditStallsWRITE_ORDERING_STALL_CYCLES0x1a0-11WriteOrderingStallsReferenceNumber:329468-002103UncorePerformanceMonitoringIRPPerformanceMonitoringCACHE_ACK_PENDING_OCCUPANCYTitle:WriteAckPendingOccupancyCategory:WRITE_CACHEEventsEventCode:0x14Max.
Inc/Cyc:.
128,RegisterRestrictions:0-1Definition:Accumulatesthenumberofwritesthathaveacquiredownershipbuthavenotyetreturnedtheirdatatotheuncore.
Thesewritesaregenerallyqueuedupintheswitchtryingtogettotheheadoftheirqueuessothattheycanposttheirdata.
ThequeueoccupancyincrementswhentheACKisreceived,anddecrementswheneitherthedataisreturnedORatickleisreceivedandownershipisreleased.
Notethatasingleticklecanresultinmultipledecrements.
CACHE_OWN_OCCUPANCYTitle:OutstandingWriteOwnershipOccupancyCategory:WRITE_CACHEEventsEventCode:0x13Max.
Inc/Cyc:.
128,RegisterRestrictions:0-1Definition:Accumulatesthenumberofwrites(andwriteprefetches)thatareoutstandingintheuncoretryingtoacquireownershipineachcycle.
Thiscanbeusedwiththewritetransactioncounttocalculatetheaveragewritelatencyintheuncore.
Theoccupancyincrementswhenawriterequestisissued,anddecrementswhenthedataisreturned.
Table2-110.
UnitMasksforADDRESS_MATCHExtensionumask[15:8]DescriptionSTALL_COUNTbxxxxxxx1ConflictStallsWhenitisnotpossibletomergetwoconflictingrequests,astalleventoccurs.
Thisisbadforperformance.
MERGE_COUNTbxxxxxx1xConflictMergesWhentworequeststothesameaddressfromthesamesourcearereceivedbacktoback,itispossibletomergethetwoofthemtogether.
Table2-111.
UnitMasksforCACHE_ACK_PENDING_OCCUPANCYExtensionumask[15:8]DescriptionANYb00000001AnySourceTracksonlythoserequeststhatcomefromtheportspecifiedintheIRP_PmonFilter.
OrderingQregister.
Thisregisterallowsonetoselectonespecificqueue.
Itisnotpossibletomonitormultiplequeuesatatime.
SOURCEb00000010SelectSourceTracksallrequestsfromanysourceport.
Table2-112.
UnitMasksforCACHE_OWN_OCCUPANCYExtensionumask[15:8]DescriptionANYb00000001AnySourceTracksallrequestsfromanysourceport.
SOURCEb00000010SelectSourceTracksonlythoserequeststhatcomefromtheportspecifiedintheIRP_PmonFilter.
OrderingQregister.
Thisregisterallowsonetoselectonespecificqueue.
Itisnotpossibletomonitormultiplequeuesatatime.
UncorePerformanceMonitoringIRPPerformanceMonitoring104ReferenceNumber:329468-002CACHE_READ_OCCUPANCYTitle:OutstandingReadOccupancyCategory:WRITE_CACHEEventsEventCode:0x10Max.
Inc/Cyc:.
128,RegisterRestrictions:0-1Definition:Accumulatesthenumberofreadsthatareoutstandingintheuncoreineachcycle.
Thiscanbeusedwiththereadtransactioncounttocalculatetheaveragereadlatencyintheuncore.
Theoccupancyincrementswhenareadrequestisissued,anddecrementswhenthedataisreturned.
CACHE_TOTAL_OCCUPANCYTitle:TotalWriteCacheOccupancyCategory:WRITE_CACHEEventsEventCode:0x12Max.
Inc/Cyc:.
128,RegisterRestrictions:0-1Definition:Accumulatesthenumberofreadsandwritesthatareoutstandingintheuncoreineachcycle.
ThisiseffectivelythesumoftheREAD_OCCUPANCYandWRITE_OCCUPANCYevents.
CACHE_WRITE_OCCUPANCYTitle:OutstandingWriteOccupancyCategory:WRITE_CACHEEventsEventCode:0x11Max.
Inc/Cyc:.
128,RegisterRestrictions:0-1Definition:Accumulatesthenumberofwrites(andwriteprefetches)thatareoutstandingintheuncoreineachcycle.
Thiscanbeusedwiththetransactioncounteventtocalculatetheaveragelatencyintheuncore.
Theoccupancyincrementswhentheownershipfetch/prefetchisissued,anddecrementsthedataisreturnedtotheuncore.
Table2-113.
UnitMasksforCACHE_READ_OCCUPANCYExtensionumask[15:8]DescriptionANYb00000001AnySourceTracksallrequestsfromanysourceport.
SOURCEb00000010SelectSourceTracksonlythoserequeststhatcomefromtheportspecifiedintheIRP_PmonFilter.
OrderingQregister.
Thisregisterallowsonetoselectonespecificqueue.
Itisnotpossibletomonitormultiplequeuesatatime.
Table2-114.
UnitMasksforCACHE_TOTAL_OCCUPANCYExtensionumask[15:8]DescriptionANYb00000001AnySourceTracksallrequestsfromanysourceport.
SOURCEb00000010SelectSourceTracksonlythoserequeststhatcomefromtheportspecifiedintheIRP_PmonFilter.
OrderingQregister.
Thisregisterallowsonetoselectonespecificqueue.
Itisnotpossibletomonitormultiplequeuesatatime.
ReferenceNumber:329468-002105UncorePerformanceMonitoringIRPPerformanceMonitoringCLOCKTICKSTitle:ClocksintheIRPCategory:IO_CLKSEventsEventCode:0x00Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberofclocksintheIRP.
RxR_AK_CYCLES_FULLTitle:Category:AK_INGRESSEventsEventCode:0x0bMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofcycleswhentheAKIngressisfull.
ThisqueueiswheretheIRPreceivesresponsesfromR2PCIe(thering).
RxR_AK_INSERTSTitle:AKIngressOccupancyCategory:AK_INGRESSEventsEventCode:0x0aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofallocationsintotheAKIngress.
ThisqueueiswheretheIRPreceivesresponsesfromR2PCIe(thering).
RxR_AK_OCCUPANCYTitle:Category:AK_INGRESSEventsEventCode:0x0cMax.
Inc/Cyc:.
24,RegisterRestrictions:0-1Definition:AccumulatestheoccupancyoftheAKIngressineachcycles.
ThisqueueiswheretheIRPreceivesresponsesfromR2PCIe(thering).
RxR_BL_DRS_CYCLES_FULLTitle:Category:BL_INGRESS_DRSEventsEventCode:0x04Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofcycleswhentheBLIngressisfull.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
ItisusedfordatareturnsfromreadrequestsaswellasoutboundMMIOwrites.
Table2-115.
UnitMasksforCACHE_WRITE_OCCUPANCYExtensionumask[15:8]DescriptionANYb00000001AnySourceTracksallrequestsfromanysourceport.
SOURCEb00000010SelectSourceTracksonlythoserequeststhatcomefromtheportspecifiedintheIRP_PmonFilter.
OrderingQregister.
Thisregisterallowsonetoselectonespecificqueue.
Itisnotpossibletomonitormultiplequeuesatatime.
UncorePerformanceMonitoringIRPPerformanceMonitoring106ReferenceNumber:329468-002RxR_BL_DRS_INSERTSTitle:BLIngressOccupancy-DRSCategory:BL_INGRESS_DRSEventsEventCode:0x01Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofallocationsintotheBLIngress.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
Itisusedfordatareturnsfromreadrequestsaswellasout-boundMMIOwrites.
RxR_BL_DRS_OCCUPANCYTitle:Category:BL_INGRESS_DRSEventsEventCode:0x07Max.
Inc/Cyc:.
24,RegisterRestrictions:0-1Definition:AccumulatestheoccupancyoftheBLIngressineachcycles.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
ItisusedfordatareturnsfromreadrequestsaswellasoutboundMMIOwrites.
RxR_BL_NCB_CYCLES_FULLTitle:Category:BL_INGRESS_NCBEventsEventCode:0x05Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofcycleswhentheBLIngressisfull.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
Itisusedfordatareturnsfromreadrequestsaswellasout-boundMMIOwrites.
RxR_BL_NCB_INSERTSTitle:BLIngressOccupancy-NCBCategory:BL_INGRESS_NCBEventsEventCode:0x02Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofallocationsintotheBLIngress.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
Itisusedfordatareturnsfromreadrequestsaswellasout-boundMMIOwrites.
RxR_BL_NCB_OCCUPANCYTitle:Category:BL_INGRESS_NCBEventsEventCode:0x08Max.
Inc/Cyc:.
24,RegisterRestrictions:0-1Definition:AccumulatestheoccupancyoftheBLIngressineachcycles.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
ItisusedfordatareturnsfromreadrequestsaswellasoutboundMMIOwrites.
RxR_BL_NCS_CYCLES_FULLTitle:Category:BL_INGRESS_NCSEventsEventCode:0x06Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1ReferenceNumber:329468-002107UncorePerformanceMonitoringIRPPerformanceMonitoringDefinition:CountsthenumberofcycleswhentheBLIngressisfull.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
ItisusedfordatareturnsfromreadrequestsaswellasoutboundMMIOwrites.
RxR_BL_NCS_INSERTSTitle:BLIngressOccupancy-NCSCategory:BL_INGRESS_NCSEventsEventCode:0x03Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofallocationsintotheBLIngress.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
ItisusedfordatareturnsfromreadrequestsaswellasoutboundMMIOwrites.
RxR_BL_NCS_OCCUPANCYTitle:Category:BL_INGRESS_NCSEventsEventCode:0x09Max.
Inc/Cyc:.
24,RegisterRestrictions:0-1Definition:AccumulatestheoccupancyoftheBLIngressineachcycles.
ThisqueueiswheretheIRPreceivesdatafromR2PCIe(thering).
ItisusedfordatareturnsfromreadrequestsaswellasoutboundMMIOwrites.
TICKLESTitle:TickleCountCategory:TICKLESEventsEventCode:0x16Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Countsthenumberofticklesthatarereceived.
Thisisforbothexplicit(fromCbo)andimplicit(internalconflict)tickles.
TRANSACTIONSTitle:InboundTransactionCountCategory:TRANSACTIONSEventsEventCode:0x15Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Countsthenumberof"Inbound"transactionsfromtheIRPtotheUncore.
Thiscanbefilteredbasedonrequesttypeinadditiontothesourcequeue.
Notethespecialfilteringequation.
WedoOR-reductionontherequesttype.
IftheSOURCEbitisset,thenwealsodoANDqualifica-tionbasedonthesourceportID.
Table2-116.
UnitMasksforTICKLESExtensionumask[15:8]DescriptionLOST_OWNERSHIPbxxxxxxx1OwnershipLostTracksthenumberofrequeststhatlostownershipasaresultofatickle.
Whenaticklecomesin,iftherequestisnotattheheadofthequeueintheswitch,thenthatrequestaswellasanyrequestsbehinditintheswitchqueuewillloseownershipandhavetore-acquireitlaterwhentheygettotheheadofthequeue.
Thiswillthereforetrackthenumberofrequeststhatlostownershipandnotjustthenumberoftickles.
TOP_OF_QUEUEbxxxxxx1xDataReturnedTracksthenumberofcaseswhenaticklewasreceivedbuttherequestswasattheheadofthequeueintheswitch.
Inthiscase,dataisreturnedratherthanreleasingownership.
UncorePerformanceMonitoringIRPPerformanceMonitoring108ReferenceNumber:329468-002TxR_AD_STALL_CREDIT_CYCLESTitle:NoADEgressCreditStallsCategory:STALL_CYCLESEventsEventCode:0x18Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumbertimeswhenitisnotpossibletoissuearequesttotheR2PCIebecausetherearenoADEgressCreditsavailable.
TxR_BL_STALL_CREDIT_CYCLESTitle:NoBLEgressCreditStallsCategory:STALL_CYCLESEventsEventCode:0x19Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumbertimeswhenitisnotpossibletoissuedatatotheR2PCIebecausetherearenoBLEgressCreditsavailable.
TxR_DATA_INSERTS_NCBTitle:OutboundReadRequestsCategory:OUTBOUND_REQUESTSEventsEventCode:0x0eMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Countsthenumberofrequestsissuedtotheswitch(towardsthedevices).
TxR_DATA_INSERTS_NCSTitle:OutboundReadRequestsCategory:OUTBOUND_REQUESTSEventsEventCode:0x0fMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Countsthenumberofrequestsissuedtotheswitch(towardsthedevices).
Table2-117.
UnitMasksforTRANSACTIONSExtensionumask[15:8]FilterDepDescriptionREADSbxxxxxxx1ReadsTracksonlyreadrequests(notincludingreadprefetches).
WRITESbxxxxxx1xWritesTracksonlywriterequests.
Eachwriterequestshouldhaveaprefetch,sothereisnoneedtoexplicitlytracktheserequests.
Forwritesthataretickledandhavetoretry,thecounterwillbeincrementedforeachretry.
RD_PREFETCHESbxxxxx1xxReadPrefetchesTracksthenumberofreadprefetches.
ORDERINGQbxxxx1xxxIRPFilter[4:0]SelectSourceTracksonlythoserequeststhatcomefromtheportspecifiedintheIRP_PmonFilter.
OrderingQregister.
Thisregisterallowsonetoselectonespecificqueue.
Itisnotpossibletomonitormultiplequeuesatatime.
Ifthisbitisnotset,thenrequestsfromallsourceswillbecounted.
ReferenceNumber:329468-002109UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoringTxR_REQUEST_OCCUPANCYTitle:OutboundRequestQueueOccupancyCategory:OUTBOUND_REQUESTSEventsEventCode:0x0dMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:AccumulatesthenumberofoutstandingoutboundrequestsfromtheIRPtotheswitch(towardsthedevices).
Thiscanbeusedinconjunctionwiththeallocationseventinordertocalculateaveragelatencyofoutboundrequests.
WRITE_ORDERING_STALL_CYCLESTitle:WriteOrderingStallsCategory:STALL_CYCLESEventsEventCode:0x1aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofcycleswhentherearependingwriteACK'sintheswitchbuttheswitch->IRPpipelineisnotutilized.
2.
7POWERCONTROL(PCU)PERFORMANCEMONITORING2.
7.
1OverviewofthePCUThePCUistheprimaryPowerControllerforthephysicalprocessorpackage.
Theuncoreimplementsapowercontrolunitactingasacore/uncorepowerandthermalmanager.
Itrunsitsfirmwareonaninternalmicro-controllerandcoordinatesthesocket'spowerstates.
ThePCUalgorithmicallygovernstheP-stateoftheprocessor,C-stateofthecoreandthepackageC-stateofthesocket.
Italsoenablesthecoretogotoahigherperformancestate("turbomode")whenthepropersetofconditionsaremet.
Conversely,thePCUwillthrottletheprocessortoalowerperfor-mancestatewhenathermalviolationoccurs.
Throughspecificevents,theOSandthePCUwilleitherpromoteordemotetheC-Stateofeachcorebyalteringthevoltageandfrequency.
Thesystempowerstate(S-state)ofallthesocketsinthesystemismanagedbytheserverlegacybridgeincoordinationwithallsocketPCUs.
ThePCUcommunicatestoalltheotherunitsthroughmultiplePMLinkinterfaceson-dieandMessageChanneltoaccesstheirregisters.
TheOSandBIOScommunicatestothePCUthrustandardizedMSRregistersandACPI.
ThePCUalsoactsastheinterfacetoexternalmanagementcontrollersviaPECIandvoltageregula-tors(NPTM).
TheDMIinterfaceisthecommunicationpathfromthesouthbridgeforsystempowermanagement.
NOTEManypowersavingfeaturesaretrackedaseventsintheirrespectiveunits.
Forexample,IntelQPILinkPowersavingstatesandMemoryCKEstatisticsarecapturedintheIntelQPIPerfmonandiMCPerfmonrespectively.
2.
7.
2PCUPerformanceMonitoringOverviewTheuncorePCUsupportseventmonitoringthroughfour48-bitwidecounters(PCU_MSR_PMON_CTR{3:0}).
EachofthesecounterscanbeprogrammedUncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring110ReferenceNumber:329468-002(PCU_MSR_PMON_CTL{3:0})tomonitoranyPCUevent.
ThePCUcounterscanincrementbyamaximumof4bpercycle.
Twoextra64-bitcountersarealsoprovidedbythePCUtotrackC-StateResidence.
Althoughdocu-mentedinthismanualforreference,thesecountersexistoutsideofthePMONinfrastructure.
Forinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerfor-manceMonitoringControl".
2.
7.
2.
1PCUPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)IfanoverflowisdetectedfromaPCUperformancecounterenabledtocommunicateitsoverflow(PCU_MSR_PMON_CTL.
ov_enissetto1),theoverflowbitissetattheboxlevel(PCU_MSR_PMON_BOX_STATUS.
ov)andanoverflowmessageissenttotheUBox.
WhentheUBoxreceivestheoverflowsignal,theU_MSR_PMON_GLOBAL_STATUS.
ov_pbitisset(seeTable2-3,"U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitions")andaPMIcanbegenerated.
Onceafreezehasoccurred,inordertoseeanewfreeze,theoverflowfieldresponsibleforthefreeze,mustbeclearedbysettingthecorrespondingbitinPCU_MSR_PMON_BOX_STATUS.
ovandU_MSR_PMON_GLOBAL_STATUs.
ov_pto0.
Assumingallthecountershavebeenlocallyenabled(.
enbitincontrolregistersmeanttomonitorevents)andtheoverflowbit(s)hasbeencleared,thePCUispreparedforanewsampleinterval.
Oncetheglobalcontrolshavebeenre-enabled(Section2.
1.
4,"EnablingaNewSampleIntervalfromFrozenCounters"),countingwillresume.
2.
7.
3PCUPerformanceMonitorsTable2-118.
PCUPerformanceMonitoringMSRsMSRNameMSRAddressSize(bits)DescriptionGenericCountersPCU_MSR_PMON_CTR30x0C3964PCUPMONCounter3PCU_MSR_PMON_CTR20x0C3864PCUPMONCounter2PCU_MSR_PMON_CTR10x0C3764PCUPMONCounter1PCU_MSR_PMON_CTR00x0C3664PCUPMONCounter0Box-LevelFilterPCU_MSR_PMON_BOX_FILTER0x0C3432PCUPMONFilterGenericCounterControlPCU_MSR_PMON_CTL30x0C3332PCUPMONControlforCounter3PCU_MSR_PMON_CTL20x0C3232PCUPMONControlforCounter2PCU_MSR_PMON_CTL10x0C3132PCUPMONControlforCounter1PCU_MSR_PMON_CTL00x0C3032PCUPMONControlforCounter0Box-LevelControl/StatusPCU_MSR_PMON_BOX_STATUS0x0C3532PCUPMONBox-WideStatusPCU_MSR_PMON_BOX_CTL0x0C2432PCUPMONBox-WideControlFixed(Non-PMON)CountersPCU_MSR_CORE_C6_CTR0x03FD64FixedC-StateResidencyCounterPCU_MSR_CORE_C3_CTR0x03FC64FixedC-StateResidencyCounterReferenceNumber:329468-002111UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring2.
7.
3.
1PCUBoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsinthePCU.
InthecaseofthePCU,thePCU_MSR_PMON_BOX_CTLregisterprovidestheabilitytomanuallyfreezethecountersinthebox(.
frz)andresetthegenericstate(.
rst_ctrsand.
rst_ctrl).
ThePCUprovidestwoextraMSRsthatprovideadditionalstaticperformanceinformationtosoftwarebutexistoutsideofthePMONinfrastructure(e.
g.
theycan'tbefrozenorreset).
Theyareincludedfortheconvenienceofsoftwaredevelopersneedtoefficientlyaccessthisdata.
IfanoverflowisdetectedfromoneofthePCUPMONregisters,thecorrespondingbitinthePCU_MSR_PMON_BOX_STATUS.
ovfieldwillbeset.
Toresettheseoverflowbits,ausermustwriteavalueof'1'tothem(whichwillclearthebits).
Table2-119.
PCU_MSR_PMON_BOX_CTLRegister–FieldDefinitionsUTable2-120.
PCU_MSR_PMON_BOX_STATUSRegister–FieldDefinitions2.
7.
3.
2PCUPMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutofthePCUperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst,.
ov_en).
DuetothefactthatmuchofthePCU'sfunctionalityisprovidedbyanembeddedmicrocontroller,manyoftheavailableeventsaregeneratedbythemicrocontrollerandhandedofftothehardwareforcapturebythePMONregisters.
AmongtheeventsgeneratedbythemicrocontrollerareoccupancyeventsallowingausertomeasurethenumberofcoresinagivenC-stateper-cycle.
Giventhisuniquesituation,extracontrolbitsareprovidedtofiltertheoutputofthethesespecialoccupancyevents.
FieldBitsAttrHWResetValDescriptionrsv31:18RV0Reservedrsv17:16RV0Reserved;SWmustwriteto1elsebehaviorisundefined.
rsv15:9RV0Reservedfrz8WO0Freeze.
Ifsetto1thecountersinthisboxwillbefrozen.
rsv7:2RV0Reservedrst_ctrs1WO0ResetCounters.
Whensetto1,theCounterRegisterswillberesetto0.
rst_ctrl0WO0ResetControl.
Whensetto1,theCounterControlRegisterswillberesetto0.
FieldBitsAttrHWResetValDescriptionrsv31:4RV0Reservedov3:0RW1C0IfanoverflowisdetectedfromthecorrespondingPCU_MSR_PMON_CTRregister,it'soverflowbitwillbeset.
NOTE:Writeof'1'willclearthebit.
UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring112ReferenceNumber:329468-002-.
occ_invert-Changesthe.
threshtestconditionto'=threshold'.
1-comparisonisinverted-'iseventincrement4CoresinC0andb)therewasaVoltageTransitionTable2-126.
PCUConfigurationExamples2.
7.
5PCUBoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasuredPCUBoxevents.
CaseConfig123456CounterControl0.
ev_sel0x800x800x800x800x80.
occ_sel0x10x10x10x10x1.
thresh0x00x50x50x50x4.
occ_edge_det00100CounterControl1.
ev_sel0x030x030x0BFilter0x000x000x000x000x000x14SymbolNameEventCodeCtrsExtraSelectBitMaxInc/CycDescriptionCLOCKTICKS0x000-301pclkCyclesUncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring116ReferenceNumber:329468-002VOLT_TRANS_CYCLES_INCREASE0x010-301CyclesIncreasingVoltageVOLT_TRANS_CYCLES_DECREASE0x020-301CyclesDecreasingVoltageVOLT_TRANS_CYCLES_CHANGE0x030-301CyclesChangingVoltageFREQ_MAX_LIMIT_THERMAL_CYCLES0x040-301ThermalStrongestUpperLimitCyclesFREQ_MAX_POWER_CYCLES0x050-301PowerStrongestUpperLimitCyclesFREQ_MAX_OS_CYCLES0x060-301OSStrongestUpperLimitCyclesFREQ_MAX_CURRENT_CYCLES0x070-301CurrentStrongestUpperLimitCyclesPROCHOT_INTERNAL_CYCLES0x090-301InternalProchotPROCHOT_EXTERNAL_CYCLES0x0a0-301ExternalProchotFREQ_BAND0_CYCLES0x0b0-301FrequencyResidencyFREQ_BAND1_CYCLES0x0c0-301FrequencyResidencyFREQ_BAND2_CYCLES0x0d0-301FrequencyResidencyFREQ_BAND3_CYCLES0x0e0-301FrequencyResidencyDEMOTIONS_CORE00x1e0-301Core0CStateDemotionsDEMOTIONS_CORE10x1f0-301Core1CStateDemotionsDEMOTIONS_CORE20x200-301Core2CStateDemotionsDEMOTIONS_CORE30x210-301Core3CStateDemotionsDEMOTIONS_CORE40x220-301Core4CStateDemotionsDEMOTIONS_CORE50x230-301Core5CStateDemotionsDEMOTIONS_CORE60x240-301Core6CStateDemotionsDEMOTIONS_CORE70x250-301Core7CStateDemotionsMEMORY_PHASE_SHEDDING_CYCLES0x2f0-301MemoryPhaseSheddingCyclesVR_HOT_CYCLES0x320-301VRHotDEMOTIONS_CORE80x400-301Core8CStateDemotionsDEMOTIONS_CORE90x410-301Core9CStateDemotionsDEMOTIONS_CORE100x420-301Core10CStateDemotionsDEMOTIONS_CORE110x430-301Core11CStateDemotionsDEMOTIONS_CORE120x440-301Core12CStateDemotionsDEMOTIONS_CORE130x450-301Core13CStateDemotionsDEMOTIONS_CORE140x460-301Core14CStateDemotionsFREQ_TRANS_CYCLES0x600-301CyclesspentchangingFrequencyFREQ_MIN_IO_P_CYCLES0x610-301IOPLimitStrongestLowerLimitCyclesTOTAL_TRANSITION_CYCLES0x630-301TotalCoreCStateTransitionCyclesCORE0_TRANSITION_CYCLES0x700-301Core0CStateTransitionCyclesCORE1_TRANSITION_CYCLES0x710-301Core1CStateTransitionCyclesCORE2_TRANSITION_CYCLES0x720-301Core2CStateTransitionCyclesCORE3_TRANSITION_CYCLES0x730-301Core3CStateTransitionCyclesSymbolNameEventCodeCtrsExtraSelectBitMaxInc/CycDescriptionReferenceNumber:329468-002117UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring2.
7.
6PCUBoxCommonMetrics(DerivedEvents)ThefollowingtablesummarizesmetricscommonlycalculatedfromPCUBoxevents.
CORE4_TRANSITION_CYCLES0x740-301Core4CStateTransitionCyclesCORE5_TRANSITION_CYCLES0x750-301Core5CStateTransitionCyclesCORE6_TRANSITION_CYCLES0x760-301Core6CStateTransitionCyclesCORE7_TRANSITION_CYCLES0x770-301Core7CStateTransitionCyclesCORE8_TRANSITION_CYCLES0x780-301Core8CStateTransitionCyclesCORE9_TRANSITION_CYCLES0x790-301Core9CStateTransitionCyclesCORE10_TRANSITION_CYCLES0x7a0-301Core10CStateTransitionCyclesCORE11_TRANSITION_CYCLES0x7b0-301Core11CStateTransitionCyclesCORE12_TRANSITION_CYCLES0x7c0-301Core12CStateTransitionCyclesCORE13_TRANSITION_CYCLES0x7d0-301Core13CStateTransitionCyclesCORE14_TRANSITION_CYCLES0x7e0-301Core14CStateTransitionCyclesPOWER_STATE_OCCUPANCY0x800-308NumberofcoresinC-StateFREQ_MIN_PERF_P_CYCLES0x020-311PerfPLimitStrongestLowerLimitCyclesDELAYED_C_STATE_ABORT_CORE00x170-311DeepCStateRejection-Core0DELAYED_C_STATE_ABORT_CORE10x180-311DeepCStateRejection-Core1DELAYED_C_STATE_ABORT_CORE20x190-311DeepCStateRejection-Core2DELAYED_C_STATE_ABORT_CORE30x1a0-311DeepCStateRejection-Core3DELAYED_C_STATE_ABORT_CORE40x1b0-311DeepCStateRejection-Core4DELAYED_C_STATE_ABORT_CORE50x1c0-311DeepCStateRejection-Core5DELAYED_C_STATE_ABORT_CORE60x1d0-311DeepCStateRejection-Core6DELAYED_C_STATE_ABORT_CORE70x1e0-311DeepCStateRejection-Core7DELAYED_C_STATE_ABORT_CORE80x1f0-311DeepCStateRejection-Core8DELAYED_C_STATE_ABORT_CORE90x200-311DeepCStateRejection-Core9DELAYED_C_STATE_ABORT_CORE100x210-311DeepCStateRejection-Core10DELAYED_C_STATE_ABORT_CORE110x220-311DeepCStateRejection-Core11DELAYED_C_STATE_ABORT_CORE120x230-311DeepCStateRejection-Core12DELAYED_C_STATE_ABORT_CORE130x240-311DeepCStateRejection-Core13DELAYED_C_STATE_ABORT_CORE140x250-311DeepCStateRejection-Core14PKG_C_EXIT_LATENCY0x260-311PackageCStateExitLatencySymbolNameEventCodeCtrsExtraSelectBitMaxInc/CycDescriptionUncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring118ReferenceNumber:329468-0022.
7.
7PCUBoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsforthePCUBox.
CLOCKTICKSTitle:pclkCyclesCategory:PCLKEventsEventCode:0x00Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:ThePCUrunsoffafixed800MHzclock.
Thiseventcountsthenumberofpclkcyclesmeasuredwhilethecounterwasenabled.
Thepclk,liketheMemoryController'sdclk,countsataconstantratemakingitagoodmeasureofactualwalltime.
CORE0_TRANSITION_CYCLESTitle:Core0CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x70Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
NOTE:ThisonlytracksthehardwareportionintheRCFSM(CFCFSM).
ThisportionisjustdoingthecoreCstatetransition.
Itdoesnotincludeanynecessaryfrequency/voltagetransitions.
CORE10_TRANSITION_CYCLESTitle:Core10CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x7aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE11_TRANSITION_CYCLESTitle:Core11CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x7bMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3SymbolName:DefinitionEquationPCT_CYC_FREQ_CURRENT_LTD:PercentageofCyclestheMaxFrequencyislimitedbycurrentFREQ_MAX_CURRENT_CYCLES/CLOCKTICKSPCT_CYC_FREQ_OS_LTD:PercentageofCyclestheMaxFrequencyislimitedbytheOSFREQ_MAX_OS_CYCLES/CLOCKTICKSPCT_CYC_FREQ_POWER_LTD:PercentageofCyclestheMaxFrequencyislimitedbypowerFREQ_MAX_POWER_CYCLES/CLOCKTICKSPCT_CYC_FREQ_THERMAL_LTD:PercentageofCyclestheMaxFrequencyislimitedbythermalissuesFREQ_MAX_CURRENT_CYCLES/CLOCKTICKSReferenceNumber:329468-002119UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoringDefinition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE12_TRANSITION_CYCLESTitle:Core12CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x7cMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE13_TRANSITION_CYCLESTitle:Core13CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x7dMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE14_TRANSITION_CYCLESTitle:Core14CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x7eMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE1_TRANSITION_CYCLESTitle:Core1CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x71Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE2_TRANSITION_CYCLESTitle:Core2CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x72Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE3_TRANSITION_CYCLESTitle:Core3CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x73Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring120ReferenceNumber:329468-002CORE4_TRANSITION_CYCLESTitle:Core4CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x74Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE5_TRANSITION_CYCLESTitle:Core5CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x75Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE6_TRANSITION_CYCLESTitle:Core6CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x76Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE7_TRANSITION_CYCLESTitle:Core7CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x77Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
CORE8_TRANSITION_CYCLESTitle:Core8CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x78Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
NOTE:ThisonlytracksthehardwareportionintheRCFSM(CFCFSM).
ThisportionisjustdoingthecoreCstatetransition.
Itdoesnotincludeanynecessaryfrequency/voltagetransitions.
CORE9_TRANSITION_CYCLESTitle:Core9CStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x79Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitions.
Thereisoneeventpercore.
ReferenceNumber:329468-002121UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoringDELAYED_C_STATE_ABORT_CORE0Title:DeepCStateRejection-Core0Category:DelayedC-StateEventsEventCode:0x17ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE1Title:DeepCStateRejection-Core1Category:DelayedC-StateEventsEventCode:0x18ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE10Title:DeepCStateRejection-Core10Category:DelayedC-StateEventsEventCode:0x21ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE11Title:DeepCStateRejection-Core11Category:DelayedC-StateEventsEventCode:0x22ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE12Title:DeepCStateRejection-Core12Category:DelayedC-StateEventsEventCode:0x23ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring122ReferenceNumber:329468-002DELAYED_C_STATE_ABORT_CORE13Title:DeepCStateRejection-Core13Category:DelayedC-StateEventsEventCode:0x24ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgorithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE14Title:DeepCStateRejection-Core14Category:DelayedC-StateEventsEventCode:0x25ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgorithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE2Title:DeepCStateRejection-Core2Category:DelayedC-StateEventsEventCode:0x19ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgorithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE3Title:DeepCStateRejection-Core3Category:DelayedC-StateEventsEventCode:0x1aExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgorithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE4Title:DeepCStateRejection-Core4Category:DelayedC-StateEventsEventCode:0x1bExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgorithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
ReferenceNumber:329468-002123UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoringDELAYED_C_STATE_ABORT_CORE5Title:DeepCStateRejection-Core5Category:DelayedC-StateEventsEventCode:0x1cExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE6Title:DeepCStateRejection-Core6Category:DelayedC-StateEventsEventCode:0x1dExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE7Title:DeepCStateRejection-Core7Category:DelayedC-StateEventsEventCode:0x1eExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE8Title:DeepCStateRejection-Core8Category:DelayedC-StateEventsEventCode:0x1fExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
DELAYED_C_STATE_ABORT_CORE9Title:DeepCStateRejection-Core9Category:DelayedC-StateEventsEventCode:0x20ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoftimesthatadeepCstatewasrequested,butthedelayedCstatealgo-rithm"rejected"thedeepsleepstate.
Inotherwords,awakeeventoccurredbeforethetimerexpiredthatcausesatransitionintothedeeperCstate.
UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring124ReferenceNumber:329468-002DEMOTIONS_CORE0Title:Core0CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x1eMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE1Title:Core1CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x1fMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE10Title:Core10CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x42Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE11Title:Core11CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x43Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE12Title:Core12CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x44Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE13Title:Core13CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x45Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionReferenceNumber:329468-002125UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoringDEMOTIONS_CORE14Title:Core14CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x46Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE2Title:Core2CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x20Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE3Title:Core3CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x21Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE4Title:Core4CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x22Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE5Title:Core5CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x23Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE6Title:Core6CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x24Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionUncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring126ReferenceNumber:329468-002DEMOTIONS_CORE7Title:Core7CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x25Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE8Title:Core8CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x40Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionDEMOTIONS_CORE9Title:Core9CStateDemotionsCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x41Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:CountsthenumberoftimeswhenaconfigurablecoreshadaC-statedemotionFREQ_BAND0_CYCLESTitle:FrequencyResidencyCategory:FREQ_RESIDENCYEventsEventCode:0x0bMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[7:0]Definition:Countsthenumberofcyclesthattheuncorewasrunningatafrequencygreaterthanorequaltothefrequencythatisconfiguredinthefilter.
Onecanuseallfourcounterswiththisevent,soitispossibletotrackupto4configurablebands.
Onecanuseedgedetectinconjunctionwiththiseventtotrackthenumberoftimesthatwetransitionedintoafrequencygreaterthanorequaltotheconfigurablefrequency.
Onecanalsouseinversiontotrackcycleswhenwewerelessthantheconfiguredfrequency.
NOTE:ThePMONcontrolregistersinthePCUonlyupdateonafrequencytransition.
Changingthemeasuringthresholdduringasampleintervalmayintroduceerrorsinthecounts.
Thisisespe-ciallytruewhenrunningataconstantfrequencyforanextendedperiodoftime.
Thereisacornercasehere:wesetthiscodeontheGVtransition.
So,ifweneverGVwewillnevercallthiscode.
Thiseventdoesnotincludetransitiontimes.
Itishandledonfastpath.
FREQ_BAND1_CYCLESTitle:FrequencyResidencyCategory:FREQ_RESIDENCYEventsEventCode:0x0cMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[15:8]Definition:Countsthenumberofcyclesthattheuncorewasrunningatafrequencygreaterthanorequaltothefrequencythatisconfiguredinthefilter.
Onecanuseallfourcounterswiththisevent,soitispossibletotrackupto4configurablebands.
OnecanuseedgedetectinconjunctionReferenceNumber:329468-002127UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoringwiththiseventtotrackthenumberoftimesthatwetransitionedintoafrequencygreaterthanorequaltotheconfigurablefrequency.
Onecanalsouseinversiontotrackcycleswhenwewerelessthantheconfiguredfrequency.
NOTE:ThePMONcontrolregistersinthePCUonlyupdateonafrequencytransition.
Changingthemeasuringthresholdduringasampleintervalmayintroduceerrorsinthecounts.
Thisisespeciallytruewhenrunningataconstantfrequencyforanextendedperiodoftime.
Thereisacornercasehere:wesetthiscodeontheGVtransition.
So,ifweneverGVwewillnevercallthiscode.
Thiseventdoesnotincludetransitiontimes.
Itishandledonfastpath.
FREQ_BAND2_CYCLESTitle:FrequencyResidencyCategory:FREQ_RESIDENCYEventsEventCode:0x0dMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[23:16]Definition:Countsthenumberofcyclesthattheuncorewasrunningatafrequencygreaterthanorequaltothefrequencythatisconfiguredinthefilter.
Onecanuseallfourcounterswiththisevent,soitispossibletotrackupto4configurablebands.
Onecanuseedgedetectinconjunctionwiththiseventtotrackthenumberoftimesthatwetransitionedintoafrequencygreaterthanorequaltotheconfigurablefrequency.
Onecanalsouseinversiontotrackcycleswhenwewerelessthantheconfiguredfrequency.
NOTE:ThePMONcontrolregistersinthePCUonlyupdateonafrequencytransition.
Changingthemeasuringthresholdduringasampleintervalmayintroduceerrorsinthecounts.
Thisisespeciallytruewhenrunningataconstantfrequencyforanextendedperiodoftime.
Thereisacornercasehere:wesetthiscodeontheGVtransition.
So,ifweneverGVwewillnevercallthiscode.
Thiseventdoesnotincludetransitiontimes.
Itishandledonfastpath.
FREQ_BAND3_CYCLESTitle:FrequencyResidencyCategory:FREQ_RESIDENCYEventsEventCode:0x0eMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3FilterDependency:PCUFilter[31:24]Definition:Countsthenumberofcyclesthattheuncorewasrunningatafrequencygreaterthanorequaltothefrequencythatisconfiguredinthefilter.
Onecanuseallfourcounterswiththisevent,soitispossibletotrackupto4configurablebands.
Onecanuseedgedetectinconjunctionwiththiseventtotrackthenumberoftimesthatwetransitionedintoafrequencygreaterthanorequaltotheconfigurablefrequency.
Onecanalsouseinversiontotrackcycleswhenwewerelessthantheconfiguredfrequency.
NOTE:ThePMONcontrolregistersinthePCUonlyupdateonafrequencytransition.
Changingthemeasuringthresholdduringasampleintervalmayintroduceerrorsinthecounts.
Thisisespeciallytruewhenrunningataconstantfrequencyforanextendedperiodoftime.
Thereisacornercasehere:wesetthiscodeontheGVtransition.
So,ifweneverGVwewillnevercallthiscode.
Thiseventdoesnotincludetransitiontimes.
Itishandledonfastpath.
FREQ_MAX_CURRENT_CYCLESTitle:CurrentStrongestUpperLimitCyclesCategory:FREQ_MAX_LIMITEventsEventCode:0x07Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhencurrentistheupperlimitonfrequency.
NOTE:Thisisfastpath,willclearourotherlimitswhenithappens.
Theslowloopportion,whichcoverstheotherlimits,candoublecountEDP.
Clearingshouldfixthisupinthenextfastpathevent,butthiswillhappen.
Addupallthecyclesanditwon'tmakesense,butthegeneraldistri-butionistrue.
UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring128ReferenceNumber:329468-002FREQ_MAX_LIMIT_THERMAL_CYCLESTitle:ThermalStrongestUpperLimitCyclesCategory:FREQ_MAX_LIMITEventsEventCode:0x04Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhenthermalconditionsaretheupperlimitonfrequency.
ThisisrelatedtotheTHERMAL_THROTTLECYCLES_ABOVE_TEMPevent,whichalwayscountscycleswhenweareabovethethermaltemperature.
Thisevent(STRONGEST_UPPER_LIMIT)issampledattheoutputofthealgorithmthatdeterminestheactualfrequency,whileTHERMAL_THROTTLElooksattheinput.
FREQ_MAX_OS_CYCLESTitle:OSStrongestUpperLimitCyclesCategory:FREQ_MAX_LIMITEventsEventCode:0x06Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhentheOSistheupperlimitonfrequency.
NOTE:Essentially,thiseventsaystheOSisgettingthefrequencyitrequested.
FREQ_MAX_POWER_CYCLESTitle:PowerStrongestUpperLimitCyclesCategory:FREQ_MAX_LIMITEventsEventCode:0x05Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhenpoweristheupperlimitonfrequency.
FREQ_MIN_IO_P_CYCLESTitle:IOPLimitStrongestLowerLimitCyclesCategory:FREQ_MIN_LIMITEventsEventCode:0x61Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhenIOPLimitispreventingusfromdroppingthefre-quencylower.
ThisalgorithmmonitorstheneedstotheIOsubsystemonbothlocalandremotesocketsandwillmaintainafrequencyhighenoughtomaintaingoodIOBW.
ThisisnecessaryforwhenalltheIAcoresonasocketareidlebutauserstillwouldliketomaintainhighIOBandwidth.
FREQ_MIN_PERF_P_CYCLESTitle:PerfPLimitStrongestLowerLimitCyclesCategory:FREQ_MIN_LIMITEventsEventCode:0x02ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhenPerfPLimitispreventingusfromdroppingthefre-quencylower.
PerfPLimitisanalgorithmthattakesinputfromremotesocketswhendeterminingifasocketshoulddropit'sfrequencydown.
Thisislargelytominimizeincreasesinsnoopandremotereadlatencies.
ReferenceNumber:329468-002129UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoringFREQ_TRANS_CYCLESTitle:CyclesspentchangingFrequencyCategory:FREQ_TRANSEventsEventCode:0x60Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhenthesystemischangingfrequency.
ThiscannotbefilteredbythreadID.
OnecanalsouseitwiththeoccupancycounterthatmonitorsnumberofthreadsinC0toestimatetheperformanceimpactthatfrequencytransitionshadonthesystem.
MEMORY_PHASE_SHEDDING_CYCLESTitle:MemoryPhaseSheddingCyclesCategory:MEMORY_PHASE_SHEDDINGEventsEventCode:0x2fMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthatthePCUhastriggeredmemoryphaseshedding.
ThisisamodethatcanberunintheiMCphysicalsthatsavespowerattheexpenseofadditionallatency.
NOTE:PackageC1PKG_C_EXIT_LATENCYTitle:PackageCStateExitLatencyCategory:PKG_C_STATE_TRANSITIONEventsEventCode:0x26ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthatthepackageistransitioningfrompackageC2toC3.
NOTE:ThiscanbeusedinconjunctionwithedgedetecttocountC3entrances.
POWER_STATE_OCCUPANCYTitle:NumberofcoresinC-StateCategory:POWER_STATE_OCCEventsEventCode:0x80Max.
Inc/Cyc:.
8,RegisterRestrictions:0-3Definition:ThisisanoccupancyeventthattracksthenumberofcoresthatareinthechosenC-State.
ItcanbeusedbyitselftogettheaveragenumberofcoresinthatC-statewiththreshhold-ingtogeneratehistograms,orwithotherPCUeventsandoccupancytriggeringtocaptureotherdetails.
PROCHOT_EXTERNAL_CYCLESTitle:ExternalProchotCategory:PROCHOTEventsEventCode:0x0aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Table2-127.
UnitMasksforPOWER_STATE_OCCUPANCYExtensionumask[15:8]DescriptionCORES_C0b01000000C0andC1CORES_C3b10000000C3CORES_C6b11000000C6andC7UncorePerformanceMonitoringPowerControl(PCU)PerformanceMonitoring130ReferenceNumber:329468-002Definition:CountsthenumberofcyclesthatweareinexternalPROCHOTmode.
Thismodeistrig-geredwhenasensoroffthediedeterminesthatsomethingoff-die(likeDRAM)istoohotandmustthrottletoavoiddamagingthechip.
PROCHOT_INTERNAL_CYCLESTitle:InternalProchotCategory:PROCHOTEventsEventCode:0x09Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthatweareinInternalPROCHOTmode.
Thismodeistrig-geredwhenasensoronthediedeterminesthatwearetoohotandmustthrottletoavoiddamagingthechip.
TOTAL_TRANSITION_CYCLESTitle:TotalCoreCStateTransitionCyclesCategory:CORE_C_STATE_TRANSITIONEventsEventCode:0x63Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcyclesspentperformingcoreCstatetransitionsacrossallcores.
VOLT_TRANS_CYCLES_CHANGETitle:CyclesChangingVoltageCategory:VOLT_TRANSEventsEventCode:0x03Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhenthesystemischangingvoltage.
Thereisnofilteringsupportedwiththisevent.
Onecanuseitasasimpleevent,oruseitconjunctionwiththeoccu-pancyeventstomonitorthenumberofcoresorthreadsthatwereimpactedbythetransition.
ThiseventiscalculatedbyOR'ingtogethertheincreasinganddecreasingevents.
VOLT_TRANS_CYCLES_DECREASETitle:CyclesDecreasingVoltageCategory:VOLT_TRANSEventsEventCode:0x02Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhenthesystemisdecreasingvoltage.
Thereisnofilter-ingsupportedwiththisevent.
Onecanuseitasasimpleevent,oruseitconjunctionwiththeoccu-pancyeventstomonitorthenumberofcoresorthreadsthatwereimpactedbythetransition.
VOLT_TRANS_CYCLES_INCREASETitle:CyclesIncreasingVoltageCategory:VOLT_TRANSEventsEventCode:0x01Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:Countsthenumberofcycleswhenthesystemisincreasingvoltage.
Thereisnofilter-ingsupportedwiththisevent.
Onecanuseitasasimpleevent,oruseitconjunctionwiththeoccu-pancyeventstomonitorthenumberofcoresorthreadsthatwereimpactedbythetransition.
ReferenceNumber:329468-002131UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringVR_HOT_CYCLESTitle:VRHotCategory:VR_HOTEventsEventCode:0x32Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:2.
8INTELQPILINKLAYERPERFORMANCEMONITORING2.
8.
1OverviewoftheIntelQPIBoxTheIntelQPILinkLayerisresponsibleforpacketizingrequestsfromthecachingagentonthewayouttothesysteminterface.
Assuch,itsharesresponsibilitywiththeCBo(s)astheIntelQPIcachingagent(s).
ItisresponsibleforconvertingCBorequeststoIntelQPImessages(i.
e.
snoopgenerationanddataresponsemessagesfromthesnoopresponse)aswellasconverting/forwardingringmessagestoIntelQPIpacketsandviceversa.
OnIvyBridge,IntelQPIissplitintotwoseparatelayers.
TheIntelQPILL(linklayer)isresponsibleforgenerating,transmitting,andreceivingpacketswiththeIntelQPIlink.
R3QPI(Section2.
10,"R3QPIPerformanceMonitoring")providestheinterfacetotheRingfortheLinkLayer.
ItisalsothepointwhereVNA/VN0linkcreditsareacquired.
TherearetwoIntelQPIagentsinIvyBridgethatshareasingleringstopandathirdagentintheEXpartwithitsownringstop.
Theselinkscanbeconnectedtoasingledestination(suchasinDP),butalsocanbeconnectedtotwosepa-ratedestinations(4sRingorsDP).
Therefore,itwillbenecessarytocountIntelQPIstatisticsforeachagentseperately.
TheIntelQPILinkLayerprocessestwoflitspercycleineachdirection.
Inordertoaccommodatethis,manyoftheeventsintheLinkLayercanincrementby0,1,or2ineachcycle.
ItisnotpossibletomonitorRx(received)andTx(transmitted)flitinformationatthesametimeonthesamecounter.
2.
8.
2IntelQPIPerformanceMonitoringOverviewEachIntelQPIPortsupportseventmonitoringthroughfour48bwidecounters(Q_Py_PCI_PMON_CTR/CTL{3:0}).
EachofthesefourcounterscanbeprogrammedtocountanyIntelQPIevent.
TheIntelQPIcounterscanincrementbyamaximumof8bpercycle.
EachIntelQPIPortalsoincludesamask/matchregisterthatallowsausertomatchpackets,accordingtovariousstandardpacketfieldssuchasmessageclass,opcode,etc,astheyleavetheQPIPort.
Forinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerformanceMonitoringControl".
2.
8.
2.
1QPIPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)IfanoverflowisdetectedfromaQPIperformancecounterenabledtocommunicateitsoverflow(Q_Py_PCI_PMON_CTL.
ov_enissetto1),theoverflowbitissetattheboxlevel(Q_Py_PCI_PMON_BOX_STATUS.
ov)andanoverflowmessageissenttotheUBox.
WhentheUBoxreceivestheoverflowsignal,theU_MSR_PMON_GLOBAL_STATUS.
ov_qbitcorrespondingtotheQPIPortgeneratingtheoverflowisset(seeTable2-3,"U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitions")andaPMIcanbegenerated.
Onceafreezehasoccurred,inordertoseeanewfreeze,theoverflowfieldresponsibleforthefreeze,mustbeclearedbysettingthecorrespondingbitinQ_Py_PCI_PMON_BOX_STATUS.
ovandUncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring132ReferenceNumber:329468-002U_MSR_PMON_GLOBAL_STATU.
ov_q.
Assumingallthecountershavebeenlocallyenabled(.
enbitindataregistersmeanttomonitorevents)andtheoverflowbit(s)hasbeencleared,theQPIPortispreparedforanewsampleinterval.
Oncetheglobalcontrolshavebeenre-enabled(Section2.
1.
4,"EnablingaNewSampleIntervalfromFrozenCounters"),countingwillresume.
2.
8.
3IntelQPIPerformanceMonitorsTable2-128.
IntelQPIPerformanceMonitoringRegistersRegisterNamePCICFGAddressSize(bits)DescriptionPCICFGBaseAddressDev:FuncQPI0Port0PMONRegistersD8:F2QPI0Port1PMONRegistersD9:F2QPI1Port2PMONRegistersD24:F2Box-LevelControl/StatusQ_Py_PCI_PMON_BOX_STATUSF832QPIPortyPMONBox-WideStatusQ_Py_PCI_PMON_BOX_CTLF432QPIPortyPMONBox-WideControlGenericCounterControlQ_Py_PCI_PMON_CTL3E432QPIPortyPMONControlforCounter3Q_Py_PCI_PMON_CTL2E032QPIPortyPMONControlforCounter2Q_Py_PCI_PMON_CTL1DC32QPIPortyPMONControlforCounter1Q_Py_PCI_PMON_CTL0D832QPIPortyPMONControlforCounter0GenericCountersQ_Py_PCI_PMON_CTR3BC+B832x2QPIPortyPMONCounter3Q_Py_PCI_PMON_CTR2B4+B032x2QPIPortyPMONCounter2Q_Py_PCI_PMON_CTR1AC+A832x2QPIPortyPMONCounter1Q_Py_PCI_PMON_CTR0A4+A032x2QPIPortyPMONCounter0QPI0Mask/MatchPort0PMONRegistersD8:F6QPI0Mask/MatchPort1PMONRegistersD9:F6QPI1Mask/MatchPort2PMONRegistersD24:F6Box-LevelFiltersQ_Py_PCI_PMON_PKT_MASK123C32QPIPortyPMONPacketFilterMask1Q_Py_PCI_PMON_PKT_MASK023832QPIPortyPMONPacketFilterMask0Q_Py_PCI_PMON_PKT_MATCH122C32QPIPortyPMONPacketFilterMatch1Q_Py_PCI_PMON_PKT_MATCH022832QPIPortyPMONPacketFilterMask0QPI0MiscRegisterPort0,1D8:F0QPI1MiscRegisterPort2D24:F0Misc(Non-PMON)CountersQPI_RATE_STATUS0xD432QPIRateStatusReferenceNumber:329468-002133UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring2.
8.
3.
1IntelQPIBoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsineachPortoftheIntelQPIBox.
InthecaseoftheIntelQPIPorts,theQ_Py_PCI_PMON_BOX_CTLregisterprovidestheabilitytomanuallyfreezethecountersinthebox(.
frz)andresetthegenericstate(.
rst_ctrsand.
rst_ctrl).
IfanoverflowisdetectedfromoneoftheQPIPMONregisters,thecorrespondingbitintheQ_Py_PCI_PMON_BOX_STATUS.
ovfieldwillbeset.
Toresettheseoverflowbits,ausermustwriteavalueof'1'tothem(whichwillclearthebits).
Table2-129.
Q_Py_PCI_PMON_BOX_CTLRegister–FieldDefinitionsUTable2-130.
Q_Py_PCI_PMON_BOX_STATUSRegister–FieldDefinitions2.
8.
3.
2IntelQPIPMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutoftheIntelQPIperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask,.
ev_sel_ext).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst,.
ov_en).
FieldBitsAttrHWResetValDescriptionig31:18RV0Ignoredrsv17:16RV0Reserved;SWmustwriteto1elsebehaviorisundefined.
ig15:9RV0Ignoredfrz8WO0Freeze.
Ifsetto1thecountersinthisboxwillbefrozen.
ig7:2RV0Ignoredrst_ctrs1WO0ResetCounters.
Whensetto1,theCounterRegisterswillberesetto0.
rst_ctrl0WO0ResetControl.
Whensetto1,theCounterControlRegisterswillberesetto0.
FieldBitsAttrHWResetValDescriptionig31:5RV0Ignoredrsv4RV0Reserved;SWmustwriteto0elsebehaviorisundefined.
ov3:0RW1C0IfanoverflowisdetectedfromthecorrespondingQ_Py_PCI_PMON_CTRregister,it'soverflowbitwillbeset.
NOTE:Writeof'1'willclearthebit.
UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring134ReferenceNumber:329468-002Table2-131.
Q_Py_PCI_PMON_CTL{3-0}Register–FieldDefinitionsTheIntelQPIperformancemonitordataregistersare48bwide.
Acounteroverflowoccurswhenacarryoutfrombit47isdetected.
SoftwarecanforcealluncorecountingtofreezeafterNeventsbypreloadingamonitorwithacountvalueof248-NandsettingthecontrolregistertosendanoverflowmessagetotheUBox(Section2.
1.
1.
1,"FreezingonCounterOverflow").
Duringtheintervaloftimebetweenoverflowandglobaldisable,thecountervaluewillwrapandcontinuetocollectevents.
Ifaccessible,softwarecancontinuouslyreadthedataregisterswithoutdisablingeventcollection.
Table2-132.
Q_Py_PCI_PMON_CTR{3-0}Register–FieldDefinitions2.
8.
3.
3IntelQPIRegistersforPacketMask/MatchFacilityInadditiontogenericeventcounting,eachportoftheIntelQPILinkLayerprovidestwopairsofMATCH/MASKregistersthatallowausertofilterpackettrafficserviced(crossingfromaninputporttoanoutputport)bytheIntelQPILinkLayer.
FilteringcanbeperformedaccordingtothepacketOpcode,MessageClass,Response,HNIDandPhysicalAddress.
ProgramtheselectedQPILLcountertocaptureCTO_COUNTinordertocapturethefiltermatchasanevent.
Tousethematch/maskfacility:FieldBitsAttrHWResetValDescriptionthresh31:24RW-V0Thresholdusedincountercomparison.
rsv23RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
en22RW-V0LocalCounterEnable.
ev_sel_ext21RW-V0ExtensionbittotheEventSelectfield.
ov_en20RW-V0Whenthisbitisassertedandthecorrespondingcounteroverflows,itsoverflowbitissetinthelocalstatusregister(Q_Py_PCI_PMON_BOX_STATUS.
ov)andanoverflowissentonthemessagechanneltotheUBox.
WhentheoverflowisreceivedbytheUBox,thebitcorrespondingtothisQPIwillbesetinU_MSR_PMON_GLOBAL_STATUS.
ov_q{1,0}.
ig19RV0Ignorededge_det18RW-V0Whensetto1,ratherthanmeasuringtheeventineachcycleitisactive,thecorrespondingcounterwillincrementwhena0to1transition(i.
e.
risingedge)isdetected.
When0,thecounterwillincrementineachcyclethattheeventisasserted.
NOTE:.
edge_detisinseriesfollowing.
thresh.
Duetothis,the.
threshfieldmustbesettoanon-0value.
Foreventsthatincrementbynomorethan1percycle,set.
threshto0x1.
rst17WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
rsv16RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
umask15:8RW-V0Selectsubeventstobecountedwithintheselectedevent.
ev_sel7:0RW-V0Selecteventtobecounted.
FieldBitsAttrHWResetValDescriptionig63:48RV0Ignoredevent_count47:0RW-V048-bitperformanceeventcounterReferenceNumber:329468-002135UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringa)Programthematch/maskregs(seeTable2-133,"Q_Py_PCI_PMON_PKT_MATCH1Registers"throughTable2-136,"Q_Py_PCI_PMON_PKT_MASK0Registers").
b)Setthecounter'scontrolregistereventselectto0x38(CTO_COUNT)tocapturethemask/matchasaperformanceevent.
Thefollowingtablecontainsthepackettrafficthatcanbemonitoredifoneofthemask/matchregis-terswaschosentoselecttheevent.
Table2-133.
Q_Py_PCI_PMON_PKT_MATCH1RegistersFieldBitsHWResetValDescription---31:200x0Reserved;Mustwriteto0elsebehaviorisundefined.
RDS19:160x0ResponseDataState(validwhenMC==DRSandOpcode==0x0-2).
Bitsettingsaremutuallyexclusive.
b1000-Modifiedb0100-Exclusiveb0010-Sharedb0001-Forwardingb0000-Invalid(Non-Coherent)---15:40x0Reserved;Mustwriteto0elsebehaviorisundefined.
RNID_3_03:00x0RemoteNodeID(3:0-LeastSignificantBits)Table2-134.
Q_Py_PCI_PMON_PKT_MATCH0Registers(Sheet1of2)FieldBitsHWResetValDescriptionRNID_4310x0RemoteNodeID(Bit4-MostSignificantBit)---30:180x0Reserved;Mustwriteto0elsebehaviorisundefined.
DNID17:130x0DestinationNodeIDMC12:90x0MessageClassb0000HOM-Requestsb0001HOM-Responsesb0010NDRb0011SNPb0100NCS---b1100NCB---b1110DRSUncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring136ReferenceNumber:329468-002OPC8:50x0OpcodeDRS,NCB:[8]PacketSize,0==9flits,1==11flitsNCS:[8]PacketSize,0==1or2flits,1==3flitsSeeSection2.
11,"PacketMatchingReference"foralistingofopcodesthatmaybefilteredpermessageclass.
VNW4:30x0VirtualNetworkb00-VN0b01-VN1b1x-VNA---2:00x0Reserved;Mustwriteto0elsebehaviorisundefined.
Table2-135.
Q_Py_PCI_PMON_PKT_MASK1RegistersFieldBitsHWResetValDescription---31:200x0Reserved;Mustwriteto0elsebehaviorisundefined.
RDS19:160x0ResponseDataState(validwhenMC==DRSandOpcode==0x0-2).
Bitsettingsaremutuallyexclusive.
b1000-Modifiedb0100-Exclusiveb0010-Sharedb0001-Forwardingb0000-Invalid(Non-Coherent)---15:40x0Reserved;Mustwriteto0elsebehaviorisundefined.
RNID_3_03:00x0RemoteNodeID(3:0-LeastSignificantBits)Table2-136.
Q_Py_PCI_PMON_PKT_MASK0Registers(Sheet1of2)FieldBitsHWResetValDescriptionRNID_4310x0RemoteNodeID(Bit4-MostSignificantBit)---30:180x0Reserved;Mustwriteto0elsebehaviorisundefined.
DNID17:130x0DestinationNodeIDMC12:90x0MessageClassTable2-134.
Q_Py_PCI_PMON_PKT_MATCH0Registers(Sheet2of2)FieldBitsHWResetValDescriptionReferenceNumber:329468-002137UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringEventsDerivedfromPacketFiltersFollowingisaselectionofcommoneventsthatmaybederivedbyusingtheIntelQPIpacketmatchingfacility.
TheMatch/MaskcolumnscorrespondtotheMatch0/Mask0registers.
Forthecaseswhereadditionalfieldsneedtobespecified,theywillbenoted.
OPC8:50x0OpcodeSeeSection2.
11,"PacketMatchingReference"foralistingofopcodesthatmaybefilteredpermessageclass.
VNW4:30x0VirtualNetwork---2:00x0Reserved;Mustwriteto0elsebehaviorisundefined.
Table2-137.
MessageEventsDerivedfromtheMatch/MaskfiltersFieldMatch[12:0]Mask[12:0]DescriptionDRS.
AnyDataC0x1C000x1F80AnyDataResponsemessagecontainingacachelineinresponsetoacorerequest.
TheAnyDataCmessagesareonlysenttoaC-Box.
ThemetricDRS.
AnyResp-DRS.
AnyDataCwillcomputethenumberofDRSwritebackandnonsnoopwritemessages.
DRS.
DataC_M0x1C00&&Match1[19:16]0x80x1FE0&&Mask1[19:16]0xFDataResponsemessageofacachelineinMstatethatisresponsetoacorerequest.
TheDRS.
DataC_MmessagesareonlysenttoIntelQPI.
DRS.
DataC_E0x1C00&&Match1[19:16]0x40x1FE0&&Mask1[19:16]0xFDataResponsemessageofacachelineinEstatethatisresponsetoacorerequest.
TheDRS.
DataC_EmessagesareonlysenttoIntelQPI.
DRS.
DataC_F0x1C00&&Match1[19:16]0x10x1FE0&&Mask1[19:16]0xFDataResponsemessageofacachelineinFstatethatisresponsetoacorerequest.
TheDRS.
DataC_FmessagesareonlysenttoIntelQPI.
DRS.
DataC_E_Cmp0x1C40&&Match1[19:16]0x40x1FE0&&Mask1[19:16]0xFCompleteDataResponsemessageofacachelineinEstatethatisresponsetoacorerequest.
TheDRS.
DataC_EmessagesareonlysenttoIntelQPI.
DRS.
DataC_F_Cmp0x1C40&&Match1[19:16]0x10x1FE0&&Mask1[19:16]0xFCompleteDataResponsemessageofacachelineinFstatethatisresponsetoacorerequest.
TheDRS.
DataC_FmessagesareonlysenttoIntelQPI.
DRS.
DataC_E_FrcAckCnflt0x1C20&&Match1[19:16]0x40x1FE0&&Mask1[19:16]0xFForceAcknowledgeDataResponsemessageofacachelineinEstatethatisresponsetoacorerequest.
TheDRS.
DataC_EmessagesareonlysenttoIntelQPI.
Table2-136.
Q_Py_PCI_PMON_PKT_MASK0Registers(Sheet2of2)FieldBitsHWResetValDescriptionUncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring138ReferenceNumber:329468-0022.
8.
3.
4IntelQPIExtraRegisters-CompanionstoPMONHWTheuncore'sIntelQPIboxincludesanextraMSRthatprovidesthecurrentIntelQPItransferrate.
Table2-138.
QPI_RATE_STATUSRegister–FieldDefinitionsDRS.
DataC_F_FrcAckCnflt0x1C20&&Match1[19:16]0x10x1FE0&&Mask1[19:16]0xFForceAcknowledgeDataResponsemessageofacachelineinFstatethatisresponsetoacorerequest.
TheDRS.
DataC_FmessagesareonlysenttoIntelQPI.
DRS.
WbIData0x1C800x1FE0DataResponsemessageforWriteBackdatawherecachelineissettotheIstate.
DRS.
WbSData0x1CA00x1FE0DataResponsemessageforWriteBackdatawherecachelineissettotheSstate.
DRS.
WbEData0x1CC00x1FE0DataResponsemessageforWriteBackdatawherecachelineissettotheEstate.
DRS.
AnyResp0x1C000x1E00AnyDataResponsemessage.
ADRSmessagecanbeeither9flitsforafullcachelineor11flitsforpartialdata.
DRS.
AnyResp9flits0x1C000x1F00AnyDataResponsemessagethatis11flitsinlength.
An11flitDRSmessagecontainspartialdata.
Each8bytechunkcontainsanenablefieldthatspecifiesifthedataisvalid.
DRS.
AnyResp11flits0x1D000x1F00AnyNonDataResponsecompletionmessage.
ANDRmessageis1onflit.
NCB.
AnyResp0x18000x1E00AnyNon-CoherentBypassresponsemessage.
NCB.
AnyMsg9flits0x18000x1F00AnyNon-CoherentBypassmessagethatis9flitsinlength.
A9flitNCBmessagecontainsafull64bytecacheline.
NCB.
AnyMsg11flits0x19000x1F00AnyNon-CoherentBypassmessagethatis11flitsinlength.
An11flitNCBmessagecontainseitherpartialdataoraninterrupt.
ForNCB11flitdatamessages,each8bytechunkcontainsanenablefieldthatspecifiesifthedataisvalid.
NCB.
AnyInt0x19000x1F80AnyNon-CoherentBypassinterruptmessage.
NCBinterruptmessagesare11flitsinlength.
FieldBitsAttrHWResetValDescriptionrsv31:5RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
slow_mode4RO-V0SlowModeReflectsthecurrentslowmodestatusbeingdriventothePLLThiswillbesetoutofresettobringIntelQPIinslowmode.
AndisonlyexpectedtobesetwhenQPI_rateissetto6.
4GT/srsv3RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
Table2-137.
MessageEventsDerivedfromtheMatch/MaskfiltersFieldMatch[12:0]Mask[12:0]DescriptionReferenceNumber:329468-002139UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring2.
8.
4IntelQPILLPerformanceMonitoringEvents2.
8.
4.
1AnOverviewTheIntelQPILinkLayerprovideseventstogatherinformationontopicssuchas:Trackingincoming(ringbound)/outgoing(systembound)transactions,Variousqueuethattrackthosetransactions,TheLinkLayer'spowerconsumptionasexpressedbythetimespentintheLinkpowerstatesL0p(halfoflanesaredisabled).
AvarietyofstaticeventssuchasDirect2Corestatisticsandwhenoutputcreditisunavailable.
Ofparticularinterest,totallinkutilizationmaybecalculatedbycapturingandsubtractingtransmitted/receivedidleflitsfromIntelQPIclocks.
Manyoftheseeventscanbefurtherbrokendownbymessageclass,includinglinkutilization.
InordertomeasureseveraloftheavailableeventsintheIntelQPILinkLayer,anextrabit(b16)mustbeset.
ThesecaseswillbedocumentedinthefullEventList.
2.
8.
5QPILLBoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasuredQPILLBoxevents.
qpi_rate2:0RO-V11bQPIRateThisreflectsthecurrentQPIratesettingintothePLL010-5.
6GT/s011-6.
4GT/s100-7.
2GT/s101-8GT/s110-8.
8GT/s111-9.
6GT/sother-ReservedSymbolNameEventCodeCtrsExtraSelectBitMaxInc/CycDescriptionTxL_FLITS_G00x000-302FlitsTransferred-Group0RxL_FLITS_G00x010-302FlitsReceived-Group0TxL_INSERTS0x040-301TxFlitBufferAllocationsTxL_BYPASSED0x050-301TxFlitBufferBypassedTxL_CYCLES_NE0x060-301TxFlitBufferCyclesnotEmptyTxL_OCCUPANCY0x070-301TxFlitBufferOccupancyRxL_INSERTS0x080-301RxFlitBufferAllocationsRxL_BYPASSED0x090-301RxFlitBufferBypassedRxL_CYCLES_NE0x0a0-301RxQCyclesNotEmptyRxL_OCCUPANCY0x0b0-30128RxQOccupancy-AllPacketsTxL0_POWER_CYCLES0x0c0-301CyclesinL0TxL0P_POWER_CYCLES0x0d0-301CyclesinL0pFieldBitsAttrHWResetValDescriptionUncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring140ReferenceNumber:329468-002RxL0_POWER_CYCLES0x0f0-301CyclesinL0RxL0P_POWER_CYCLES0x100-301CyclesinL0pL1_POWER_CYCLES0x120-301CyclesinL1DIRECT2CORE0x130-301Direct2CoreSpawningCLOCKTICKS0x140-301NumberofqfclksTxL_FLITS_G10x000-312FlitsTransferred-Group1TxL_FLITS_G20x010-312FlitsTransferred-Group2RxL_FLITS_G10x020-312FlitsReceived-Group1RxL_FLITS_G20x030-312FlitsReceived-Group2RxL_INSERTS_DRS0x090-311RxFlitBufferAllocations-DRSRxL_INSERTS_NCB0x0a0-311RxFlitBufferAllocations-NCBRxL_INSERTS_NCS0x0b0-311RxFlitBufferAllocations-NCSRxL_INSERTS_HOM0x0c0-311RxFlitBufferAllocations-HOMRxL_INSERTS_SNP0x0d0-311RxFlitBufferAllocations-SNPRxL_INSERTS_NDR0x0e0-311RxFlitBufferAllocations-NDRRxL_OCCUPANCY_DRS0x150-31128RxQOccupancy-DRSRxL_OCCUPANCY_NCB0x160-31128RxQOccupancy-NCBRxL_OCCUPANCY_NCS0x170-31128RxQOccupancy-NCSRxL_OCCUPANCY_HOM0x180-31128RxQOccupancy-HOMRxL_OCCUPANCY_SNP0x190-31128RxQOccupancy-SNPRxL_OCCUPANCY_NDR0x1a0-31128RxQOccupancy-NDRVNA_CREDIT_RETURN_OCCUPANCY0x1b0-31128VNACreditsPendingReturn-OccupancyVNA_CREDIT_RETURNS0x1c0-311VNACreditsReturnedRxL_CREDITS_CONSUMED_VNA0x1d0-311VNACreditConsumedRxL_CREDITS_CONSUMED_VN00x1e0-312VN0CreditConsumedTxR_BL_DRS_CREDIT_OCCUPANCY0x1f0-318R3QPIEgressCreditOccupancy-BLDRSTxR_BL_NCB_CREDIT_OCCUPANCY0x200-312R3QPIEgressCreditOccupancy-BLNCBTxR_BL_NCS_CREDIT_OCCUPANCY0x210-312R3QPIEgressCreditOccupancy-BLNCSTxR_AD_HOM_CREDIT_OCCUPANCY0x220-3128R3QPIEgressCreditOccupancy-ADHOMTxR_AD_SNP_CREDIT_OCCUPANCY0x230-3128R3QPIEgressCreditOccupancy-ADSNPTxR_AD_NDR_CREDIT_OCCUPANCY0x240-318R3QPIEgressCreditOccupancy-ADNDRTxR_AK_NDR_CREDIT_OCCUPANCY0x250-316R3QPIEgressCreditOccupancy-AKNDRTxR_AD_HOM_CREDIT_ACQUIRED0x260-311R3QPIEgressCreditOccupancy-HOMTxR_AD_SNP_CREDIT_ACQUIRED0x270-311R3QPIEgressCreditOccupancy-SNPTxR_AD_NDR_CREDIT_ACQUIRED0x280-311R3QPIEgressCreditOccupancy-ADNDRSymbolNameEventCodeCtrsExtraSelectBitMaxInc/CycDescriptionReferenceNumber:329468-002141UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring2.
8.
6QPILLBoxCommonMetrics(DerivedEvents)ThefollowingtablesummarizesmetricscommonlycalculatedfromQPILLBoxevents.
TxR_AK_NDR_CREDIT_ACQUIRED0x290-311R3QPIEgressCreditOccupancy-AKNDRTxR_BL_DRS_CREDIT_ACQUIRED0x2a0-311R3QPIEgressCreditOccupancy-DRSTxR_BL_NCB_CREDIT_ACQUIRED0x2b0-311R3QPIEgressCreditOccupancy-NCBTxR_BL_NCS_CREDIT_ACQUIRED0x2c0-311R3QPIEgressCreditOccupancy-NCSCTO_COUNT0x380-312CountofCTOEventsRxL_CREDITS_CONSUMED_VN10x390-312VN1CreditConsumedSymbolName:DefinitionEquationDATA_FROM_QPI:DatareceivedfromQPIinbytes(=DRS+NCBDatamessagesreceivedfromQPI)DRS_DATA_MSGS_FROM_QPI+NCB_DATA_MSGS_FROM_QPIDATA_FROM_QPI_TO_HA_OR_IIO:DatareceivedfromQPIforwardedtoHAorIIO.
ExpressedinBytesDATA_FROM_QPI-DATA_FROM_QPI_TO_LLCDATA_FROM_QPI_TO_LLC:DatareceivedfromQPIforwardedtoLLC.
ExpressedinBytesDIRECT2CORE.
SUCCESS*64DATA_FROM_QPI_TO_NODEx:DatapacketsreceivedfromQPIsenttoNodeID'x'.
ExpressedinbytesDRS_DataC_FROM_QPI_TO_NODEx+DRS_WRITE_FROM_QPI_TO_NODEx+NCB_DATA_FROM_QPI_TO_NODExDRS_DATA_MSGS_FROM_QPI:DRSDataMessagesFromQPIinbytes(RxL_FLITS_G1.
DRS_DATA*8)DRS_DataC_FROM_QPI_TO_NODEx:DRSDataCpacketsreceivedfromQPIsenttoNodeID'x'.
Expressedinbytes(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0{[12:0],dnid}={0x1C00,x},Q_Py_PCI_PMON_PKT_z_MASK0[17:0]=0x3FF80})*64DRS_DataC_M_FROM_QPI:DRSDataC_FpacketsreceivedfromQPI.
Expressedinbytes(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C00,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0},Q_Py_PCI_PMON_PKT_z_MATCH1[19:16]=0x1,Q_Py_PCI_PMON_PKT_z_MASK1[19:16]=0xF})*64DRS_FULL_CACHELINE_MSGS_FROM_QPI:DRSFullCachelineDataMessagesFromQPIinbytes(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C00,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1F00})*64)SymbolNameEventCodeCtrsExtraSelectBitMaxInc/CycDescriptionUncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring142ReferenceNumber:329468-002DRS_F_OR_E_FROM_QPI:DRSresponseinForEstatesreceivedfromQPIinbytes.
Tocalculatethetotaldataresponseforeachcachelinestate,it'snecessarytoaddthecontributionfromthreeflavors{DataC,DataC_FrcAckCnflt,DataC_Cmp}ofdataresponsepacketsforeachcachelinestate.
((CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C00,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0,Q_Py_PCI_PMON_PKT_z_MATCH1[19:16]=0x4,Q_Py_PCI_PMON_PKT_z_MASK1[19:16]=0xF})+(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C00,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0,Q_Py_PCI_PMON_PKT_z_MATCH1[19:16]=0x1,Q_Py_PCI_PMON_PKT_z_MASK1[19:16]=0xF})+(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C40,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0,Q_Py_PCI_PMON_PKT_z_MATCH1[19:16]=0x4,Q_Py_PCI_PMON_PKT_z_MASK1[19:16]=0xF})+(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C40,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0,Q_Py_PCI_PMON_PKT_z_MATCH1[19:16]=0x1,Q_Py_PCI_PMON_PKT_z_MASK1[19:16]=0xF})+(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C20,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0,Q_Py_PCI_PMON_PKT_z_MATCH1[19:16]=0x4,Q_Py_PCI_PMON_PKT_z_MASK1[19:16]=0xF})+(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C20,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0,Q_Py_PCI_PMON_PKT_z_MATCH1[19:16]=0x1,Q_Py_PCI_PMON_PKT_z_MASK1[19:16]=0xF}))*64DRS_M_FROM_QPI:DRSresponseinMstatereceivedfromQPIinbytes(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C00,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0,Q_Py_PCI_PMON_PKT_z_MATCH1[19:16]=0x8,Q_Py_PCI_PMON_PKT_z_MASK1[19:16]=0xF})*64DRS_PTL_CACHELINE_MSGS_FROM_QPI:DRSPartialCachelineDataMessagesFromQPIinbytes(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1D00,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1F00})*64DRS_WB_FROM_QPI:DRSwritebackpacketsreceivedfromQPIinbytes.
ThisisthesumofWb{I,S,E}DRSpacketsDRS_WbI_FROM_QPI+DRS_WbS_FROM_QPI+DRS_WbE_FROM_QPIDRS_WRITE_FROM_QPI_TO_NODEx:DRSDatapackets(Any-DataC)receivedfromQPIsenttoNodeID'x'.
Expressedinbytes((CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0{[12:0],dnid}={0x1C00,x},Q_Py_PCI_PMON_PKT_z_MASK0[17:0]=0x3FE00})-(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0{[12:0],dnid}={0x1C00,x},Q_Py_PCI_PMON_PKT_z_MASK0[17:0]=0x3FF80}))*64DRS_WbE_FROM_QPI:DRSwriteback'changetoEstate'packetsreceivedfromQPIinbytes(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1CC0,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0})*64DRS_WbI_FROM_QPI:DRSwriteback'changetoIstate'packetsreceivedfromQPIinbytes(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1C80,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0})*64DRS_WbS_FROM_QPI:DRSwriteback'changetoSstate'packetsreceivedfromQPIinbytes(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0[12:0]=0x1CA0,Q_Py_PCI_PMON_PKT_z_MASK0[12:0]=0x1FE0})*64NCB_DATA_FROM_QPI_TO_NODEx:NCBDatapackets(Any-Interrupts)receivedfromQPIsenttoNodeID'x'.
Expressedinbytes((CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0{[12:0],dnid}={0x1800,x},Q_Py_PCI_PMON_PKT_z_MASK0[17:0]=0x3FE00})-(CTO_COUNTwith:{Q_Py_PCI_PMON_PKT_z_MATCH0{[12:0],dnid}={0x1900,x},Q_Py_PCI_PMON_PKT_z_MASK0[17:0]=0x3FF80}))*64SymbolName:DefinitionEquationReferenceNumber:329468-002143UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring2.
8.
7QPILLBoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsfortheQPILLBox.
CLOCKTICKSTitle:NumberofqfclksCategory:CFCLKEventsEventCode:0x14Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofclocksintheQPILL.
Thisclockrunsat1/8ththe"GT/s"speedoftheQPIlink.
Forexample,a8GT/slinkwillhaveqfclkor1GHz.
ThepriorgenerationuncoreinIntelXeonprocessorE5-2600ProductFamilydoesnotsupportdynamiclinkspeeds,sothisfre-quencyisfixed.
CTO_COUNTTitle:CountofCTOEventsCategory:CTOEventsEventCode:0x38ExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3FilterDependency:QPIMask0[17:0],QPIMatch0[17:0],QPIMask1[19:16],QPIMatch1[19:16]Definition:CountsthenumberofCTO(clustertriggerouts)eventsthatwereassertedacrossthetwoslots.
Ifbothslotstriggerinagivencycle,theeventwillincrementby2.
Youcanuseedgedetecttocountthenumberofcaseswhenbotheventstriggered.
NCB_DATA_MSGS_FROM_QPI:NCBDataMessagesFromQPIinbytes(RxL_FLITS_G2.
NCB_DATA*8)PCT_LINK_CRC_RETRY_CYCLES:PercentofCyclestheQPIlinklayerisinretrymodeduetoCRCerrorsRxL_CRC_CYCLES_IN_LLR/CLOCKTICKSPCT_LINK_FULL_POWER_CYCLES:PercentofCyclestheQPIlinkisatFullPowerRxL0_POWER_CYCLES/CLOCKTICKSPCT_LINK_HALF_DISABLED_CYCLES:PercentofCyclestheQPIlinkinpowermodewherehalfofthelanesaredisabled.
RxL0P_POWER_CYCLES/CLOCKTICKSPCT_LINK_SHUTDOWN_CYCLES:PercentofCyclestheQPIlinkisShutdownL1_POWER_CYCLES/CLOCKTICKSQPI_DATA_BW:QPIdatatransmitbandwidthinBytesTxL_FLITS_G0.
DATA*8QPI_LINK_BW:QPItotaltransmitbandwidthinBytes(includescontrol)(TxL_FLITS_G0.
DATA+TxL_FLITS_G0.
NON_DATA)*8QPI_LINK_UTIL:PercentageofcyclesthatQPILinkwasutilized.
Calculatedfrom1-Numberofidleflits-timethelinkwas'off'(RxL_FLITS_G0.
DATA+RxL_FLITS_G0.
NON_DATA)/(2*CLOCKTICKS)QPI_SPEED:QPISpeed-InGT/s(GigaTransfers/Second)-MaxQPIBandwidthis2*ROUND(QPISpeed,0)ROUND((CLOCKTICKS/TSC)*TSC_SPEED,0)*(8/1000)SymbolName:DefinitionEquationUncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring144ReferenceNumber:329468-002DIRECT2CORETitle:Direct2CoreSpawningCategory:DIRECT2COREEventsEventCode:0x13Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofDRSpacketsthatweattemptedtododirect2coreon.
Thereare4mutuallyexclusivefilters.
Filter[0]canbeusedtogetsuccessfulspawns,while[1:3]providethedifferentfailurecases.
NotethatthisdoesnotcountpacketsthatarenotcandidatesforDirect2Core.
TheonlycandidatesforDirect2CoreareDRSpacketsdestinedforCbos.
L1_POWER_CYCLESTitle:CyclesinL1Category:POWEREventsEventCode:0x12Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofQPIqfclkcyclesspentinL1powermode.
L1isamodethattotallyshutsdownaQPIlink.
UseedgedetecttocountthenumberofinstanceswhentheQPIlinkenteredL1.
Linkpowerstatesareperlinkandperdirection,soforexampletheTxdirectioncouldbeinonestatewhileRxwasinanother.
BecauseL1totallyshutsdownthelink,ittakesagoodamountoftimetoexitthismode.
Table2-139.
UnitMasksforDIRECT2COREExtensionumask[15:8]DescriptionSUCCESS_RBT_HITbxxxxxxx1SpawnSuccessThespawnwassuccessful.
Thereweresufficientcredits,theRBTvalidbitwassetandtherewasanRBTtagmatch.
Themessagewasmarkedtospawndirect2core.
FAILURE_CREDITSbxxxxxx1xSpawnFailure-EgressCreditsThespawnfailedbecausetherewerenotenoughEgresscredits.
Hadtherebeenenoughcredits,thespawnwouldhaveworkedastheRBTbitwassetandtheRBTtagmatched.
FAILURE_RBT_HITbxxxxx1xxSpawnFailure-RBTInvalidThespawnfailedbecausetheroute-backtable(RBT)specifiedthatthetransactionshouldnottriggeradirect2coretransaction.
ThisiscommonforIOtransactions.
TherewereenoughEgresscreditsandtheRBTtagmatchedbutthevalidbitwasnotset.
FAILURE_CREDITS_RBTbxxxx1xxxSpawnFailure-EgressandRBTInvalidThespawnfailedbecausetherewerenotenoughEgresscreditsANDtheRBTbitwasnotset,buttheRBTtagmatched.
FAILURE_MISSbxxx1xxxxSpawnFailure-RBTMissThespawnfailedbecausetheRBTtagdidnotmatchalthoughthevalidbitwassetandtherewereenoughEgresscredits.
FAILURE_CREDITS_MISSbxx1xxxxxSpawnFailure-EgressandRBTMissThespawnfailedbecausetheRBTtagdidnotmatchandthereweren'tenoughEgresscredits.
Thevalidbitwasset.
FAILURE_RBT_MISSbx1xxxxxxSpawnFailure-RBTMissandInvalidThespawnfailedbecausetheRBTtagdidnotmatchandthevalidbitwasnotsetalthoughtherewereenoughEgresscredits.
FAILURE_CREDITS_RBT_MISSb1xxxxxxxSpawnFailure-EgressandRBTMiss,InvalidThespawnfailedbecausetheRBTtagdidnotmatch,thevalidbitwasnotsetandthereweren'tenoughEgresscredits.
ReferenceNumber:329468-002145UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringRxL0P_POWER_CYCLESTitle:CyclesinL0pCategory:POWER_RXEventsEventCode:0x10Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofQPIqfclkcyclesspentinL0ppowermode.
L0pisamodewherewedisable1/2oftheQPIlanes,decreasingourbandwidthinordertosavepower.
Itincreasessnoopanddatatransferlatenciesanddecreasesoverallbandwidth.
ThismodecanbeveryusefulinNUMAoptimizedworkloadsthatlargelyonlyutilizeQPIforsnoopsandtheirresponses.
UseedgedetecttocountthenumberofinstanceswhentheQPIlinkenteredL0p.
Linkpowerstatesareperlinkandperdirection,soforexampletheTxdirectioncouldbeinonestatewhileRxwasinanother.
NOTE:Using.
edge_dettocounttransitionsdoesnotfunctionifL1_POWER_CYCLES>0.
RxL0_POWER_CYCLESTitle:CyclesinL0Category:POWER_RXEventsEventCode:0x0fMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofQPIqfclkcyclesspentinL0powermodeintheLinkLayer.
L0isthedefaultmodewhichprovidesthehighestperformancewiththemostpower.
UseedgedetecttocountthenumberofinstancesthatthelinkenteredL0.
Linkpowerstatesareperlinkandperdirection,soforexampletheTxdirectioncouldbeinonestatewhileRxwasinanother.
Thephylayersome-timesleavesL0fortraining,whichwillnotbecapturedbythisevent.
NOTE:IncludesL0pcycles.
TogetjustL0,subtractRxL0P_POWER_CYCLES.
RxL_BYPASSEDTitle:RxFlitBufferBypassedCategory:RXQEventsEventCode:0x09Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberoftimesthatanincomingflitwasabletobypasstheflitbufferandpassdirectlyacrosstheBGFandintotheEgress.
Thisisalatencyoptimization,andshouldgenerallybethecommoncase.
Ifthisvalueislessthanthenumberofflitstransferred,itimpliesthattherewasqueueinggettingontothering,andthusthetransactionssawhigherlatency.
RxL_CREDITS_CONSUMED_VN0Title:VN0CreditConsumedCategory:RX_CREDITS_CONSUMEDEventsEventCode:0x1eExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberoftimesthatanRxQVN0creditwasconsumed(i.
e.
messageusesaVN0creditfortheRxBuffer).
ThisincludespacketsthatwentthroughtheRxQandthosethatwerebypasssed.
Table2-140.
UnitMasksforRxL_CREDITS_CONSUMED_VN0Extensionumask[15:8]DescriptionDRSbxxxxxxx1DRSVN0creditfortheDRSmessageclass.
NCBbxxxxxx1xNCBVN0creditfortheNCBmessageclass.
UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring146ReferenceNumber:329468-002RxL_CREDITS_CONSUMED_VN1Title:VN1CreditConsumedCategory:RX_CREDITS_CONSUMEDEventsEventCode:0x39ExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberoftimesthatanRxQVN1creditwasconsumed(i.
e.
messageusesaVN1creditfortheRxBuffer).
ThisincludespacketsthatwentthroughtheRxQandthosethatwerebypasssed.
RxL_CREDITS_CONSUMED_VNATitle:VNACreditConsumedCategory:RX_CREDITS_CONSUMEDEventsEventCode:0x1dExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberoftimesthatanRxQVNAcreditwasconsumed(i.
e.
messageusesaVNAcreditfortheRxBuffer).
ThisincludespacketsthatwentthroughtheRxQandthosethatwerebypasssed.
NCSbxxxxx1xxNCSVN0creditfortheNCSmessageclass.
HOMbxxxx1xxxHOMVN0creditfortheHOMmessageclass.
SNPbxxx1xxxxSNPVN0creditfortheSNPmessageclass.
NDRbxx1xxxxxNDRVN0creditfortheNDRmessageclass.
Table2-141.
UnitMasksforRxL_CREDITS_CONSUMED_VN1Extensionumask[15:8]DescriptionDRSbxxxxxxx1DRSVN1creditfortheDRSmessageclass.
NCBbxxxxxx1xNCBVN1creditfortheNCBmessageclass.
NCSbxxxxx1xxNCSVN1creditfortheNCSmessageclass.
HOMbxxxx1xxxHOMVN1creditfortheHOMmessageclass.
SNPbxxx1xxxxSNPVN1creditfortheSNPmessageclass.
NDRbxx1xxxxxNDRVN1creditfortheNDRmessageclass.
Table2-140.
UnitMasksforRxL_CREDITS_CONSUMED_VN0Extensionumask[15:8]DescriptionReferenceNumber:329468-002147UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringRxL_CYCLES_NETitle:RxQCyclesNotEmptyCategory:RXQEventsEventCode:0x0aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheQPIRxQwasnotempty.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyAccu-mulatoreventtocalculatetheaverageoccupancy.
RxL_FLITS_G0Title:FlitsReceived-Group0Category:FLITS_RXEventsEventCode:0x01Max.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberofflitsreceivedfromtheQPILink.
ItincludesfiltersforIdle,pro-tocol,andDataFlits.
Each"flit"ismadeupof80bitsofinformation(inadditiontosomeECCdata).
Infull-width(L0)mode,flitsaremadeupoffour"fits",eachofwhichcontains20bitsofdata(alongwithsomeadditionalECCdata).
Inhalf-width(L0p)mode,thefitsareonly10bits,andthereforeittakestwiceasmanyfitstotransmitaflit.
WhenonetalksaboutQPI"speed"(forexample,8.
0GT/s),the"transfers"herereferto"fits".
Therefore,inL0,thesystemwilltransfer1"flit"attherateof1/4ththeQPIspeed.
Onecancalculatethebandwidthofthelinkbytaking:flits*80b/time.
Notethatthisisnotthesameas"data"bandwidth.
Forexample,whenwearetransferringa64BcachelineacrossQPI,wewillbreakitinto9flits--1withheaderinformationand8with64bitsofactual"data"andanadditional16bitsofotherinformation.
Tocalculate"data"bandwidth,oneshouldthereforedo:dataflits*8B/time(forL0)or4Binsteadof8BforL0p.
Table2-142.
UnitMasksforRxL_FLITS_G0Extensionumask[15:8]DescriptionIDLEb00000001IdleandNullFlitsNumberofflitsreceivedoverQPIthatdonotholdprotocolpayload.
WhenQPIisnotinapowersavingstate,itcontinuouslytransmitsflitsacrossthelink.
Whentherearenoprotocolflitstosend,itwillsendIDLEandNULLflitsacross.
Theseflitssometimesdocarryapayload,suchascreditreturns,butaregeneralnotconsideredpartoftheQPIbandwidth.
DATAb00000010DataTxFlitsNumberofdataflitsreceivedoverQPI.
Eachflitcontains64bofdata.
ThisincludesbothDRSandNCBdataflits(coherentandnon-coherent).
ThiscanbeusedtocalculatethedatabandwidthoftheQPIlink.
OnecangetagoodpictureoftheQPI-linkcharacteristicsbyevaluatingtheprotocolflits,dataflits,andidle/nullflits.
Thisdoesnotincludetheheaderflitsthatgoindatapackets.
NON_DATAb00000100Non-DataprotocolTxFlitsNumberofnon-NULLnon-dataflitsreceivedacrossQPI.
ThisbasicallytrackstheprotocoloverheadontheQPIlink.
OnecangetagoodpictureoftheQPI-linkcharacteristicsbyevaluatingtheprotocolflits,dataflits,andidle/nullflits.
Thisincludestheheaderflitsfordatapackets.
UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring148ReferenceNumber:329468-002RxL_FLITS_G1Title:FlitsReceived-Group1Category:FLITS_RXEventsEventCode:0x02ExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberofflitsreceivedfromtheQPILink.
Thisisoneofthree"groups"thatallowustotrackflits.
ItincludesfiltersforSNP,HOM,andDRSmessageclasses.
Each"flit"ismadeupof80bitsofinformation(inadditiontosomeECCdata).
Infull-width(L0)mode,flitsaremadeupoffour"fits",eachofwhichcontains20bitsofdata(alongwithsomeadditionalECCdata).
Inhalf-width(L0p)mode,thefitsareonly10bits,andthereforeittakestwiceasmanyfitstotransmitaflit.
WhenonetalksaboutQPI"speed"(forexample,8.
0GT/s),the"transfers"herereferto"fits".
Therefore,inL0,thesystemwilltransfer1"flit"attherateof1/4ththeQPIspeed.
Onecancalculatethebandwidthofthelinkbytaking:flits*80b/time.
Notethatthisisnotthesameas"data"bandwidth.
Forexample,whenwearetransferringa64BcachelineacrossQPI,wewillbreakitinto9flits--1withheaderinformationand8with64bitsofactual"data"andanadditional16bitsofotherinformation.
Tocalculate"data"bandwidth,oneshouldthereforedo:dataflits*8B/time.
Table2-143.
UnitMasksforRxL_FLITS_G1Extensionumask[15:8]DescriptionSNPb00000001SNPFlitsCountsthenumberofsnooprequestflitsreceivedoverQPI.
Theserequestsarecontainedinthesnoopchannel.
Thisdoesnotincludesnoopresponses,whicharereceivedonthehomechannel.
HOM_REQb00000010HOMRequestFlitsCountsthenumberofdatarequestreceivedoverQPIonthehomechannel.
ThisbasicallycountsthenumberofremotememoryrequestsreceivedoverQPI.
InconjunctionwiththelocalreadcountintheHomeAgent,onecancalculatethenumberofLLCMisses.
HOM_NONREQb00000100HOMNon-RequestFlitsCountsthenumberofnon-requestflitsreceivedoverQPIonthehomechannel.
Thesearemostcommonlysnoopresponses,andthiseventcanbeusedasaproxyforthat.
HOMb00000110HOMFlitsCountsthenumberofflitsreceivedoverQPIonthehomechannel.
DRS_DATAb00001000DRSDataFlitsCountsthetotalnumberofdataflitsreceivedoverQPIontheDRS(DataResponse)channel.
DRSflitsareusedtotransmitdatawithcoherency.
ThisdoesnotcountdataflitsreceivedovertheNCBchannelwhichtransmitsnon-coherentdata.
Thisincludesonlythedataflits(nottheheader).
DRS_NONDATAb00010000DRSHeaderFlitsCountsthetotalnumberofprotocolflitsreceivedoverQPIontheDRS(DataResponse)channel.
DRSflitsareusedtotransmitdatawithcoherency.
ThisdoesnotcountdataflitsreceivedovertheNCBchannelwhichtransmitsnon-coherentdata.
Thisincludesonlytheheaderflits(notthedata).
Thisincludesextendedheaders.
DRSb00011000DRSFlits(bothHeaderandData)CountsthetotalnumberofflitsreceivedoverQPIontheDRS(DataResponse)channel.
DRSflitsareusedtotransmitdatawithcoherency.
ThisdoesnotcountdataflitsreceivedovertheNCBchannelwhichtransmitsnon-coherentdata.
ReferenceNumber:329468-002149UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringRxL_FLITS_G2Title:FlitsReceived-Group2Category:FLITS_RXEventsEventCode:0x03ExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberofflitsreceivedfromtheQPILink.
Thisisoneofthree"groups"thatallowustotrackflits.
ItincludesfiltersforNDR,NCB,andNCSmessageclasses.
Each"flit"ismadeupof80bitsofinformation(inadditiontosomeECCdata).
Infull-width(L0)mode,flitsaremadeupoffour"fits",eachofwhichcontains20bitsofdata(alongwithsomeadditionalECCdata).
Inhalf-width(L0p)mode,thefitsareonly10bits,andthereforeittakestwiceasmanyfitstotransmitaflit.
WhenonetalksaboutQPI"speed"(forexample,8.
0GT/s),the"transfers"herereferto"fits".
Therefore,inL0,thesystemwilltransfer1"flit"attherateof1/4ththeQPIspeed.
Onecancalculatethebandwidthofthelinkbytaking:flits*80b/time.
Notethatthisisnotthesameas"data"bandwidth.
Forexample,whenwearetransferringa64BcachelineacrossQPI,wewillbreakitinto9flits--1withheaderinformationand8with64bitsofactual"data"andanadditional16bitsofotherinformation.
Tocalculate"data"bandwidth,oneshouldthereforedo:dataflits*8B/time.
RxL_INSERTSTitle:RxFlitBufferAllocationsCategory:RXQEventsEventCode:0x08Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofallocationsintotheQPIRxFlitBuffer.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyeventinordertocal-culatetheaverageflitbufferlifetime.
Table2-144.
UnitMasksforRxL_FLITS_G2Extensionumask[15:8]DescriptionNDR_ADb00000001Non-DataResponseRxFlits-ADCountsthetotalnumberofflitsreceivedovertheNDR(Non-DataResponse)channel.
Thischannelisusedtosendavarietyofprotocolflitsincludinggrantsandcompletions.
ThisisonlyforNDRpacketstothelocalsocketwhichusetheAKring.
NDR_AKb00000010Non-DataResponseRxFlits-AKCountsthetotalnumberofflitsreceivedovertheNDR(Non-DataResponse)channel.
Thischannelisusedtosendavarietyofprotocolflitsincludinggrantsandcompletions.
ThisisonlyforNDRpacketsdestinedforRoute-thrutoaremotesocket.
NCB_DATAb00000100Non-CoherentdataRxFlitsNumberofNon-CoherentBypassdataflits.
Theseflitsaregenerallyusedtotransmitnon-coherentdataacrossQPI.
ThisdoesnotincludeacountoftheDRS(coherent)dataflits.
Thisonlycountsthedataflits,nottheNCBheaders.
NCB_NONDATAb00001000Non-Coherentnon-dataRxFlitsNumberofNon-CoherentBypassnon-dataflits.
Thesepacketsaregenerallyusedtotransmitnon-coherentdataacrossQPI,andtheflitscountedhereareforheadersandothernon-dataflits.
Thisincludesextendedheaders.
NCBb00001100Non-CoherentRxFlitsNumberofNon-CoherentBypassflits.
Thesepacketsaregenerallyusedtotransmitnon-coherentdataacrossQPI.
NCSb00010000Non-CoherentstandardRxFlitsNumberofNCS(non-coherentstandard)flitsreceivedoverQPI.
Thisincludesextendedheaders.
UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring150ReferenceNumber:329468-002RxL_INSERTS_DRSTitle:RxFlitBufferAllocations-DRSCategory:RXQEventsEventCode:0x09ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofallocationsintotheQPIRxFlitBuffer.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyeventinordertocal-culatetheaverageflitbufferlifetime.
ThismonitorsonlyDRSflits.
RxL_INSERTS_HOMTitle:RxFlitBufferAllocations-HOMCategory:RXQEventsEventCode:0x0cExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofallocationsintotheQPIRxFlitBuffer.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyeventinordertocal-culatetheaverageflitbufferlifetime.
ThismonitorsonlyHOMflits.
RxL_INSERTS_NCBTitle:RxFlitBufferAllocations-NCBCategory:RXQEventsEventCode:0x0aExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofallocationsintotheQPIRxFlitBuffer.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyeventinordertocal-culatetheaverageflitbufferlifetime.
ThismonitorsonlyNCBflits.
Table2-145.
UnitMasksforRxL_INSERTS_DRSExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1Table2-146.
UnitMasksforRxL_INSERTS_HOMExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1ReferenceNumber:329468-002151UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringRxL_INSERTS_NCSTitle:RxFlitBufferAllocations-NCSCategory:RXQEventsEventCode:0x0bExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofallocationsintotheQPIRxFlitBuffer.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyeventinordertocal-culatetheaverageflitbufferlifetime.
ThismonitorsonlyNCSflits.
RxL_INSERTS_NDRTitle:RxFlitBufferAllocations-NDRCategory:RXQEventsEventCode:0x0eExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofallocationsintotheQPIRxFlitBuffer.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyeventinordertocal-culatetheaverageflitbufferlifetime.
ThismonitorsonlyNDRflits.
RxL_INSERTS_SNPTitle:RxFlitBufferAllocations-SNPCategory:RXQEventsEventCode:0x0dExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Table2-147.
UnitMasksforRxL_INSERTS_NCBExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1Table2-148.
UnitMasksforRxL_INSERTS_NCSExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1Table2-149.
UnitMasksforRxL_INSERTS_NDRExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring152ReferenceNumber:329468-002Definition:NumberofallocationsintotheQPIRxFlitBuffer.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyeventinordertocal-culatetheaverageflitbufferlifetime.
ThismonitorsonlySNPflits.
RxL_OCCUPANCYTitle:RxQOccupancy-AllPacketsCategory:RXQEventsEventCode:0x0bMax.
Inc/Cyc:.
128,RegisterRestrictions:0-3Definition:AccumulatesthenumberofelementsintheQPIRxQineachcycle.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferNotEmptyeventtocalculateaverageoccupancy,orwiththeFlitBufferAllocationseventtotrackaveragelife-time.
RxL_OCCUPANCY_DRSTitle:RxQOccupancy-DRSCategory:RXQEventsEventCode:0x15ExtraSelectBit:YMax.
Inc/Cyc:.
128,RegisterRestrictions:0-3Definition:AccumulatesthenumberofelementsintheQPIRxQineachcycle.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferNotEmptyeventtocalculateaverageoccupancy,orwiththeFlitBufferAllocationseventtotrackaveragelife-time.
ThismonitorsDRSflitsonly.
RxL_OCCUPANCY_HOMTitle:RxQOccupancy-HOMCategory:RXQEventsEventCode:0x18ExtraSelectBit:YMax.
Inc/Cyc:.
128,RegisterRestrictions:0-3Definition:AccumulatesthenumberofelementsintheQPIRxQineachcycle.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferNotEmptyTable2-150.
UnitMasksforRxL_INSERTS_SNPExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1Table2-151.
UnitMasksforRxL_OCCUPANCY_DRSExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1ReferenceNumber:329468-002153UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringeventtocalculateaverageoccupancy,orwiththeFlitBufferAllocationseventtotrackaveragelifetime.
ThismonitorsHOMflitsonly.
RxL_OCCUPANCY_NCBTitle:RxQOccupancy-NCBCategory:RXQEventsEventCode:0x16ExtraSelectBit:YMax.
Inc/Cyc:.
128,RegisterRestrictions:0-3Definition:AccumulatesthenumberofelementsintheQPIRxQineachcycle.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferNotEmptyeventtocalculateaverageoccupancy,orwiththeFlitBufferAllocationseventtotrackaveragelifetime.
ThismonitorsNCBflitsonly.
RxL_OCCUPANCY_NCSTitle:RxQOccupancy-NCSCategory:RXQEventsEventCode:0x17ExtraSelectBit:YMax.
Inc/Cyc:.
128,RegisterRestrictions:0-3Definition:AccumulatesthenumberofelementsintheQPIRxQineachcycle.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferNotEmptyeventtocalculateaverageoccupancy,orwiththeFlitBufferAllocationseventtotrackaveragelifetime.
ThismonitorsNCSflitsonly.
Table2-152.
UnitMasksforRxL_OCCUPANCY_HOMExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1Table2-153.
UnitMasksforRxL_OCCUPANCY_NCBExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1Table2-154.
UnitMasksforRxL_OCCUPANCY_NCSExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring154ReferenceNumber:329468-002RxL_OCCUPANCY_NDRTitle:RxQOccupancy-NDRCategory:RXQEventsEventCode:0x1aExtraSelectBit:YMax.
Inc/Cyc:.
128,RegisterRestrictions:0-3Definition:AccumulatesthenumberofelementsintheQPIRxQineachcycle.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferNotEmptyeventtocalculateaverageoccupancy,orwiththeFlitBufferAllocationseventtotrackaveragelife-time.
ThismonitorsNDRflitsonly.
RxL_OCCUPANCY_SNPTitle:RxQOccupancy-SNPCategory:RXQEventsEventCode:0x19ExtraSelectBit:YMax.
Inc/Cyc:.
128,RegisterRestrictions:0-3Definition:AccumulatesthenumberofelementsintheQPIRxQineachcycle.
Generally,whendataistransmittedacrossQPI,itwillbypasstheRxQandpassdirectlytotheringinterface.
Ifthingsbackupgettingtransmittedontothering,however,itmayneedtoallocateintothisbuffer,thusincreasingthelatency.
ThiseventcanbeusedinconjunctionwiththeFlitBufferNotEmptyeventtocalculateaverageoccupancy,orwiththeFlitBufferAllocationseventtotrackaveragelife-time.
ThismonitorsSNPflitsonly.
TxL0P_POWER_CYCLESTitle:CyclesinL0pCategory:POWER_TXEventsEventCode:0x0dMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofQPIqfclkcyclesspentinL0ppowermode.
L0pisamodewherewedisable1/2oftheQPIlanes,decreasingourbandwidthinordertosavepower.
Itincreasessnoopanddatatransferlatenciesanddecreasesoverallbandwidth.
ThismodecanbeveryusefulinNUMAopti-mizedworkloadsthatlargelyonlyutilizeQPIforsnoopsandtheirresponses.
UseedgedetecttocountthenumberofinstanceswhentheQPIlinkenteredL0p.
Linkpowerstatesareperlinkandperdirection,soforexampletheTxdirectioncouldbeinonestatewhileRxwasinanother.
NOTE:Using.
edge_dettocounttransitionsdoesnotfunctionifL1_POWER_CYCLES>0.
Table2-155.
UnitMasksforRxL_OCCUPANCY_NDRExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1Table2-156.
UnitMasksforRxL_OCCUPANCY_SNPExtensionumask[15:8]DescriptionVN0bxxxxxxx1forVN0VN1bxxxxxx1xforVN1ReferenceNumber:329468-002155UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringTxL0_POWER_CYCLESTitle:CyclesinL0Category:POWER_TXEventsEventCode:0x0cMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofQPIqfclkcyclesspentinL0powermodeintheLinkLayer.
L0isthedefaultmodewhichprovidesthehighestperformancewiththemostpower.
UseedgedetecttocountthenumberofinstancesthatthelinkenteredL0.
Linkpowerstatesareperlinkandperdirection,soforexampletheTxdirectioncouldbeinonestatewhileRxwasinanother.
Thephylayersome-timesleavesL0fortraining,whichwillnotbecapturedbythisevent.
NOTE:IncludesL0pcycles.
TogetjustL0,subtractTxL0P_POWER_CYCLES.
TxL_BYPASSEDTitle:TxFlitBufferBypassedCategory:TXQEventsEventCode:0x05Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberoftimesthatanincomingflitwasabletobypasstheTxflitbufferandpassdirectlyouttheQPILink.
Generally,whendataistransmittedacrossQPI,itwillbypasstheTxQandpassdirectlytothelink.
However,theTxQwillbeusedwithL0pandwhenLLRoccurs,increasinglatencytotransferouttothelink.
TxL_CYCLES_NETitle:TxFlitBufferCyclesnotEmptyCategory:TXQEventsEventCode:0x06Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcycleswhentheTxQisnotempty.
Generally,whendataistransmittedacrossQPI,itwillbypasstheTxQandpassdirectlytothelink.
However,theTxQwillbeusedwithL0pandwhenLLRoccurs,increasinglatencytotransferouttothelink.
TxL_FLITS_G0Title:FlitsTransferred-Group0Category:FLITS_TXEventsEventCode:0x00Max.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberofflitstransmittedacrosstheQPILink.
ItincludesfiltersforIdle,protocol,andDataFlits.
Each"flit"ismadeupof80bitsofinformation(inadditiontosomeECCdata).
Infull-width(L0)mode,flitsaremadeupoffour"fits",eachofwhichcontains20bitsofdata(alongwithsomeadditionalECCdata).
Inhalf-width(L0p)mode,thefitsareonly10bits,andthereforeittakestwiceasmanyfitstotransmitaflit.
WhenonetalksaboutQPI"speed"(forexample,8.
0GT/s),the"transfers"herereferto"fits".
Therefore,inL0,thesystemwilltransfer1"flit"attherateof1/4ththeQPIspeed.
Onecancalculatethebandwidthofthelinkbytaking:flits*80b/time.
Notethatthisisnotthesameas"data"bandwidth.
Forexample,whenwearetransferringa64BcachelineacrossQPI,wewillbreakitinto9flits--1withheaderinformationand8with64bitsofactual"data"andanadditional16bitsofotherinformation.
Tocalculate"data"bandwidth,oneshouldthereforedo:dataflits*8B/time(forL0)or4Binsteadof8BforL0p.
UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring156ReferenceNumber:329468-002TxL_FLITS_G1Title:FlitsTransferred-Group1Category:FLITS_TXEventsEventCode:0x00ExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberofflitstransmittedacrosstheQPILink.
Thisisoneofthree"groups"thatallowustotrackflits.
ItincludesfiltersforSNP,HOM,andDRSmessageclasses.
Each"flit"ismadeupof80bitsofinformation(inadditiontosomeECCdata).
Infull-width(L0)mode,flitsaremadeupoffour"fits",eachofwhichcontains20bitsofdata(alongwithsomeadditionalECCdata).
Inhalf-width(L0p)mode,thefitsareonly10bits,andthereforeittakestwiceasmanyfitstotransmitaflit.
WhenonetalksaboutQPI"speed"(forexample,8.
0GT/s),the"transfers"herereferto"fits".
Therefore,inL0,thesystemwilltransfer1"flit"attherateof1/4ththeQPIspeed.
Onecancalculatethebandwidthofthelinkbytaking:flits*80b/time.
Notethatthisisnotthesameas"data"bandwidth.
Forexample,whenwearetransferringa64BcachelineacrossQPI,wewillbreakitinto9flits--1withheaderinformationand8with64bitsofactual"data"andanadditional16bitsofotherinformation.
Tocalculate"data"bandwidth,oneshouldthereforedo:dataflits*8B/time.
Table2-157.
UnitMasksforTxL_FLITS_G0Extensionumask[15:8]DescriptionDATAb00000010DataTxFlitsNumberofdataflitstransmittedoverQPI.
Eachflitcontains64bofdata.
ThisincludesbothDRSandNCBdataflits(coherentandnon-coherent).
ThiscanbeusedtocalculatethedatabandwidthoftheQPIlink.
OnecangetagoodpictureoftheQPI-linkcharacteristicsbyevaluatingtheprotocolflits,dataflits,andidle/nullflits.
Thisdoesnotincludetheheaderflitsthatgoindatapackets.
NON_DATAb00000100Non-DataprotocolTxFlitsNumberofnon-NULLnon-dataflitstransmittedacrossQPI.
ThisbasicallytrackstheprotocoloverheadontheQPIlink.
OnecangetagoodpictureoftheQPI-linkcharacteristicsbyevaluatingtheprotocolflits,dataflits,andidle/nullflits.
Thisincludestheheaderflitsfordatapackets.
Table2-158.
UnitMasksforTxL_FLITS_G1Extensionumask[15:8]DescriptionSNPb00000001SNPFlitsCountsthenumberofsnooprequestflitstransmittedoverQPI.
Theserequestsarecontainedinthesnoopchannel.
Thisdoesnotincludesnoopresponses,whicharetransmittedonthehomechannel.
HOM_REQb00000010HOMRequestFlitsCountsthenumberofdatarequesttransmittedoverQPIonthehomechannel.
ThisbasicallycountsthenumberofremotememoryrequeststransmittedoverQPI.
InconjunctionwiththelocalreadcountintheHomeAgent,onecancalculatethenumberofLLCMisses.
HOM_NONREQb00000100HOMNon-RequestFlitsCountsthenumberofnon-requestflitstransmittedoverQPIonthehomechannel.
Thesearemostcommonlysnoopresponses,andthiseventcanbeusedasaproxyforthat.
HOMb00000110HOMFlitsCountsthenumberofflitstransmittedoverQPIonthehomechannel.
ReferenceNumber:329468-002157UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringTxL_FLITS_G2Title:FlitsTransferred-Group2Category:FLITS_TXEventsEventCode:0x01ExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:CountsthenumberofflitstransmittedacrosstheQPILink.
Thisisoneofthree"groups"thatallowustotrackflits.
ItincludesfiltersforNDR,NCB,andNCSmessageclasses.
Each"flit"ismadeupof80bitsofinformation(inadditiontosomeECCdata).
Infull-width(L0)mode,flitsaremadeupoffour"fits",eachofwhichcontains20bitsofdata(alongwithsomeadditionalECCdata).
Inhalf-width(L0p)mode,thefitsareonly10bits,andthereforeittakestwiceasmanyfitstotransmitaflit.
WhenonetalksaboutQPI"speed"(forexample,8.
0GT/s),the"transfers"herereferto"fits".
Therefore,inL0,thesystemwilltransfer1"flit"attherateof1/4ththeQPIspeed.
Onecancalculatethebandwidthofthelinkbytaking:flits*80b/time.
Notethatthisisnotthesameas"data"bandwidth.
Forexample,whenwearetransferringa64Bcach-elineacrossQPI,wewillbreakitinto9flits--1withheaderinformationand8with64bitsofactual"data"andanadditional16bitsofotherinformation.
Tocalculate"data"bandwidth,oneshouldthereforedo:dataflits*8B/time.
DRS_DATAb00001000DRSDataFlitsCountsthetotalnumberofdataflitstransmittedoverQPIontheDRS(DataResponse)channel.
DRSflitsareusedtotransmitdatawithcoherency.
ThisdoesnotcountdataflitstransmittedovertheNCBchannelwhichtransmitsnon-coherentdata.
Thisincludesonlythedataflits(nottheheader).
DRS_NONDATAb00010000DRSHeaderFlitsCountsthetotalnumberofprotocolflitstransmittedoverQPIontheDRS(DataResponse)channel.
DRSflitsareusedtotransmitdatawithcoherency.
ThisdoesnotcountdataflitstransmittedovertheNCBchannelwhichtransmitsnon-coherentdata.
Thisincludesonlytheheaderflits(notthedata).
Thisincludesextendedheaders.
DRSb00011000DRSFlits(bothHeaderandData)CountsthetotalnumberofflitstransmittedoverQPIontheDRS(DataResponse)channel.
DRSflitsareusedtotransmitdatawithcoherency.
Table2-159.
UnitMasksforTxL_FLITS_G2Extensionumask[15:8]DescriptionNDR_ADb00000001Non-DataResponseTxFlits-ADCountsthetotalnumberofflitstransmittedovertheNDR(Non-DataResponse)channel.
Thischannelisusedtosendavarietyofprotocolflitsincludinggrantsandcompletions.
ThisisonlyforNDRpacketstothelocalsocketwhichusetheAKring.
NDR_AKb00000010Non-DataResponseTxFlits-AKCountsthetotalnumberofflitstransmittedovertheNDR(Non-DataResponse)channel.
Thischannelisusedtosendavarietyofprotocolflitsincludinggrantsandcompletions.
ThisisonlyforNDRpacketsdestinedforRoute-thrutoaremotesocket.
NCB_DATAb00000100Non-CoherentdataTxFlitsNumberofNon-CoherentBypassdataflits.
Theseflitsaregenerallyusedtotransmitnon-coherentdataacrossQPI.
ThisdoesnotincludeacountoftheDRS(coherent)dataflits.
Thisonlycountsthedataflits,nottheNCBheaders.
Table2-158.
UnitMasksforTxL_FLITS_G1Extensionumask[15:8]DescriptionUncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring158ReferenceNumber:329468-002TxL_INSERTSTitle:TxFlitBufferAllocationsCategory:TXQEventsEventCode:0x04Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofallocationsintotheQPITxFlitBuffer.
Generally,whendataistransmittedacrossQPI,itwillbypasstheTxQandpassdirectlytothelink.
However,theTxQwillbeusedwithL0pandwhenLLRoccurs,increasinglatencytotransferouttothelink.
ThiseventcanbeusedinconjunctionwiththeFlitBufferOccupancyeventinordertocalculatetheaverageflitbufferlifetime.
TxL_OCCUPANCYTitle:TxFlitBufferOccupancyCategory:TXQEventsEventCode:0x07Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:AccumulatesthenumberofflitsintheTxQ.
Generally,whendataistransmittedacrossQPI,itwillbypasstheTxQandpassdirectlytothelink.
However,theTxQwillbeusedwithL0pandwhenLLRoccurs,increasinglatencytotransferouttothelink.
Thiscanbeusedwiththecyclesnotemptyeventtotrackaverageoccupancy,ortheallocationseventtotrackaveragelifetimeintheTxQ.
TxR_AD_HOM_CREDIT_ACQUIREDTitle:R3QPIEgressCreditOccupancy-HOMCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x26ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoflinklayercreditsintotheR3(fortransactionsacrosstheBGF)acquiredeachcycle.
FlowControlFIFOforHomemessagesonAD.
NCB_NONDATAb00001000Non-Coherentnon-dataTxFlitsNumberofNon-CoherentBypassnon-dataflits.
Thesepacketsaregenerallyusedtotransmitnon-coherentdataacrossQPI,andtheflitscountedhereareforheadersandothernon-dataflits.
Thisincludesextendedheaders.
NCBb00001100Non-CoherentBypassTxFlitsNumberofNon-CoherentBypassflits.
Thesepacketsaregenerallyusedtotransmitnon-coherentdataacrossQPI.
NCSb00010000Non-CoherentstandardTxFlitsNumberofNCS(non-coherentstandard)flitstransmittedoverQPI.
Thisincludesextendedheaders.
Table2-160.
UnitMasksforTxR_AD_HOM_CREDIT_ACQUIREDExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1Table2-159.
UnitMasksforTxL_FLITS_G2Extensionumask[15:8]DescriptionReferenceNumber:329468-002159UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringTxR_AD_HOM_CREDIT_OCCUPANCYTitle:R3QPIEgressCreditOccupancy-ADHOMCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x22ExtraSelectBit:YMax.
Inc/Cyc:.
28,RegisterRestrictions:0-3Definition:OccupancyeventthattracksthenumberoflinklayercreditsintotheR3(fortransac-tionsacrosstheBGF)availableineachcycle.
FlowControlFIFOforHOMmessagesonAD.
TxR_AD_NDR_CREDIT_ACQUIREDTitle:R3QPIEgressCreditOccupancy-ADNDRCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x28ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoflinklayercreditsintotheR3(fortransactionsacrosstheBGF)acquiredeachcycle.
FlowControlFIFOforNDRmessagesonAD.
TxR_AD_NDR_CREDIT_OCCUPANCYTitle:R3QPIEgressCreditOccupancy-ADNDRCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x24ExtraSelectBit:YMax.
Inc/Cyc:.
8,RegisterRestrictions:0-3Definition:OccupancyeventthattracksthenumberoflinklayercreditsintotheR3(fortransac-tionsacrosstheBGF)availableineachcycle.
FlowControlFIFOforNDRmessagesonAD.
Table2-161.
UnitMasksforTxR_AD_HOM_CREDIT_OCCUPANCYExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1Table2-162.
UnitMasksforTxR_AD_NDR_CREDIT_ACQUIREDExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1Table2-163.
UnitMasksforTxR_AD_NDR_CREDIT_OCCUPANCYExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring160ReferenceNumber:329468-002TxR_AD_SNP_CREDIT_ACQUIREDTitle:R3QPIEgressCreditOccupancy-SNPCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x27ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberoflinklayercreditsintotheR3(fortransactionsacrosstheBGF)acquiredeachcycle.
FlowControlFIFOforSnoopmessagesonAD.
TxR_AD_SNP_CREDIT_OCCUPANCYTitle:R3QPIEgressCreditOccupancy-ADSNPCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x23ExtraSelectBit:YMax.
Inc/Cyc:.
28,RegisterRestrictions:0-3Definition:OccupancyeventthattracksthenumberoflinklayercreditsintotheR3(fortransac-tionsacrosstheBGF)availableineachcycle.
FlowControlFIFOfroSnoopmessagesonAD.
TxR_AK_NDR_CREDIT_ACQUIREDTitle:R3QPIEgressCreditOccupancy-AKNDRCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x29ExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcreditsintotheR3(fortransactionsacrosstheBGF)acquiredeachcycle.
LocalNDRmessageclasstoAKEgress.
TxR_AK_NDR_CREDIT_OCCUPANCYTitle:R3QPIEgressCreditOccupancy-AKNDRCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x25ExtraSelectBit:YMax.
Inc/Cyc:.
6,RegisterRestrictions:0-3Definition:OccupancyeventthattracksthenumberofcreditsintotheR3(fortransactionsacrosstheBGF)availableineachcycle.
LocalNDRmessageclasstoAKEgress.
Table2-164.
UnitMasksforTxR_AD_SNP_CREDIT_ACQUIREDExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1Table2-165.
UnitMasksforTxR_AD_SNP_CREDIT_OCCUPANCYExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1ReferenceNumber:329468-002161UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoringTxR_BL_DRS_CREDIT_ACQUIREDTitle:R3QPIEgressCreditOccupancy-DRSCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x2aExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcreditsintotheR3(fortransactionsacrosstheBGF)acquiredeachcycle.
DRSmessageclasstoBLEgress.
TxR_BL_DRS_CREDIT_OCCUPANCYTitle:R3QPIEgressCreditOccupancy-BLDRSCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x1fExtraSelectBit:YMax.
Inc/Cyc:.
8,RegisterRestrictions:0-3Definition:OccupancyeventthattracksthenumberofcreditsintotheR3(fortransactionsacrosstheBGF)availableineachcycle.
DRSmessageclasstoBLEgress.
TxR_BL_NCB_CREDIT_ACQUIREDTitle:R3QPIEgressCreditOccupancy-NCBCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x2bExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcreditsintotheR3(fortransactionsacrosstheBGF)acquiredeachcycle.
NCBmessageclasstoBLEgress.
Table2-166.
UnitMasksforTxR_BL_DRS_CREDIT_ACQUIREDExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1VN_SHRb00000100forSharedVNTable2-167.
UnitMasksforTxR_BL_DRS_CREDIT_OCCUPANCYExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1VN_SHRb00000100forSharedVNTable2-168.
UnitMasksforTxR_BL_NCB_CREDIT_ACQUIREDExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1UncorePerformanceMonitoringIntelQPILinkLayerPerformanceMonitoring162ReferenceNumber:329468-002TxR_BL_NCB_CREDIT_OCCUPANCYTitle:R3QPIEgressCreditOccupancy-BLNCBCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x20ExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:OccupancyeventthattracksthenumberofcreditsintotheR3(fortransactionsacrosstheBGF)availableineachcycle.
NCBmessageclasstoBLEgress.
TxR_BL_NCS_CREDIT_ACQUIREDTitle:R3QPIEgressCreditOccupancy-NCSCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x2cExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofcreditsintotheR3(fortransactionsacrosstheBGF)acquiredeachcycle.
NCSmessageclasstoBLEgress.
TxR_BL_NCS_CREDIT_OCCUPANCYTitle:R3QPIEgressCreditOccupancy-BLNCSCategory:R3QPI_EGRESS_CREDITSEventsEventCode:0x21ExtraSelectBit:YMax.
Inc/Cyc:.
2,RegisterRestrictions:0-3Definition:OccupancyeventthattracksthenumberofcreditsintotheR3(fortransactionsacrosstheBGF)availableineachcycle.
NCSmessageclasstoBLEgress.
Table2-169.
UnitMasksforTxR_BL_NCB_CREDIT_OCCUPANCYExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1Table2-170.
UnitMasksforTxR_BL_NCS_CREDIT_ACQUIREDExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1Table2-171.
UnitMasksforTxR_BL_NCS_CREDIT_OCCUPANCYExtensionumask[15:8]DescriptionVN0b00000001forVN0VN1b00000010forVN1ReferenceNumber:329468-002163UncorePerformanceMonitoringR2PCIePerformanceMonitoringVNA_CREDIT_RETURNSTitle:VNACreditsReturnedCategory:VNA_CREDIT_RETURNEventsEventCode:0x1cExtraSelectBit:YMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:NumberofVNAcreditsreturned.
VNA_CREDIT_RETURN_OCCUPANCYTitle:VNACreditsPendingReturn-OccupancyCategory:VNA_CREDIT_RETURNEventsEventCode:0x1bExtraSelectBit:YMax.
Inc/Cyc:.
128,RegisterRestrictions:0-3Definition:NumberofVNAcreditsintheRxsidethatarewaitingtobereturnedbackacrossthelink.
2.
9R2PCIEPERFORMANCEMONITORING2.
9.
1OverviewoftheR2PCIeBoxR2PCIerepresentstheinterfacebetweentheRingandIIOtrafficto/fromPCIe.
2.
9.
2R2PCIePerformanceMonitoringOverviewTheR2PCIeBoxsupportseventmonitoringthroughfour44bwidecounters(R2_PCI_PMON_CTR/CTL{3:0}).
EachofthesefourcounterscanbeprogrammedtocountalmostanyR2PCIeevent(seeNOTEforexceptions).
theR2PCIecounterscanincrementbyamaximumof5bpercycle.
Forinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerformanceMonitoringControl".
NOTEOnlycounter0canbeusedfortrackingoccupancyevents.
Onlycounters2&3canbeusedforringutilizationevents.
2.
9.
2.
1R2PCIePMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)IfanoverflowisdetectedfromanR2PCIeperformancecounterenabledtocommunicateitsoverflow(R2_PCI_PMON_CTL.
ov_enissetto1),theoverflowbitissetattheboxlevel(R2_PCI_PMON_BOX_STATUS.
ov)andanoverflowmessageissenttotheUBox.
WhentheUBoxreceivestheoverflowsignal,U_MSR_PMON_GLOBAL_STATUS.
ov_rpisset(seeTable2-3,"U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitions")andaPMIcanbegenerated.
Onceafreezehasoccurred,inordertoseeanewfreeze,theoverflowfieldresponsibleforthefreeze,mustbeclearedbysettingthecorrespondingbitinR2_PCI_PMON_BOX_STATUS.
ovandU_MSR_PMON_GLOBAL_STATU.
ov_rp.
Assumingallthecountershavebeenlocallyenabled(.
enbitindataregistersmeanttomonitorevents)andtheoverflowbit(s)hasbeencleared,theR2PCIeLinkispreparedforanewsampleinterval.
Oncetheglobalcontrolshavebeenre-enabled(Section2.
1.
4,"EnablingaNewSampleIntervalfromFrozenCounters"),countingwillresume.
UncorePerformanceMonitoringR2PCIePerformanceMonitoring164ReferenceNumber:329468-0022.
9.
3R2PCIePerformanceMonitorsTable2-172.
R2PCIePerformanceMonitoringRegisters2.
9.
3.
1R2PCIeBoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsintheR2PCIeBox.
InthecaseoftheR2PCIe,theR2_PCI_PMON_BOX_CTLregisterprovidestheabilitytomanuallyfreezethecountersinthebox(.
frz)andresetthegenericstate(.
rst_ctrsand.
rst_ctrl).
IfanoverflowisdetectedfromoneoftheR2PCIePMONregisters,thecorrespondingbitintheR2_PCI_PMON_BOX_STATUS.
ovfieldwillbeset.
Toresettheseoverflowbits,ausermustwriteavalueof'1'tothem(whichwillclearthebits).
Table2-173.
R2_PCI_PMON_BOX_CTLRegister–FieldDefinitionsURegisterNamePCICFGAddressSize(bits)DescriptionPCICFGBaseAddressDev:FuncR2PCIePMONRegistersD19:F1Box-LevelControl/StatusR2_PCI_PMON_BOX_STATUSF832R2PCIePMONBox-WideStatusR2_PCI_PMON_BOX_CTLF432R2PCIePMONBox-WideControlGenericCounterControlR2_PCI_PMON_CTL3E432R2PCIePMONControlforCounter3R2_PCI_PMON_CTL2E032R2PCIePMONControlforCounter2R2_PCI_PMON_CTL1DC32R2PCIePMONControlforCounter1R2_PCI_PMON_CTL0D832R2PCIePMONControlforCounter0GenericCountersR2_PCI_PMON_CTR3BC+B832x2R2PCIePMONCounter3R2_PCI_PMON_CTR2B4+B032x2R2PCIePMONCounter2R2_PCI_PMON_CTR1AC+A832x2R2PCIePMONCounter1R2_PCI_PMON_CTR0A4+A032x2R2PCIePMONCounter0FieldBitsAttrHWResetValDescriptionig31:9RV0Ignoredfrz8WO0Freeze.
Ifsetto1thecountersinthisboxwillbefrozen.
ig7:2RV0Ignoredrst_ctrs1WO0ResetCounters.
Whensetto1,theCounterRegisterswillberesetto0.
rst_ctrl0WO0ResetControl.
Whensetto1,theCounterControlRegisterswillberesetto0.
ReferenceNumber:329468-002165UncorePerformanceMonitoringR2PCIePerformanceMonitoringTable2-174.
R2_PCI_PMON_BOX_STATUSRegister–FieldDefinitions2.
9.
3.
2R2PCIePMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutoftheR2PCIeperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst,.
ov_en).
Table2-175.
R2_PCI_PMON_CTL{3-0}Register–FieldDefinitionsTheR2PCIeperformancemonitordataregistersare44-bitwide.
Acounteroverflowoccurswhenacarryoutfrombit43isdetected.
SoftwarecanforcealluncorecountingtofreezeafterNeventsbypreloadingamonitorwithacountvalueof244-NandsettingthecontrolregistertosendanoverflowmessagetotheUBox(Section2.
1.
1.
1,"FreezingonCounterOverflow").
Duringtheintervaloftimebetweenoverflowandglobaldisable,thecountervaluewillwrapandcontinuetocollectevents.
Ifaccessible,softwarecancontinuouslyreadthedataregisterswithoutdisablingeventcollection.
FieldBitsAttrHWResetValDescriptionig31:4RV0Ignoredov3:0RW1C0IfanoverflowisdetectedfromthecorrespondingR2_PCI_PMON_CTRregister,it'soverflowbitwillbeset.
NOTE:Writeof'1'willclearthebit.
FieldBitsAttrHWResetValDescriptionthresh31:24RW-V0Thresholdusedincountercomparison.
rsv23RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
en22RW-V0LocalCounterEnable.
rsv21RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov_en20RW-V0Whenthisbitisassertedandthecorrespondingcounteroverflows,itsoverflowbitissetinthelocalstatusregister(R2_PCI_PMON_BOX_STATUS.
ov)andanoverflowissentonthemessagechanneltotheUBox.
WhentheoverflowisreceivedbytheUBox,thebitcorrespondingtothisR2willbesetinU_MSR_PMON_GLOBAL_STATUS.
ov_rp.
ig19RV0Ignorededge_det18RW-V0Whensetto1,ratherthanmeasuringtheeventineachcycleitisactive,thecorrespondingcounterwillincrementwhena0to1transition(i.
e.
risingedge)isdetected.
When0,thecounterwillincrementineachcyclethattheeventisasserted.
NOTE:.
edge_detisinseriesfollowing.
thresh.
Duetothis,the.
threshfieldmustbesettoanon-0value.
Foreventsthatincrementbynomorethan1percycle,set.
threshto0x1.
rst17WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
rsv16RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
umask15:8RW-V0Selectsubeventstobecountedwithintheselectedevent.
ev_sel7:0RW-V0Selecteventtobecounted.
UncorePerformanceMonitoringR2PCIePerformanceMonitoring166ReferenceNumber:329468-002Table2-176.
R2_PCI_PMON_CTR{3-0}Register–FieldDefinitions2.
9.
4R2PCIePerformanceMonitoringEvents2.
9.
4.
1AnOverviewR2PCIeprovideseventstotrackinformationrelatedtoallthetrafficpassingthroughit'sboundaries.
IIOcredittracking-creditsrejected,acquiredandusedallbrokendownbymessageClass.
2.
9.
5R2PCIeBoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasuredR2PCIeBoxevents.
2.
9.
6R2PCIeBoxCommonMetrics(DerivedEvents)ThefollowingtablesummarizesmetricscommonlycalculatedfromR2PCIeBoxevents.
FieldBitsAttrHWResetValDescriptionig63:44RV0Ignoredevent_count43:0RW-V044-bitperformanceeventcounterSymbolNameEventCodeCtrsMaxInc/CycDescriptionCLOCKTICKS0x010-31NumberofuclksindomainRING_AD_USED0x070-31R2ADRinginUseRING_AK_USED0x080-31R2AKRinginUseRING_BL_USED0x090-31R2BLRinginUseRING_IV_USED0x0a0-31R2IVRinginUseRxR_CYCLES_NE0x100-11IngressCyclesNotEmptyRxR_INSERTS0x110-11IngressAllocationsRxR_AK_BOUNCES0x1201AKIngressBouncedRxR_OCCUPANCY0x13024IngressOccupancyAccumulatorTxR_CYCLES_NE0x2301EgressCyclesNotEmptyTxR_CYCLES_FULL0x2501EgressCyclesFullTxR_NACK_CW0x260-11EgressCWNACKTxR_NACK_CCW0x280-11EgressCCWNACKSymbolName:DefinitionEquationCYC_USED_DNEVEN:CyclesUsedintheDowndirection,EvenpolarityRING_BL_USED.
CCW_EVEN/SAMPLE_INTERVALCYC_USED_DNODD:CyclesUsedintheDowndirection,OddpolarityRING_BL_USED.
CCW_ODD/SAMPLE_INTERVALReferenceNumber:329468-002167UncorePerformanceMonitoringR2PCIePerformanceMonitoring2.
9.
7R2PCIeBoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsfortheR2PCIeBox.
CLOCKTICKSTitle:NumberofuclksindomainCategory:UCLKEventsEventCode:0x01Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofuclksintheR2PCIeuclkdomain.
ThiscouldbeslightlydifferentthanthecountintheUboxbecauseofenable/freezedelays.
However,becausetheR2PCIeisclosetotheUbox,theygenerallyshouldnotdivergebymorethanahandfulofcycles.
RING_AD_USEDTitle:R2ADRinginUseCategory:RINGEventsEventCode:0x07Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheADringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10C)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
CYC_USED_UPEVEN:CyclesUsedintheUpdirection,EvenpolarityRING_BL_USED.
CW_EVEN/SAMPLE_INTERVALCYC_USED_UPODD:CyclesUsedintheUpdirection,OddpolarityRING_BL_USED.
CW_ODD/SAMPLE_INTERVALRING_THRU_DNEVEN_BYTES:RingthroughputintheDowndirection,EvenpolarityinBytesRING_BL_USED.
CCW_EVEN*32RING_THRU_DNODD_BYTES:RingthroughputintheDowndirection,OddpolarityinBytesRING_BL_USED.
CCW_ODD*32RING_THRU_UPEVEN_BYTES:RingthroughputintheUpdirection,EvenpolarityinBytesRING_BL_USED.
CW_EVEN*32RING_THRU_UPODD_BYTES:RingthroughputintheUpdirection,OddpolarityinBytesRING_BL_USED.
CW_ODD*32Table2-177.
UnitMasksforRING_AD_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
SymbolName:DefinitionEquationUncorePerformanceMonitoringR2PCIePerformanceMonitoring168ReferenceNumber:329468-002RING_AK_USEDTitle:R2AKRinginUseCategory:RINGEventsEventCode:0x08Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheAKringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10C)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
CW_VR1_EVENbxxx1xxxxClockwiseandEvenonVRing1FiltersfortheClockwiseandEvenringpolarityonVirtualRing1.
CW_VR1_ODDbxx1xxxxxClockwiseandOddonVRing1FiltersfortheClockwiseandOddringpolarityonVirtualRing1.
CWb00110011ClockwiseCCW_VR1_EVENbx1xxxxxxCounterclockwiseandEvenonVRing1FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing1.
CCW_VR1_ODDb1xxxxxxxCounterclockwiseandOddonVRing1FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing1.
CCWb11001100CounterclockwiseTable2-178.
UnitMasksforRING_AK_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
CW_VR1_EVENbxxx1xxxxClockwiseandEvenonVRing1FiltersfortheClockwiseandEvenringpolarityonVirtualRing1.
CW_VR1_ODDbxx1xxxxxClockwiseandOddonVRing1FiltersfortheClockwiseandOddringpolarityonVirtualRing1.
CWb00110011ClockwiseCCW_VR1_EVENbx1xxxxxxCounterclockwiseandEvenonVRing1FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing1.
Table2-177.
UnitMasksforRING_AD_USEDExtensionumask[15:8]DescriptionReferenceNumber:329468-002169UncorePerformanceMonitoringR2PCIePerformanceMonitoringRING_BL_USEDTitle:R2BLRinginUseCategory:RINGEventsEventCode:0x09Max.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheBLringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10C)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
RING_IV_USEDTitle:R2IVRinginUseCategory:RINGEventsEventCode:0x0aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-3Definition:CountsthenumberofcyclesthattheIVringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsent,butdoesnotincludewhenpacketsarebeingsunkintotheringstop.
TheIVringisunidirectional.
WhetherUPorDNisCCW_VR1_ODDb1xxxxxxxCounterclockwiseandOddonVRing1FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing1.
CCWb11001100CounterclockwiseTable2-179.
UnitMasksforRING_BL_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
CW_VR1_EVENbxxx1xxxxClockwiseandEvenonVRing1FiltersfortheClockwiseandEvenringpolarityonVirtualRing1.
CW_VR1_ODDbxx1xxxxxClockwiseandOddonVRing1FiltersfortheClockwiseandOddringpolarityonVirtualRing1.
CWb00110011ClockwiseCCW_VR1_EVENbx1xxxxxxCounterclockwiseandEvenonVRing1FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing1.
CCW_VR1_ODDb1xxxxxxxCounterclockwiseandOddonVRing1FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing1.
CCWb11001100CounterclockwiseTable2-178.
UnitMasksforRING_AK_USEDExtensionumask[15:8]DescriptionUncorePerformanceMonitoringR2PCIePerformanceMonitoring170ReferenceNumber:329468-002usedisdependentonthesystemprogramming.
Therefore,oneshouldgenerallysetboththeUPandDNbitsforagivenpolarity(orboth)atagiventime.
RxR_AK_BOUNCESTitle:AKIngressBouncedCategory:INGRESSEventsEventCode:0x12Max.
Inc/Cyc:.
1,RegisterRestrictions:0Definition:CountsthenumberoftimeswhenarequestdestinedfortheAKingressbounced.
RxR_CYCLES_NETitle:IngressCyclesNotEmptyCategory:INGRESSEventsEventCode:0x10Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofcycleswhentheR2PCIeIngressisnotempty.
ThistracksoneofthethreeringsthatareusedbytheR2PCIeagent.
ThiscanbeusedinconjunctionwiththeR2PCIeIngressOccupancyAccumulatoreventinordertocalculateaveragequeueoccupancy.
Multipleingressbufferscanbetrackedatagiventimeusingmultiplecounters.
RxR_INSERTSTitle:IngressAllocationsCategory:INGRESSEventsEventCode:0x11Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofallocationsintotheR2PCIeIngress.
ThistracksoneofthethreeringsthatareusedbytheR2PCIeagent.
ThiscanbeusedinconjunctionwiththeR2PCIeIngressTable2-180.
UnitMasksforRING_IV_USEDExtensionumask[15:8]DescriptionCWb00110011ClockwiseFiltersforClockwisepolarityCCWb11001100CounterclockwiseFiltersforCounterclockwisepolarityANYb11111111AnyFiltersanypolarityTable2-181.
UnitMasksforRxR_AK_BOUNCESExtensionumask[15:8]DescriptionCWbxxxxxxx1ClockwiseCCWbxxxxxx1xCounterclockwiseTable2-182.
UnitMasksforRxR_CYCLES_NEExtensionumask[15:8]DescriptionNCBbxxx1xxxxNCBNCBIngressQueueNCSbxx1xxxxxNCSNCSIngressQueueReferenceNumber:329468-002171UncorePerformanceMonitoringR2PCIePerformanceMonitoringOccupancyAccumulatoreventinordertocalculateaveragequeuelatency.
Multipleingressbufferscanbetrackedatagiventimeusingmultiplecounters.
RxR_OCCUPANCYTitle:IngressOccupancyAccumulatorCategory:INGRESSEventsEventCode:0x13Max.
Inc/Cyc:.
24,RegisterRestrictions:0Definition:AccumulatestheoccupancyofagivenR2PCIeIngressqueueineachcycles.
ThistracksoneofthethreeringIngressbuffers.
ThiscanbeusedwiththeR2PCIeIngressNotEmptyeventtocalculateaverageoccupancyortheR2PCIeIngressAllocationseventinordertocalculateaveragequeuinglatency.
TxR_CYCLES_FULLTitle:EgressCyclesFullCategory:EGRESSEventsEventCode:0x25Max.
Inc/Cyc:.
1,RegisterRestrictions:0Definition:CountsthenumberofcycleswhentheR2PCIeEgressbufferisfull.
TxR_CYCLES_NETitle:EgressCyclesNotEmptyCategory:EGRESSEventsEventCode:0x23Max.
Inc/Cyc:.
1,RegisterRestrictions:0Definition:CountsthenumberofcycleswhentheR2PCIeEgressisnotempty.
ThistracksoneofthethreeringsthatareusedbytheR2PCIeagent.
ThiscanbeusedinconjunctionwiththeR2PCIeEgressOccupancyAccumulatoreventinordertocalculateaveragequeueoccupancy.
OnlyTable2-183.
UnitMasksforRxR_INSERTSExtensionumask[15:8]DescriptionNCBbxxx1xxxxNCBNCBIngressQueueNCSbxx1xxxxxNCSNCSIngressQueueTable2-184.
UnitMasksforRxR_OCCUPANCYExtensionumask[15:8]DescriptionDRSb00001000DRSDRSIngressQueueTable2-185.
UnitMasksforTxR_CYCLES_FULLExtensionumask[15:8]DescriptionADbxxxxxxx1ADADEgressQueueAKbxxxxxx1xAKAKEgressQueueBLbxxxxx1xxBLBLEgressQueueUncorePerformanceMonitoringR2PCIePerformanceMonitoring172ReferenceNumber:329468-002asingleEgressqueuecanbetrackedatanygiventime.
Itisnotpossibletofilterbasedondirectionorpolarity.
TxR_NACK_CCWTitle:EgressCCWNACKCategory:EGRESSEventsEventCode:0x28Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:TxR_NACK_CWTitle:EgressCWNACKCategory:EGRESSEventsEventCode:0x26Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:Table2-186.
UnitMasksforTxR_CYCLES_NEExtensionumask[15:8]DescriptionADbxxxxxxx1ADADEgressQueueAKbxxxxxx1xAKAKEgressQueueBLbxxxxx1xxBLBLEgressQueueTable2-187.
UnitMasksforTxR_NACK_CCWExtensionumask[15:8]DescriptionADbxxxxxxx1ADCCWADCounterClockwiseEgressQueueAKbxxxxxx1xAKCCWAKCounterClockwiseEgressQueueBLbxxxxx1xxBLCCWBLCounterClockwiseEgressQueueTable2-188.
UnitMasksforTxR_NACK_CWExtensionumask[15:8]DescriptionADbxxxxxxx1ADCWADClockwiseEgressQueueAKbxxxxxx1xAKCWAKClockwiseEgressQueueBLbxxxxx1xxBLCWBLClockwiseEgressQueueReferenceNumber:329468-002173UncorePerformanceMonitoringR3QPIPerformanceMonitoring2.
10R3QPIPERFORMANCEMONITORING2.
10.
1OverviewoftheR3QPIBoxR3QPIistheinterfacebetweentheIntelQPILinkLayer,whichpacketizesrequests,andtheRing.
R3QPIistheinterfacebetweentheringandtheIntelQPILinkLayer.
ItisresponsiblefortranslatingbetweenringprotocolpacketsandflitsthatareusedfortransmittingdataacrosstheIntelQPIinter-face.
ItperformscreditcheckingbetweenthelocalIntelQPILL,theremoteIntelQPILLandotheragentsonthelocalring.
TheR3QPIagentprovidesseveralfunctions:InterfacebetweenRingandIntelQPI:OneoftheprimaryattributesoftheringisitsabilitytoconveyIntelQPIsemanticswithnotranslation.
Forexample,thisarchitectureenablesinitiatorstocommunicatewithalocalHomeagentinexactlythesamewayasaremoteHomeagentonanothersocket.
Withthisphilosophy,theR3QPIblockisleananddoesverylittlewithregardstotheIntelQPIprotocolasidefrommirrortherequestbetweentheringandtheIntelQPIinterface.
IntelQPIrouting:Inordertooptimizelayoutandlatency,bothfullwidthIntelQPIinterfacessharethesameringstop.
Therefore,aIntelQPIpacketmightbereceivedononeinterfaceandsimplyforwardedalongontheotherIntelQPIinterface.
TheR3QPIhassufficientroutinglogictodetermineifarequest,snooporresponseistargetingthelocalsocketorifitshouldbeforwardedalongtotheotherinterface.
ThisroutingremainsisolatedtoR3QPIanddoesnotimpedetrafficontheRing.
IntelQPIHomeSnoopProtocol(withearlysnoopoptimizationsforDP):TheR3QPIagentimplementsalatency-reducingoptimizationfordualsocketswhichissuessnoopswithinthesocketforincomingrequestsaswellasalatency-reducingoptimizationtoreturndatasatisfyingDirect2Core(D2C)requests.
2.
10.
2R3QPIPerformanceMonitoringOverviewEachR3QPILinksupportseventmonitoringthroughthree44bwidecounters(R3_Ly_PCI_PMON_CTR/CTL{2:0}).
EachofthesethreecounterscanbeprogrammedtocountalmostanyR3QPIevent(seeNOTEforexceptions).
theR3QPIcounterscanincrementbyamaximumof8bpercycle.
Forinformationonhowtosetupamonitoringsession,refertoSection2.
1,"UncorePer-SocketPerformanceMonitoringControl".
NOTEOnlycounter0canbeusedfortrackingoccupancyevents.
Onlycounter2canbeusedtocountringevents.
2.
10.
2.
1R3QPIPMONRegisters-OnOverflowandtheConsequences(PMI/Freeze)IfanoverflowisdetectedfromanR3QPIperformancecounterenabledtocommunicateitsoverflow(R3_Ly_PCI_PMON_CTL.
ov_enissetto1),theoverflowbitissetattheboxlevel(R3_Ly_PCI_PMON_BOX_STATUS.
ov)andanoverflowmessageissenttotheUBoxWhentheUBoxreceivestheoverflowsignal,U_MSR_PMON_GLOBAL_STATUS.
ov_rqisset(seeTable2-3,"U_MSR_PMON_GLOBAL_STATUSRegister–FieldDefinitions")andaPMIcanbegenerated.
UncorePerformanceMonitoringR3QPIPerformanceMonitoring174ReferenceNumber:329468-002Onceafreezehasoccurred,inordertoseeanewfreeze,theoverflowfieldresponsibleforthefreeze,mustbeclearedbysettingthecorrespondingbitinR3_Ly_PCI_PMON_BOX_STATUS.
ovandU_MSR_PMON_GLOBAL_STATU.
ov_rq.
Assumingallthecountershavebeenlocallyenabled(.
enbitindataregistersmeanttomonitorevents)andtheoverflowbit(s)hasbeencleared,theR3QPILinkispreparedforanewsampleinterval.
Oncetheglobalcontrolshavebeenre-enabled(Section2.
1.
4,"EnablingaNewSampleIntervalfromFrozenCounters"),countingwillresume.
2.
10.
3R3QPIPerformanceMonitorsTable2-189.
R3QPIPerformanceMonitoringRegisters2.
10.
3.
1R3QPIBoxLevelPMONStateThefollowingregistersrepresentthestategoverningallbox-levelPMUsforeachLinkoftheR3QPIBox.
InthecaseoftheR3QPILinks,theR3_Ly_PCI_PMON_BOX_CTLregisterprovidestheabilitytomanu-allyfreezethecountersinthebox(.
frz)andresetthegenericstate(.
rst_ctrsand.
rst_ctrl).
IfanoverflowisdetectedfromoneoftheR3QPIPMONregisters,thecorrespondingbitintheR3_Ly_PCI_PMON_BOX_STATUS.
ovfieldwillbeset.
Toresettheseoverflowbits,ausermustwriteavalueof'1'tothem(whichwillclearthebits).
RegisterNamePCICFGAddressSize(bits)DescriptionPCICFGBaseAddressDev:FuncR3QPI0Link0PMONRegistersD19:F5R3QPI0Link1PMONRegistersD19:F6R3QPI1Link2PMONRegistersD18:F5Box-LevelControl/StatusR3_Ly_PCI_PMON_BOX_STATUSF832R3QPILinkyPMONBox-WideStatusR3_Ly_PCI_PMON_BOX_CTLF432R3QPILinkyPMONBox-WideControlGenericCounterControlR3_Ly_PCI_PMON_CTL2E032R3QPILinkyPMONControlforCounter2R3_Ly_PCI_PMON_CTL1DC32R3QPILinkyPMONControlforCounter1R3_Ly_PCI_PMON_CTL0D832R3QPILinkyPMONControlforCounter0GenericCountersR3_Ly_PCI_PMON_CTR2B4+B032x2R3QPILinkyPMONCounter2R3_Ly_PCI_PMON_CTR1AC+A832x2R3QPILinkyPMONCounter1R3_Ly_PCI_PMON_CTR0A4+A032x2R3QPILinkyPMONCounter0ReferenceNumber:329468-002175UncorePerformanceMonitoringR3QPIPerformanceMonitoringTable2-190.
R3_Ly_PCI_PMON_BOX_CTLRegister–FieldDefinitionsUTable2-191.
R3_Ly_PCI_PMON_BOX_STATUSRegister–FieldDefinitions2.
10.
3.
2R3QPIPMONstate-Counter/ControlPairsThefollowingtabledefinesthelayoutoftheR3QPIperformancemonitorcontrolregisters.
Themaintaskoftheseconfigurationregistersistoselecttheeventtobemonitoredbytheirrespectivedatacounter(.
ev_sel,.
umask).
Additionalcontrolbitsareprovidedtoshapetheincomingevents(e.
g.
.
edge_det,.
thresh)aswellasprovideadditionalfunctionalityformonitoringsoftware(.
rst,.
ov_en).
FieldBitsAttrHWResetValDescriptionig31:9RV0Ignoredfrz8WO0Freeze.
Ifsetto1thecountersinthisboxwillbefrozen.
ig7:2RV0Ignoredrst_ctrs1WO0ResetCounters.
Whensetto1,theCounterRegisterswillberesetto0.
rst_ctrl0WO0ResetControl.
Whensetto1,theCounterControlRegisterswillberesetto0.
FieldBitsAttrHWResetValDescriptionig31:4RV0Ignoredrsv3RV0Reserved;SWmustwriteto0elsebehaviorisundefined.
ov2:0RW1C0IfanoverflowisdetectedfromthecorrespondingR3_Ly_PCI_PMON_CTRregister,it'soverflowbitwillbeset.
NOTE:Writeof'1'willclearthebit.
UncorePerformanceMonitoringR3QPIPerformanceMonitoring176ReferenceNumber:329468-002Table2-192.
R3_Ly_PCI_PMON_CTL{2-0}Register–FieldDefinitionsTheR3QPIperformancemonitordataregistersare44bwide.
Acounteroverflowoccurswhenacarryoutfrombit43isdetected.
SoftwarecanforcealluncorecountingtofreezeafterNeventsbypreloadingamonitorwithacountvalueof244-NandsettingthecontrolregistertosendanoverflowmessagetotheUBox(Section2.
1.
1.
1,"FreezingonCounterOverflow").
Duringtheintervaloftimebetweenoverflowandglobaldisable,thecountervaluewillwrapandcontinuetocollectevents.
Ifaccessible,softwarecancontinuouslyreadthedataregisterswithoutdisablingeventcollection.
Table2-193.
R3_Ly_PCI_PMON_CTR{2-0}Register–FieldDefinitions2.
10.
4R3QPIPerformanceMonitoringEvents2.
10.
4.
1AnOverviewR3QPIprovideseventstotrackinformationrelatedtoallthetrafficpassingthroughit'sboundaries.
VN/IIOcredittracking-inadditiontotrackingtheoccupancyofthefullVNAqueue,R3QPIprovidesagreatdealofadditionalinformation:creditsrejected,acquiredandusedoftenbrokendownbyMessageClass.
FieldBitsAttrHWResetValDescriptionthresh31:24RW-V0Thresholdusedincountercomparison.
rsv23RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
en22RW-V0LocalCounterEnable.
rsv21RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
ov_en20RW-V0Whenthisbitisassertedandthecorrespondingcounteroverflows,itsoverflowbitissetinthelocalstatusregister(R3_Ly_PCI_PMON_BOX_STATUS.
ov)andanoverflowissentonthemessagechanneltotheUBox.
WhentheoverflowisreceivedbytheUBox,thebitcorrespondingtothisR3willbesetinU_MSR_PMON_GLOBAL_STATUS.
ov_r3{1,0}.
ig19RV0Ignorededge_det18RW-V0Whensetto1,ratherthanmeasuringtheeventineachcycleitisactive,thecorrespondingcounterwillincrementwhena0to1transition(i.
e.
risingedge)isdetected.
When0,thecounterwillincrementineachcyclethattheeventisasserted.
NOTE:.
edge_detisinseriesfollowing.
thresh.
Duetothis,the.
threshfieldmustbesettoanon-0value.
Foreventsthatincrementbynomorethan1percycle,set.
threshto0x1.
rst17WO0Whensetto1,thecorrespondingcounterwillbeclearedto0.
rsv16RV0Reserved.
SWmustwriteto0elsebehaviorisundefined.
umask15:8RW-V0Selectsubeventstobecountedwithintheselectedevent.
ev_sel7:0RW-V0Selecteventtobecounted.
FieldBitsAttrHWResetValDescriptionig63:44RV0Ignoredevent_count43:0RW-V044-bitperformanceeventcounterReferenceNumber:329468-002177UncorePerformanceMonitoringR3QPIPerformanceMonitoring2.
10.
5R3QPIBoxEventsOrderedByCodeThefollowingtablesummarizesthedirectlymeasuredR3QPIBoxevents.
2.
10.
6R3QPIBoxCommonMetrics(DerivedEvents)ThefollowingtablesummarizesmetricscommonlycalculatedfromR3QPIBoxevents.
2.
10.
7R3QPIBoxPerformanceMonitorEventListThesectionenumeratesperformancemonitoringeventsfortheR3QPIBox.
SymbolNameEventCodeCtrsMaxInc/CycDescriptionCLOCKTICKS0x010-20NumberofuclksindomainRING_AD_USED0x070-21R3ADRinginUseRING_AK_USED0x080-21R3AKRinginUseRING_BL_USED0x090-21R3BLRinginUseRING_IV_USED0x0a0-21R2IVRinginUseRxR_CYCLES_NE0x100-11IngressCyclesNotEmptyRxR_INSERTS0x110-11IngressAllocationsRxR_AD_BYPASSED0x120-11ADIngressBypassedRxR_OCCUPANCY0x13032IngressOccupancyAccumulatorTxR_CYCLES_NE0x230-11EgressCyclesNotEmptyTxR_CYCLES_FULL0x250-11EgressCyclesFullTxR_NACK_CW0x260-11EgressNACKTxR_NACK_CCW0x280-11EgressNACKQPI0_AD_CREDITS_EMPTY0x290-11QPI0ADCreditsEmptyQPI1_AD_CREDITS_EMPTY0x2a0-11QPI1ADCreditsEmptyC_LO_AD_CREDITS_EMPTY0x2b0-11CBoxADCreditsEmptyC_HI_AD_CREDITS_EMPTY0x2c0-11CBoxADCreditsEmptyQPI0_BL_CREDITS_EMPTY0x2d0-11QPI0BLCreditsEmptyQPI1_BL_CREDITS_EMPTY0x2e0-11QPI1BLCreditsEmptyHA_R2_BL_CREDITS_EMPTY0x2f0-11HA/R2ADCreditsEmptyVNA_CREDIT_CYCLES_OUT0x310-11CycleswithnoVNAcreditsavailableVNA_CREDIT_CYCLES_USED0x320-11Cycleswith1ormoreVNAcreditsinuseVNA_CREDITS_ACQUIRED0x330-14VNAcreditAcquisitionsVNA_CREDITS_REJECT0x340-11VNACreditRejectVN0_CREDITS_USED0x360-11VN0CreditUsedVN0_CREDITS_REJECT0x370-11VN0CreditAcquisitionFailedonDRSVN1_CREDITS_USED0x380-11VN1CreditUsedVN1_CREDITS_REJECT0x390-11VN1CreditAcquisitionFailedonDRSUncorePerformanceMonitoringR3QPIPerformanceMonitoring178ReferenceNumber:329468-002CLOCKTICKSTitle:NumberofuclksindomainCategory:UCLKEventsEventCode:0x01Max.
Inc/Cyc:.
0,RegisterRestrictions:0-2Definition:CountsthenumberofuclksintheQPIuclkdomain.
ThiscouldbeslightlydifferentthanthecountintheUboxbecauseofenable/freezedelays.
However,becausetheQPIAgentisclosetotheUbox,theygenerallyshouldnotdivergebymorethanahandfulofcycles.
C_HI_AD_CREDITS_EMPTYTitle:CBoxADCreditsEmptyCategory:EGRESSCreditEventsEventCode:0x2cMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NocreditsavailabletosendtoCboxontheADRing(covershigherCBoxes)C_LO_AD_CREDITS_EMPTYTitle:CBoxADCreditsEmptyCategory:EGRESSCreditEventsEventCode:0x2bMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NocreditsavailabletosendtoCboxontheADRing(coverslowerCBoxes)Table2-194.
UnitMasksforC_HI_AD_CREDITS_EMPTYExtensionumask[15:8]DescriptionCBO8bxxxxxxx1Cbox8CBO9bxxxxxx1xCbox9CBO10bxxxxx1xxCbox10CBO11bxxxx1xxxCbox11CBO12bxxx1xxxxCbox12CBO13bxx1xxxxxCbox13CBO14bx1xxxxxxCbox14&16Table2-195.
UnitMasksforC_LO_AD_CREDITS_EMPTYExtensionumask[15:8]DescriptionCBO0bxxxxxxx1Cbox0CBO1bxxxxxx1xCbox1CBO2bxxxxx1xxCbox2CBO3bxxxx1xxxCbox3CBO4bxxx1xxxxCbox4CBO5bxx1xxxxxCbox5CBO6bx1xxxxxxCbox6CBO7b1xxxxxxxCbox7ReferenceNumber:329468-002179UncorePerformanceMonitoringR3QPIPerformanceMonitoringHA_R2_BL_CREDITS_EMPTYTitle:HA/R2ADCreditsEmptyCategory:EGRESSCreditEventsEventCode:0x2fMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NocreditsavailabletosendtoeitherHAorR2ontheBLRingNOTE:Counter0countslackofcreditstothelessernumberedCboxes(0-8)Counter1countslackofcreditstoCboxtothehighernumberedCBoxes(8-13,15+17,16+18).
QPI0_AD_CREDITS_EMPTYTitle:QPI0ADCreditsEmptyCategory:EGRESSCreditEventsEventCode:0x29Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NocreditsavailabletosendtoQPI0ontheADRingQPI0_BL_CREDITS_EMPTYTitle:QPI0BLCreditsEmptyCategory:EGRESSCreditEventsEventCode:0x2dMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NocreditsavailabletosendtoQPI0ontheBLRingTable2-196.
UnitMasksforHA_R2_BL_CREDITS_EMPTYExtensionumask[15:8]DescriptionHA0bxxxxxxx1HA0HA1bxxxxxx1xHA1R2_NCBbxxxxx1xxR2NCBMessagesR2_NCSbxxxx1xxxR2NCSMessagesTable2-197.
UnitMasksforQPI0_AD_CREDITS_EMPTYExtensionumask[15:8]DescriptionVNAbxxxxxxx1VNAVN0_HOMbxxxxxx1xVN0HOMMessagesVN0_SNPbxxxxx1xxVN0SNPMessagesVN0_NDRbxxxx1xxxVN0NDRMessagesVN1_HOMbxxx1xxxxVN1HOMMessagesVN1_SNPbxx1xxxxxVN1SNPMessagesVN1_NDRbx1xxxxxxVN1NDRMessagesTable2-198.
UnitMasksforQPI0_BL_CREDITS_EMPTYExtensionumask[15:8]DescriptionVNAbxxxxxxx1VNAVN0_HOMbxxxxxx1xVN0HOMMessagesUncorePerformanceMonitoringR3QPIPerformanceMonitoring180ReferenceNumber:329468-002QPI1_AD_CREDITS_EMPTYTitle:QPI1ADCreditsEmptyCategory:EGRESSCreditEventsEventCode:0x2aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NocreditsavailabletosendtoQPI1ontheADRingQPI1_BL_CREDITS_EMPTYTitle:QPI1BLCreditsEmptyCategory:EGRESSCreditEventsEventCode:0x2eMax.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NocreditsavailabletosendtoQPI1ontheBLRingVN0_SNPbxxxxx1xxVN0SNPMessagesVN0_NDRbxxxx1xxxVN0NDRMessagesVN1_HOMbxxx1xxxxVN1HOMMessagesVN1_SNPbxx1xxxxxVN1SNPMessagesVN1_NDRbx1xxxxxxVN1NDRMessagesTable2-199.
UnitMasksforQPI1_AD_CREDITS_EMPTYExtensionumask[15:8]DescriptionVNAbxxxxxxx1VNAVN0_HOMbxxxxxx1xVN0HOMMessagesVN0_SNPbxxxxx1xxVN0SNPMessagesVN0_NDRbxxxx1xxxVN0NDRMessagesVN1_HOMbxxx1xxxxVN1HOMMessagesVN1_SNPbxx1xxxxxVN1SNPMessagesVN1_NDRbx1xxxxxxVN1NDRMessagesTable2-200.
UnitMasksforQPI1_BL_CREDITS_EMPTYExtensionumask[15:8]DescriptionVNAbxxxxxxx1VNAVN0_HOMbxxxxxx1xVN0HOMMessagesVN0_SNPbxxxxx1xxVN0SNPMessagesVN0_NDRbxxxx1xxxVN0NDRMessagesVN1_HOMbxxx1xxxxVN1HOMMessagesVN1_SNPbxx1xxxxxVN1SNPMessagesVN1_NDRbx1xxxxxxVN1NDRMessagesTable2-198.
UnitMasksforQPI0_BL_CREDITS_EMPTYExtensionumask[15:8]DescriptionReferenceNumber:329468-002181UncorePerformanceMonitoringR3QPIPerformanceMonitoringRING_AD_USEDTitle:R3ADRinginUseCategory:RINGEventsEventCode:0x07Max.
Inc/Cyc:.
1,RegisterRestrictions:0-2Definition:CountsthenumberofcyclesthattheADringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10cores)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
RING_AK_USEDTitle:R3AKRinginUseCategory:RINGEventsEventCode:0x08Max.
Inc/Cyc:.
1,RegisterRestrictions:0-2Definition:CountsthenumberofcyclesthattheAKringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10C)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
Table2-201.
UnitMasksforRING_AD_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
CWb00110011ClockwiseCCWb11001100CounterclockwiseTable2-202.
UnitMasksforRING_AK_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
UncorePerformanceMonitoringR3QPIPerformanceMonitoring182ReferenceNumber:329468-002RING_BL_USEDTitle:R3BLRinginUseCategory:RINGEventsEventCode:0x09Max.
Inc/Cyc:.
1,RegisterRestrictions:0-2Definition:CountsthenumberofcyclesthattheBLringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsunk,butdoesnotincludewhenpacketsarebeingsentfromtheringstop.
NOTE:Ona2columnimplementation(e.
g.
10C)CW_EVENisactuallyCW_VR0_EVEN+CW_VR1_EVEN(similarlyforCCW/ODD).
Inanycycle,aringstopcanseeuptoonepacketmovingintheCWdirectionandonepacketmovingintheCCWdirection.
RING_IV_USEDTitle:R2IVRinginUseCategory:RINGEventsEventCode:0x0aMax.
Inc/Cyc:.
1,RegisterRestrictions:0-2Definition:CountsthenumberofcyclesthattheIVringisbeingusedatthisringstop.
Thisincludeswhenpacketsarepassingbyandwhenpacketsarebeingsent,butdoesnotincludewhenpacketsarebeingsunkintotheringstop.
TheIVringisunidirectional.
WhetherUPorDNisusedisdependentonthesystemprogramming.
Therefore,oneshouldgenerallysetboththeUPandDNbitsforagivenpolarity(orboth)atagiventime.
CWb00110011ClockwiseCCWb11001100CounterclockwiseTable2-203.
UnitMasksforRING_BL_USEDExtensionumask[15:8]DescriptionCW_VR0_EVENbxxxxxxx1ClockwiseandEvenonVRing0FiltersfortheClockwiseandEvenringpolarityonVirtualRing0.
CW_VR0_ODDbxxxxxx1xClockwiseandOddonVRing0FiltersfortheClockwiseandOddringpolarityonVirtualRing0.
CCW_VR0_EVENbxxxxx1xxCounterclockwiseandEvenonVRing0FiltersfortheCounterclockwiseandEvenringpolarityonVirtualRing0.
CCW_VR0_ODDbxxxx1xxxCounterclockwiseandOddonVRing0FiltersfortheCounterclockwiseandOddringpolarityonVirtualRing0.
CWb00110011ClockwiseCCWb11001100CounterclockwiseTable2-204.
UnitMasksforRING_IV_USEDExtensionumask[15:8]DescriptionCWb00110011ClockwiseFiltersforClockwisepolarityTable2-202.
UnitMasksforRING_AK_USEDExtensionumask[15:8]DescriptionReferenceNumber:329468-002183UncorePerformanceMonitoringR3QPIPerformanceMonitoringRxR_AD_BYPASSEDTitle:ADIngressBypassedCategory:INGRESSEventsEventCode:0x12Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberoftimeswhentheADIngresswasbypassedandanincomingtransactionwasbypasseddirectlyacrosstheBGFandintotheqfclkdomain.
RxR_CYCLES_NETitle:IngressCyclesNotEmptyCategory:INGRESSEventsEventCode:0x10Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofcycleswhentheQPIIngressisnotempty.
ThistracksoneofthethreeringsthatareusedbytheQPIagent.
ThiscanbeusedinconjunctionwiththeQPIIngressOccupancyAccumulatoreventinordertocalculateaveragequeueoccupancy.
Multipleingressbufferscanbetrackedatagiventimeusingmultiplecounters.
RxR_INSERTSTitle:IngressAllocationsCategory:INGRESSEventsEventCode:0x11Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofallocationsintotheQPIIngress.
ThistracksoneofthethreeringsthatareusedbytheQPIagent.
ThiscanbeusedinconjunctionwiththeQPIIngressOccu-pancyAccumulatoreventinordertocalculateaveragequeuelatency.
Multipleingressbufferscanbetrackedatagiventimeusingmultiplecounters.
CCWb11001100CounterclockwiseFiltersforCounterclockwisepolarityANYb11111111AnyFiltersanypolarityTable2-205.
UnitMasksforRxR_CYCLES_NEExtensionumask[15:8]DescriptionHOMbxxxxxxx1HOMHOMIngressQueueSNPbxxxxxx1xSNPSNPIngressQueueNDRbxxxxx1xxNDRNDRIngressQueueTable2-204.
UnitMasksforRING_IV_USEDExtensionumask[15:8]DescriptionUncorePerformanceMonitoringR3QPIPerformanceMonitoring184ReferenceNumber:329468-002RxR_OCCUPANCYTitle:IngressOccupancyAccumulatorCategory:INGRESSEventsEventCode:0x13Max.
Inc/Cyc:.
32,RegisterRestrictions:0Definition:AccumulatestheoccupancyofagivenQPIIngressqueueineachcycles.
ThistracksoneofthethreeringIngressbuffers.
ThiscanbeusedwiththeQPIIngressNotEmptyeventtocal-culateaverageoccupancyortheQPIIngressAllocationseventinordertocalculateaveragequeuinglatency.
TxR_CYCLES_FULLTitle:EgressCyclesFullCategory:EGRESSEventsEventCode:0x25Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofcycleswhentheR2PCIeEgressbufferisfull.
Table2-206.
UnitMasksforRxR_INSERTSExtensionumask[15:8]DescriptionHOMbxxxxxxx1HOMHOMIngressQueueSNPbxxxxxx1xSNPSNPIngressQueueNDRbxxxxx1xxNDRNDRIngressQueueDRSbxxxx1xxxDRSDRSIngressQueueNCBbxxx1xxxxNCBNCBIngressQueueNCSbxx1xxxxxNCSNCSIngressQueueTable2-207.
UnitMasksforRxR_OCCUPANCYExtensionumask[15:8]DescriptionHOMb00000001HOMHOMIngressQueueSNPb00000010SNPSNPIngressQueueNDRb00000100NDRNDRIngressQueueDRSb00001000DRSDRSIngressQueueNCBb00010000NCBNCBIngressQueueNCSb00100000NCSNCSIngressQueueReferenceNumber:329468-002185UncorePerformanceMonitoringR3QPIPerformanceMonitoringTxR_CYCLES_NETitle:EgressCyclesNotEmptyCategory:EGRESSEventsEventCode:0x23Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:CountsthenumberofcycleswhentheQPIEgressisnotempty.
ThistracksoneofthethreeringsthatareusedbytheQPIagent.
ThiscanbeusedinconjunctionwiththeQPIEgressOccupancyAccumulatoreventinordertocalculateaveragequeueoccupancy.
OnlyasingleEgressqueuecanbetrackedatanygiventime.
Itisnotpossibletofilterbasedondirectionorpolarity.
TxR_NACK_CCWTitle:EgressNACKCategory:EGRESSEventsEventCode:0x28Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:TxR_NACK_CWTitle:EgressNACKCategory:EGRESSEventsEventCode:0x26Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:VN0_CREDITS_REJECTTitle:VN0CreditAcquisitionFailedonDRSCategory:LINK_VN0_CREDITSEventsEventCode:0x37Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Table2-208.
UnitMasksforTxR_NACK_CCWExtensionumask[15:8]DescriptionADbxxxxxxx1AKCCWBLCounterClockwiseEgressQueueAKbxxxxxx1xBLCWADClockwiseEgressQueueBLbxxxxx1xxBLCCWADCounterClockwiseEgressQueueTable2-209.
UnitMasksforTxR_NACK_CWExtensionumask[15:8]DescriptionADbxxxxxxx1ADCWADClockwiseEgressQueueAKbxxxxxx1xADCCWADCounterClockwiseEgressQueueBLbxxxxx1xxAKCWBLClockwiseEgressQueueUncorePerformanceMonitoringR3QPIPerformanceMonitoring186ReferenceNumber:329468-002Definition:NumberoftimesarequestfailedtoacquireaDRSVN0credit.
InorderforarequesttobetransferredacrossQPI,itmustbeguaranteedtohaveaflitbufferontheremotesockettosinkinto.
Therearetwocreditpools,VNAandVN0.
VNAisasharedpoolusedtoachievehighperfor-mance.
TheVN0poolhasreservedentriesforeachmessageclassandisusedtopreventdeadlock.
RequestsfirstattempttoacquireaVNAcredit,andthenfallbacktoVN0iftheyfail.
ThisthereforecountsthenumberoftimeswhenarequestfailedtoacquireeitheraVNAorVN0creditandisdelayed.
Thisshouldgenerallybeararesituation.
VN0_CREDITS_USEDTitle:VN0CreditUsedCategory:LINK_VN0_CREDITSEventsEventCode:0x36Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberoftimesaVN0creditwasusedontheDRSmessagechannel.
InorderforarequesttobetransferredacrossQPI,itmustbeguaranteedtohaveaflitbufferontheremotesockettosinkinto.
Therearetwocreditpools,VNAandVN0.
VNAisasharedpoolusedtoachievehighperformance.
TheVN0poolhasreservedentriesforeachmessageclassandisusedtopreventdeadlock.
RequestsfirstattempttoacquireaVNAcredit,andthenfallbacktoVN0iftheyfail.
ThiscountsthenumberoftimesaVN0creditwasused.
NotethatasingleVN0creditholdsaccesstopotentiallymultipleflitbuffers.
Forexample,atransferthatusesVNAcoulduse9flitbuffersandinthatcaseuses9credits.
AtransferonVN0willonlycountasinglecrediteventhoughitmayusemultiplebuffers.
Table2-210.
UnitMasksforVN0_CREDITS_REJECTExtensionumask[15:8]DescriptionHOMbxxxxxxx1HOMMessageClassFilterfortheHome(HOM)messageclass.
HOMisgenerallyusedtosendrequests,requestresponses,andsnoopresponses.
SNPbxxxxxx1xSNPMessageClassFilterforSnoop(SNP)messageclass.
SNPisusedforoutgoingsnoops.
NotethatsnoopresponsesflowontheHOMmessageclass.
NDRbxxxxx1xxNDRMessageClassNDRpacketsareusedtotransmitavarietyofprotocolflitsincludinggrantsandcompletions(CMP).
DRSbxxxx1xxxDRSMessageClassFilterforDataResponse(DRS).
DRSisgenerallyusedtotransmitdatawithcoherency.
Forexample,remotereadsandwrites,orcachetocachetransferswilltransmittheirdatausingDRS.
NCBbxxx1xxxxNCBMessageClassFilterforNon-CoherentBroadcast(NCB).
NCBisgenerallyusedtotransmitdatawithoutcoherency.
Forexample,non-coherentreaddatareturns.
NCSbxx1xxxxxNCSMessageClassFilterforNon-CoherentStandard(NCS).
NCSiscommonlyusedforTable2-211.
UnitMasksforVN0_CREDITS_USEDExtensionumask[15:8]DescriptionHOMbxxxxxxx1HOMMessageClassFilterfortheHome(HOM)messageclass.
HOMisgenerallyusedtosendrequests,requestresponses,andsnoopresponses.
SNPbxxxxxx1xSNPMessageClassFilterforSnoop(SNP)messageclass.
SNPisusedforoutgoingsnoops.
NotethatsnoopresponsesflowontheHOMmessageclass.
NDRbxxxxx1xxNDRMessageClassNDRpacketsareusedtotransmitavarietyofprotocolflitsincludinggrantsandcompletions(CMP).
ReferenceNumber:329468-002187UncorePerformanceMonitoringR3QPIPerformanceMonitoringVN1_CREDITS_REJECTTitle:VN1CreditAcquisitionFailedonDRSCategory:LINK_VN1_CREDITSEventsEventCode:0x39Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberoftimesarequestfailedtoacquireaVN1credit.
InorderforarequesttobetransferredacrossQPI,itmustbeguaranteedtohaveaflitbufferontheremotesockettosinkinto.
Therearetwocreditpools,VNAandVN1.
VNAisasharedpoolusedtoachievehighperfor-mance.
TheVN1poolhasreservedentriesforeachmessageclassandisusedtopreventdead-lock.
RequestsfirstattempttoacquireaVNAcredit,andthenfallbacktoVN1iftheyfail.
ThisthereforecountsthenumberoftimeswhenarequestfailedtoacquireeitheraVNAorVN1creditandisdelayed.
Thisshouldgenerallybeararesituation.
DRSbxxxx1xxxDRSMessageClassFilterforDataResponse(DRS).
DRSisgenerallyusedtotransmitdatawithcoherency.
Forexample,remotereadsandwrites,orcachetocachetransferswilltransmittheirdatausingDRS.
NCBbxxx1xxxxNCBMessageClassFilterforNon-CoherentBroadcast(NCB).
NCBisgenerallyusedtotransmitdatawithoutcoherency.
Forexample,non-coherentreaddatareturns.
NCSbxx1xxxxxNCSMessageClassFilterforNon-CoherentStandard(NCS).
NCSiscommonlyusedforTable2-212.
UnitMasksforVN1_CREDITS_REJECTExtensionumask[15:8]DescriptionHOMbxxxxxxx1HOMMessageClassFilterfortheHome(HOM)messageclass.
HOMisgenerallyusedtosendrequests,requestresponses,andsnoopresponses.
SNPbxxxxxx1xSNPMessageClassFilterforSnoop(SNP)messageclass.
SNPisusedforoutgoingsnoops.
NotethatsnoopresponsesflowontheHOMmessageclass.
NDRbxxxxx1xxNDRMessageClassNDRpacketsareusedtotransmitavarietyofprotocolflitsincludinggrantsandcompletions(CMP).
DRSbxxxx1xxxDRSMessageClassFilterforDataResponse(DRS).
DRSisgenerallyusedtotransmitdatawithcoherency.
Forexample,remotereadsandwrites,orcachetocachetransferswilltransmittheirdatausingDRS.
NCBbxxx1xxxxNCBMessageClassFilterforNon-CoherentBroadcast(NCB).
NCBisgenerallyusedtotransmitdatawithoutcoherency.
Forexample,non-coherentreaddatareturns.
NCSbxx1xxxxxNCSMessageClassFilterforNon-CoherentStandard(NCS).
NCSiscommonlyusedforTable2-211.
UnitMasksforVN0_CREDITS_USEDExtensionumask[15:8]DescriptionUncorePerformanceMonitoringR3QPIPerformanceMonitoring188ReferenceNumber:329468-002VN1_CREDITS_USEDTitle:VN1CreditUsedCategory:LINK_VN1_CREDITSEventsEventCode:0x38Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberoftimesaVN1creditwasusedontheDRSmessagechannel.
InorderforarequesttobetransferredacrossQPI,itmustbeguaranteedtohaveaflitbufferontheremotesockettosinkinto.
Therearetwocreditpools,VNAandVN1.
VNAisasharedpoolusedtoachievehighperformance.
TheVN1poolhasreservedentriesforeachmessageclassandisusedtopreventdeadlock.
RequestsfirstattempttoacquireaVNAcredit,andthenfallbacktoVN1iftheyfail.
ThiscountsthenumberoftimesaVN1creditwasused.
NotethatasingleVN1creditholdsaccesstopotentiallymultipleflitbuffers.
Forexample,atransferthatusesVNAcoulduse9flitbuffersandinthatcaseuses9credits.
AtransferonVN1willonlycountasinglecrediteventhoughitmayusemultiplebuffers.
VNA_CREDITS_ACQUIREDTitle:VNAcreditAcquisitionsCategory:LINK_VNA_CREDITSEventsEventCode:0x33Max.
Inc/Cyc:.
4,RegisterRestrictions:0-1Definition:NumberofQPIVNACreditacquisitions.
ThiseventcanbeusedinconjunctionwiththeVNAIn-UseAccumulatortocalculatetheaveragelifetimeofacreditholder.
VNAcreditsareusedbyallmessageclassesinordertocommunicateacrossQPI.
Ifapacketisunabletoacquirecredits,itwillthenattempttousecreditsfromtheVN0pool.
Notethatasinglepacketmayrequiremultipleflitbuffers(i.
e.
whendataisbeingtransferred).
Therefore,thiseventwillincrementbythenumberofcreditsacquiredineachcycle.
Filteringbasedonmessageclassisnotprovided.
Onecancountthenumberofpacketstransferredinagivenmessageclassusinganqfclkevent.
Table2-213.
UnitMasksforVN1_CREDITS_USEDExtensionumask[15:8]DescriptionHOMbxxxxxxx1HOMMessageClassFilterfortheHome(HOM)messageclass.
HOMisgenerallyusedtosendrequests,requestresponses,andsnoopresponses.
SNPbxxxxxx1xSNPMessageClassFilterforSnoop(SNP)messageclass.
SNPisusedforoutgoingsnoops.
NotethatsnoopresponsesflowontheHOMmessageclass.
NDRbxxxxx1xxNDRMessageClassNDRpacketsareusedtotransmitavarietyofprotocolflitsincludinggrantsandcompletions(CMP).
DRSbxxxx1xxxDRSMessageClassFilterforDataResponse(DRS).
DRSisgenerallyusedtotransmitdatawithcoherency.
Forexample,remotereadsandwrites,orcachetocachetransferswilltransmittheirdatausingDRS.
NCBbxxx1xxxxNCBMessageClassFilterforNon-CoherentBroadcast(NCB).
NCBisgenerallyusedtotransmitdatawithoutcoherency.
Forexample,non-coherentreaddatareturns.
NCSbxx1xxxxxNCSMessageClassFilterforNon-CoherentStandard(NCS).
NCSiscommonlyusedforReferenceNumber:329468-002189UncorePerformanceMonitoringR3QPIPerformanceMonitoringVNA_CREDITS_REJECTTitle:VNACreditRejectCategory:LINK_VNA_CREDITSEventsEventCode:0x34Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberofattemptedVNAcreditacquisitionsthatwererejectedbecausetheVNAcreditpoolwasfull(oralmostfull).
Itispossibletofilterthiseventbymessageclass.
Somepack-etsusemorethanoneflitbuffer,andthereforemustacquiremultiplecredits.
Therefore,onecouldgetarejecteveniftheVNAcreditswerenotfullyusedup.
TheVNApoolisgenerallyusedtoprovidethebulkoftheQPIbandwidth(asopposedtotheVN0poolwhichisusedtoguaranteeforwardprogress).
VNAcreditscanrunoutiftheflitbufferonthereceivingsidestartstoqueueupsubstantially.
Thiscanhappeniftherestoftheuncoreisunabletodraintherequestsfastenough.
VNA_CREDIT_CYCLES_OUTTitle:CycleswithnoVNAcreditsavailableCategory:LINK_VNA_CREDITSEventsEventCode:0x31Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberofQPIuclkcycleswhenthetransmittedhasnoVNAcreditsavailableandthereforecannotsendanyrequestsonthischannel.
NotethatthisdoesnotmeanthatnoflitscanTable2-214.
UnitMasksforVNA_CREDITS_ACQUIREDExtensionumask[15:8]DescriptionADbxxxxxxx1HOMMessageClassFilterfortheHome(HOM)messageclass.
HOMisgenerallyusedtosendrequests,requestresponses,andsnoopresponses.
BLbxxxxx1xxHOMMessageClassFilterfortheHome(HOM)messageclass.
HOMisgenerallyusedtosendrequests,requestresponses,andsnoopresponses.
Table2-215.
UnitMasksforVNA_CREDITS_REJECTExtensionumask[15:8]DescriptionHOMbxxxxxxx1HOMMessageClassFilterfortheHome(HOM)messageclass.
HOMisgenerallyusedtosendrequests,requestresponses,andsnoopresponses.
SNPbxxxxxx1xSNPMessageClassFilterforSnoop(SNP)messageclass.
SNPisusedforoutgoingsnoops.
NotethatsnoopresponsesflowontheHOMmessageclass.
NDRbxxxxx1xxNDRMessageClassNDRpacketsareusedtotransmitavarietyofprotocolflitsincludinggrantsandcompletions(CMP).
DRSbxxxx1xxxDRSMessageClassFilterforDataResponse(DRS).
DRSisgenerallyusedtotransmitdatawithcoherency.
Forexample,remotereadsandwrites,orcachetocachetransferswilltransmittheirdatausingDRS.
NCBbxxx1xxxxNCBMessageClassFilterforNon-CoherentBroadcast(NCB).
NCBisgenerallyusedtotransmitdatawithoutcoherency.
Forexample,non-coherentreaddatareturns.
NCSbxx1xxxxxNCSMessageClassFilterforNon-CoherentStandard(NCS).
UncorePerformanceMonitoringPacketMatchingReference190ReferenceNumber:329468-002betransmitted,asthoseholdingVN0creditswillstill(potentially)beabletotransmit.
GenerallyitisthegoaloftheuncorethatVNAcreditsshouldnotrunout,asthiscansubstantiallythrottlebackusefulQPIbandwidth.
VNA_CREDIT_CYCLES_USEDTitle:Cycleswith1ormoreVNAcreditsinuseCategory:LINK_VNA_CREDITSEventsEventCode:0x32Max.
Inc/Cyc:.
1,RegisterRestrictions:0-1Definition:NumberofQPIuclkcycleswithoneormoreVNAcreditsinuse.
ThiseventcanbeusedinconjunctionwiththeVNAIn-UseAccumulatortocalculatetheaveragenumberofusedVNAcred-its.
2.
11PACKETMATCHINGREFERENCEIntheIntelQPILinkLayer,theperformancemonitoringinfrastructureallowsausertofilterpackettrafficaccordingtocertainfields.
Acouplecommonfields,theMessageClass/Opcodefields,havebeensummarizedinthefollowingtables.
Table2-216.
IntelQuickPathInterconnectPacketMessageClassesTable2-217.
OpcodeMatchbyMessageClassCodeNameDefinitionb0000HOM0Home-Requestsb0001HOM1Home-Responsesb0010NDRNon-DataResponsesb0011SNPSnoopsb0100NCSNon-CoherentStandard---b1100NCBNon-CoherentBypass---b1110DRSDataResponseOpcHOM0HOM1NDRSNP0000RdCurRspIGnt_CmpSnpCur0001RdCodeRspSGntE_FrcAckCnfltSnpCode0010RdData------SnpData0011NonSnpRd0100RdInvOwnRspCnfltCmpDSnpInvOwn0101---SnpInvWrMtoI(akaSnpInvXtoI)0110EvctCln(onlytoxNCs)------0111NonSnpWrRspCnfltWbI(onlyfromxNCs)------1000InvItoERspFwdCmpSnpInvItoEReferenceNumber:329468-002191UncorePerformanceMonitoringPacketMatchingReferenceTable2-218.
Opcodes(AlphabeticalListing)1001AckCnfltWbIRspFwdIFrcAckCnlft(onlyfromxNCs)---1010RdDataMigratoryRspFwdSCmp_FwdCodeSnpDataMigratory(onlyforxNCs)1011---RspFwdIWbCmp_FwdInvOwn(onlyforxNCs)---1100WbMtoIRspFwdSWbCmp_FwdInvItoE---1101WbMtoERspIWb------1110WbMtoS(onlyfromxNCs)RspSWb------1111AckCnflt------PrefetchHintOpcNCSNCBDRS0000NcRdNcWrDataC_(FEIMS)0001IntAckWcWrDataC_(FEIMS)_FrcAckCnflt(onlyfromxNCs)0010------DataC_(FEIMS)_Cmp0011FERR---DataNc0100NcRdPtl---WbIData0101NcCfgRd---WbSData0110------WbEData0111NcIORd---NonSnpWrData1000---NcMsgBWbIDataPtl1001NcCfgWrIntLogical---1010---IntPhysicalWbEDataPtl(onlyfromxNCs)1011NcIOWrIntPrioUpdNonSnpWrdataPtl1100NcMsgSNcWrPtl---1101NcP2PSWcWrPtl---1110---NcP2PB---1111------NameOpcMCGenByDescAbortTO0101NDRAbortTime-outResponseAckCnflt1111HOM0Co,HiAcknowledgereceiptofData_*andCmp/FrcAckCnflt,signalapossibleconflictscenario.
AckCnfltWbI1001HOM0Co,HiInadditiontosignalingAckCnflt,thecachingagenthasalsowrittenthedirtycachelinedataplusanypartialwritedatabacktomemoryinaWBiData[Ptl]messageandtransitionedthecachelinestatetoI.
Cmp1000NDRUo,Ci,Co,HoAllsnoopresponsesgathered,noconflictsCmpD0100NDRUo,CiCompletionwithDataOpcHOM0HOM1NDRSNPUncorePerformanceMonitoringPacketMatchingReference192ReferenceNumber:329468-002Cmp_FwdCode1010NDRCi,HoCompleterequest,forwardthelineinF(orS)statetotherequestorspecified,invalidatelocalcopyorleaveitinSstate.
Cmp_FwdInvItoE1100NDRCi,HoCompleterequest,invalidatelocalcopyCmp_FwdInvOwn1011NDRCiCompleterequest,forwardthelineinEorMstatetotherequestorspecified,invalidatelocalcopyDataC_(FEIMS)0000DRSCi,Co,HoDataResponsein(FEIMS)stateNOTE:SetRDSfieldtospecifywhichstateistobemeasured.
-IvyBridge-EPmicroarchitecturesupportsgettingdatainE,F,IorMstateDataC_(FEIMS)_Cmp0010DRSCi,HoDataResponsein(FEIMS)state,CompleteNOTE:SetRDSfieldtospecifywhichstateistobemeasured.
-IvyBridge-EPmicroarchitecturesupportsgettingdatainE,ForIstateDataC_(FEIMS)_FrcAckCnflt0001DRSCi,HoDataResponsein(FEIMS)state,ForceAcknowledgeNOTE:SetRDSfieldtospecifywhichstateistobemeasured.
-IvyBridge-EPmicroarchitecturesupportsgettingdatainE,ForIstateDataNc0011DRSUo,CiNon-CoherentDataDebugData1111NCBDebugDataEvctCln0110HOM0CoCleancachelineevictionnotificationtohomeagent.
FERR0011NCSUi,Uo,CoLegacyfloatingpointerrorindicationfromCPUtolegacybridgeFrcAckCnlft1001NDRCo,HoAllsnoopresponsesgathered,forceanAckCnfltGnt_Cmp0000NDRCi,HoSignalcompletionandGrantEstateownershipwithoutdatatoanInvItoEor'nulldata'toanInvXtoIGntE_FrcAckCnflt0001NDRCi,HoSignalFrcAckCnfltandGrantEstateownershipwithoutdatatoanInvItoEor'nulldata'toanInvXtoIIntAck0001NCSInterruptacknowledgetolegacy8259interruptcontrollerIntLogical1001NCBUi,Uo,CoLogicalmodeinterrupttoprocessorIntPhysical1010NCBUi,Uo,CoPhysicalmodeinterrupttoprocessorIntPrioUpd1011NCBUi,Uo,CoInterruptpriorityupdatemessagetosourceinterruptagents.
InvItoE1000HOM0Co,HiInvalidatetoEstaterequestsexclusiveownershipofacachelinewithoutdata.
InvXtoI0101HOM0Flushacachelinefromallcaches(thatis,downgradeallcleancopiestoIandcauseanydirtycopytobewrittenbacktomemory).
NcCfgRd0101NCSUi,CoConfigurationreadfromconfigurationspaceNcCfgWr1001NCSUi,CoConfigurationwritetoconfigurationspaceNcIORd0111NCSUi,CoReadfromlegacyI/OspaceNcIOWr1011NCSUi,CoWritetolegacyI/OspaceNcMsgB1000NCBUi,Uo,CoNon-coherentMessage(non-coherentbypasschannel)NcMsgS1100NCSUi,Uo,CoNon-coherentMessage(Non-coherentstandardchannel)NameOpcMCGenByDescReferenceNumber:329468-002193UncorePerformanceMonitoringPacketMatchingReferenceNcP2PB1110NCBUi,UoiPeer-to-peertransactionbetweenI/Oentities(non-coherentbypasschannel)NcP2PS1101NCSPeer-to-peertransactionbetweenI/Oentities.
(Non-coherentstandardchannel)NcRd0000NCSCoReadfromnon-coherentmemorymappedI/OspaceNcRdPtl0100NCSCoPartialreadfromnon-coherentmemorymappedI/OspaceNcWr0000NCBCoWritetonon-coherentmemorymappedI/OspaceNcWrPtl1100NCBCoPartialwritetonon-coherentmemorymappedI/OspaceNonSnpRd0011HOM0Co,HiNon-Snoop(uncached)readNonSnpWr0111HOM0Co,HiNon-Snoop(uncached)writeNonSnpWrData0111DRSCo,Hi,HoNoncachecoherentwritedataNonSnpWrDataPtl1011DRSCo,Hi,HoPartial(byte-masked)noncachecoherentwritedataPrefetchHint1111SNPCi,CoSnoopPrefetchHintRspCnflt0100HOM1Co,Hi,HoPeerisleftwithlineinIorSstate,andthepeerhasaconflictingoutstandingrequest.
RspCnfltOwn0110HOM1PeerhasaburiedMcopyforthislinewithanoutstandingconflictingrequest.
RspCnfltWbI0111HOM1Hi,HoPeerhasaburiedMcopyforthislinewithanoutstandingconflictingrequest.
Peermustwritebackdatatohome,invalidatelineandmarkitselfthatburiedHitMdatawassent.
RdCode0001HOM0Co,HiReadcachelineinF(orS,iftheFstatenotsupported)RdCur0000HOM0Co,HiRequestacachelineinI.
TypicallyissuedbyI/Oproxyentities,RdCurisusedtoobtainacoherentsnapshotofanuncachedline.
RdData0010HOM0Co,HiReadcachelineineitherEorF(orS,ifFstatenotsupported).
ThechoicebetweenF(orS)andEisdeterminedbywhetherornotpercachingagenthascachelineinSstate.
RdDataMigratory1010HOM0Co,HiSameasRdData,exceptthatpeercachecanforwardrequestedcachelineinMstatewithoutanywritebacktomemory.
RdInvOwn0100HOM0Co,HiReadInvalidateOwnrequestsacachelineinMorEstate.
MorEisdeterminedbywhetherrequesterisforwardedanMcopybyapeercachingagentorsentanEcopybyhomeagent.
RspFwd1000HOM1Co,Hi,HoPeerhassentdatatorequestorwithnochangeincachestateRspFwdI1001HOM1Co,Hi,HoPeerhassentdatatorequestorandisleftwithlineinIstateRspFwdIWb1011HOM1Hi,HoPeerhassentdatatorequestorandaWbIDatatothehome,andisleftwithlineinIstateRspFwdS1010HOM1Co,Hi,HoPeerhassentdatatorequestorandisleftwithlineinSstateRspFwdSWb1100HOM1Hi,HoPeerhassentdatatorequestorandaWbSDatatothehome,andisleftwithlineinSstateRspI0000HOM1Co,Hi,HoPeerleftwithlineinI-stateNameOpcMCGenByDescUncorePerformanceMonitoringPacketMatchingReference194ReferenceNumber:329468-002RspIWb1101HOM1Co,Hi,HoPeerhasevictedthedatawithanin-flightWbIData[Ptl]messagetothehomeandhasnotsentanymessagetotherequestor.
RspS0001HOM1Co,Hi,HoPeerleftwithlineinS-stateRspSWb1110HOM1Co,Hi,HoPeerhassentaWbSDatamessagetothehome,hasnotsentanymessagetotherequestorandisleftwithlineinS-stateSnpCode0001SNPCi,Co,HoSnoopCode(getdatainForSstate)-IvyBridge-EPmicroarchitecturesupportsgettingdatainFstateSnpCur0000SNPCi,Co,HoSnooptogetdatainIstateSnpData0010SNPCi,Co,HoSnoopData(getdatainE,ForSstate)-IvyBridge-EPmicroarchitecturesupportsgettingdatainEorFstateSnpDataMigratory1110SNPCi,Co,HoSnooptogetdatainMorEorFstateSnpInvItoE1000SNPCi,Co,HoSnoopInvalidatetoEstate.
Toinvalidatepeercachingagent,flushinganyMstatedatatohomeSnpInvOwn0100SNPCi,Co,HoSnoopInvalidateOwn(getdatainEorMstate)-IvyBridge-EPmicroarchitecturesupportsgettingdatainEstateSnpInvXtoI0101SNPSnoopInvalidateWritebackMtoIstate.
Toinvalidatepeercachingagent,flushinganyMstatedatatohome.
WbEData0110DRSHiWritebackdata,downgradetoEstateWbEDataPtl1010DRSHiPartial(byte-masked)writebackdata,downgradetoEstateWbIData0100DRSCo,HiWritebackdata,downgradetoIstateWbIDataPtl1000DRSCo,HiPartial(byte-masked)writebackdata,downgradetoIstateWbMtoI1100HOM0Co,HiWriteacachelineinMstatebacktomemoryandtransitionitsstatetoI.
WbMtoE1101HOM0Co,HiWriteacachelineinMstatebacktomemoryandtransitionitsstatetoE.
WbMtoS1110HOM0HiWriteacachelineinMstatebacktomemoryandtransitionitsstatetoS.
WbSData0101DRSCo,HiWritebackdata,downgradetoSstateWcWr0001NCBCoWritecombinablewritetonon-coherentmemorymappedI/OspaceWcWrPtl1101NCBCoPartialwritecombinablewritetonon-coherentmemorymappedI/OspaceNameOpcMCGenByDesc