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Intel:AcceleratingthePathtoExascaleKirkSkaugenVicePresidentIntelArchitectureGroupGeneralManagerDataCenterGroupAnInsatiableNeedForComputingExascaleProblemsCannotBeSolvedUsingtheComputingPowerAvailableToday10PFlops1PFlops100TFlops10TFlops1TFlops100GFlops10GFlops1GFlops100MFlops100PFlops10EFlops1EFlops100EFlops1993201719992005201120231ZFlops2029WeatherPredictionMedicalImagingGenomicsResearchSource:www.
top500.
orgForecastExascaleAnswersMankind'sChallengesIn…Weather/ClimateHealthcareNewFormsofEnergyWe'veHelpedTransformIndustries~1TFLOP~$55K/GFLOP500TFLOPSPerformance$/GFLOPAnnualServerProcessorShipmentsSupercomputingin1997Supercomputingin201019952000200020052010201519952000200520101995IntelCommitmentToExascaleProgrammingParallelismEfficientPerformanceExtremeScalabilityIntelExascaleCommitment:>100XPerformanceOfTodayAtOnly2XThePowerofToday's#1SystemScalingToday'sSoftwareModel6ExascaleRequirementsPetascaleMachineof2010:TFLOPofComputeEstimationbasedonPetascalemachinerequirementscirca2010.
Compute40xMemory75XComms20xDisk/Storage33xOther900xVisceralFocusonSystemPowerEfficiencyImprovementScalingProgrammabilityOneProgrammingModelDemocratizesUsage…AvoidCostlyDetours2003200520072009201190nm65nm45nm32nm22nmInventedSiGeStrainedSilicon2ndGen.
SiGeStrainedSilicon2ndGen.
Gate-LastHigh-kMetalGateInventedGate-LastHigh-kMetalGateFirsttoImplementTri-GateSTRAINEDSILICONHIGH-kMETALGATETRI-GATE22nmARevolutionaryLeapinProcessTechnology37%PerformanceGainatLowVoltage*>50%ActivePowerReductionatConstantPerformance*ProcessTechnologyLeadershipThefoundationforallcomputingSource:Intel*ComparedtoIntel32nmTechnologyIntelLabs&HPCStrongResearchPartnershipsUniversitiesGovernmentIndustryWorldClassResearchinHPC*Othernames,logosandbrandsmaybeclaimedasthepropertyofothers.
DeliveringBreakthroughTechnologiestoFuelInnovationPowerful.
Intelligent.
EfficientI/OIntegratedPCIereduceslatencyandpowerGrowingPerformanceUpto8corespersocket2XFLOPSwithIntelAdvancedVectorExtensionsContinuingTheJourney:NextIntelXeonProcessorCodenamedSandyBridge-EPTheFoundationoftheInnovationinScienceandTechnologyHighlyParallelPerformanceIntelManyIntegratedCore(IntelMIC)ArchitectureLaunchingon22nmwith>50corestoprovideoutstandingperformanceforHPCusersThemanybenefitsofbroadIntelCPUprogrammingmodels,techniques,andfamiliarx86developertoolsDeliveredPerformanceThecomputedensityassociatedwithspecialtyacceleratorsforparallelworkloadsAStepForwardInDealingWithEfficientPerformance&ProgrammabilityProgrammabilityPerformanceDensity13EvaluatingtheIntelMICArchitectureArndtBodeLeibnizSupercomputingCentre,GermanywithinputfromIrisChristadler,AlexanderHeineckeandVolkerWeinbergJune2011,ISC,HamburgEvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011PrefaceProgrammingmodelsarethekeytoharnessthecomputationalpowerofmassivelyparalleldevices.
Obviously,Intelhasrealizedthistrendandsubstantiallysupportsopenstandardsandinvestsininnovativeprogrammingmodels.
LRZandTUMareusingIntelhard-andsoftwareformanyyearsandknowthetoolchainbyheart.
Weexpect:Ahardwareproductthatdeliversgoodperformance(andenergy-efficiency)withoutloosingprogrammability.
14EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011AdvantagesoftheMICArchitectureIsastandardx86architecture!
AllowsmanydifferentparallelprogrammingmodelslikeOpenMP,MPIandIntelCilk!
Offersstandardmath-librarieslikeIntelMKL!
SupportswholeInteltoolchain,e.
g.
Compiler&Debugger!
WritingMIC-acceleratedcodewithminimaleffortandgreatperformance15EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011WorkloadsunderInvestigationEurobenKernels(7dwarfsofHPC)DataMiningTifaMMy–MatrixOperations(DemohereatISC'11!
)FurtherLinearAlgebraandSimulationCodes16EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011EurobenKernelsSelectedmicro-benchmarksusedinPRACEfortheevaluationofacceleratorhardware&newlanguages:http://www.
prace-project.
eu/documents/public-deliverables/d6-6.
pdf–Example:mod2am:densematrix-matrixmultiplication(MxM)17Performanceevaluationofmod2amonKNFwith30cores@1050MHzusingIntel'sOffloadCompiler,singleprecision,datatransfertimesexcludedEvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011DataMiningwithAdaptiveSparseGridsMachinelearningalgorithmLearningfunctionfromatrainingdatasetImportantworkloadforclassificationandregressionofhugedatasetsMIC-Execution:StraightforwardFirstversionwithinafewhoursOptimizedversiontook2days150420050100150200250300350400450WSM-EPX5670KNF32/1200(incl.
offload)GFlops/s18Testworkload:Learning5dcheckerboardwith262144instancesandclassificationaccuracyof92%EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011TifaMMy–IdeaandApplicationTifaMMy:self-adaptiveandcache-obliviousframeworkformatrixoperationsoptimizedonfatx86coresThisisdonebynestedrecursionsandvectorizedkernels–OnMIConlythekernelswerechanged,MIC'sx86coresareabletotacklenestedrecursions!
parallelizationschemeemployingOpenMPcanbereusedhavingSSEkernels,bringingcodetoMICisnearlyforfree19EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011TifaMMy–PerformanceMatrixMultiplication20010020030040050060070032256480704928115213761600182420482272249627202944316833923616384040644288451247364960518454085632585660806304652867526976720074247648MatrixSizeGFLOPSMaxTestworkload:TifaMMyExecutedonKNFwith32cores@1200MHzEvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011AdvantagesoftheMICArchitectureIsastandardx86architecture!
AllowsmanydifferentparallelprogrammingmodelslikeOpenMP,MPIandIntelCilk!
Offersstandardmath-librarieslikeIntelMKL!
SupportswholeInteltoolchain,e.
g.
Compiler&Debugger!
Pre-releaseMIC-acceleratedcodeforatypicalscientificworkload(e.
g.
DataMining,TifaMMy)canreachupto50%ofpeakperformance!
VisitdemohereatISC'11!
21"SGIunderstandsthesignificanceofinter-processorcommunications,power,densityandusabilitywhenarchitectingforexascale.
IntelhasmadetheleaptowardsexaflopcomputingwiththeintroductionofIntelManyIntegratedCore(MIC)architecture.
FutureIntelMICproductswillsatisfyallfourofthesepriorities,especiallywiththeirexpectedtentimesincreaseincomputedensitycoupledwiththeirfamiliarX86programmingenvironment.
"Dr.
EngLimGoh,SGICTO23IntelMICArchitecture:NeededforExascaleExaflopby2018125xcomputepower25x:Moore'sLaw5x:remains24IntelMICArchitecture:Familiarx86Programming#include#include#defineN1000000000LLmain(){doublepi=0.
0f;longi;#pragmaoffloadtarget(mic)#pragmaompparallelforreduction(+:pi)for(i=0;i100XPerformanceOfTodayAtOnly2XThePowerOfToday's#1ScalingToday'sSoftwareModel30SystemConfiguration7TFLOPSSGEMMinanodeHWspecifications8xKNFD0Si@1.
2GHz,2GBGDDR5@3.
6GT/sHostColfaxCXT8000:2socketplatformwith2IntelXeonprocessorX5690(3.
46GHz,6cores,12MBL3cache)with24GBDDR3@1333MHz,DualIntel5520IOH,OSRHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):ComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–ColfaxModel:CXT8000Serverw/Intel5520chipsetand4PLXPEX8647Gen2PCIeswitches–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)31SystemConfigurationHybridComputingwithIntelMKLHWspecifications1xKNFD0Si@1.
2GHz,2GBGDDR5@3.
6GT/sHostShadyCove2socketplatformwith2IntelXeonprocessorX5680(3.
33GHz,6cores,12MBL3cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–KnightsFerrySoftwareDevelopmentPlatform(ShadyCove)–IntelAlphalevelsoftware(IntelCompilers,IntelMKL,driversetc.
)SWspecificationsMKL4KNFMKLKNF.
b2build20110518MKL10.
3.
332SystemConfigurationHybridComputingLUFactorizationHWspecifications1xKNFD0Si@1.
2GHz,2GBGDDR5@3.
6GT/sHostShadyCove2socketplatformwith2IntelXeonprocessorX5680(3.
33GHz,6cores,12MBL3Cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–KnightsFerrySoftwareDevelopmentPlatform(ShadyCove)–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)33SystemConfigurationKISTIMolecularDynamicsHWspecifications1xKNFC0Si@1.
2GHz,2GBGDDR5@3.
0GT/sHostDellPrecisionWorkstation1socketplatformwith1IntelXeonprocessorX5620(4cores,2.
4GHz,12MBL3cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–DellPrecisionWorkstation–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)34SystemConfigurationCERNopenlab:CoreScalingofIntelMICArchitectureHWspecifications1xKNFC0Si@1.
2GHz,2GBGDDR5@3.
0GT/sHostSGIH40022socketplatformwith2IntelXeonprocessorX5690(6cores,3.
46GHz,12MBL3cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–SGIH4002System–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)35SystemConfigurationLRZ:TifaMMyMatrixMultiplicationHWspecifications1xKNFC0Si@1.
2GHz,2GBGDDR5@3.
0GT/sHostShadyCove2socketplatformwith2IntelXeonprocessorX5680(3.
33GHz,6cores,12MBL3Cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–KnightsFerrySoftwareDevelopmentPlatform(ShadyCove)–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)36SystemConfigurationFZJülich:SMMPProteinFoldingHWspecifications1xKNFC0Si@1.
2GHz,2GBGDDR5@3.
0GT/sHostShadyCove2socketplatformwith2IntelXeonprocessorX5680(3.
33GHz,6cores,12MBL3Cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–KnightsFerrySoftwareDevelopmentPlatform(ShadyCove)–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)
top500.
orgForecastExascaleAnswersMankind'sChallengesIn…Weather/ClimateHealthcareNewFormsofEnergyWe'veHelpedTransformIndustries~1TFLOP~$55K/GFLOP500TFLOPSPerformance$/GFLOPAnnualServerProcessorShipmentsSupercomputingin1997Supercomputingin201019952000200020052010201519952000200520101995IntelCommitmentToExascaleProgrammingParallelismEfficientPerformanceExtremeScalabilityIntelExascaleCommitment:>100XPerformanceOfTodayAtOnly2XThePowerofToday's#1SystemScalingToday'sSoftwareModel6ExascaleRequirementsPetascaleMachineof2010:TFLOPofComputeEstimationbasedonPetascalemachinerequirementscirca2010.
Compute40xMemory75XComms20xDisk/Storage33xOther900xVisceralFocusonSystemPowerEfficiencyImprovementScalingProgrammabilityOneProgrammingModelDemocratizesUsage…AvoidCostlyDetours2003200520072009201190nm65nm45nm32nm22nmInventedSiGeStrainedSilicon2ndGen.
SiGeStrainedSilicon2ndGen.
Gate-LastHigh-kMetalGateInventedGate-LastHigh-kMetalGateFirsttoImplementTri-GateSTRAINEDSILICONHIGH-kMETALGATETRI-GATE22nmARevolutionaryLeapinProcessTechnology37%PerformanceGainatLowVoltage*>50%ActivePowerReductionatConstantPerformance*ProcessTechnologyLeadershipThefoundationforallcomputingSource:Intel*ComparedtoIntel32nmTechnologyIntelLabs&HPCStrongResearchPartnershipsUniversitiesGovernmentIndustryWorldClassResearchinHPC*Othernames,logosandbrandsmaybeclaimedasthepropertyofothers.
DeliveringBreakthroughTechnologiestoFuelInnovationPowerful.
Intelligent.
EfficientI/OIntegratedPCIereduceslatencyandpowerGrowingPerformanceUpto8corespersocket2XFLOPSwithIntelAdvancedVectorExtensionsContinuingTheJourney:NextIntelXeonProcessorCodenamedSandyBridge-EPTheFoundationoftheInnovationinScienceandTechnologyHighlyParallelPerformanceIntelManyIntegratedCore(IntelMIC)ArchitectureLaunchingon22nmwith>50corestoprovideoutstandingperformanceforHPCusersThemanybenefitsofbroadIntelCPUprogrammingmodels,techniques,andfamiliarx86developertoolsDeliveredPerformanceThecomputedensityassociatedwithspecialtyacceleratorsforparallelworkloadsAStepForwardInDealingWithEfficientPerformance&ProgrammabilityProgrammabilityPerformanceDensity13EvaluatingtheIntelMICArchitectureArndtBodeLeibnizSupercomputingCentre,GermanywithinputfromIrisChristadler,AlexanderHeineckeandVolkerWeinbergJune2011,ISC,HamburgEvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011PrefaceProgrammingmodelsarethekeytoharnessthecomputationalpowerofmassivelyparalleldevices.
Obviously,Intelhasrealizedthistrendandsubstantiallysupportsopenstandardsandinvestsininnovativeprogrammingmodels.
LRZandTUMareusingIntelhard-andsoftwareformanyyearsandknowthetoolchainbyheart.
Weexpect:Ahardwareproductthatdeliversgoodperformance(andenergy-efficiency)withoutloosingprogrammability.
14EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011AdvantagesoftheMICArchitectureIsastandardx86architecture!
AllowsmanydifferentparallelprogrammingmodelslikeOpenMP,MPIandIntelCilk!
Offersstandardmath-librarieslikeIntelMKL!
SupportswholeInteltoolchain,e.
g.
Compiler&Debugger!
WritingMIC-acceleratedcodewithminimaleffortandgreatperformance15EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011WorkloadsunderInvestigationEurobenKernels(7dwarfsofHPC)DataMiningTifaMMy–MatrixOperations(DemohereatISC'11!
)FurtherLinearAlgebraandSimulationCodes16EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011EurobenKernelsSelectedmicro-benchmarksusedinPRACEfortheevaluationofacceleratorhardware&newlanguages:http://www.
prace-project.
eu/documents/public-deliverables/d6-6.
pdf–Example:mod2am:densematrix-matrixmultiplication(MxM)17Performanceevaluationofmod2amonKNFwith30cores@1050MHzusingIntel'sOffloadCompiler,singleprecision,datatransfertimesexcludedEvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011DataMiningwithAdaptiveSparseGridsMachinelearningalgorithmLearningfunctionfromatrainingdatasetImportantworkloadforclassificationandregressionofhugedatasetsMIC-Execution:StraightforwardFirstversionwithinafewhoursOptimizedversiontook2days150420050100150200250300350400450WSM-EPX5670KNF32/1200(incl.
offload)GFlops/s18Testworkload:Learning5dcheckerboardwith262144instancesandclassificationaccuracyof92%EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011TifaMMy–IdeaandApplicationTifaMMy:self-adaptiveandcache-obliviousframeworkformatrixoperationsoptimizedonfatx86coresThisisdonebynestedrecursionsandvectorizedkernels–OnMIConlythekernelswerechanged,MIC'sx86coresareabletotacklenestedrecursions!
parallelizationschemeemployingOpenMPcanbereusedhavingSSEkernels,bringingcodetoMICisnearlyforfree19EvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011TifaMMy–PerformanceMatrixMultiplication20010020030040050060070032256480704928115213761600182420482272249627202944316833923616384040644288451247364960518454085632585660806304652867526976720074247648MatrixSizeGFLOPSMaxTestworkload:TifaMMyExecutedonKNFwith32cores@1200MHzEvaluatingtheIntelMICArchitecture,Prof.
A.
Bode,LRZJune2011AdvantagesoftheMICArchitectureIsastandardx86architecture!
AllowsmanydifferentparallelprogrammingmodelslikeOpenMP,MPIandIntelCilk!
Offersstandardmath-librarieslikeIntelMKL!
SupportswholeInteltoolchain,e.
g.
Compiler&Debugger!
Pre-releaseMIC-acceleratedcodeforatypicalscientificworkload(e.
g.
DataMining,TifaMMy)canreachupto50%ofpeakperformance!
VisitdemohereatISC'11!
21"SGIunderstandsthesignificanceofinter-processorcommunications,power,densityandusabilitywhenarchitectingforexascale.
IntelhasmadetheleaptowardsexaflopcomputingwiththeintroductionofIntelManyIntegratedCore(MIC)architecture.
FutureIntelMICproductswillsatisfyallfourofthesepriorities,especiallywiththeirexpectedtentimesincreaseincomputedensitycoupledwiththeirfamiliarX86programmingenvironment.
"Dr.
EngLimGoh,SGICTO23IntelMICArchitecture:NeededforExascaleExaflopby2018125xcomputepower25x:Moore'sLaw5x:remains24IntelMICArchitecture:Familiarx86Programming#include#include#defineN1000000000LLmain(){doublepi=0.
0f;longi;#pragmaoffloadtarget(mic)#pragmaompparallelforreduction(+:pi)for(i=0;i100XPerformanceOfTodayAtOnly2XThePowerOfToday's#1ScalingToday'sSoftwareModel30SystemConfiguration7TFLOPSSGEMMinanodeHWspecifications8xKNFD0Si@1.
2GHz,2GBGDDR5@3.
6GT/sHostColfaxCXT8000:2socketplatformwith2IntelXeonprocessorX5690(3.
46GHz,6cores,12MBL3cache)with24GBDDR3@1333MHz,DualIntel5520IOH,OSRHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):ComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–ColfaxModel:CXT8000Serverw/Intel5520chipsetand4PLXPEX8647Gen2PCIeswitches–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)31SystemConfigurationHybridComputingwithIntelMKLHWspecifications1xKNFD0Si@1.
2GHz,2GBGDDR5@3.
6GT/sHostShadyCove2socketplatformwith2IntelXeonprocessorX5680(3.
33GHz,6cores,12MBL3cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–KnightsFerrySoftwareDevelopmentPlatform(ShadyCove)–IntelAlphalevelsoftware(IntelCompilers,IntelMKL,driversetc.
)SWspecificationsMKL4KNFMKLKNF.
b2build20110518MKL10.
3.
332SystemConfigurationHybridComputingLUFactorizationHWspecifications1xKNFD0Si@1.
2GHz,2GBGDDR5@3.
6GT/sHostShadyCove2socketplatformwith2IntelXeonprocessorX5680(3.
33GHz,6cores,12MBL3Cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–KnightsFerrySoftwareDevelopmentPlatform(ShadyCove)–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)33SystemConfigurationKISTIMolecularDynamicsHWspecifications1xKNFC0Si@1.
2GHz,2GBGDDR5@3.
0GT/sHostDellPrecisionWorkstation1socketplatformwith1IntelXeonprocessorX5620(4cores,2.
4GHz,12MBL3cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–DellPrecisionWorkstation–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)34SystemConfigurationCERNopenlab:CoreScalingofIntelMICArchitectureHWspecifications1xKNFC0Si@1.
2GHz,2GBGDDR5@3.
0GT/sHostSGIH40022socketplatformwith2IntelXeonprocessorX5690(6cores,3.
46GHz,12MBL3cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–SGIH4002System–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)35SystemConfigurationLRZ:TifaMMyMatrixMultiplicationHWspecifications1xKNFC0Si@1.
2GHz,2GBGDDR5@3.
0GT/sHostShadyCove2socketplatformwith2IntelXeonprocessorX5680(3.
33GHz,6cores,12MBL3Cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–KnightsFerrySoftwareDevelopmentPlatform(ShadyCove)–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)36SystemConfigurationFZJülich:SMMPProteinFoldingHWspecifications1xKNFC0Si@1.
2GHz,2GBGDDR5@3.
0GT/sHostShadyCove2socketplatformwith2IntelXeonprocessorX5680(3.
33GHz,6cores,12MBL3Cache)with24GBDDR3@1333MHz,singleIntel5520IOH,OS:RHEL6.
0KNFSWStackLarrabeekerneldriverver.
1.
6.
197FlashImage/uOS:1.
0.
0.
1137/1.
0.
0.
1137-EXT-HPCOffloadcompiler(w/dataxfer):IntelComposerXEforMIC0.
043Nativecompiler(w/odataxfer):VersionAlphaBuild20110518–KnightsFerrySoftwareDevelopmentPlatform(ShadyCove)–IntelAlphalevelsoftware(IntelCompilers,driversetc.
)
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