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FN8896Rev.
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19ISL95338BidirectionalBuck-BoostVoltageRegulatorDatasheetTheISL95338isabidirectional,buck-boostvoltageregulatorthatprovidesbuck-boostvoltageregulationandprotectionfeatures.
TheRenesasadvancedR3Technologyprovideshighlight-loadefficiency,fasttransientresponse,andseamlessDCM/CCMtransitions.
TheISL95338takesinputpowerfromawiderangeofDCpowersources(suchasconventionalAC/DCADPs,USBPDports,andtravelADPs)andsafelyconvertsittoaregulatedvoltageupto20V.
TheISL95338canalsoconvertawiderangeDCpowersourceconnectedatitsoutput(systemside)toaregulatedvoltagetoitsinput(ADPside).
Thisbidirectionalbuck-boostregulationfeaturemakesitsapplicationveryflexible.
TheISL95338includesvarioussystemoperationfunctionssuchasForwardmodeenable,Reversemodeenable,programmablesoft-starttime,andadjustableVOUTinboththeforwarddirectionandreversedirection.
TheprotectionfunctionalitiesincludeOCP,OVP,UVP,andOTP.
TheISL95338hasserialcommunicationthroughSMBus/I2Cthatallowsprogrammingofmanycriticalparameterstodeliveracustomizedsolution.
Theseprogrammingparametersinclude,butarenotlimitedto:outputcurrentlimit,inputcurrentlimit,andoutputvoltagesetting.
RelatedLiteratureForafulllistofrelateddocuments,visitourwebsite:ISL95338devicepageFeaturesBidirectionalbuck,boost,andbuck-boostoperationInputvoltagerange:3.
8Vto24V(nodeadzone)Outputvoltage:upto20VUpto1MHzswitchingfrequencyProgrammablesoft-starttimeLDOoutputforVDDandVDDPSystemstatusalertfunctionBidirectionalinternaldischargefunctionActiveswitchingfornegativevoltagetransitionsBypassmodeinbothdirectionsForwardmodeenable,ReversemodeenableOCP,OVP,UVP,andOTPprotectionSMBusandauto-incrementI2CcompatiblePb-free(RoHScompliant)32Ld4x4TQFNPackageApplicationsTablets,Ultrabooks,powerbanks,mobiledevices,andUSB-CISL95338FN8896Rev.
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19Figure1.
TypicalApplicationCircuit,6/%2273+$6(8*$7(9''3/*$7(/*$7(8*$7(3+$6(%227&623&621'&,19''&203))5:3*596(1$'36)5:(1*1'&6,3&6,1$''59,1$GDSWHU6LGH96=00.
7AREFPinFastSinkCurrentControl1=10.
7AREFPinFastSourceCurrentControl1=114ASMBusSDA/SCLInputLowVoltage3.
3V0.
8VSDA/SCLInputHighVoltage3.
3V2VSDA/SCLInputBiasCurrent3.
3V1ASDA,OutputSinkCurrent(Note7)SDA=0.
4V4mASMBusFrequencyfSMB10400kHzGateDriverUGATE1Pull-UpResistanceUG1RPU100mAsourcecurrent8001200mΩUGATE1SourceCurrentUG1SRCUGATE1-PHASE1=2.
5V1.
32AUGATE1Pull-DownResistanceUG1RPD100mAsinkcurrent350475mΩUGATE1SinkCurrentUG1SNKUGATE1-PHASE1=2.
5V1.
92.
8ALGATE1Pull-UpResistanceLG1RPU100mAsourcecurrent8001200mΩLGATE1SourceCurrentLG1SRCLGATE1-GND=2.
5V1.
32ALGATE1Pull-DownResistanceLG1RPD100mAsinkcurrent300450mΩLGATE1SinkCurrentLG1SNKLGATE1-GND=2.
5V2.
33.
5ALGATE2Pull-UpResistanceLG2RPU100mAsourcecurrent8001200mΩLGATE2SourceCurrentLG2SRCLGATE2-GND=2.
5V1.
32ALGATE2Pull-DownResistanceLG2RPD100mAsinkcurrent300450mΩLGATE2SinkCurrentLG2SNKLGATE2-GND=2.
5V2.
33.
5AUGATE2Pull-UpResistanceUG2RPU100mAsourcecurrent8001200mΩUGATE2SourceCurrentUG2SRCUGATE2-PHASE2=2.
5V1.
32AUGATE2Pull-DownResistanceUG2RPD100mAsinkcurrent300450mΩUGATE2SinkCurrentUG2SNKUGATE2-PHASE2=2.
5V2.
33.
5AUGATE1toLGATE1DeadTimetUG1LG1DEAD102040nsLGATE1toUGATE1DeadTimetLG1UG1DEAD102040nsLGATE2toUGATE2DeadTimetLG2UG2DEAD102040nsUGATE2toLGATE2DeadTimetUG2LG2DEAD102040nsOperatingconditions:ADP=CSIP=CSIN=4Vand23V,VOUTS=VOUT=CSOP=CSON=8V,unlessotherwisenoted.
Boldfacelimitsapplyacrossthejunctiontemperaturerange,-10°Cto+125°Cunlessotherwisespecified.
(Continued)ParameterSymbolTestConditionsMin(Note6)TypMax(Note6)UnitISL953382.
SpecificationsFN8896Rev.
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5SMBusTimingSpecificationFigure4.
GateDriverTimingDiagramParametersSymbolTestConditionsMin(Note6)TypMax(Note6)UnitSMBusFrequencyFSMB10400kHzBus-FreeTimetBUF4.
7sStartConditionHoldTimefromSCLtHD:STA4sStartConditionSet-UpTimefromSCLtSU:STA4.
7sStopConditionSet-UpTimefromSCLtSU:STO4sSDAHoldTimefromSCLtHD:DAT300nsSDASet-UpTimefromSCLtSU:DAT250nsSCLLowPeriodtLOW4.
7sSCLHighPeriodtHIGH4sSMBusInactivityTimeoutMaximumchargingperiodwithoutanSMBusWritetoMaxSystemVoltageorADPCurrentregister175sNotes:6.
ParameterswithMINand/orMAXlimitsare100%testedat+25°C,unlessotherwisespecified.
Temperaturelimitsestablishedbycharacterizationandarenotproductiontested.
7.
Compliancetodatasheetlimitsisassuredbyoneormoremethods:productiontest,characterization,and/ordesign.
PWMUGATELGATE1V1VtUGFLGRtRLtFUtRUtFLtLGFUGRISL953383.
TypicalPerformanceCurvesFN8896Rev.
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TypicalPerformanceCurvesFigure5.
ForwardModeSoft-Start,12VADP,20VSYSFigure6.
ReverseMode,Soft-Start,12VADP,5VSYSFigure7.
VSYSVoltageRampsUpinForwardMode,Buck->Buck-Boost->BoostOperationModeTransitionFigure8.
ADPVoltageRampsUpinReverseMode,Buck->Buck-Boost->BoostOperationModeTransitionFigure9.
ReverseMode,5VADPto20VADPFigure10.
ReverseMode,20VADPto5VADPISL953383.
TypicalPerformanceCurvesFN8896Rev.
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19Figure11.
ForwardMode,5VSYSto20VSYSFigure12.
ForwardMode,20VSYSto5VSYSFigure13.
ForwardMode,OutputVoltageLooptoADPCurrentLoopTransition.
5VADP,12VSYS,SystemLoad0Ato0.
65AStep,ADPCurrentLimit=1.
5AFigure14.
ForwardMode,OutputVoltageLooptoAdapterVoltageLoopTransition.
6VADP,InputVoltageLimit=5.
12V,12VSYS,SystemLoad0Ato0.
78AStep,SystemCurrentLimit=5A,InputCurrentLimit=5AFigure15.
ForwardMode,ForceBuck-BoostModetoBoostMode.
10VADP,12VSYSFigure16.
ReverseMode,ForceBuck-BoostModetoBoostMode.
12VADP,10VSYSISL953383.
TypicalPerformanceCurvesFN8896Rev.
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19Figure17.
ForwardMode,5VADP,12VSYS,0A-2ATransientLoadFigure18.
ReverseMode,20VADP,12VSYS,0A-2ATransientLoadISL953384.
GeneralSMBusArchitectureFN8896Rev.
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GeneralSMBusArchitecture4.
1DataValidityThedataontheSDAlinemustbestableduringtheHIGHperiodoftheSCL,unlessgeneratingaSTARTorSTOPcondition.
TheHIGHorLOWstateofthedatalinecanchangeonlywhentheclocksignalontheSCLlineisLOW.
SeeFigure20.
Figure19.
GeneralSMBusArchitectureFigure20.
DataValidity6&/&RQWURO6'$&RQWURO2XWSXW,QSXW,QSXW60%866/$9(6&/&RQWURO2XWSXW6'$&RQWURO2XWSXW,QSXW,QSXW6WDWH0DFKLQH5HJLVWHUV0HPRU\(WF60%XV6ODYH6&/&21752/2XWSXW6'$&RQWURO2XWSXW,QSXW,QSXW&3860%XV0DVWHU7R2WKHU6ODYH'HYLFHV9''60%6&/6'$2XWSXW2XWSXW2XWSXW6WDWH0DFKLQH5HJLVWHUV0HPRU\(WFSDASCLDataLineStableDataValidChangeofDataAllowedISL953384.
GeneralSMBusArchitectureFN8896Rev.
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2STARTandSTOPConditionsAsFigure21shows,theSTARTconditionisaHIGHtoLOWtransitionoftheSDAlinewhileSCLisHIGH.
TheSTOPconditionisaLOWtoHIGHtransitionontheSDAlinewhileSCLisHIGH.
ASTOPconditionmustbesentbeforeeachSTARTcondition.
4.
3AcknowledgeEachaddressanddatatransmissionusesnineclockpulses.
Theninthpulseistheacknowledgebit(ACK).
Afterthestartcondition,themastersendssevenslaveaddressbitsandanR/Wbitduringthenexteightclockpulses.
Duringthenineclockpulse,thedevicethatrecognizesitsownaddressholdsthedatalinelowtoacknowledge(seeFigure22).
BoththemasterandslaveusetheACKbittoacknowledgereceiptofregisteraddressesanddata.
4.
4SMBusTransactionsAlltransactionsstartwithacontrolbytesentfromtheSMBusmasterdevice.
ThecontrolbytebeginswithaSTARTcondition,followedbysevenbitsofslaveaddress(seeTable1onpage20),andtheR/Wbit.
TheR/Wbitis"0"foraWRITEor"1"foraREAD.
IfanyslavedeviceontheSMBusbusrecognizesitsaddress,itacknowledgesbypullingtheSerialData(SDA)linelowforthelastclockcycleinthecontrolbyte.
Ifnoslaveexistsatthataddressoritisnotreadytocommunicate,thedatalineis"1",whichindicatesaNotAcknowledgecondition.
AfterthecontrolbyteissentandtheISL95338acknowledgesit,thesecondbytesentbythemastermustbearegisteraddressbytesuchas0x14fortheSystemCurrentLimitregister.
TheregisteraddressbytetellstheISL95338whichregisterthemasterwritesorreads.
SeeTable2onpage20fordetailsoftheregisters.
AftertheISL95338receivesaregisteraddressbyte,itrespondswithanacknowledge.
Figure21.
StartandStopWaveformsFigure22.
AcknowledgeontheSMBusSDASCLSStartConditionPStopConditionSDASCLStartAcknowledgefromSlave1289MSBISL953384.
GeneralSMBusArchitectureFN8896Rev.
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5ByteFormatEverybyteputontheSDAlinemustbeeightbitslongandmustbefollowedbyanacknowledgebit.
DataistransferredwiththeMostSignificantBit(MSB)firstandtheLeastSignificantBit(LSB)last.
TheLOBYTEdataistransferredbeforetheHIBYTEdata.
Forexample,whenwriting0x41A0,0xA0iswrittenfirstand0x41iswrittensecond.
4.
6SMBusandI2CCompatibilityTheISL95338SMBusminimuminputlogichighvoltageis2V,soitiscompatiblewithI2Cwithhigherthan2Vpull-uppowersupply.
TheISL95338SMBusregistersare16bits,soitiscompatiblewith16bitsI2Cor8bitsI2Cwithauto-incrementcapability.
ThechipdoesnotacknowledgeSMBuscommunicationunlesseitherADPorVOUTishigherthan4.
1V.
Figure23.
SMBusReadandWriteProtocolSSlaveADDR+WARegisterADDRALOByteDataAHIByteDataAPWritetoaRegisterSSlaveADDR+WARegisterADDRAReadfromaRegisterPSSlaveADDR+RALOByteDataAHIByteDataNPSStartPStopAAcknowledgeNNoAcknowledgeDrivenbytheMasterPDrivenbytheICISL953385.
ISL95338SMBusCommandsFN8896Rev.
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ISL95338SMBusCommandsTheISL95338receivescontrolinputsfromtheSMBusinterfaceafterPower-OnReset(POR).
TheserialinterfacecomplieswiththeSystemManagementBusSpecification,whichcanbedownloadedfromwww.
smbus.
org.
TheISL95338usestheSMBusRead-wordandWrite-wordprotocols(seeFigure23onpage19)tocommunicatewiththehostsystem.
TheISL95338isanSMBusslavedeviceanddoesnotinitiatecommunicationonthebus.
TheISL95338addressisprogrammablethroughADDR0andADDR1voltagelevels(seeTable1)tosupportmultipleISL95338ssharingacommonSMBus.
ConnecttheADDR0andADDR1pinstoeithergroundorVDD.
Bits1and2areforADDR0andADDR1pins,respectively.
The"1"meansthepinvoltageishigh,whilethe"0"meansthepinvoltageislow.
FromBits3to7,thevalueisfixedas10010.
TheaddressislatchedatrisingVDD2P7PORthreshold.
Thedata(SDA)andclock(SCL)pinshaveSchmitt-triggerinputsthatcanaccommodateslowedges.
Choosepull-upresistorsforSDAandSCLtoachieverisetimesaccordingtotheSMBusspecifications.
Theillustrationinthisdatasheetisbasedoncurrentsensing-resistorsRs1=20mΩandRs2=10mΩ,unlessotherwisespecified.
Table1.
AddressTableADDR0ADDR1Read/WriteBinaryAddressHexAddress0011001,00010X91H0001001,00000X90H0111001,01010X95H0101001,01000X94H1011001,00110X93H1001001,00100X92H1111001,01110X97H1101001,01100X96HTable2.
RegisterSummaryRegisterNamesRegisterAddressRead/WriteNumberofBitsDescriptionDefaultSystemCurrentLimit0X14R/W11[12:2]11-bit,LSBsize4mA,totalrange6080mA,with10mΩRS11.
5AForwardRegulatingVoltage0X15R/W12[14:3]12-bit,LSBsize12mV,seePROGTable21onpage375.
004V9.
000V12.
000V16.
008V20.
004VControl00X39R/W16Configurevariousoptions0x0000hInformation10X3AR16Indicatevariousstatus0x0000hControl10X3CR/W16Configurevariousoptions0x0000hControl20X3DR/W16Configurevariousoptions0x0000hForwardInputCurrent0X3FR/W11[12:2]11-bit,LSBsize4mA,totalrange6080mA,with20mΩRS11.
5AADPInputCurrentProchot#0X47R/W6[12:7]ADPinputcurrentPROCHOT#threshold.
Default3.
072A,128mAresolutionfor20mΩRs1,forForwardmodeonly.
3.
072ASystemInputCurrentProchot#0X48R/W6[13:8]SystemcurrenttowardsswitcherPROCHOT#threshold.
Default4.
096A,256mAresolutionfor10mΩRs2.
4.
096AReverseRegulatingVoltage0X49R/W12[14:3]12-bit,LSBsize12mVReversemoderegulatingvoltagereference5.
004VReverseOutputCurrent0X4AR/W6[12:7]6-bit,LSBsize128mA,totalrange4.
096AReversemodemaximumcurrentlimit0.
512AISL953385.
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1SettingSystemSideCurrentLimitTosetthesystemsidecurrentlimit,whichistheoutputcurrentinForwardmodeortheinputcurrentinReversemode,writea16-bitSystemCurrentLimitcommand(0X14Hor0b00010100)usingtheWrite-wordprotocolshowninFigure23onpage19andthedataformatshowninTable3fora10mΩRs2orTable4fora5mΩRs2.
TheISL95338limitsthesystemcurrentbylimitingtheCSOP-CSONvoltage.
Byusingtherecommendedcurrent-senseresistorvalueRs2=10mΩ,theregister'sLSBalwaystranslatesto4mAofoutputcurrent.
TheSystemCurrentLimitregisteracceptsanyoutputcurrentcommandbutonlythevalidregisterbitsarewrittentotheregisterandthemaximumvalueisclampedat6080mAforRs2=10mΩ.
AfterPOR,theSystemCurrentLimitregisterisresetto0x05DCH(1.
5A).
TheSystemCurrentLimitregistercanbereadbacktoverifyitscontent.
InputVoltageLimit0X4BR/W6[13:8]6-bit,LSBsize512mVForwardlowVINloopvoltagereference4.
096VControl30X4CR/W16Configurevariousoptions0x0000hInformation20X4DR16Indicatevariousstatus0x0000hControl40X4ER/W8[7:0]8-bit,configurevariousoptions0x00hManufacturerID0XFER8ManufacturersIDregister0x49hDeviceID0XFFR8DeviceIDregister-0x0D0x0DhTable3.
SystemCurrentLimitRegister0x14H(11-Bit,4mAStep,10mΩSenseResistor,x36)BitDescriptionNotused0=Add0mAofsystemcurrentlimit.
1=Add4mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add8mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add16mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add32mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add64mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add128mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add256mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add512mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add1024mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add2048mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add4096mAofsystemcurrentlimit.
NotusedMaximum=101111100006080mANote:Thegainforthesystemsidecurrent-sensingamplifiersisdifferentforForwardmodeandReversemode.
ThegaininReversemodeishalfofthatinForwardmode.
Therefore,inReversemode,thesensingcurrentvalueneedstobedoubledcomparedtothevaluesetintheSystemCurrentLimitregister.
Table2.
RegisterSummary(Continued)RegisterNamesRegisterAddressRead/WriteNumberofBitsDescriptionDefaultISL953385.
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2SettingInputCurrentLimitinForwardModeTosettheinputcurrentlimitinForwardmode,writea16-bitForwardInputCurrentcommand(0x3FHor0b00111111)usingtheWrite-wordprotocolshowninFigure23onpage19andthedataformatshowninTable5fora20mΩRs1orTable6fora10mΩRs1.
TheISL95338limitstheinputcurrentinForwardmodebylimitingtheCSIP-CSINvoltage.
Byusingtherecommendedcurrent-senseresistorvalues,theregister'sLSBalwaystranslatesto4mAofinputcurrent.
Anyinputcurrentlimitcommandisaccepted,butonlythevalidregisterbitsarewrittentotheForwardInputCurrentregisterandthemaximumvaluesareclampedat6080mAforRs1=20mΩ.
.
Table4.
ForwardOutputCurrentLimitRegister0x14H(11-Bit,8mAStep,5mΩSenseResistor,x36)BitDescriptionNotused0=Add0mAofsystemcurrentlimit.
1=Add8mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add16mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add32mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add64mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add128mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add256mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add512mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add1024mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add2048mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add4096mAofsystemcurrentlimit.
0=Add0mAofsystemcurrentlimit.
1=Add8192mAofsystemcurrentlimit.
NotusedMaximum=1011111000012160mATable5.
ForwardInputCurrentRegister0x3FH(11-Bit,4mAStep,20mΩSenseResistor,x18)BitDescriptionNotused0=Add0mAofinputcurrentlimitinForwardmode.
1=Add4mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add8mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add16mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add32mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add64mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add128mAofinputcurrentlimitinForwardmode.
ISL953385.
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190=Add0mAofinputcurrentlimitinForwardmode.
1=Add256mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add512mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add1024mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add2048mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add4096mAofinputcurrentlimitinForwardmode.
NotusedMaximum=101111100006080mA.
Table6.
ForwardInputCurrentRegister0x3FH(11-Bit,8mAStep,10mΩSenseResistor,x18)BitDescriptionNotused0=Add0mAofinputcurrentlimitinForwardmode.
1=Add8mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add16mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add32mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add64mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add128mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add256mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add512mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add1024mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add2048mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add4096mAofinputcurrentlimitinForwardmode.
0=Add0mAofinputcurrentlimitinForwardmode.
1=Add8192mAofinputcurrentlimitinForwardmode.
NotusedMaximum=1011111000012160mATable5.
ForwardInputCurrentRegister0x3FH(11-Bit,4mAStep,20mΩSenseResistor,x18)BitDescriptionISL953385.
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3SettingSystemRegulatingVoltageinForwardModeTosettheregulatingvoltageinForwardmode,writea16-bitForwardRegulatingVoltagecommand(0x15Hor0b00010101)usingtheWrite-wordprotocolshowninFigure23onpage19andthedataformatasshowninTable7.
TheoutputregulatingvoltagerangeinForwardmodeis2Vto24V.
TheForwardRegulatingVoltageregisteracceptsanyvoltagecommand,butonlythevalidregisterbitsarewrittentotheregister.
Themaximumvalueisclampedat24.
576V.
TheISL95338acceptsa0Vcommand,buttheregistervaluedoesnotchange.
TheVOUTSpinistheoutputvoltageregulationsensepointinForwardmode.
InForwardmode,youcanalsoconfiguretheregulatingoutputvoltagebysettingtheexternalvoltagedividerontheVOUTSpinwithoutchangingtheForwardRegulatingVoltageregistervalue.
Table7.
ForwardRegulatingVoltageRegister0x15H(12mVStep)BitDescriptionNotused0=Add0mVofregulatingvoltageinForwardmode.
1=Add12mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add24mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add48mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add96mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add192mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add384mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add768mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add1536mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add3072mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add6144mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add12288mVofregulatingvoltageinForwardmode.
0=Add0mVofregulatingvoltageinForwardmode.
1=Add24576mVofregulatingvoltageinForwardmode.
NotusedMaximum24576mVNote:Thedefaultreadingvalueofthisregisteris6.
288VwhenthechipispoweringupwithoutwritinganyvaluesbecauseoftheDACinitialvalue.
Thus,writetheneededvalueinthisregisterbeforeenablingforwardoutputvoltage.
ISL953385.
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4SettingPROCHOT#ThresholdforADPSideOvercurrentConditionTosetthePROCHOT#assertionthresholdfortheADPsideinputovercurrentconditioninForwardmode,writea16-bitADPsideProchot#command(0x47Hor0b01000111)usingtheWrite-wordprotocolshowninFigure23onpage19andthedataformatshowninTable8.
Byusingtherecommendedcurrent-senseresistorvalues,theregister'sLSBalwaystranslatesto128mAofinputcurrent.
TheADPsideProchot#registeracceptsanycurrentcommand,butonlythevalidregisterbitsarewrittentotheregister.
Themaximumvaluesareclampedat6400mAforRs1=20mΩ.
AfterPOR,theADPsideProchot#registerisresetto0x0C00H.
TheADPsideProchot#registercanbereadbacktoverifyitscontent.
IftheinputcurrentexceedstheADPsideProchot#registersetting,thePROCHOT#signalassertsafterthedebouncetimeprogrammedbytheControl2registerBitandlatchesonforaminimumtimeprogrammedbyControl2registerBit.
Table8.
ADPsideProchot#Register0x47H(20mΩSensingResistor,128mAStep,x18Gain)BitDescriptionNotused0=Add0mAofADPsideProchot#threshold.
1=Add128mAofADPsideProchot#threshold.
0=Add0mAofADPsideProchot#threshold.
1=Add256mAofADPsideProchot#threshold.
0=Add0mAofADPsideProchot#threshold.
1=Add512mAofADPsideProchot#threshold.
0=Add0mAofADPsideProchot#threshold.
1=Add1024mAofADPsideProchot#threshold.
0=Add0mAofADPsideProchot#threshold.
1=Add2048mAofADPsideProchot#threshold.
0=Add0mAofADPsideProchot#threshold.
1=Add4096mAofADPsideProchot#threshold.
NotusedMaximum=110010,6400mAISL953385.
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5SettingPROCHOT#ThresholdforSystemSideOvercurrentConditionTosetthePROCHOT#signalassertionthresholdforsystemsideinputovercurrentconditioninReversemode,writea16-bitSystemsideProchot#command(0x48Hor0b01001000)usingtheWrite-wordprotocolshowninFigure23onpage19andthedataformatshowninTable9.
Byusingtherecommendedcurrent-senseresistorvalues,theregister'sLSBalwaystranslatesto256mAofsystemsidecurrent.
TheSystemsideProchot#registeracceptsanycurrentcommand,butonlythevalidregisterbitsarewrittentotheregister.
Themaximumvaluesareclampedat12.
8AforRs2=10mΩ.
AfterPOR,theSystemsideProchot#registerisresetto0x1000H.
TheSystemsideProchot#registercanbereadbacktoverifyitscontent.
IfthesystemsidecurrentexceedstheSystemsideProchot#registersetting,thePROCHOT#signalassertsafterthedebouncetimeprogrammedbytheControl2registerBitandlatchesonforaminimumtimeprogrammedbyControl2registerBit.
5.
6SettingPROCHOT#DebounceTimeandDurationTimeControl2registerBitconfiguresthePROCHOT#signaldebouncetimebeforeitsassertionforADPsideProchot#andSystemsideProchot#.
Control2registerBitconfigurestheminimumdurationofthePROCHOT#signalwhenasserted.
5.
7ControlRegistersTheControl0,Control1,Control2,Control3,andControl4registersconfiguretheoperationoftheISL95338.
TochangecertainfunctionsoroptionsafterPOR,writea16-bitcontrolcommandtoControl0register(0x39Hor0b00111001),anda16-bitcontrolcommandtoControl1register(0x3CHor0b00111100),Control2register(0x3DHor0b00111101),Control3register(0x4CHor0b00111100),orControl4register(0x4EHor0b00111101)usingtheWrite-wordprotocolshowninFigure23onpage19andthedataformatshowninTables10,11,12,13,and14,respectively.
Table9.
SystemsideProchot#Register0x48H(10mΩSensingResistor,256mAStep,x18Gain)BitDescriptionNotused0=Add0mAofSystemsideProchot#threshold.
1=Add256mAofSystemsideProchot#threshold.
0=Add0mAofSystemsideProchot#threshold.
1=Add512mAofSystemsideProchot#threshold.
0=Add0mAofSystemsideProchot#threshold.
1=Add1024mAofSystemsideProchot#threshold.
0=Add0mAofSystemsideProchot#threshold.
1=Add2048mAofSystemsideProchot#threshold.
0=Add0mAofSystemsideProchot#threshold.
1=Add4096mAofSystemsideProchot#threshold.
0=Add0mAofSystemsideProchot#threshold.
1=Add8192mAofSystemsideProchot#threshold.
NotusedMaximum=110010,12800mAISL953385.
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19Table10.
Control0Register0x39HBitBitNameDescriptionForwardBuckandBuck-BoostPhaseComparatorThresholdOffsetAdjuststhephasecomparatorthresholdoffsetforforwardbuckandbuck-boost.
000=0mV001=1mV010=2mV011=3mV100=-4mV101=-3mV110=-2mV111=-1mVForwardandReverseBoostPhaseComparatorThresholdOffsetAdjuststhephasecomparatorthresholdoffsetforforwardandreverseboost.
000=0mV001=0.
5mV010=1mV011=1.
5mV100=-2mV101=-1.
5mV110=-1mV111=-0.
5mVReverseBuckandBuck-BoostPhaseComparatorThresholdOffsetAdjuststhephasecomparatorthresholdoffsetforreversebuckandbuck-boost.
000=0mV001=1mV010=2mV011=3mV100=-4mV101=-3mV110=-2mV111=-1mVHigh-SideFETShortDetectionThresholdConfiguresthehigh-sideFETshortdetectionPHASEnodevoltagethresholdduringlow-sideFETturn-on.
00=400mV(default)01=500mV10=600mV11=800mVNotusedDisableInputVoltageRegulationLoopDisablesorenablestheinputvoltageregulationloop.
0=Enableinputvoltageregulationloop(default)1=DisableinputvoltageregulationloopADPSideDischargeEnablesordisablestheADPsidechargerfunction.
0=Disable(default)1=EnableSystemSideDischargeEnablesordisablesthesystemsidechargerfunction.
0=Disable(default)1=EnableTable11.
Control1Register0x3CHBitBitNameDescriptionDisableDiode-EmulationComparatorEnablesordisablesdiode-emulationcomparator.
0=Diode-emulationcomparatorenabled(default)1=Diode-emulationcomparatordisabledAllowSinkingCurrentDuringNegativeDACTransitionEnablesordisablessinkingcurrentduringnegativeDACtransition.
0=SinkingcurrentduringnegativeDACtransitionenabled(default)1=SinkingcurrentduringnegativeDACtransitiondisabledSkipTrimDuringRestartEnablesordisablestrimreadduringrestart.
ProgramthisbitwhenPGOODishigh.
0=Readtrimduringrestart1=SkiptrimduringrestartSkipAutozeroDuringRestartEnablesordisablesautozeroduringrestart.
ProgramthisbitwhenPGOODishigh.
0=Autozeroduringrestart1=SkipautozeroduringrestartISL953385.
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19ReverseModeFunctionEnablesordisablesForceReversemodefunction.
0=DisableForceReversemodefunction(default)1=EnableForceReversemodefunctionAudioFilterEnablesordisablestheaudiofilterfunction.
NoaudiofilterfunctioninBuck-Boostmode.
0=Disable(default)1=EnableSwitchingFrequencyConfigurestheswitchingfrequency.
000=1000kHz001=910kHz010=850kHz011=787kHz100=744kHz101=695kHz110=660kHz111=620kHzNotusedDisableSystemSideCurrent-AmpWheninFWDModewithoutADPEnablesordisablesthesystemsidecurrentamplifierwheninFWDmodewithoutADP.
0=Enablesystemsidecurrentamplifier(default)1=DisablesystemsidecurrentamplifierBypassModeEnablesordisablestheBypassmode.
0=Disable(default)1=EnableFastREFmodeEnablesordisablesthefastREFmode.
0=Disable(default)1=EnableStopSwitchinginFWDModeEnablesordisablesthebuck-boostswitchingVOUToutput.
Whendisabled,theISL95338stopsswitchingandREFdropstoOV.
ValidinForwardmodeonly.
0=Enableswitching(default)1=DisableswitchingOVEnableorDisableDuringSlew-DownEnablesordisablesOVfaultwhentheVDACslewrateisdowninForwardandReversemode.
0=EnableOV(default)1=DisableOVForce5.
04VVDACEnablesordisablesforce5.
04VVDACinForwardandReversemode.
0=Disableforce5.
04VVDAC(default)1=Enableforce5.
04VVDACTable12.
Control2Register0x3DHBitBitNameDescriptionOVControlEnablesordisablesOV.
0=EnableOV(default)1=DisableOVUVControlEnablesordisablesUV.
0=EnableUV(default)1=DisableUVFaultRestartDebounceforReverseEnableConfiguresfaultrestartdebounceforreverseenable.
0=Debouncetimeis1.
3s(default)1=Debouncetimeis150msFaultRestartDebounceConfiguresfastfaultrestartdebounce.
0=Debouncetimeis1.
3sor150ms,dependsonBitsetting(default)1=Debouncetimeis200sor10s,dependsonBitsettingForwardRestartDebounceforForwardEnableConfiguresfaultrestartdebounceforforwardenable.
0=Debouncetimeis1.
3s(default)1=Debouncetimeis150msTable11.
Control1Register0x3CH(Continued)BitBitNameDescriptionISL953385.
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19PROCHOT#DebounceConfiguresthePROCHOT#debouncetimebeforeitsassertionforADPsideProchot#andSystemsideProchot#.
00:7s(default)01:100s10:500s11:1msPROCHOT#DurationConfigurestheminimumdurationofthePROCHOT#signalwhenasserted.
000=10ms(default)001=20ms010=15ms011=5ms100=1ms101=500s110=100s111=0sNotusedReverseFastSwapConfiguresreversefastswap.
0=Disablereversefastswap(default)1=EnablereversefastswapForwardFastSwapConfiguresforwardfastswap.
0=Disableforwardfastswap(default)1=EnableforwardfastswapNotUsedNotusedDisableWOCFaultEnablesordisablesWOCfault.
0=EnableWOC(default)1=DisableWOCSystemSideWOCThresholdConfigurestheSystemSideWOCfaultcomparatorvalue.
0=20mV(default)1=30mVTable13.
Control3Register0x4CHBitBitNameDescriptionRe-ReadPROGPinResistorSpecifieswhethertore-readthePROGpinresistorbeforeswitching.
0=Re-readPROGpinresistor(default)1=Donotre-readPROGpinresistorNotusedNotusedReverseStartupDebounceTimeConfiguresthestartupdebouncetimeforreversemode.
0=Debouncetimeis200s(default)1=Debouncetimeis10sForwardStartupDebounceTimeConfiguresthestartupdebouncetimeforforwardmode.
0=Debouncetimeis200s(default)1=Debouncetimeis10sForceOperatingModeEnablesordisablesForceOperatingmode.
0XX:Noeffect100:Noswitching,donotuse101:Buckmode110:Boostmode111:Buck-BoostmodeNotusedCurrentLoopFeedbackGainConfiguresthecurrentloopfeedbackgainforhighcurrent.
0=Gainx1(default)1=Gainx0.
5InputCurrentLimitLoopDisablestheinputcurrentlimitloop.
0=Enableinputcurrentlimitloop(default)1=DisableinputcurrentlimitloopTable12.
Control2Register0x3DH(Continued)BitBitNameDescriptionISL953385.
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8RegulatingVoltageRegisterinReverseModeTheReverseRegulatingVoltageregistercontainstheSMBusreadableandwritableReversemodeoutputregulationvoltagereference.
Thedefaultvalueis5.
004V.
Thisregisteracceptsanyvoltagecommandbutonlythevalidregisterbitsarewrittentotheregister.
However,theregistershouldnotbeprogrammedhigherthantherecommendedoperatingvoltage.
InReversemode,youcanalsoconfiguretheregulatingoutputvoltageontheADPsidebysettingtheexternalvoltagedividerontheADPpin,withoutchangingtheReverseRegulatingVoltageregistervalue.
NotUsedNotusedDisabledREFAmplifierforUsewithExternalReferenceDisablestheREFamplifier.
0=EnableREFamplifier(default)1=DisableREFamplifierDigitalResetResetsallSMBusregistervaluestoPORdefaultvalueandrestartsswitching.
0=Idle(default)1=ResetBuck-BoostSwitchingPeriodConfigurestheswitchingperiodinBuck-Boostmode.
0=Periodx1(default)1=Periodx2(halfswitchingfrequency)PGOODSettingConfiguresthePGGODassertcondition.
0=PGOODsuppresseduntilVREFequalstoVDAC(default)1=PGOODassertwhenswitchingstartsTable14.
Control4Register0x4EHBitBitNameDescriptionNotusedReverseModeCurrentPROCHOT#EnablesordisablestriggerPROCHOT#withcurrentinReversemode.
0=Enable(default)1=DisableForwardSleepModeEnablesordisablesChipSleepmodeinForwardmoderegardlessofADPvoltage.
RVSENpinorControl1bitcanoverridethisfunction.
0=Disable(default)1=EnableNotusedPROCHOT#ClearClearsPROCHOT#.
0=Idle(default)1=ClearPROCHOT#PROCHOT#LatchManuallyresetsPROCHOT#.
0=PROCHOT#signalauto-clear1=holdPROCHOT#lowwhentrippedTable15.
ReverseRegulatingVoltageRegister0x49HBitDescriptionNotused0=Add0mVofregulatingvoltageinReversemode.
1=Add12mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add24mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add48mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add96mVofregulatingvoltageinReversemode.
Table13.
Control3Register0x4CH(Continued)BitBitNameDescriptionISL953385.
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9OutputCurrentLimitRegisterinReverseModeTheReverseCurrentLimitregistercontainstheSMBusreadableandwritablereversecurrentlimit.
Thedefaultis512mA.
Thisregisteracceptsanycurrentcommand,butonlythevalidregisterbitsarewrittentotheregister.
Themaximumvaluesareclampedat4096mAforRs1=20mΩ.
0=Add0mVofregulatingvoltageinReversemode.
1=Add192mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add384mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add768mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add1536mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add3072mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add6144mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add12288mVofregulatingvoltageinReversemode.
0=Add0mVofregulatingvoltageinReversemode.
1=Add24576mVofregulatingvoltageinReversemode.
NotusedMaximum27456mVTable16.
ReverseCurrentLimitRegister0x4AHBitDescriptionNotused0=Add0mAofoutputcurrentlimitinReversemode.
1=Add128mAofoutputcurrentlimitinReversemode.
0=Add0mAofoutputcurrentlimitinReversemode.
1=Add256mAofoutputcurrentlimitinReversemode.
0=Add0mVofoutputcurrentlimitinReversemode.
1=Add512mAofoutputcurrentlimitinReversemode.
0=Add0mVofoutputcurrentlimitinReversemode.
1=Add1024mAofoutputcurrentlimitinReversemode.
0=Add0mVofoutputcurrentlimitinReversemode.
1=Add2048mAofoutputcurrentlimitinReversemode.
0=Add0mVofoutputcurrentlimitinReversemode.
1=Add4096mAofoutputcurrentlimitinReversemode.
NotusedMaximum4096mATable15.
ReverseRegulatingVoltageRegister0x49H(Continued)BitDescriptionISL953385.
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10InputVoltageLimitRegisterTheInputVoltageLimitregistercontainstheSMBusreadableandwritableinputvoltagelimits.
Thedefaultis4.
096V.
Thisregisteracceptsanycommand,butonlythevalidregisterbitsarewrittentotheregister.
Themaximumvaluesareclampedat18V.
5.
11InformationRegisterTheInformationRegistercontainsSMBusreadableinformationaboutmanufactureandoperatingmodes.
Tables18and19identifythebitlocationsoftheinformationavailable.
Table17.
InputVoltageLimitRegister0x4BHBitDescriptionNotused0=Add0mVofinputvoltagelimit.
1=Add512mVofinputvoltagelimit.
0=Add0mAofinputvoltagelimit.
1=Add1024mVofinputvoltagelimit.
0=Add0mVofinputvoltagelimit.
1=Add2048mVofinputvoltagelimit.
0=Add0mVofinputvoltagelimit.
1=Add4096mVofinputvoltagelimit.
0=Add0mVofinputvoltagelimit.
1=Add8192mVofinputvoltagelimit.
0=Add0mVofinputvoltagelimit.
1=Add16384mVofinputvoltagelimit.
NotusedMaximum18000mVTable18.
Information1Register0x3AHBitDescriptionNotusedIndicateswhetherSystemSideProchot#istripped.
0=SystemSideProchot#isnottripped1=SystemSideProchot#istrippedIndicateswhetherADPsideProchot#istripped.
0=ADPSideProchot#isnottripped1=ADPSideProchot#istrippedIndicatestheactivecontrolloop.
00=Voltagecontrolloopisactive01=Systemcurrentloopisactive10=ADPcurrentlimitloopisactive11=InputvoltageloopisactiveIndicateswhethertheinternalreferencecircuitisactive.
Bit=0indicatesthattheISL95338isinlowpowermode.
0=Referenceisnotactive1=ReferenceisactiveISL953385.
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19Table19.
Information2Register0x4DHBitDescriptionProgramresisterreadoutIndicatestheISL95338operationmode.
001:ForwardBoost010:ForwardBuck011:ForwardBuck-Boost101:ReverseBoost110:ReverseBuck111:ReverseBuck-BoostIndicatestheISL95338statemachinestatus.
0000=OFF0010=ADP0100=VSYS0110=EnableReversemode1000=EnableLDO51110=WAITNotusedNotusedIndicatesforwardswitchingenable.
0=Notenabled1=EnabledNotusedISL953386.
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ApplicationInformation6.
1R3ModulatorTheISL95338usestheRenesasRobustRippleRegulator(R3)modulationscheme.
TheR3modulatorcombinesthebestfeaturesoffixedfrequencyPWMandhystereticPWM,whileeliminatingmanyoftheirshortcomings.
Figure24conceptuallyshowstheR3modulatorcircuitandFigure25showstheoperationprinciplesinsteadystate.
ThefixedvoltagewindowbetweenVWandCOMPiscalledtheVWwindowinthefollowingdiscussion.
ThemodulatorchargestheripplecapacitorCRwithacurrentsourceequaltogm(VIN-VO)duringPWMon-timeanddischargestheripplecapacitorCRwithacurrentsourceequaltogmVOduringPWMoff-time,wheregmisagainfactor.
TheCrvoltageVCR,thereforeemulatestheinductorcurrentwaveform.
ThemodulatorturnsoffthePWMpulsewhenVCRreachesVWandturnsonthePWMpulsewhenitreachesCOMP.
BecausethemodulatorworkswithVcr,whichisalargeamplitudeandnoise-freesynthesizedsignal,itachieveslowerphasejitterthanaconventionalhystereticmodemodulator.
Figure26showstheoperationprinciplesduringdynamicresponse.
TheCOMPvoltagerisesduringdynamicresponseandturnsonPWMpulsesearlierandmorefrequentlytemporarily.
ThisbehaviorallowsforhighercontrolloopbandwidththanaconventionalfixedfrequencyPWMmodulatoratthesamesteady-stateswitchingfrequency.
TheR3modulatorcanoperateinDiodeEmulation(DE)modetoincreaselight-loadefficiency.
Forexample,inBuckDEmodethelow-sideMOSFETconductswhenthecurrentisflowingfromsource-to-drainanddoesnotallowreversecurrent,emulatingadiode.
AsshowninFigure27,whenLGATEison,thelow-sideMOSFETcarriescurrent,whichcreatesnegativevoltageonthephasenodeduetothevoltagedropacrosstheON-resistance.
TheICmonitorsthecurrentbymonitoringthephasenodevoltage.
ItturnsoffLGATEwhentheFigure24.
R3ModulatorFigure25.
R3ModulatorOperationPrinciplesinSteadyStateFigure26.
R3ModulatorOperationPrinciplesinDynamicResponseFigure27.
DiodeEmulationCOMPRILGMPHASECRVWSQPWMLCOVOVCR+++---COMPPWMVCRHystereticWindowVWPWMVCRVWCOMPUGATEPHASEILLGATEISL953386.
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19phasenodevoltagereacheszerotopreventtheinductorcurrentfromreversingthedirectionandcreatingunnecessarypowerloss.
Similaroperationsapplyforothermodes,suchasBoostandBuck-boostmode.
Iftheloadcurrentislightenough,asFigure27shows,theinductorcurrentreachesandstaysatzerobeforethenextphasenodepulse.
Atthisstage,theregulatorisinDiscontinuousConductionMode(DCM).
Iftheloadcurrentisheavyenough,theinductorcurrentneverreaches0AandtheregulatorisinCCM,althoughthecontrollerisinDEmode.
Figure28showstheoperationprincipleinDiodeEmulationmodeatlightload.
Theloadgetsincrementallylighterinthethreecasesfromtoptobottom.
ThePWMon-timeisdeterminedbytheVWwindowsize,therefore,itisthesame,makingtheinductorcurrenttrianglethesameinthethreecases.
TheR3modulatorclampstheripplecapacitorvoltageVCRinDEmodetomakeitmimictheinductorcurrent.
TheCOMPvoltagetakeslongertoreachVCR,whichnaturallystretchestheswitchingperiod.
Theinductorcurrenttrianglesmovefartherapartfromeachother,sothattheinductorcurrentaveragevalueisequaltotheloadcurrent.
Thereducedswitchingfrequencyhelpsincreaselight-loadefficiency.
6.
2ISL95338BidirectionalBuck-BoostVoltageRegulatorTheISL95338bidirectionalbuck-boostvoltageregulatordrivesanexternalN-channelMOSFETbridgecomprisedoftwotransistorpairsasshowninFigure2onpage5.
Thefirstpair,Q1andQ2,isabuckarrangementwiththetransistorcentertapconnectedtoaninductor"input",asisthecasewithabuckconverterinForwardmode.
Thesecondtransistorpair,Q3andQ4,isaboostarrangementwiththetransistorcentertapconnectedtothesameinductor's"output",asisthecasewithaboostconverterinForwardmode.
Thisarrangementsupportsthesameoperationmodeinreversedirection.
InForwardBuckmode,Q1andQ2turnonandoffalternatively,whileQ3remainsoffandQ4remainson.
InForwardBoostmode,Q3andQ4turnonandoffalternatively,whileQ1remainsonandQ2remainsoff.
InForwardBuck-Boostmode,Q1andQ3turnonatthesametime,Q3turnsoffandQ4turnson,Q1turnsoffandQ2turnson,andafterQ2andQ4turnoffatthesametime,andQ1andQ3turnonagain.
InForwardBypassmode,Q1andQ4arealwayson,whileQ2andQ3arealwaysoff.
InReverseBuckmode,Q3andQ4turnonandoffalternatively,whileQ2remainsoffandQ1remainson.
InReverseBoostmode,Q1andQ2turnonandoffalternatively,whileQ4remainsonandQ3remainsoff.
Figure28.
PeriodStretchingILILVCRILVCRVCRVWCCM/DCMBoundaryLightDCMDeepDCMVWVWISL953386.
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19InReverseBuck-Boostmode,Q4andQ2turnonatthesametime,Q2turnsoffandQ1turnson,Q4turnsoffandQ3turnson,andafterQ3andQ1turnoffatthesametimeandQ4andQ2turnonagain.
InReverseBypassmode,Q1andQ4arealwayson,exceptduringtheneededrefreshtime,whileQ2andQ3arealwaysoff.
InReversemode,theoutputsensingpointisCSIPpin.
TheISL95338optimizestheoperationmodetransitionalgorithmbyconsideringtheinputandoutputvoltageratioandtheloadcondition.
TheISL95338transitionsfromBoostmodetoBuck-BoostmodewhenADPvoltageVADPisrisingandishigherthan94%ofthesystembusvoltageVSYS,IfVADPishigherthan120%ofVSYS,theISL95338transitionsfromBuck-BoostmodetoBuckmodeunderanycircumstance.
Ataheavierload,themodetransitionpointchangesaccordinglytoaccommodatethedutycyclechangeduetothepowerlossonthevoltageregulatorcircuit.
WhentheADPvoltageVADPisfallingandislowerthan106%ofthesystembusvoltageVSYS,theISL95338transitionsfromBuckmodetoBuck-Boostmode.
IfVADPislowerthan80%ofVSYS,theISL95338transitionsfromBuck-BoostmodetoBoostmode.
Table20.
OperationModeModeQ1Q2Q3Q4ForwardBuckControlFETSync.
FETOFFONForwardBoostONOFFControlFETSync.
FETForwardBuck-BoostControlFETSync.
FETControlFETSync.
FETForwardBypassONOFFOFFONReverseBuckONOFFSync.
FETControlFETReverseBoostSync.
FETControlFETOFFONReverseBuck-BoostSync.
FETControlFETSync.
FETControlFETReverseBypassONOFFOFFONFigure29.
Buck-BoostRegulatorTopologyFigure30.
OperationMode&6,1&621&6,3&6234444928762.
7V,theISL95338digitalblockisactivated.
Thesoft-starttimecanbesetbytheexternalcapacitorontheREFpin.
TheISL95338sources1AcurrentoutoftheREFpintochargethisexternalcapacitor.
Itsvoltageisusedastheoutputvoltagereferenceinthesoft-startprocedure.
6.
4ProgrammingOptionsTheresistorfromthePROGpintoGNDprogramstheISL95338'sforwardoutputvoltageconfiguration.
Table21showstheprogramingoptions.
TheswitchingfrequencycanbechangedthroughSMBusControl1registerBitafterPOR.
SeetheSMBusControl1registerprogrammingtable(Table11)foradetaileddescription.
AfterPOR,theISL95338sources10AcurrentoutofthePROGpinandreadsthePROGpinvoltagetodeterminetheresistorvalue.
IftheISL95338ispoweredupfromreverseside,itdoesnotreadPROGresistor.
WhenFRWENisenabled,theISL95338resetstheforwardregulatingvoltageregistertoitsdefaultvaluesaccordingtothePROGpinsetting.
Bydefault,theADPcurrent-sensingresistorRs1is20mΩandVSYScurrent-sensingresistorRs2is10mΩ.
UsingtheseRs1=20mΩandRs2=10mΩoptionsresultsina4mA/LSBcorrelationintheSMBuscurrentcommands.
IftheRs1andRs2valuesaredifferentfromtheseRs1=20mΩandRs2=10mΩoptions,theSMBuscommandneedstobescaledaccordinglytoobtainthecorrectcurrent.
Smallercurrent-senseresistorvaluesreducethepowerlosswhereaslargercurrent-senseresistorvaluesgivebetteraccuracy.
Theillustrationinthisdatasheetisbasedoncurrent-sensingresistorsRs1=20mΩandRs2=10mΩunlessspecifiedotherwise.
Table21.
PROGPinProgrammingOptionsProg-GNDResistance(kΩ)DefaultForwardRegulatingVoltageMinMax0285.
00435.
771.
59.
00082.
513312.
00014721516.
008237open20.
004ISL953386.
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5DEOperationInDEmode,theISL95338usesaphasecomparatortomonitorthePHASEnodevoltagetothegroundorVOUTorADPvoltageduringthelow-sideswitchingFETon-timetodetecttheinductorcurrentzerocrossing,dependingontheoperationmode(Buck,Buck-Boost,orBoost)andpowerdeliverydirection(Forwardorreversedirection).
SeeTable22.
Thephasecomparatorneedsaminimumon-timeofthelow-sideswitchingFETforittorecognizetheinductorcurrentzerocrossing.
Ifthelow-sideswitchingFETon-timeistooshortforthephasecomparatortosuccessfullyrecognizetheinductorzerocrossing,theISL95338maylosediodeemulationability.
Topreventthisscenario,theISL95338usesaminimumlow-sideswitchingFETon-time.
Whentheintendedlow-sideswitchingFETon-timeisshorterthantheminimumvalue,theISL95338stretchestheswitchingperiodtokeepthelow-sideswitchingFETon-timeattheminimumvalue,whichcausestheCCMswitchingfrequencytodropbelowthesetpoint.
6.
6ForwardModeWhentheforwardfunctionisenabledwiththeSMBuscommandorFRWENpin(voltageishigherthan0.
8V)andDCINispoweredbyADP,andiftheADPispluggedinanditsvalueishigherthan4.
1V,theISL95338canoperateinForwardBuckmode,ForwardBoostmode,ForwardBuck-Boostmode,orForwardBypassmode.
Aftertheforwardoutputvoltagereachestheregulatingoutputvoltagerangesetbyregister0X15HBit,forwardpower-goodFWGPGassertstoHigh.
6.
7ReverseModeforUSBOTG(On-the-Go)WhenthereversefunctionisenabledwiththeSMBuscommand(Control1Bit11)orRVSENpin,andifanexternalvoltageisonsystemsideanditsvalueishigherthan4.
1V,theISL95338canoperateinReverseBuckmode,ReverseBoostmode,ReverseBuck-Boostmode,orReverseBypassmode.
RVSENisthedigitalinputpin.
The1.
3sor150msdebouncetimecanbesetbyControl2registerBit.
Afterthereverseoutputvoltagereachestheoutputvoltagesetbyregister0X49HBit,reversepower-goodRVSPGassertstoHigh.
BeforeReversemodestartsswitching,theCSIPpinvoltageneedstodropbelowthereverseoutputovervoltageprotectionthreshold(ReverseRegulatingVoltage+1177mV)first.
Thedefaultreverseoutputvoltageis5Vandprogrammableupto20VinReverseBuck,ReverseBuck-Boost,andReverseBoostmode.
InReverseBypassmode,thereverseoutputvoltage'smaximumvalueisprogrammableupto20V.
Thereversevoltageregister0X49Hcanbeusedtoconfigurethereverseoutputvoltage.
6.
8FastREFToachievefastREFinsomeapplications,thefastREFfunctioncanbeprogrammedbyControl1Bit3.
Ifthisbitisprogrammed,a1AcurrentsourcefortheREFpinisreplacedwith5kimpedancetogetfastertransitionsforREFvoltage.
Table22.
VoltageComparatorforDEOperationModeDirectionVoltageComparatorBuckForwardPHASE1toGNDBoostForwardPHASE1toVOUTBuck-BoostForwardPHASE1toVOUTBuckReversePHASE2toGNDBoostReversePHASE1toADPBuck-BoostReversePHASE1toADPISL953386.
ApplicationInformationFN8896Rev.
4.
00Page39of51Jul.
18.
196.
9FastSwapTheISL95338providesfastswapfunctioninForwardmodeandReversemode.
YoucanimplementthefastswapfunctioninForwardmodeinoneoftwoways(pinreverseorsoftwarereverse)bycompletingthefollowingsteps:Pinreversefastswapenable:1.
ProgramControl2Bit4(ReverseFastSwap).
2.
SkiptrimduringrestartbyprogrammingControl1Bit13.
3.
SkipautozeroduringrestartbyprogrammingControl1Bit12.
4.
EnableRVSENpin.
Softwarereversefastswapenable:1.
ProgramControl1Bit0(Force5.
04VVDAC).
2.
ProgramControl1Bit3(FastREF).
3.
SkiptrimduringrestartwithprogrammingControl1Bit13.
4.
SkipautozeroduringrestartwithprogrammingControl1Bit12.
5.
ProgramControl1Bit11(ForceReversemode).
Similarly,youcanimplementthefastswapfunctioninReversemodeinoneoftwoways(pinreverseorsoftwarereverse)byfollowingthestepsbelow:Pinforwardfastswapenable:1.
ProgramControl2Bit3(ForwardFastSwap).
2.
SkiptrimduringrestartbyprogrammingControl1Bit13.
3.
SkipautozeroduringrestartbyprogrammingControl1Bit12.
4.
DisabletheRVSENpin.
5.
EnabletheFWRENpin.
Softwareforwardfastswapenable:1.
ProgramControl1Bit0(Force5.
04VVDAC).
2.
ProgramControl1Bit3(FastREF).
3.
SkiptrimduringrestartbyprogrammingControl1Bit13.
4.
SkipautozeroduringrestartbyprogrammingControl1Bit12.
5.
Un-programControl1Bit11(ForceReversemode).
6.
10WayOvercurrentProtection(WOCP)TheISL95338providesWayOvercurrentProtection(WOCP)againstMOSFETshorts,systemsideandADPsideshorts,andinductorshorts.
TheISL95338monitorstheCSIP-CSINvoltageandCSON-CSOPvoltageandcomparesthemtotheWOCPthreshold12AforADPcurrentand20AforsystemsidecurrentinForwardmode.
WhentheWOCcomparatoristripped,theISL95338countsonetimewithineach10swindow.
IftheISL95338countsWOCto7timesin50ms,itstopsswitchingimmediately.
Afterthe1.
3sor150msdebouncetimeissetbyControl2registerBit,theISL95338goesthroughthestart-upsequencetoretry.
TheWOCPfunctioncanbedisabledthroughControl2registerBit.
6.
11ADPInputOvervoltageProtectionIftheADPpininputvoltageexceeds26.
4Vformorethan10s,theISL95338declaresanADPovervoltageconditionandstopsswitching.
WhentheADPvoltagedropsbelow25.
608Vformorethan100s,theISL95338startstoswitch.
ISL953386.
ApplicationInformationFN8896Rev.
4.
00Page40of51Jul.
18.
196.
12SystemOutputOvervoltageProtectionTheISL95338providessystemrailoutputovervoltageprotection.
IfthesystemvoltageVOUTSis1095mVhigherthantheForwardRegulatingVoltageregistersetvalueformorethan100s,itdeclaresthesystemovervoltage,de-assertsFWRPG,andstopsswitching.
Itresumesswitchingwiththe100sdebouncewhentheVOUTSislessthan542mVplusthesettingreferencevoltageforforward.
6.
13SystemOutputUndervoltageProtectionTheISL95338providessystemrailoutputundervoltageprotection.
IfthesystemvoltageVOUTSis818mVlowerthantheForwardRegulatingVoltageregistersetvalueformorethan1ms,itdeclaresthesystemundervoltage,de-assertsFWRPG,andrestarts.
6.
14ADPOutputOvervoltageProtectionTheISL95338providesADPrailoutputovervoltageprotection.
IftheADPvoltageADPSis1177mVhigherthantheReverseRegulatingVoltageregistersetvalueformorethan100s,itdeclarestheADPovervoltage,de-assertsRVSPG,andstopsswitching.
TheISL95338resumesswitchingwiththe100sdebouncewhenADPSislessthan583mVplusthesettingreferencevoltageforreverse.
6.
15ADPOutputUndervoltageProtectionTheISL95338providesADPrailoutputundervoltageprotection.
IftheADPvoltageVADPSis1177mVlowerthantheReverseRegulatingVoltageregistersetvalueformorethan1ms,itdeclarestheADPundervoltage,de-assertsRVSPG,andstopsswitching.
6.
16Over-TemperatureProtectionTheISL95338stopsswitchingforselfprotectionwhenthejunctiontemperatureexceeds+140°C.
TheISL95338resumesswitchingwhenthetemperaturefallsbelow+120°Candaftera100sdelay.
6.
17SwitchingPowerMOSFETGateCapacitanceTheISL95338includesaninternal5VLDOoutputattheVDDpinthatcanprovidetheswitchingMOSFETgatedriverpowerthroughtheVDDPpinwithanR-Cfilter.
The5VLDOoutputovercurrentprotectionthresholdis115mAnominal.
WhenselectingtheswitchingpowerMOSFET,theMOSFETgatecapacitanceshouldbeconsideredcarefullytoavoidoverloadingthe5VLDO,especiallyinBuck-BoostmodewhenfourMOSFETsareswitchingatthesametime.
ForoneMOSFET,thegatedrivecurrentcanbeestimatedbyEquation1:where:QgisthetotalgateADPwhichcanbefoundintheMOSFETdatasheetfSWisswitchingfrequencyRenesasrecommendsconnectinga2.
2μFceramiccapacitorfromtheVDDandVDDPpinstoGND.
TheeffectivecapacitanceoftheMLCCat5Vmustbeatleast0.
4μFafterderatingandatleast1.
6timestheeffectivecapacitanceattheBOOTpin.
UseaX7RorX5Rceramiccapacitor.
IdriverQgfSW=(EQ.
1)ISL953386.
ApplicationInformationFN8896Rev.
4.
00Page41of51Jul.
18.
196.
18ADPSideInputFilterTheADPcableparasiticinductanceandcapacitancecancausesomevoltageringingoranovershootspikeattheADPconnectornodewhentheADPishotpluggedin.
ThisvoltagespikecandamagetheISL95338pinsconnectingtotheADPconnectornode.
OnelowcostsolutionistoaddanR-CsnubbercircuitattheADPconnectornodetoclampthevoltagespikeasshowninFigure31.
ApracticalvalueoftheR-Csnubberis2.
2Ωto2.
2F;however,theappropriatevaluesandpowerratingshouldbecarefullycharacterizedbasedontheactualdesign.
Additionally,itisnotrecommendedtoaddapurecapacitorattheADPconnectornode,whichcancauseanevenbiggervoltagespikeduetotheADPcableortheADPcurrentpathparasiticinductance.
Figure31.
AdapterInputRCSnubberCircuitISL95338ACINAdapterConnectorRiCi2.
22.
2FRCSnubberISL953387.
GeneralApplicationInformationFN8896Rev.
4.
00Page42of51Jul.
18.
197.
GeneralApplicationInformationThisdesignguideprovidesahigh-levelexplanationofthestepsnecessarytodesignasingle-phasepowerconverter.
Itisassumedthatthereaderisfamiliarwithmanyofthebasicskillsandtechniquesreferencedinthefollowingsections.
Inadditiontothisguide,completereferencedesignsthatincludeschematics,billofmaterials,andexampleboardlayoutsareprovided.
7.
1SelecttheLCOutputFilterThedutycycleofanidealbuckconverterinCCMisafunctionoftheinputandtheoutputvoltage.
ThisrelationshipiswrittenbyEquation2:Theoutputinductorpeak-to-peakripplecurrentiswrittenbyEquation3:Atypicalstep-downDC/DCconverterhasanIP-Pof20%to40%ofthemaximumDCoutputloadcurrentforapracticaldesign.
ThevalueofIP-PisselectedbaseduponseveralcriteriasuchasMOSFETswitchingloss,inductorcoreloss,andtheresistivelossoftheinductorwinding.
TheDCcopperlossoftheinductorcanbeestimatedbyEquation4:whereILOADistheconverteroutputDCcurrent.
ThecopperlosscanbesignificantsoattentionhastobegiventotheDCRselection.
Anotherfactortoconsiderwhenchoosingtheinductorisitssaturationcharacteristicsatelevatedtemperatures.
Asaturatedinductorcandestroycircuitcomponents.
ADC/DCbuckregulatormusthaveoutputcapacitanceCO,intowhichripplecurrentIP-Pcanflow.
CurrentIP-PdevelopsacorrespondingripplevoltageVP-PacrossCO,whichisthesumofthevoltagedropacrossthecapacitorESRandofthevoltagechangestemmingfromADPmovedinandoutofthecapacitor.
ThesetwovoltagesarewrittenbyEquations5and6:Iftheoutputoftheconverterhastosupportaloadwithhighpulsatingcurrent,severalcapacitorsneedtobeparalleledtoreducethetotalESRuntiltherequiredVP-Pisachieved.
Theinductanceofthecapacitorcancauseabriefvoltagedipiftheloadtransienthasanextremelyhighslewrate.
Lowinductancecapacitorsshouldbeconsideredinthisscenario.
AcapacitordissipatesheatasafunctionofRMScurrentandfrequency.
BesurethatIP-PissharedbyasufficientquantityofparalleledcapacitorssothattheyoperatebelowthemaximumratedRMScurrentatfSW.
Takeintoaccountthattheratedvalueofacapacitorcanfadeasmuchas50%astheDCvoltageacrossitincreases.
DVOUTVIN-=(EQ.
2)(EQ.
3)IP-PVOUT1D–fSWL-=(EQ.
4)PCOPPERILOAD2DCR=VESRIP-PESR=(EQ.
5)VCIP-P8COfSW-=(EQ.
6)ISL953387.
GeneralApplicationInformationFN8896Rev.
4.
00Page43of51Jul.
18.
197.
2SelecttheInputCapacitorTheimportantparametersfortheinputcapacitancearethevoltageratingandtheRMScurrentrating.
Forreliableoperation,selectcapacitorswithvoltageandcurrentratingsabovethemaximuminputvoltageandcapableofsupplyingtheRMScurrentrequiredbytheswitchingcircuit.
Theirvoltageratingshouldbeatleast1.
25timesgreaterthanthemaximuminputvoltage,whileavoltageratingof1.
5timesisapreferredrating.
Thetypicalapplicationcircuit(Figure1onpage2)isagraphoftheinputcapacitorRMSripplecurrent,normalizedrelativetooutputloadcurrent,asafunctionofdutycycleandisadjustedforconverterefficiency.
ThenormalizedRMSripplecurrentcalculationiswrittenasEquation7:where:IMAXisthemaximumcontinuousILOADoftheconverterkisamultiplier(0to1)correspondingtotheinductorpeak-to-peakrippleamplitudeexpressedasaratioofIMAX(0to1)Disthedutycyclethatisadjustedtotakeintoaccounttheefficiencyoftheconverter,whichiswrittenasEquation8:Inadditiontothecapacitance,somelowESLceramiccapacitanceisrecommendedtodecouplebetweenthedrainofthehigh-sideMOSFETandthesourceofthelow-sideMOSFET.
7.
3SelecttheSwitchingPowerMOSFETTypically,aMOSFETcannottolerateevenbriefexcursionsbeyonditsmaximumdrain-to-sourcevoltagerating.
TheMOSFETsusedinthepowerstageoftheconvertershouldhaveamaximumVDSratingthatexceedsthesumoftheuppervoltagetoleranceoftheinputpowersourceandthevoltagespikethatoccurswhentheMOSFETswitchesoff.
SeveralpowerMOSFETsarereadilyavailablethatareoptimizedforDC/DCconverterapplications.
Thepreferredhigh-sideMOSFETemphasizeslowgateADPsothatthedevicespendstheleastamountoftimedissipatingpowerinthelinearregion.
Unlikethelow-sideMOSFET,whichhasthedrain-to-sourcevoltageclampedbyitsFigure32.
NormalizedRMSInputCurrentatEFF=1(EQ.
7)ICINRMSNORMALIZED,IMAXD1D–Dk212-+IMAX-=DVOUTVINEFF=(EQ.
8)NormalizedInputRMSRippleCurrentDutyCycle00.
10.
20.
30.
40.
60.
70.
80.
91.
00.
500.
120.
240.
360.
480.
60k=0.
75k=0.
5k=0.
25k=0VS=±2.
5Vk=1ISL953387.
GeneralApplicationInformationFN8896Rev.
4.
00Page44of51Jul.
18.
19bodydiodeduringturnoff,thehigh-sideMOSFETturnsoffwithaVDSofapproximatelyVIN-VOUT,plusthespikeacrossit.
Thepreferredlow-sideMOSFETemphasizeslowrDS(ON)whenfullysaturatedtominimizeconductionloss.
NotethatthisisanoptimalconfigurationofMOSFETselectionforlowdutycycleapplications(D"to"12:2>"inTables5and6onpage23.
Addedaparagraphtosection6.
17onpage40andsection7.
4onpage44.
Addedsection7.
6"SelectingtheDCINFilter"onpage45.
Addedsection8"Layout"onpages46through48.
Appliednewtemplate.
3.
00Oct.
26.
18Changed24Vto20Vinthedescriptiononpage1.
UpdatedtheOrderingInformationtableonpage6byaddingtapeandreelinformationtothetable,updatingNote1,removingNote2,andupdatingthepackagedrawinginformation.
Under"AbsoluteMaximumRatings"onpage9updatedthefollowing:-ChangedVOUT,VOUTS,CSOP,CSONmaximumspecificationfrom+27Vto+24V.
-ChangedBOOT1,BOOT2maximumspecificationfromVDDP+27VtoVDDP+25V.
-ChangedBOOT1-PHASE1,BOOT2-PHASE2maximumspecificationfrom+0.
3Vto+6.
5Vandmoveditupinthetable.
-UpdatedCSIP-CSIN,CSOP-CSONbyaddingaminimumspecificationandchangingthemaximumspecificationfrom2mAto+0.
3V.
-Addedanewrow(RVSEN,FRWEN,SDA,SCL,FRWPG,RVSPG,PROCHOT#).
ReplacedPODL32.
4x4AwiththeL32.
4x4D.
RemovedAboutIntersilsectionandupdatedthedisclaimer.
2.
00Nov.
30.
17AddedWayOvercurrentProtection(WOCP)functiontodatasheet.
1.
00Oct.
5.
17RemovedWayOvercurrentProtection(WOCP)function0.
00Aug.
15.
17InitialreleaseISL9533810.
PackageOutlineDrawingFN8896Rev.
4.
00Page50of51Jul.
18.
1910.
PackageOutlineDrawingL32.
4x4D32LEADTHINQUADFLATNO-LEADPLASTICPACKAGERev2,10/16PIN#16INDEXAREATYPICALRECOMMENDEDLANDPATTERNTOPVIEWlocatedwithinthezoneindicated.
Thepin#1identifiermaybeUnlessotherwisespecified,tolerance:Decimal±0.
05.
Tiebarshown(ifpresent)isanon-functionalfeature.
Theconfigurationofthepin#1identifierisoptional,butmustbebetween0.
15mmand0.
25mmfromtheterminaltip.
DimensionbappliestothemetallizedterminalandismeasuredDimensionsin()forReferenceOnly.
DimensioningandtolerancingconformtoASMEY14.
5m-1994.
6.
eitheramoldormarkfeature.
3.
5.
4.
2.
Dimensionsareinmillimeters.
1.
NOTES:DETAIL"X"0.
00MIN0.
05MAX50.
2REFCBOTTOMVIEWINDEXAREAPIN16(4X)0.
104.
00AB4.
00B0.
10MAC28X0.
402.
802.
70±0.
1032X0.
20432X0.
30b(32X0.
50)(28X0.
40)(32X0.
20)(2.
80)(3.
90TYP)(2.
70)SEEDETAIL"X"0.
08CSEATINGPLANE0.
75BASEPLANECC0.
10//SIDEVIEW0.
035NOMINALForthemostrecentpackageoutlinedrawing,seeL32.
4x4D.
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