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2008MicrochipTechnologyInc.
DS21034E-page1MCP3202Features12-Bitresolution±1LSBmaximumDNL±1LSBmaximumINL(MCP3202-B)±2LSBmaximumINL(MCP3202-C)Analoginputsprogrammableassingle-endedorpseudo-differentialpairsOn-chipsampleandholdSPIserialinterface(modes0,0and1,1)Singlesupplyoperation:2.
7V-5.
5V100kspsmaximumsamplingrateatVDD=5V50kspsmaximumsamplingrateatVDD=2.
7VLowpowerCMOStechnology500nAtypicalstandbycurrent,5Amaximum550Amaximumactivecurrentat5VIndustrialtemprange:-40°Cto+85°C8-pinMSOP,PDIP,SOICandTSSOPpackagesApplicationsSensorInterfaceProcessControlDataAcquisitionBatteryOperatedSystemsFunctionalBlockDiagramDescriptionTheMicrochipTechnologyInc.
MCP3202isasuccessiveapproximation12-bitAnalog-to-Digital(A/D)Converterwithon-boardsampleandholdcircuitry.
TheMCP3202isprogrammabletoprovideasinglepseudo-differentialinputpairordualsingle-endedinputs.
DifferentialNonlinearity(DNL)isspecifiedat±1LSB,andIntegralNonlinearity(INL)isofferedin±1LSB(MCP3202-B)and±2LSB(MCP3202-C)versions.
CommunicationwiththedeviceisdoneusingasimpleserialinterfacecompatiblewiththeSPIprotocol.
Thedeviceiscapableofconversionratesofupto100kspsat5Vand50kspsat2.
7V.
TheMCP3202deviceoperatesoverabroadvoltagerange(2.
7V-5.
5V).
Low-currentdesignpermitsoperationwithtypicalstandbyandactivecurrentsofonly500nAand375A,respectively.
TheMCP3202isofferedin8-pinMSOP,PDIP,TSSOPand150milSOICpackages.
PackageTypesComparatorSampleandHold12-BitSARDACControlLogicCS/SHDNVSSVDDCLKDOUTShiftRegisterCH0ChannelMuxInputCH1DINMCP320212348765CH0CH1VSSCS/SHDNVDD/VREFCLKDOUTDINPDIP,MSOP,SOIC,TSSOP2.
7VDualChannel12-BitA/DConverterwithSPISerialInterfaceMCP3202DS21034E-page22008MicrochipTechnologyInc.
NOTES:2008MicrochipTechnologyInc.
DS21034E-page3MCP32021.
0ELECTRICALCHARACTERISTICSAbsoluteMaximumRatingsVDD–VSS7.
0VAllInputsandOutputsw.
r.
t.
VSS0.
6VtoVDD+0.
6VStorageTemperature65°Cto+150°CAmbienttemperaturewithpowerapplied.
.
.
.
.
.
.
–65°Cto+150°CMaximumJunctionTemperature(TJ)150°CESDProtectionOnAllPins(HBM)4kVNotice:Stressesabovethoselistedunder"AbsoluteMaximumRatings"maycausepermanentdamagetothedevice.
Thisisastressratingonlyandfunctionaloperationofthedeviceatthoseoranyotherconditionsabovethoseindicatedintheoperationallistingsofthisspecificationisnotimplied.
Exposuretomaximumratingconditionsforextendedperiodsmayaffectdevicereliability.
ELECTRICALCHARACTERISTICSElectricalCharacteristics:Unlessotherwisenoted,allparametersapplyatVDD=5.
5V,VSS=0V,TA=-40°Cto+85°C,fSAMPLE=100kspsandfCLK=18*fSAMPLE.
ParameterSymMin.
Typ.
Max.
UnitsConditionsConversionRate:ConversionTimetCONV——12clockcyclesAnalogInputSampleTimetSAMPLE1.
5clockcyclesThroughputRatefSAMPL————10050kspskspsVDD=VREF=5VVDD=VREF=2.
7VDCAccuracy:Resolution12bitsIntegralNonlinearityINL——±0.
75±1±1±2LSBLSBMCP3202-BMCP3202-CDifferentialNonlinearityDNL—±0.
5±1LSBNomissingcodesovertemperatureOffsetError—±1.
25±3LSBGainError—±1.
25±5LSBDynamicPerformance:TotalHarmonicDistortionTHD—-82—dBVIN=0.
1Vto4.
9V@1kHzSignal-to-NoiseandDistortion(SINAD)SINAD—72—dBVIN=0.
1Vto4.
9V@1kHzSpuriousFreeDynamicRangeSFDR—86—dBVIN=0.
1Vto4.
9V@1kHzAnalogInputs:InputVoltageRangeforCH0orCH1inSingle-EndedModeVSS—VDDVInputVoltageRangeforIN+inPseudo-DifferentialModeIN+IN-—VDD+IN-SeeSections3.
1and4.
1InputVoltageRangeforIN-inPseudo-DifferentialModeIN-VSS-100—VSS+100mVSeeSections3.
1and4.
1LeakageCurrent—.
001±1μASwitchResistanceRSS—1k—SeeFigure4-1SampleCapacitorCSAMPLE—20—pFSeeFigure4-1DigitalInput/Output:DataCodingFormatStraightBinaryHighLevelInputVoltageVIH0.
7VDD——VLowLevelInputVoltageVIL——0.
3VDDVNote1:Thisparameterisestablishedbycharacterizationandnot100%tested.
2:Becausethesamplecapwilleventuallylosecharge,effectiveclockratesbelow10kHzcanaffectlinearityperformance,especiallyatelevatedtemperatures.
SeeSection6.
2"MaintainingMinimumClockSpeed"formoreinformation.
MCP3202DS21034E-page42008MicrochipTechnologyInc.
TEMPERATURECHARACTERISTICSHighLevelOutputVoltageVOH4.
1——VIOH=-1mA,VDD=4.
5VLowLevelOutputVoltageVOL——0.
4VIOL=1mA,VDD=4.
5VInputLeakageCurrentILI-10—10AVIN=VSSorVDDOutputLeakageCurrentILO-10—10AVOUT=VSSorVDDPinCapacitance(AllInputs/Outputs)CIN,COUT——10pFVDD=5.
0V(Note1)TA=+25°C,f=1MHzTimingParameters:ClockFrequencyfCLK——1.
80.
9MHzMHzVDD=5V(Note2)VDD=2.
7V(Note2)ClockHighTimetHI—2MHzClockLowTimetLO—2MHzCSFallToFirstRisingCLKEdgetSUCS100——nsDataInputSetupTimetSU50——nsDataInputHoldTimetHD50——nsCLKFallToOutputDataValidtDO——200nsSeeTestCircuits,Figure1-2CLKFallToOutputEnabletEN——200nsSeeTestCircuits,Figure1-2CSRiseToOutputDisabletDIS——100nsSeeTestCircuits,Figure1-2Note1CSDisableTimetCSH500——nsDOUTRiseTimetR——100nsSeeTestCircuits,Figure1-2Note1DOUTFallTimetF——100nsSeeTestCircuits,Figure1-2Note1PowerRequirements:OperatingVoltageVDD2.
7—5.
5VOperatingCurrentIDD—375550AVDD=5.
0V,DOUTunloadedStandbyCurrentIDDS—0.
55ACS=VDD=5.
0VElectricalSpecifications:Unlessotherwiseindicated,VDD=+2.
7Vto+5.
5V,VSS=GND.
ParametersSymMinTypMaxUnitsConditionsTemperatureRangesSpecifiedTemperatureRangeTA-40—+85°COperatingTemperatureRangeTA-40—+85°CStorageTemperatureRangeTA-65—+150°CThermalPackageResistancesThermalResistance,8L-MSOPθJA—211—°C/WThermalResistance,8L-PDIPθJA—89.
5—°C/WThermalResistance,8L-SOICθJA—149.
5—°C/WThermalResistance,8L-TSSOPθJA—139—°C/WELECTRICALCHARACTERISTICS(CONTINUED)ElectricalCharacteristics:Unlessotherwisenoted,allparametersapplyatVDD=5.
5V,VSS=0V,TA=-40°Cto+85°C,fSAMPLE=100kspsandfCLK=18*fSAMPLE.
ParameterSymMin.
Typ.
Max.
UnitsConditionsNote1:Thisparameterisestablishedbycharacterizationandnot100%tested.
2:Becausethesamplecapwilleventuallylosecharge,effectiveclockratesbelow10kHzcanaffectlinearityperformance,especiallyatelevatedtemperatures.
SeeSection6.
2"MaintainingMinimumClockSpeed"formoreinformation.
2008MicrochipTechnologyInc.
DS21034E-page5MCP3202FIGURE1-1:SerialTiming.
FIGURE1-2:TestCircuits.
CSCLKDINMSBINtSUtHDtSUCStCSHtHItLODOUTtENtDOtRtFLSBMSBOUTtDISNULLBITVIHTDISCSDOUTWaveform1*DOUTWaveform290%10%*Waveform1isforanoutputwithinternalconditionssuchthattheoutputishigh,unlessdisabledbytheoutputcontrol.
Waveform2isforanoutputwithinternalconditionssuchthattheoutputislow,unlessdisabledbytheoutputcontrol.
VoltageWaveformsfortDISTestPoint1.
4VDOUTLoadcircuitfortR,tF,tDO3kCL=100pFTestPointDOUTLoadcircuitfortDISandtEN3k100pFtDISWaveform2tDISWaveform1CSCLKDOUTtEN12B11VoltageWaveformsfortENtENWaveformVDDVDD/2VSS34DOUTtRVoltageWaveformsfortR,tFCLKDOUTtDOVoltageWaveformsfortDOtFVOHVOLMCP3202DS21034E-page62008MicrochipTechnologyInc.
NOTES:2008MicrochipTechnologyInc.
DS21034E-page7MCP32022.
0TYPICALPERFORMANCECHARACTERISTICSNote:Unlessotherwiseindicated,VDD=5V,VSS=0V,fSAMPLE=100ksps,fCLK=18*fSAMPLE,TA=+25°C.
FIGURE2-1:IntegralNonlinearity(INL)vs.
SampleRate.
FIGURE2-2:IntegralNonlinearity(INL)vs.
VDD.
FIGURE2-3:IntegralNonlinearity(INL)vs.
Code(RepresentativePart).
FIGURE2-4:IntegralNonlinearity(INL)vs.
SampleRate(VDD=2.
7V).
FIGURE2-5:IntegralNonlinearity(INL)vs.
VDD.
FIGURE2-6:IntegralNonlinearity(INL)vs.
Code(RepresentativePart,VDD=2.
7V).
Note:Thegraphsprovidedfollowingthisnoteareastatisticalsummarybasedonalimitednumberofsamplesandareprovidedforinformationalpurposesonly.
Theperformancecharacteristicslistedhereinarenottestedorguaranteed.
Insomegraphs,thedatapresentedmaybeoutsidethespecifiedoperatingrange(e.
g.
,outsidespecifiedpowersupplyrange)andthereforeoutsidethewarrantedrange.
-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
00255075100125150SampleRate(ksps)INL(LSB)PositiveINLNegativeINL-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
03.
03.
54.
04.
55.
0VDD(V)INL(LSB)PositiveINLNegativeINLfSAMPLE=100ksps-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
005121024153620482560307235844096DigitalCodeINL(LSB)-2.
0-1.
5-1.
0-0.
50.
00.
51.
01.
52.
0020406080100SampleRate(ksps)INL(LSB)VDD=2.
7VPositiveINLNegativeINL-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
02.
53.
03.
54.
04.
55.
0VDD(V)INL(LSB)PositiveINLNegativeINLfSAMPLE=50ksps-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
005121024153620482560307235844096DigitalCodeINL(LSB)VDD=2.
7VFSAMPLE=50kspsMCP3202DS21034E-page82008MicrochipTechnologyInc.
Note:Unlessotherwiseindicated,VDD=5V,VSS=0V,fSAMPLE=100ksps,fCLK=18*fSAMPLE,TA=+25°C.
FIGURE2-7:IntegralNonlinearity(INL)vs.
Temperature.
FIGURE2-8:DifferentialNonlinearity(DNL)vs.
SampleRate.
FIGURE2-9:DifferentialNonlinearity(DNL)vs.
VDD.
FIGURE2-10:IntegralNonlinearity(INL)vs.
Temperature(VDD=2.
7V).
FIGURE2-11:DifferentialNonlinearity(DNL)vs.
SampleRate(VDD=2.
7V).
FIGURE2-12:DifferentialNonlinearity(DNL)vs.
VDD.
-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
0-50-250255075100Temperature(°C)INL(LSB)PositiveINLNegativeINL-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
00255075100125150SampleRate(ksps)DNL(LSB)PositiveDNLNegativeDNL-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
03.
03.
54.
04.
55.
0VDD(V)DNL(LSB)PositiveDNLNegativeDNLfSAMPLE=100ksps-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
0-50-250255075100Temperature(°C)INL(LSB)PositiveINLVDD=2.
7VfSAMPLE=50kspsNegativeINL-2.
0-1.
5-1.
0-0.
50.
00.
51.
01.
52.
0020406080100SampleRate(ksps)DNL(LSB)VDD=2.
7VPositiveDNLNegativeDNL-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
02.
53.
03.
54.
04.
55.
0VDD(V)DNL(LSB)PositiveDNLNegativeDNLfSAMPLE=50ksps2008MicrochipTechnologyInc.
DS21034E-page9MCP3202Note:Unlessotherwiseindicated,VDD=5V,VSS=0V,fSAMPLE=100ksps,fCLK=18*fSAMPLE,TA=+25°C.
FIGURE2-13:DifferentialNonlinearity(DNL)vs.
Code(RepresentativePart).
FIGURE2-14:DifferentialNonlinearity(DNL)vs.
Temperature.
FIGURE2-15:GainErrorvs.
VDD.
FIGURE2-16:DifferentialNonlinearity(DNL)vs.
Code(RepresentativePart,VDD=2.
7V).
FIGURE2-17:DifferentialNonlinearity(DNL)vs.
Temperature(VDD=2.
7V).
FIGURE2-18:OffsetErrorvs.
VDD.
-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
005121024153620482560307235844096DigitalCodeDNL(LSB)-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
0-50-250255075100Temperature(°C)DNL(LSB)PositiveDNLNegativeDNL-2.
0-1.
5-1.
0-0.
50.
00.
51.
01.
52.
02.
53.
03.
54.
04.
55.
0VDD(V)GainError(LSB)fSAMPLE=50kspsfSAMPLE=100kspsfSAMPLE=10ksps-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
005121024153620482560307235844096DigitalCodeDNL(LSB)VDD=2.
7VfSAMPLE=50ksps-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
0-50-250255075100Temperature(°C)DNL(LSB)PositiveDNLVDD=2.
7VfSAMPLE=50kspsNegativeDNL0.
00.
20.
40.
60.
81.
01.
21.
41.
61.
82.
02.
53.
03.
54.
04.
55.
0VDD(V)OffsetError(LSB)fSAMPLE=10kspsfSAMPLE=50kspsfSAMPLE=100kspsMCP3202DS21034E-page102008MicrochipTechnologyInc.
Note:Unlessotherwiseindicated,VDD=5V,VSS=0V,fSAMPLE=100ksps,fCLK=18*fSAMPLE,TA=+25°C.
FIGURE2-19:GainErrorvs.
Temperature.
FIGURE2-20:Signal-to-NoiseRatio(SNR)vs.
InputFrequency.
FIGURE2-21:TotalHarmonicDistortion(THD)vs.
InputFrequency.
FIGURE2-22:OffsetErrorvs.
Temperature.
FIGURE2-23:Signal-to-NoiseandDistortion(SINAD)vs.
InputFrequency.
FIGURE2-24:Signal-to-NoiseandDistortion(SINAD)vs.
SignalLevel.
-1.
0-0.
8-0.
6-0.
4-0.
20.
00.
20.
40.
60.
81.
0-50-250255075100Temperature(°C)GainError(LSB)VDD=5VfSAMPLE=100VDD=2.
7VfSAMPLE=50ksps0102030405060708090100110100InputFrequency(kHz)SNR(dB)VDD=2.
7VfSAMPLE=50kspsVDD=5VfSAMPLE=100ksps-100-90-80-70-60-50-40-30-20-100110100InputFrequency(kHz)THD(dB)VDD=2.
7VfSAMPLE=50kspsVDD=5VfSAMPLE=100ksps0.
00.
20.
40.
60.
81.
01.
21.
41.
61.
82.
0-50-250255075100Temperature(°C)OffsetError(LSB)VDD=5VfSAMPLE=100kspsVDD=2.
7VfSAMPLE=50ksps0102030405060708090100110100InputFrequency(kHz)SINAD(dB)VDD=2.
7VfSAMPLE=50kspsVDD=5VfSAMPLE=100ksps01020304050607080-40-35-30-25-20-15-10-50InputSignalLevel(dB)SINAD(dB)VDD=2.
7VfSAMPLE=50kspsVDD=5VfSAMPLE=100ksps2008MicrochipTechnologyInc.
DS21034E-page11MCP3202Note:Unlessotherwiseindicated,VDD=5V,VSS=0V,fSAMPLE=100ksps,fCLK=18*fSAMPLE,TA=+25°C.
FIGURE2-25:EffectiveNumberofBits(ENOB)vs.
VDD.
FIGURE2-26:SpuriousFreeDynamicRange(SFDR)vs.
InputFrequency.
FIGURE2-27:FrequencySpectrumof10kHzinput(RepresentativePart).
FIGURE2-28:EffectiveNumberofBits(ENOB)vs.
InputFrequency.
FIGURE2-29:PowerSupplyRejection(PSR)vs.
RippleFrequency.
FIGURE2-30:FrequencySpectrumof1kHzinput(RepresentativePart,VDD=2.
7V).
9.
09.
510.
010.
511.
011.
512.
02.
02.
53.
03.
54.
04.
55.
0VDD(V)ENOB(rms)fSAMPLE=50kspsfSAMPLE=100ksps0102030405060708090100110100InputFrequency(kHz)SFDR(dB)VDD=2.
7VfSAMPLE=50kspsVDD=5VfSAMPLE=100ksps-130-120-110-100-90-80-70-60-50-40-30-20-10001000020000300004000050000Frequency(Hz)Amplitude(dB)VDD=5VfSAMPLE=100kspsfINPUT=9.
985kHz4096points8.
08.
59.
09.
510.
010.
511.
011.
512.
0110100InputFrequency(kHz)ENOB(rms)VDD=5VFSAMPLE=100kspsVDD=2.
7VFSAMPLE=50ksps-80-70-60-50-40-30-20-100110100100010000RippleFrequency(kHz)PowerSupplyRejection(dB)-130-120-110-100-90-80-70-60-50-40-30-20-1000500010000150002000025000Frequency(Hz)Amplitude(dB)VDD=2.
7VfSAMPLE=50kspsfINPUT=998.
76Hz4096pointsMCP3202DS21034E-page122008MicrochipTechnologyInc.
Note:Unlessotherwiseindicated,VDD=5V,VSS=0V,fSAMPLE=100ksps,fCLK=18*fSAMPLE,TA=+25°C.
FIGURE2-31:IDDvs.
VDD.
FIGURE2-32:IDDvs.
ClockFrequency.
FIGURE2-33:IDDvs.
Temperature.
FIGURE2-34:IDDSvs.
VDD.
FIGURE2-35:IDDSvs.
Temperature.
FIGURE2-36:AnalogInputleakagecurrentvs.
Temperature.
0501001502002503003504004505002.
02.
53.
03.
54.
04.
55.
05.
56.
0VDD(V)IDD(A)AllpointsatFCLK=1.
8MHzexceptatVDD=2.
5V,FCLK=900kHz05010015020025030035040045050010100100010000ClockFrequency(kHz)IDD(A)VDD=5VVDD=2.
7V050100150200250300350400450500-50-250255075100Temperature(°C)IDD(A)VDD=5VFCLK=1.
8MHzVDD=2.
7VFCLK=900kHz010203040506070802.
02.
53.
03.
54.
04.
55.
05.
56.
0VDD(V)IDDS(pA)CS=VDD0.
010.
101.
0010.
00100.
00-50-250255075100Temperature(°C)IDDS(nA)VDD=CS=5V0.
00.
20.
40.
60.
81.
01.
21.
41.
61.
82.
0-50-250255075100Temperature(°C)AnalogInputLeakage(nA)VDD=5VFCLK=1.
8MHz2008MicrochipTechnologyInc.
DS21034E-page13MCP32023.
0PINDESCRIPTIONSThedescriptionsofthepinsarelistedinTable3.
1.
Additionaldescriptionsofthedevicepinsfollows.
TABLE3-1:PINFUNCTIONTABLE3.
1AnalogInputs(CH0/CH1)Analoginputsforchannels0and1respectively.
Thesechannelscanbeprogrammedtobeusedastwoindependentchannelsinsingleended-modeorasasinglepseudo-differentialinputwhereonechannelisIN+andonechannelisIN–.
SeeSection5.
0"SerialCommunications"forinformationonprogrammingthechannelconfiguration.
3.
2ChipSelect/Shutdown(CS/SHDN)TheCS/SHDNpinisusedtoinitiatecommunicationwiththedevicewhenpulledlowandwillendaconversionandputthedeviceinlowpowerstandbywhenpulledhigh.
TheCS/SHDNpinmustbepulledhighbetweenconversions.
3.
3SerialClock(CLK)TheSPIclockpinisusedtoinitiateaconversionandtoclockouteachbitoftheconversionasittakesplace.
SeeSection6.
2"MaintainingMinimumClockSpeed"forconstraintsonclockspeed.
3.
4SerialDataInput(DIN)TheSPIportserialdatainputpinisusedtoclockininputchannelconfigurationdata.
3.
5SerialDataOutput(DOUT)TheSPIserialdataoutputpinisusedtoshiftouttheresultsoftheA/Dconversion.
Datawillalwayschangeonthefallingedgeofeachclockastheconversiontakesplace.
MCP3202SymbolDescriptionMSOP,PDIP,SOIC,TSSOP1CS/SHDNChipSelect/ShutdownInput2CH0Channel0AnalogInput3CH1Channel1AnalogInput4VSSGround5DINSerialDataIn6DOUTSerialDataOut7CLKSerialClock8VDD/VREF+2.
7Vto5.
5VPowerSupplyandReferenceVoltageInputMCP3202DS21034E-page142008MicrochipTechnologyInc.
NOTES:2008MicrochipTechnologyInc.
DS21034E-page15MCP32024.
0DEVICEOPERATIONTheMCP3202A/DConverteremploysaconventionalSARarchitecture.
Withthisarchitecture,asampleisacquiredonaninternalsample/holdcapacitorfor1.
5clockcyclesstartingonthesecondrisingedgeoftheserialclockafterthestartbithasbeenreceived.
Followingthissampletime,theinputswitchoftheconverteropensandthedeviceusesthecollectedchargeontheinternalsampleandholdcapacitortoproduceaserial12-bitdigitaloutputcode.
Conversionratesof100kspsarepossibleontheMCP3202.
SeeSection6.
2"MaintainingMinimumClockSpeed"forinformationonminimumclockrates.
Communicationwiththedeviceisdoneusinga3-wireSPI-compatibleinterface.
4.
1AnalogInputsTheMCP3202deviceoffersthechoiceofusingtheanaloginputchannelsconfiguredastwosingle-endedinputsorasinglepseudo-differentialinput.
Configurationisdoneaspartoftheserialcommandbeforeeachconversionbegins.
Whenusedinthepseudo-differentialmode,CH0andCH1areprogrammedastheIN+andIN–inputsaspartofthecommandstringtransmittedtothedevice.
TheIN+inputcanrangefromIN–toVREF(VDD+IN–).
TheIN–inputislimitedto±100mVfromtheVSSrail.
TheIN–inputcanbeusedtocancelsmallsignalcom-mon-modenoisewhichispresentonboththeIN+andIN–inputs.
FortheA/DConvertertomeetspecification,thechargeholdingcapacitor(CSAMPLE)mustbegivenenoughtimetoacquirea12-bitaccuratevoltagelevelduringthe1.
5clockcyclesamplingperiod.
TheanaloginputmodelisshowninFigure4-1.
Inthisdiagram,itisshownthatthesourceimpedance(RS)addstotheinternalsamplingswitch(RSS)impedance,directlyaffectingthetimethatisrequiredtochargethecapacitor,CSAMPLE.
Consequently,largersourceimpedancesincreasetheoffset,gain,andintegrallinearityerrorsoftheconversion.
Ideally,theimpedanceofthesignalsourceshouldbenearzero.
ThisisachievablewithanoperationalamplifiersuchastheMCP601whichhasaclosedloopoutputimpedanceoftensofohms.
TheadverseaffectsofhighersourceimpedancesareshowninFigure4-2.
Whenoperatinginthepseudo-differentialmode,ifthevoltagelevelofIN+isequaltoorlessthanIN–,theresultantcodewillbe000h.
IfthevoltageatIN+isequaltoorgreaterthan{[VDD+(IN–)]–1LSB},thentheoutputcodewillbeFFFh.
IfthevoltagelevelatIN–ismorethan1LSBbelowVSS,thenthevoltagelevelattheIN+inputwillhavetogobelowVSStoseethe000houtputcode.
Conversely,ifIN-ismorethan1LSBaboveVSS,thentheFFFhcodewillnotbeseenunlesstheIN+inputlevelgoesaboveVDDlevel.
4.
2DigitalOutputCodeThedigitaloutputcodeproducedbyanA/DConverterisafunctionoftheinputsignalandthereferencevoltage.
FortheMCP3202,VDDisusedasthereferencevoltage.
AstheVDDlevelisreduced,theLSBsizeisreducedaccordingly.
ThetheoreticaldigitaloutputcodeproducedbytheA/DConverterisshownbelow.
EQUATION4-1:DigitalOutputCode4096VINVDD-=where:VIN=analoginputvoltageVDD=supplyvoltageMCP3202DS21034E-page162008MicrochipTechnologyInc.
FIGURE4-1:AnalogInputModel.
FIGURE4-2:MaximumClockFrequencyvs.
InputResistance(RS)tomaintainlessthana0.
1LSBdeviationinINLfromnominalconditions.
CPINVARSSCHx7pFVT=0.
6VVT=0.
6VILEAKAGESamplingSwitchSSRS=1kWCSAMPLE=DACcapacitanceVSSVDD=20pF±1nALegendVA=signalsourceRSS=sourceimpedanceCHx=inputchannelpadCPIN=inputpincapacitanceVT=thresholdvoltageILEAKAGE=leakagecurrentatthepinduetovariousjunctionsSS=samplingswitchRS=samplingswitchresistorCSAMPLE=sample/holdcapacitance0.
00.
20.
40.
60.
81.
01.
21.
41.
61.
82.
0100100010000InputResistance(Ohms)ClockFrequency(MHz)VDD=5VVDD=2.
7V2008MicrochipTechnologyInc.
DS21034E-page17MCP32025.
0SERIALCOMMUNICATIONS5.
1OverviewCommunicationwiththeMCP3202isdoneusingastandardSPI-compatibleserialinterface.
InitiatingcommunicationwiththedeviceisdonebybringingtheCSlinelow.
SeeFigure5-1.
IfthedevicewaspoweredupwiththeCSpinlow,itmustbebroughthighandbacklowtoinitiatecommunication.
ThefirstclockreceivedwithCSlowandDINhighwillconstituteastartbit.
TheSGL/DIFFbitandtheODD/SIGNbitfollowthestartbitandareusedtoselecttheinputchannelconfiguration.
TheSGL/DIFFisusedtoselectsingleendedorpsuedo-differentialmode.
TheODD/SIGNbitselectswhichchannelisusedinsingleendedmode,andisusedtodeterminepolarityinpseudo-differentialmode.
FollowingtheODD/SIGNbit,theMSBFbitistransmittedtoandisusedtoenabletheLSBfirstformatforthedevice.
IftheMSBFbitishigh,thenthedatawillcomefromthedeviceinMSBfirstformatandanyfurtherclockswithCSlowwillcausethedevicetooutputzeros.
IftheMSBFbitislow,thenthedevicewilloutputtheconvertedwordLSBfirstafterthewordhasbeentransmittedintheMSBfirstformat.
SeeFigure5-2.
Table5-1showstheconfigurationbitsfortheMCP3202.
Thedevicewillbegintosampletheanaloginputonthesecondrisingedgeoftheclock,afterthestartbithasbeenreceived.
Thesampleperiodwillendonthefallingedgeofthethirdclockfollowingthestartbit.
OnthefallingedgeoftheclockfortheMSBFbit,thedevicewilloutputalownullbit.
Thenextsequential12clockswilloutputtheresultoftheconversionwithMSBfirstasshowninFigure5-1.
Dataisalwaysoutputfromthedeviceonthefallingedgeoftheclock.
Ifall12databitshavebeentransmittedandthedevicecontinuestoreceiveclockswhiletheCSisheldlow,(andMSBF=1),thedevicewilloutputtheconversionresultLSBfirstasshowninFigure5-2.
IfmoreclocksareprovidedtothedevicewhileCSisstilllow(aftertheLSBfirstdatahasbeentransmitted),thedevicewillclockoutzerosindefinitely.
Ifnecessary,itispossibletobringCSlowandclockinleadingzerosontheDINlinebeforethestartbit.
Thisisoftendonewhendealingwithmicrocontroller-basedSPIportsthatmustsend8bitsatatime.
RefertoSection6.
1"UsingtheMCP3202withMicrocon-troller(MCU)SPIPorts"formoredetailsonusingtheMCP3202deviceswithhardwareSPIports.
FIGURE5-1:CommunicationwiththeMCP3202usingMSBfirstformatonly.
TABLE5-1:CONFIGURATIONBITSFORTHEMCP3202ConfigBitsChannelSelectionGNDSGL/DIFFODD/SIGN01SingleEndedMode10+—-11—+-Pseudo-DifferentialMode00IN+IN-01IN-IN+CSCLKDINDOUTMSHI-ZNullBitB11B10B9B8B7B6B5B4B3B2B1B0*HI-ZtSAMPLEtCONVSGL/DIFFStarttCYCtCSHtCYC*Aftercompletingthedatatransfer,iffurtherclocksareappliedwithCSlow,theA/DConverterwilloutputzerosindefinitely.
SeeFigure5-2belowfordetailsonobtainingLSBfirstdata.
**tDATA:duringthistime,thebiascurrentandthecomparatorpowerdownwhilethereferenceinputbecomesahigh-impedancenode,leavingtheCLKrunningtoclockouttheLSB-firstdataorzeros.
tDATA**tSUCSODD/SIGNBFDon'tCareSGL/DIFFStartODD/SIGNMCP3202DS21034E-page182008MicrochipTechnologyInc.
FIGURE5-2:CommunicationwithMCP3202usingLSBfirstformat.
NullBitB11B10B9B8B7B6B5B4B3B2B1B0B1B2B3B4B5B6B7B8B9B10B11CSCLKDOUTHI-ZHI-Z(MSB)tCONVtDATA**PowerDowntSAMPLEDINtCYCtCSH*Aftercompletingthedatatransfer,iffurtherclocksareappliedwithCSlow,theA/DConverterwilloutputzerosindefinitely.
**tDATA:Duringthistime,thebiascircuitandthecomparatorpowerdownwhilethereferenceinputbecomesahigh-impedancenode,leavingtheCLKrunningtoclockoutLSBfirstdataorzeroes.
tSUCSODD/SIGNStartSGL/DIFFMSBFDon'tCare*2008MicrochipTechnologyInc.
DS21034E-page19MCP32026.
0APPLICATIONSINFORMATION6.
1UsingtheMCP3202withMicrocontroller(MCU)SPIPortsWithmostmicrocontrollerSPIports,itisrequiredtosendgroupsofeightbits.
ItisalsorequiredthatthemicrocontrollerSPIportbeconfiguredtoclockoutdataonthefallingedgeofclockandlatchdatainontherisingedge.
Dependingonhowcommunicationroutinesareused,itisverypossiblethatthenumberofclocksrequiredforcommunicationwillnotbeamultipleofeight.
Therefore,itmaybenecessaryfortheMCUtosendmoreclocksthanareactuallyrequired.
Thisisusuallydonebysending'leadingzeros'beforethestartbit,whichareignoredbythedevice.
Asanexample,Figure6-1andFigure6-2showhowtheMCP3202canbeinterfacedtoaMCUwithahardwareSPIport.
Figure6-1depictstheoperationshowninSPIMode0,0,whichrequiresthattheSCLKfromtheMCUidlesinthe'low'state,whileFigure6-2showsthesimilarcaseofSPIMode1,1wheretheclockidlesinthe'high'state.
AsshowninFigure6-1,thefirstbytetransmittedtotheA/DConvertercontainssevenleadingzerosbeforethestartbit.
Arrangingtheleadingzerosthiswayproducestheoutput12bitstofallinpositionseasilymanipulatedbytheMCU.
TheMSBisclockedoutoftheA/DConverteronthefallingedgeofclocknumber12.
Afterthesecondeightclockshavebeensenttothedevice,theMCUreceivebufferwillcontainthreeunknownbits(theoutputisathigh-impedanceuntilthenullbitisclockedout),thenullbitandthehighestorderfourbitsoftheconversion.
Afterthethirdbytehasbeensenttothedevice,thereceiveregisterwillcontainthelowestordereightbitsoftheconversionresults.
Easiermanipulationoftheconverteddatacanbeobtainedbyusingthismethod.
FIGURE6-1:SPICommunicationusing8-bitsegments(Mode0,0:SCLKidleslow).
FIGURE6-2:SPICommunicationusing8-bitsegments(Mode1,1:SCLKidleshigh).
12345678910111213141516CSSCLKDINX=Don'tCareBits1718192021222324DOUTNULLBITB11B10B9B8B7B6B5B4B3B2B1B0HI-ZMCUlatchesdatafromA/DConverterDataisclockedoutofA/DConverteronfallingedgesonrisingedgesofSCLKMSBFDon'tCareODD/SIGNStartXXXXXXXXXXXXXXXXXXB7B6B5B4B3B2B1B0B11B10B9B80XXXXXXXXXXX1StartBit(Null)MCUTransmittedData(Alignedwithfallingedgeofclock)MCUReceivedData(Alignedwithrisingedgeofclock)MSBFSGL/DIFFXXSGL/DIFFODD/SIGNDatastoredintoMCUreceiveregisteraftertransmissionoffirst8bitsDatastoredintoMCUreceiveregisteraftertransmissionofsecond8bitsDatastoredintoMCUreceiveregisteraftertransmissionoflast8bits12345678910111213141516CSSCLKDINX=Don'tCareBits1718192021222324DOUTDon'tCareNULLBITB11B10B9B8B6B5B4B3B2B1B0HI-Z000000XXXXXXXXXXXXXB7B6B5B4B3B2B1B0B11B10B9B80XXXXXXXXXXXMCUlatchesdatafromA/DConverteronrisingedgesofSCLKDataisclockedoutofA/DConverteronfallingedgesStartBit(Null)StartMCUTransmittedData(Alignedwithfallingedgeofclock)MCUReceivedData(Alignedwithrisingedgeofclock)B71SGL/DIFFMSBFODD/SIGN0SGL/DIFFODD/SIGNMSBFDatastoredintoMCUreceiveregisteraftertransmissionoffirst8bitsDatastoredintoMCUreceiveregisteraftertransmissionofsecond8bitsDatastoredintoMCUreceiveregisteraftertransmissionoflast8bitsMCP3202DS21034E-page202008MicrochipTechnologyInc.
6.
2MaintainingMinimumClockSpeedWhentheMCP3202initiatesthesampleperiod,chargeisstoredonthesamplecapacitor.
Whenthesampleperiodiscomplete,thedeviceconvertsonebitforeachclockthatisreceived.
Itisimportantfortheusertonotethataslowclockratewillallowchargetobleedoffthesamplecapwhiletheconversionistakingplace.
At85°C(worstcasecondition),thepartwillmaintainproperchargeonthesamplecapacitorforatleast1.
2msafterthesampleperiodhasended.
Thismeansthatthetimebetweentheendofthesampleperiodandthetimethatall12databitshavebeenclockedoutmustnotexceed1.
2ms(effectiveclockfrequencyof10kHz).
Failuretomeetthiscriteriamayinducelinearityerrorsintotheconversionoutsidetheratedspecifications.
Itshouldbenotedthatduringtheentireconversioncycle,theA/DConverterdoesnotrequireaconstantclockspeedordutycycle,aslongasalltimingspecificationsaremet.
6.
3Buffering/FilteringtheAnalogInputsIfthesignalsourcefortheA/DConverterisnotalow-impedancesource,itwillhavetobebufferedorinaccurateconversionresultsmayoccur.
Itisalsorecommendedthatafilterbeusedtoeliminateanysignalsthatmaybealiasedbackintotheconversionresults.
ThisisillustratedinFigure6-3belowwhereanopampisusedtodrivetheanaloginputoftheMCP3202.
Thisamplifierprovidesalow-impedanceoutputfortheconverterinputandalow-passfilter,whicheliminatesunwantedhighfrequencynoise.
Low-pass(anti-aliasing)filterscanbedesignedusingMicrochip'sinteractiveFilterLabsoftware.
FilterLabwillcalculatecapacitorandresistorvalues,aswellas,determinethenumberofpolesthatarerequiredfortheapplication.
Formoreinformationonfilteringsignals,seetheapplicationnoteAN699"Anti-AliasingAnalogFiltersforDataAcquisitionSystems".
"FIGURE6-3:TheMCP601OperationalAmplifierisusedtoimplementa2ndorderanti-aliasingfilterforthesignalbeingconvertedbytheMCP3202.
6.
4LayoutConsiderationsWhenlayingoutaprintedcircuitboardforusewithanalogcomponents,careshouldbetakentoreducenoisewhereverpossible.
Abypasscapacitorshouldalwaysbeusedwiththisdeviceandshouldbeplacedascloseaspossibletothedevicepin.
Abypasscapacitorvalueof0.
1Fisrecommended.
Digitalandanalogtracesshouldbeseparatedasmuchaspossibleontheboardandnotracesshouldrununderneaththedeviceorthebypasscapacitor.
Extraprecautionsshouldbetakentokeeptraceswithhighfrequencysignals(suchasclocklines)asfaraspossiblefromanalogtraces.
Useofananaloggroundplaneisrecommendedinordertokeepthegroundpotentialthesameforalldevicesontheboard.
ProvidingVDDconnectionstodevicesina"star"configurationcanalsoreducenoisebyeliminatingcurrentreturnpathsandassociatederrors.
SeeFigure6-4.
FormoreinformationonlayouttipswhenusingA/DConverters,refertoAN688"LayoutTipsfor12-BitA/DConverterApplications"(DS00688).
FIGURE6-4:VDDtracesarrangedina'Star'configurationinordertoreduceerrorscausedbycurrentreturnpaths.
MCP3202VDD10FIN-IN+-+VINC1C20.
1FMCP601R1R2R3R4VDDConnectionDevice1Device2Device3Device42008MicrochipTechnologyInc.
DS21034E-page21MCP32027.
0PACKAGINGINFORMATION7.
1PackageMarkingInformationXXXXXXXXXXXXXNNNYYWW8-LeadPDIP(300mil)Example:8-LeadSOIC(150mil)Example:XXXXXXXXXXXXYYWWNNN8-LeadTSSOPExample:3202-BI/P^^25608173202-BISN^^08172568-LeadMSOPExample:XXXXYYWWNNNXXXXXXYWWNNN202CI8172563202CI817256Legend:XX.
.
.
XCustomer-specificinformationYYearcode(lastdigitofcalendaryear)YYYearcode(last2digitsofcalendaryear)WWWeekcode(weekofJanuary1isweek'01')NNNAlphanumerictraceabilitycodePb-freeJEDECdesignatorforMatteTin(Sn)*ThispackageisPb-free.
ThePb-freeJEDECdesignator()canbefoundontheouterpackagingforthispackage.
Note:IntheeventthefullMicrochippartnumbercannotbemarkedononeline,itwillbecarriedovertothenextline,thuslimitingthenumberofavailablecharactersforcustomer-specificinformation.
3e3e3e3eMCP3202DS21034E-page222008MicrochipTechnologyInc.
/HDG3ODVWLF0LFUR6PDOO2XWOLQH3DFNDJH06>0623@1RWHV3LQYLVXDOLQGH[IHDWXUHPD\YDU\EXWPXVWEHORFDWHGZLWKLQWKHKDWFKHGDUHD'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(3',3@1RWHV3LQYLVXDOLQGH[IHDWXUHPD\YDU\EXWPXVWEHORFDWHGZLWKWKHKDWFKHGDUHD6LJQLILFDQW&KDUDFWHULVWLF'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGSHUVLGH'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(62,&@1RWHV3LQYLVXDOLQGH[IHDWXUHPD\YDU\EXWPXVWEHORFDWHGZLWKLQWKHKDWFKHGDUHD6LJQLILFDQW&KDUDFWHULVWLF'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(76623@1RWHV3LQYLVXDOLQGH[IHDWXUHPD\YDU\EXWPXVWEHORFDWHGZLWKLQWKHKDWFKHGDUHD'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(<0%6&%DVLF'LPHQVLRQ7KHRUHWLFDOO\H[DFWYDOXHVKRZQZLWKRXWWROHUDQFHV5()5HIHUHQFH'LPHQVLRQXVXDOO\ZLWKRXWWROHUDQFHIRULQIRUPDWLRQSXUSRVHVRQO\1RWH)RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDWKWWSZZZPLFURFKLSFRPSDFNDJLQJ8QLWV0,//,0(7(56'LPHQVLRQ/LPLWV0,11200$;1XPEHURI3LQV13LWFKH%6&2YHUDOO+HLJKW$±±0ROGHG3DFNDJH7KLFNQHVV$6WDQGRII$±2YHUDOO:LGWK(%6&0ROGHG3DFNDJH:LGWK(0ROGHG3DFNDJH/HQJWK')RRW/HQJWK/)RRWSULQW/5())RRW$QJOHI±/HDG7KLFNQHVVF±/HDG:LGWKE±DNEE1NOTE112becAA1A2L1Lφ0LFURFKLS7HFKQRORJ\'UDZLQJ&%2008MicrochipTechnologyInc.
DS21034E-page27MCP3202APPENDIXA:REVISIONHISTORYRevisionE(December2008)Thefollowingisthelistofmodifications:1.
Updatestopackagingoutlinedrawings.
RevisionD(December2006)Thefollowingisthelistofmodifications:1.
Updatestopackagingoutlinedrawings.
RevisionC(August2001)Thefollowingisthelistofmodifications:1.
Undocumentedchanges.
RevisionB(June2000)Thefollowingisthelistofmodifications:1.
Undocumentedchanges.
RevisionA(August1999)Initialreleaseofthisdocument.
MCP3202DS21034E-page282008MicrochipTechnologyInc.
NOTES:2008MicrochipTechnologyInc.
DS21034E-page29MCP3202PRODUCTIDENTIFICATIONSYSTEMToorderorobtaininformation,e.
g.
,onpricingordelivery,refertothefactoryorthelistedsalesoffice.
PARTNO.
X/XXPackageTemperatureRangeDeviceDeviceMCP3202:12-BitSerialA/dConverterMCP3202T:12-BitSerialA/DConverter(TapeandReel)(MSOP,SOICandTSSOPpackageonly)PerformanceGrade:B=±1LSBINL(TSSOPnotavailable)C=±2LSBINLTemperatureRangeI=-40°Cto+85°C(Industrial)E=-40°Cto+125°C(Extended)PackageMS=PlasticMicroSmallOutline(MSOP),8-LeadP=PlasticDIP(300milBody),8-LeadSN=PlasticSOIC(150milBody),8-LeadST=TSSOP(4.
4mmBody),8-Lead(CGradeonly)Examples:a)MCP3202-CI/MS:Industrialtemperature,8LDMSOPpackage.
b)MCP3202-BI/P:BPerformancegrade,Industrialtemperature,8LDPDIPpackagec)MCP3202-BI/SN:CPerformancegrade,Industrialtemperature,8LDSOICpackaged)MCP3202T-BI/SN:TapeandReel,BPerformancegrade,Industrialtemperature.
,8LDSOICpackagee)MCP3202T-CI/ST:TapeandReel,CPerformancegrade,Industrialtemperature,8LDTSSOPpackage.
-XPerformanceGradeMCP3202DS21034E-page302008MicrochipTechnologyInc.
NOTES:2008MicrochipTechnologyInc.
DS21034E-page31Informationcontainedinthispublicationregardingdeviceapplicationsandthelikeisprovidedonlyforyourconvenienceandmaybesupersededbyupdates.
Itisyourresponsibilitytoensurethatyourapplicationmeetswithyourspecifications.
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Microchipdisclaimsallliabilityarisingfromthisinformationanditsuse.
UseofMicrochipdevicesinlifesupportand/orsafetyapplicationsisentirelyatthebuyer'srisk,andthebuyeragreestodefend,indemnifyandholdharmlessMicrochipfromanyandalldamages,claims,suits,orexpensesresultingfromsuchuse.
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