VDD_K2ios

SunplusTechnologyreservestherighttochangethisdocumentationwithoutpriornotice.
InformationprovidedbySunplusTechnologyisbelievedtobeaccurateandreliable.
However,SunplusTechnologymakesnowarrantyforanyerrorswhichmayappearinthisdocument.
ContactSunplusTechnologytoobtainthelatestversionofdevicespecificationsbeforeplacingyourorder.
NoresponsibilityisassumedbySunplusTechnologyforanyinfringementofpatentorotherrightsofthirdpartieswhichmayresultfromitsuse.
Inaddition,SunplusTechnologyproductsarenotauthorizedforuseascriticalcomponentsinlifesupportsystemsoraviationsystems,whereamalfunctionorfailureoftheproductmayreasonablybeexpectedtoresultinsignificantinjurytotheuser,withouttheexpresswrittenapprovalofSunplus.
DATASHEETPPrreelliimmiinnaarryyMAY19,2000;BACKGROUND-COLOR:#4ae2f7">5Version0.
1SSPPHHEE88228811DDDDVVDDSSiinngglleeCChhiippMMPPEEGGAA//VVPPrroocceessssoorrPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice2MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1TableofContentsPAGE1.
GENERALDESCRIPTION.
32.
FEATURE43.
BLOCKDIAGRAM64.
SIGNALDESCRIPTION.
74.
1.
PINMAP74.
2.
GROUPMAP84.
3.
PINDESCRIPTION.
90;BACKGROUND-COLOR:#4ae2f7">5.
FUNCTIONALDESCRIPTIONS220;BACKGROUND-COLOR:#4ae2f7">5.
1.
PLLANDCLOCKGEN220;BACKGROUND-COLOR:#4ae2f7">5.
2.
POWERCONTROL220;BACKGROUND-COLOR:#4ae2f7">5.
3.
EMBEDDED32-BITRISCCONTROLLER.
220;BACKGROUND-COLOR:#4ae2f7">5.
4.
ROM/FLASH/SRAMCONTROLLER230;BACKGROUND-COLOR:#4ae2f7">5.
0;BACKGROUND-COLOR:#4ae2f7">5.
CSSDECRYPTIONHARDWARE240;BACKGROUND-COLOR:#4ae2f7">5.
6.
MPEGVIDEODECODER.
240;BACKGROUND-COLOR:#4ae2f7">5.
7.
VIDEOPOSTPROCESSING240;BACKGROUND-COLOR:#4ae2f7">5.
8.
PROGRAMMABLEAUDIODECODER.
20;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5.
9.
AUDIOINTERFACE.
20;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5.
10.
AUDIODAC20;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5.
11.
I/OPROCESSOR20;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5.
12.
SDRAMCONTROLLER20;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5.
13.
SUB-PICTUREDECODER20;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5.
14.
ONSCREENDISPLAY20;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5.
10;BACKGROUND-COLOR:#4ae2f7">5.
DISPLAYINTERFACE260;BACKGROUND-COLOR:#4ae2f7">5.
16.
VIDEODAC260;BACKGROUND-COLOR:#4ae2f7">5.
17.
GPIO.
260;BACKGROUND-COLOR:#4ae2f7">5.
18.
UART.
266.
ELECTRICALSPECIFICATIONS276.
1.
ABSOLUTEMAXIMUMRATINGS276.
2.
DCOPERATINGCONDITIONS276.
3.
CAPACITANCE276.
4.
ACCHARACTERISTICS.
286.
4.
1.
SDRAMinterfacetimingdiagrams286.
4.
2.
ROM/flashinterfacetimingdiagrams.
296.
4.
3.
Audiointerfacetimingdiagrams306.
4.
4.
Videotimingdiagrams317.
PACKAGE/PADLOCATION337.
1.
OUTLINEDIMENSIONS338.
DISCLAIMER349.
REVISIONHISTORY30;BACKGROUND-COLOR:#4ae2f7">5PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice3MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1DVDSINGLECHIPMPEGA/VPROCESSOR1.
GENERALDESCRIPTIONSPHE8281DA/Vdecoderisasingle-chipintegratedDVDA/Vdecoder.
Itisdesignedtomaximizesystemperformancewithminimumcost.
ItintegratesDVD/CDcontroller,hostprocessor,A/Vdecodinghardware,audioqualityDACanda6-channelmulti-formatTV-encoder.
SPHE8281DsupportsDVDandCDphysicalformats.
ForlogicalformatsitsupportsDVD-Video,SuperVideoCD,VideoCD,CD-DA,OKO,andCD-ROMdiscs.
SPHE8281Dperformsreal-timedecodingandplaybackofISO/IEC11172MPEG1,13818MPEG2sources.
BesidesMPEGA/Vdecoding,itsupportsDolbyDigitalandMPEGI/IILayer1/2,PCM,LPCMaudioplayback.
SPHE8281Dalsocombinesallthefunctionsrequiredforahigh-performanceprogressive-scanDVDsystem.
Built-inde-interlacinghardwareallowshighqualityDVDplayback.
TheembeddeddigitalaudiodecoderisabletosupportkeycontrolandaudiosoundeffectsforKaraoke.
DevelopmenttoolsofSPHE8281Dincludecompletecompilertools,programmingguideandsystemapplicationlibraries.
ApplicationutilizingtheSPHE8281Dispresentedbelow:DVD-loaderSPHE8281D2~8chAudioDACVFDfrontpanelSDRAMIRAudioamplifierROM4-chvideooutput2-chaudioanalogoutputUSBdevicesFigure1-1SampleSPHE8281DapplicationPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice4MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
12.
FEATURESingleChipIntegratedDVDServoandA/VDecoderIntegratedDVD/CDServoController—Support1x~2xDVDformatreading—Support1x~8xCDformatreadingEmbedded32-bitRISCProcessorwithoutexternalhostcontrollerEmbeddedAudioProcessorsupportsmultipleaudiostandardsEmbedded8-bitI/OprocessorsupportsprogrammableinterfacecontrolEmbeddedTVencoderwithmulti-channelbuilt-inhigh-speedvideoDACsupportsvariousdisplaystandardsEmbedded2-channel24-bitaudioDACBuilt-insystemPLLandaudioPLLgenerateallclocksourcesrequiredfromsingle27MHzcrystalinputSupportfollowingdiscformat:—DVDNavigation1.
0—SVCD(ChaojiVCD)—OKOdisc—VCD2.
0/1.
1/1.
0—CDDA/HDCD—CDROM(game,WMAandJPEGdisc)CSS/CPPMhardware—Built-inCSShardware—Built-inCPPMC2_DCBCandC2_D/C2_EfunctionVideoDecoder—RealtimeMPEG2MP@MLdecoding—RealtimeMPEG4ASPD1resolutiondecoding—RealtimeMPEG1D1(720x480x30/720x0;BACKGROUND-COLOR:#4ae2f7">576x20;BACKGROUND-COLOR:#4ae2f7">5)decoding—DivX3.
11,4.
0and0;BACKGROUND-COLOR:#4ae2f7">5.
xversioncompatible—HardwareacceleratedJPEGdecoding—AdvanceddecodinganddisplaycontrolSub-pictureDecoder—AdvancedSub-PictureDecoderforDVDSVCDandOKO—SupporthardwareverticalscalingAudioDecoder—FlexibleProgrammableDSPArchitecture—SupportCDDA—SupportLPCM,PCM,andWMATM1playback—SupportMPEGI/IIlayer1/2andMPEG2.
0;BACKGROUND-COLOR:#4ae2f7">5playback(withoptionaldown-mixing)—SupportDolbyTM2DigitalAC3playback—SupportKeyShiftof2channels—Supportequalization,reverbandspecialsoundfield1WMAisatrademarkofMicrosoftCorporation2DolbyisatrademarkoftheDolbyLaboratoriesSDRAMcontroller—HighPerformanceSDRAMcontroller—Support16or32bitoperation—Supportupto2SDRAMdevices—Support16M/64MSDRAMdevicesVideoDisplay—De-interlacingofinterlacedvideosource—Flexibleverticalinterpolation—FlexiblehorizontalinterpolationwithoptionalCIFfilter—Powerfulcroppingandpanningeffect—SupportYUV422,8-bitindexedcolorformatOSD—MultipleOSDregionswithdifferentformats—Support2/4/16indexedcolor—Support16/24-bitdirectcolorEmbeddedTVencoder—Simultaneousmulti-channeloutput—Support480i/480p/0;BACKGROUND-COLOR:#4ae2f7">576i/0;BACKGROUND-COLOR:#4ae2f7">576pformat—SupportCVBSandS-Videooutput—SupportComponent(YUV/YPbPr)orSCART-RGBoutput—SupportWSSandCGMS/A—MacrovisionTM37.
1.
D1andMacrovisionAGCv1.
03analogcopyprotectionInterface—27MHzcrystaldriver—16/32-bitSDRAMinterface—8-bitROM/FLASH/SRAMinterface—OneUARTport—IRandVFDsupport—4-channel12-bitvideoDACanalogoutput—Simultaneous8-channelaudioDACoutput—IEC90;BACKGROUND-COLOR:#4ae2f7">58/SPDIFdigitalinput/output—2-channel24-bitaudioDACanalogoutput—ExternalADCdigitalinputinterface(optional)—OptionalATAPIandI2Sinterfacesupport—OptionalParallelPortinterfacesupportLowpower—Advancedlowpowerdesign—Selectivestandbymode—ProgrammablelowspeedoperationTechnology—AdvancedCMOStechnology—216-pinLQFPpackage—3v(I/O)and1.
8v(kernel)powersupplies—0;BACKGROUND-COLOR:#4ae2f7">5vI/Otolerance3MacrovisionisatrademarkofMacrovisionCorporationPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice0;BACKGROUND-COLOR:#4ae2f7">5MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1LicensingNoticeInordertotakecareofdifferentroyalties,SunplusSPHE8281Dserieshavedifferentcombinationsfordifferentroyalties.
Fordetailinformation,pleasecontactwithSunplusSales.
SupplyoftheimplementationofDolby,WMA,Macrovision…technologiesdonotimplyofarightorconveyalicenseunderanypatent,oranyIntellectualPropertyRightofeachrespectivecompany.
CompaniesplantousetheimplementationsMUSTobtainrespectivelicensefromrespectivelicensor.
AdditionalroyaltiesmayberequiredandaretobepaidbypurchasertoeachrespectivelicensorDolbyisatrademarkoftheDolbyLaboratories.
"ThisproductincludestechnologyownedbyDolbyLaboratoriescannotbeusedorfurtherdistributedwithoutalicensefromDolbyLaboratories.
"WMAisatrademarkofMicrosoftCorporation.
"ThisproductincludestechnologyownedbyMicrosoftCorporationcannotbeusedorfurtherdistributedwithoutalicensefromMicrosoft.
"DivXisatrademarkoftheDivXNetworksInc.
"ThisproductincludestechnologyownedbyDivXNetworksInc.
cannotbeusedorfurtherdistributedwithoutalicensefromDivXNetworksInc.
"MacrovisionisatrademarkoftheMacrovisionCorporation.
"ThisproductincludestechnologyownedbyMacrovisionCorporationcannotbeusedorfurtherdistributedwithoutalicensefromMacrovisionCorporation.
"Allothertrademarksareownedandtrademarksoftheirrespectiveholdersandcompanies,whichareusedforidentificationpurposedonlyPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice6MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
13.
BLOCKDIAGRAMAudioInterfaceAudioDSPMPEGvideodecoderPLLvRISCTimerSDRAMcontrollerSub-picturedecoderOSDdecoderVideopost-processingEPROM/SRAMinterfaceSDRAM/16or/32EPROM/SRAMGPIOGPIOIEC90;BACKGROUND-COLOR:#4ae2f7">58I/OicachememicachedcacheVideoencoderVideooutputIR/VFD/(I2C)UARTUARTIntr.
controlADCdigitalinRISCDMAPowercontrolI/OprocessorPLLaVideoDACServoControlECCloaderinf.
RFloaderRFinputBootstrapHOSTDMADACDACanalogoutUSB1.
1hostUSB1.
1busFigure3-1SPHE8281DblockdiagramPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice7MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
14.
SIGNALDESCRIPTION4.
1.
PinMapFLTINFLTIPRFOAGCCAPGMRESRF_AVDDDS_AVDDSLVLCNINRFIPLL_DS_AVSSLGINLPFNINFDFLTPDFLTVREFOLPFNLPFOPLL_AVDDVSS_TVA2TV_DAC0;BACKGROUND-COLOR:#4ae2f7">5VDD_TVA2TV_DAC4TV_DAC3VSS_TVA1VDD_TVA1VSS_TVA0VDD_TVA0TV_DAC0V_REFOUTV_FSADJV_BIASV_COMPUA0_TX/GPIOA_BCK/GPIOUA0_RX/GPIOA_XCK/GPIOVSS_K6/VSS_O6A_LRCK/GPIOA_DATA3/GPIOA_DATA2/GPIOA_DATA1/GPIOVDD_O0;BACKGROUND-COLOR:#4ae2f7">5A_DATA0/GPIOA_IEC_TX/GPIOR_A18R_A16DAC_VSSR_A10;BACKGROUND-COLOR:#4ae2f7">5216210;BACKGROUND-COLOR:#4ae2f7">5214213212211210209208207206200;BACKGROUND-COLOR:#4ae2f7">5204203202201200199198197196190;BACKGROUND-COLOR:#4ae2f7">5194193192191190189188187186180;BACKGROUND-COLOR:#4ae2f7">5184183182181180179178177176170;BACKGROUND-COLOR:#4ae2f7">5174173172171170169168167166160;BACKGROUND-COLOR:#4ae2f7">5164163DAC_VDDDAC_REFDAC_LDAC_RRFRPSPHE8281D8202D-216P216PINLQFP24x24mm2108107106100;BACKGROUND-COLOR:#4ae2f7">51041031021011009998979690;BACKGROUND-COLOR:#4ae2f7">594939291908988878680;BACKGROUND-COLOR:#4ae2f7">584838281807978777670;BACKGROUND-COLOR:#4ae2f7">574737271706968676660;BACKGROUND-COLOR:#4ae2f7">564636261600;BACKGROUND-COLOR:#4ae2f7">590;BACKGROUND-COLOR:#4ae2f7">580;BACKGROUND-COLOR:#4ae2f7">570;BACKGROUND-COLOR:#4ae2f7">560;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5M_D10M_D11M_D12VDD_K2M_D13M_D14M_D10;BACKGROUND-COLOR:#4ae2f7">5M_BA0M_CS0_B/GPIOVSS_O2/VSS_K2M_RAS_BM_CAS_BM_WE_BM_D0M_D1M_D2VDD_O2M_D3M_D4M_D0;BACKGROUND-COLOR:#4ae2f7">5M_D6M_D7VDD_PLLVVSS_PLLVVDD_PLLAVSS_PLLAUSB_DMUSB_DPUSB_VDDUSB_GNDCLKOUTCLKINR_A19R_A20/E_MX10VFD_DATA/GPIOVFD_STB/GPIOVFD_CLK/GPIOIR_IN/GPIORST_BR_CS3_B/GPIOR_CS1_B/GPIOR_CS2_B/GPIOR_CS4_B/GPIOGPIOVDD_O1GPIO/ttio3_7GPIO/ttio2_6GPIO/ttio1_0;BACKGROUND-COLOR:#4ae2f7">5VSS_O1/VSS_K1GPIO/ttio0_4GPIO/TRAY_IS_OUTGPIO/TRAY_IS_INVDD_K1DFCT/GPIOR_A12R_A7R_A6R_A0;BACKGROUND-COLOR:#4ae2f7">5R_A4R_A3R_A2R_A1R_A0R_D0R_D2VSS_O0;BACKGROUND-COLOR:#4ae2f7">5/VSS_K0;BACKGROUND-COLOR:#4ae2f7">5R_D3R_D4R_D0;BACKGROUND-COLOR:#4ae2f7">5R_D6R_D7R_OE_BVDD_K4M_DQM2/GPIOM_DQM3/GPIOM_A11/GPIOM_D8M_D9R_A10R_A13R_A14R_A17R_WE_BM_A3M_A2M_A1VSS_O4/VSS_K4M_A0M_A10M_DQM1/GPIOM_BA1/GPIOM_DQM0/GPIOM_A4VDD_K3M_A0;BACKGROUND-COLOR:#4ae2f7">5M_A6M_A7M_A8M_A9M_CKE/GPIOVSS_O3/VSS_K3M_CLKOVDD_O3R_A11R_A9R_A8VDD_O4R_D116216116010;BACKGROUND-COLOR:#4ae2f7">5910;BACKGROUND-COLOR:#4ae2f7">5810;BACKGROUND-COLOR:#4ae2f7">5710;BACKGROUND-COLOR:#4ae2f7">5610;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">510;BACKGROUND-COLOR:#4ae2f7">5410;BACKGROUND-COLOR:#4ae2f7">5310;BACKGROUND-COLOR:#4ae2f7">5210;BACKGROUND-COLOR:#4ae2f7">5110;BACKGROUND-COLOR:#4ae2f7">50149148147146140;BACKGROUND-COLOR:#4ae2f7">5144143142141140139138137136130;BACKGROUND-COLOR:#4ae2f7">5134133132131130129128127126120;BACKGROUND-COLOR:#4ae2f7">5124123122121120119118117116110;BACKGROUND-COLOR:#4ae2f7">5114113112111110109V160;BACKGROUND-COLOR:#4ae2f7">5SVOTSTRFRPPHRFRPBH12340;BACKGROUND-COLOR:#4ae2f7">56789101112131410;BACKGROUND-COLOR:#4ae2f7">516171819202122232420;BACKGROUND-COLOR:#4ae2f7">526272829303132333430;BACKGROUND-COLOR:#4ae2f7">536373839404142434440;BACKGROUND-COLOR:#4ae2f7">5464748490;BACKGROUND-COLOR:#4ae2f7">500;BACKGROUND-COLOR:#4ae2f7">510;BACKGROUND-COLOR:#4ae2f7">520;BACKGROUND-COLOR:#4ae2f7">530;BACKGROUND-COLOR:#4ae2f7">54RFIPRFISRFSUMDPDADPDBDPDCDPDDDVDDDVDCDVDBDVDACDBCDACDFCDERF_AVSSAPC_AVSSDVDLDOCDLDODVDMDICDMDIAPC_SRV_AVDDV21R33KRFRPMEANSBADPHSBADFEOTEOTEOLPOPVIPOPVINOPVOPSRV_AD_AVSS_VRGDDATEOAD_DA_AVDDDAFEODA_AVSSE_MX8E_MX9SPDC_OUT/GPIOSC_OUT/GPIOSC1_OUT/GPIOTRAY_OUT/GPIODMEA/GPIOFGIN/GPIOHOMESW/GPIOLDSW/GPIOAGCOPAGCONFigure4-1SPHE8281DpinPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice8MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
14.
2.
GroupMapSPHE8281D(216pin)M_D[10;BACKGROUND-COLOR:#4ae2f7">5:0]M_RAS_BM_CAS_BM_WE_BM_CS0_BM_CLKOM_A[10:0]M_DQM[3:0]M_BA0M_BA1M_A11V_BIASV_COMPV_REFOUTV_FSADJA_IEC_TXIRVFDUARTGP000000;BACKGROUND-COLOR:#ffff00">IOsIR_INVFD_CLKVFD_DATAVFD_STBSystemInterfaceVSS_*VDD_*RSTBCLKIN/CLKOUTAU_XCKAU_BCKAU_LRCKAU_DATA[3:0]AudiodigitaloutputinterfaceUA0_RXUA0_TXOtherGP000000;BACKGROUND-COLOR:#ffff00">IOsSERVOTRAY_IS_INSPDC_OUTSC_OUTSC1_OUTTRAY_OUTDMEAFGINHOMESWSERVODPDADPDBDPDCDPDDDVDADVDBDVDCDVDDCDBCDACDFCDEDVDLDOCDLDODVDMDICDMDIR33KV160;BACKGROUND-COLOR:#4ae2f7">5SVOTSTRFRPPHRFRPBHRFRPMEANSBADPHSBADFEOTEOTEOLPOPVIPOPVINOPVOPVRGDDATEODAFEOVideooutputinterfaceV_DAC0SDRAMinterfaceTRAY_IS_OUTDFCTLDSWttio*RFIPRFISRFSUMAGCONAGCOPFLTIPFLTINRFORFRPAGCCAPGMRESSLVLCNINRFILGINLPFNINFDFLTPDFLTVREFOLPFOLPFNV_DAC3V_DAC4V_DAC0;BACKGROUND-COLOR:#4ae2f7">5R_CS_B[3:0]R_A[19:0]R_WE_BR_OE_BR_D[7:0]ROM/flashinterfaceAudioanalogoutputinterfaceDAC_VREFDAC_RDAC_LFigure4-2SPHE8281DpingroupsPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice9MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
14.
3.
PinDescriptionSymbolPinNo.
I/ODescriptionAGCON1ODifferentialAGCoutput#NAGCOP2ODifferentialAGCoutput#PRFIP3IDifferentialRFsignalinput#PRFIS4ISingle-endedRFequalizerinput.
RFSUM0;BACKGROUND-COLOR:#4ae2f7">5ORFsummingamplifiedoutput.
DPDA6IACcoupledRFinputsfortheDPD#A,fromthemainbeamphotodetector.
DPDB7IACcoupledRFinputsfortheDPD#B,fromthemainbeamphotodetector.
DPDC8IACcoupledRFinputsfortheDPD#C,fromthemainbeamphotodetector.
DPDD9IACcoupledRFinputsfortheDPD#D,fromthemainbeamphotodetector.
DVDD10IDVDRFinputs#A,fromthemainbeamphotodetector.
DVDC11IDVDRFinputs#B,fromthemainbeamphotodetector.
DVDB12IDVDRFinputs#C,fromthemainbeamphotodetector.
DVDA13IDVDRFinputs#D,fromthemainbeamphotodetector.
CDB14ICDRFinputs#B,fromthemainbeamphotodetector.
CDA10;BACKGROUND-COLOR:#4ae2f7">5ICDRFinputs#A,fromthemainbeamphotodetector.
CDF16ICDtrackingerrorinputs#F,fromthesub-beamphotodetector.
CDE17ICDtrackingerrorinputs#E,fromthesub-beamphotodetector.
RF_AVSS18SServoRFgroundAPC_AVSS19SServoAPCgroundDVDLDO20ODVDAPCoutput.
CDLDO21OCDAPCoutput.
DVDMDI22IDVDAPCinputfrommonitorphotodiode.
CDMDI23ICDAPCinputfrommonitorphotodiode.
APC_SRV_AVDD24SServoAPCandanalog3.
3Vpower(216pinonly)V2120;BACKGROUND-COLOR:#4ae2f7">5-ReferenceDCbiasvoltage.
R33K26-Externalreferenceresistorinput.
V160;BACKGROUND-COLOR:#4ae2f7">527-ReferenceDCbiasvoltage.
SVOTST28ORFpeakholdexternalcapacitorRFRPPH29ORFRPpeakholdsignaloutput.
RFRPBH30ORFRPbottomholdsignaloutput.
RFRPMEAN31ORFRPmeansignaloutput.
SBADPH32OSub-beamaddspeakholdsignaloutput.
SBAD33OSub-beamaddssignaloutput.
FEO34OFocuserrorsignaloutput.
TEO30;BACKGROUND-COLOR:#4ae2f7">5OTrackingerrorsignaloutput.
TEOLP36AOPVIP37IOp-amp1positiveinput.
OPVIN38IOp-amp1negativeinput.
OPVOP39OOp-ampoutput.
SRV_AD_VRGD_AVSS40SServo/ADCanaloggroundAD_DA_AVDD41SServoADC/DAC3.
3VpowerDATEO42ADAFEO43APPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice10MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionDA_AVSS44SServoDACgroundE_MX840;BACKGROUND-COLOR:#4ae2f7">5I/OGPIO[70]PriorityselectionFunctionDirsft_cfg2[0;BACKGROUND-COLOR:#4ae2f7">5:4]=2'b01UA1_RXDIsft_cfg7[0;BACKGROUND-COLOR:#4ae2f7">5:4]=2'b1160;BACKGROUND-COLOR:#4ae2f7">56_DATA[0]Osft_cfg1[11:9]=3'b110RISC_INT1_11Isft_cfg7[1]=1'b0,sft_cfg0[11]=1'b1,fm_gpio_len[3:0]>8FM_GPIOB[12]I/Osft_cfg0[11]=1'b0,fm_gpio_len[3:0]=4'b1100FM_GPIOB[29]I/OSft_cfg8[0;BACKGROUND-COLOR:#4ae2f7">5]=1'b1TV_EXT_DATA_Cr[7]I(other)GPIO[70](default)I/OE_MX946I/OGPIO[71]PriorityselectionFunctiondirsft_cfg2[0;BACKGROUND-COLOR:#4ae2f7">5:4]=2'b01UA1_TXDOsft_cfg7[0;BACKGROUND-COLOR:#4ae2f7">5:4]=2'b1160;BACKGROUND-COLOR:#4ae2f7">56_DATA[1]Osft_cfg1[11:9]=3'b110RISC_INT1_12Isft_cfg7[1]=1'b0,sft_cfg0[11]=1'b1,fm_gpio_len[3:0]>8FM_GPIOB[13]I/Osft_cfg0[11]=1'b0,fm_gpio_len[3:0]=4'b1100FM_GPIOB[30]I/OSft_cfg8[0;BACKGROUND-COLOR:#4ae2f7">5]=1'b1TV_EXT_DATA_Cr[6]I(other)GPIO[71](default)I/OSPDC_OUT/GPIO47I/OServoSPDC_OUTPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_RESET_BOsft_cfg4[0]=1'b1SPDC_OUT(default)I/OSft_cfg8[9]=1'b1DAC_PDFIsft_cfg8[8]=1'b1OTP_TEST_ADDR[0]I(other)GPIO[0]I/OSC_OUT/GPIO48I/OServoSC_OUTPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_DIOR_BOsft_cfg4[1]=1'b1SC_OUT(default)I/OSft_cfg8[9]=1'b1DAC_PDEIsft_cfg8[8]=1'b1OTP_TEST_ADDR[1]I(other)GPIO[1]I/OSC1_OUT/GPIO49I/OServoSC1_OUTPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_DIOW_BOsft_cfg4[2]=1'b1SC1_OUT(default)I/OSft_cfg8[9]=1'b1DAC_PDDIsft_cfg8[8]=1'b1OTP_TEST_ADDR[2]I(other)GPIO[2]I/OPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice11MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionTRAY_OUT/GPIO0;BACKGROUND-COLOR:#4ae2f7">50I/OServoTRAY_OUTPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_IORDYIsft_cfg4[3]=1'b1TRAY_OUT(default)I/OSft_cfg8[9]=1'b1DAC_PDCIsft_cfg8[8]=1'b1OTP_TEST_ADDR[3]I(other)GPIO[3]I/ODMEA_OUT/GPIO0;BACKGROUND-COLOR:#4ae2f7">51I/OServoDMEAPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_DMACKOsft_cfg4[4]=1'b1DMEA_OUT(default)OSft_cfg8[9]=1'b1DAC_PDBIsft_cfg8[8]=1'b1OTP_TEST_ADDR[4]I(other)GPIO[4]I/OFGIN/GPIO0;BACKGROUND-COLOR:#4ae2f7">52I/OServoFGINPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_DMARQIsft_cfg4[0;BACKGROUND-COLOR:#4ae2f7">5]=1'b1FGIN(default)ISft_cfg8[9]=1'b1DAC_PDAIsft_cfg8[8]=1'b1OTP_TEST_PGMI(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">5]I/OHOMESW/GPIO0;BACKGROUND-COLOR:#4ae2f7">53IOServoHOMESWPriorityselectionFunctiondirsft_cfg2[3:2]=2'b10UA0_RXDIsft_cfg1[8:6]=3'b010R_CSALL_BOsft_cfg7[7:6]=2'b11PCMCIA_IOW_BOSft_cfg8[1]=1'b1DSP_FL0OSft_cfg8[9]=1'b1DAC_DATA_F[9]Isft_cfg9[14:13]=2'b01EXT_CLK48Isft_cfg6[4]=1'b1DELAY_CHAIN1Osft_cfg8[8]=1'b1OTP_TEST_DATAO(other)GPIO[6](default)I/OLDSW/GPIO0;BACKGROUND-COLOR:#4ae2f7">54IOServoLDSWPriorityselectionFunctiondirsft_cfg2[3:2]=2'b10UA0_TXDOsft_cfg2[0;BACKGROUND-COLOR:#4ae2f7">5:4]=2'b10UA1_RXDIsft_cfg7[7:6]=2'b11PCMCIA_IOR_BOSft_cfg8[2]=1'b1DSP_FL1OSft_cfg8[9]=1'b1DAC_DATA_F[8]Isft_cfg7[10;BACKGROUND-COLOR:#4ae2f7">5:14]=2'b11CLK27_OUTOsft_cfg9[14:13]=2'b10EXT_CLK48Isft_cfg6[4]=1'b1DELAY_CHAIN2O(other)GPIO[7](default)I/OPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice12MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionDFCT/GPIO0;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5IOServoDFCTPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_INTRQIsft_cfg4[6]=1'b1DFCT(default)OSft_cfg8[9]=1'b1DAC_DATA_F[7]I(other)GPIO[8]I/OVDD_K10;BACKGROUND-COLOR:#4ae2f7">56SKernellogicpowersupply#1GPIO/TRAY_IS_IN0;BACKGROUND-COLOR:#4ae2f7">57IOGPIOPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_ADR[1]OSft_cfg8[3]=1'b1DSP_FL2Ofm_gpio_len[3:0]>0FM_GPIOB[0]I/OSft_cfg8[9]=1'b1DAC_DATA_F[6]I(other)GPIO[9](default)I/OGPIO/TRAY_IS_OUT0;BACKGROUND-COLOR:#4ae2f7">58IOGPIOPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_ADR[2]OSft_cfg8[4]=1'b1DSP_FLAG_OUTOfm_gpio_len[3:0]>0FM_GPIOB[1]I/OSft_cfg8[9]=1'b1DAC_DATA_F[0;BACKGROUND-COLOR:#4ae2f7">5]I(other)GPIO[10](default)I/OGPIO/ttio0_40;BACKGROUND-COLOR:#4ae2f7">59IOGPIOPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_ADR[0]Osft_cfg4[9]=1'b1ttio4/ttio0I/OSft_cfg1[11:9]=3'b001RISC_INT1_11ISft_cfg3[11:10]=2'b01ADC_BCK,digitalaudioinputinterfacebitclockI/Ofm_gpio_len[3:0]>0FM_GPIOB[2]I/OSft_cfg8[9]=1'b1DAC_DATA_F[4]I(other)GPIO[11](default)I/OVSS_O1/VSS_K160SKernellogic/I/Opowersharedgroundsupply#1GPIO/ttio1_0;BACKGROUND-COLOR:#4ae2f7">561IOGPIOPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_CS1Osft_cfg4[9]=1'b1Ttio0;BACKGROUND-COLOR:#4ae2f7">5/ttio1I/Osft_cfg4[10;BACKGROUND-COLOR:#4ae2f7">5:13]=3'b001HSYNC_PCOSft_cfg1[11:9]=3'b001RISC_INT1_12ISft_cfg3[11:10]=2'b01ADC_LRCK,digitalaudioinputinterfaceL/RstrobeI/Ofm_gpio_len[3:0]>0FM_GPIOB[3]I/OSft_cfg8[9]=1'b1DAC_DATA_F[3]I(other)GPIO[12](default)I/OPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice13MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionGPIO/ttio2_662IOGPIOPriorityselectionFunctiondirsft_cfg2[11:10]=2'b01,2'b10AT_CS0Osft_cfg4[9]=1'b1Ttio6/ttio2I/Osft_cfg4[10;BACKGROUND-COLOR:#4ae2f7">5:13]=3'b001VSYNC_PCOsft_cfg3[10;BACKGROUND-COLOR:#4ae2f7">5:14]=2'b01ISA_IOCHRDYISft_cfg1[11:9]=3'b001RISC_INT1_13ISft_cfg3[11:10]=2'b01ADC_DATA,digitalaudioinputinterfacedataIfm_gpio_len[3:0]>1FM_GPIOB[4]I/OSft_cfg8[9]=1'b1DAC_DATA_F[2]I(other)GPIO[13](default)I/OGPIO/ttio3_763IOGPIOPriorityselectionFunctiondirsft_cfg4[9]=1'b1Ttio7/ttio3I/Osft_cfg2[9:8]=2'b11PCMCIA_WAIT_BIsft_cfg7[11:8]=4'b0001EXT_CLK27ISft_cfg1[11:9]=3'b001RISC_INT1_14Ifm_gpio_len[3:0]>2FM_GPIOB[0;BACKGROUND-COLOR:#4ae2f7">5]I/OSft_cfg8[9]=1'b1DAC_DATA_F[1]I(other)GPIO[14](default)I/OVDD_O164SI/Opowersupply#1GPIO60;BACKGROUND-COLOR:#4ae2f7">5IOGPIOPriorityselectionFunctiondirsft_cfg2[0;BACKGROUND-COLOR:#4ae2f7">5:4]=2'b10UA1_TXDOsft_cfg1[8:6]=3'b001R_CSALL_BOsysclk_sel[4]EXT_SYSCLKIsft_cfg7[11:8]=4'b0010EXT_CLK27Ifm_gpio_len[3:0]>3FM_GPIOB[6]I/Osft_cfg8[9]=1'b1DAC_DATA_F[0]Isft_cfg7[13:12]=2'b11CLK0;BACKGROUND-COLOR:#4ae2f7">54_OUTOsft_cfg9[14:13]=2'b11EXT_CLK48Isft_cfg6[4]=1'b1DELAY_CHAIN3O(other)GPIO[10;BACKGROUND-COLOR:#4ae2f7">5](default)I/OR_CS4_B/GPIO66IOROM/SRAM/flashchipselect#4orGPIOPriorityselectionFunctiondirsft_cfg1[3]=1'b1R_CS4_B(default)Osft_cfg1[7]=1'b1&fm_gpio_len[3:0]=10,11,12FM_GPIOB[20]I/Osft_cfg8[9]=1'b1DAC_DATA_E[9]I(other)GPIO[16]I/OPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice14MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionR_CS3_B/GPIO67IOROM/SRAM/flashchipselect#3orGPIOPriorityselectionFunctiondirsft_cfg1[2]=1'b1R_CS3_B(default)Osft_cfg8[9]=1'b1DAC_DATA_E[8]I(other)GPIO[17]I/OR_CS2_B/GPIO68IOROM/SRAM/flashchipselect#2orGPIOPriorityselectionFunctiondirsft_cfg1[1]=1'b1R_CS2_B(default)Osft_cfg8[9]=1'b1DAC_DATA_E[7]I(other)GPIO[18]I/OR_CS1_B/GPIO69IOROM/SRAM/flashchipselect#1orGPIOPriorityselectionFunctiondirsft_cfg1[0]=1'b1R_CS1_B(default)Osft_cfg8[9]=1'b1DAC_DATA_E[6]I(other)GPIO[19]I/ORST_B70ISystemreset(activelowreset)IR_IN/GPIO71IOGPIOPriorityselectionFunctiondirsft_cfg8[0]=1'b1IR_IN,GPIO[20]I(other)GPIO[20](default)I/OVFD_CLK/GPIO72IOGPIO[21]forVFD_CLKVFD_STB/GPIO73IOGPIO[22]forVFD_STBPriorityselectionFunctiondirsft_cfg8[9]=1'b1DAC_DATA_E[0;BACKGROUND-COLOR:#4ae2f7">5]I(other)GPIO[22](default)I/OVFD_DATA/GPIO74IOGPIO[23]forVFD_DATAPriorityselectionFunctiondirsft_cfg8[9]=1'b1DAC_DATA_E[4]I(other)GPIO[23](default)I/OR_A2070;BACKGROUND-COLOR:#4ae2f7">5IOROM/SRAM/flashaddressbusbit[20](216pinpackage)R_A19(E_MX11)76IOROM/SRAM/flashaddressbusbit[19]CLKIN77IClockinput/crystalin(XTALI)CLKOUT78OClockoutput/crystalout(XTALO)RESERVED_N79AReservedRESERVED_P80AReservedRESERVED81AReservedRESERVED82AReservedVSS_PLLA83SGroundpinforaudioPLLVDD_PLLA84S3.
3VpowersupplypinforaudioPLLVSS_PLLV80;BACKGROUND-COLOR:#4ae2f7">5SGroundpinforsystemPLLandaudioPLLVDD_PLLV86S1.
8VpowersupplypinforsystemPLLM_DD[7]87IOSDRAMdatabus[7]M_DD[6]88IOSDRAMdatabus[6]M_DD[0;BACKGROUND-COLOR:#4ae2f7">5]89IOSDRAMdatabus[0;BACKGROUND-COLOR:#4ae2f7">5]M_DD[4]90IOSDRAMdatabus[4]PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice10;BACKGROUND-COLOR:#4ae2f7">5MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionM_DD[3]91IOSDRAMdatabus[3]VDD_O292SI/Opowersupply#2M_DD[2]93IOSDRAMdatabus[2]M_DD[1]94IOSDRAMdatabus[1]M_DD[0]90;BACKGROUND-COLOR:#4ae2f7">5IOSDRAMdatabus[0]M_WE_B96IOSDRAMwriteenable/rowprechargeM_CAS_B97IOSDRAMcolumnaddressstrobe(CASB)M_RAS_B98IOSDRAMrowaddressstrobe(RASB)VSS_O2/VSS_K299SKernellogic/I/Opowersharedgroundsupply#2M_CS0_B/GPIO100IOSDRAMchipselect0,orGPIO[24]PriorityselectionFunctiondirsft_cfg0[0]=1'b1SDRAMchipselect(default)Osft_cfg8[9]=1'b1DAC_DATA_D[2]I(other)GPIO[24]I/OM_BA0101IOSDRAMbankselectaddress[0]M_DD[10;BACKGROUND-COLOR:#4ae2f7">5]102IOSDRAMdatabus[10;BACKGROUND-COLOR:#4ae2f7">5]M_DD[14]103IOSDRAMdatabus[14]M_DD[13]104IOSDRAMdatabus[13]VDD_K2100;BACKGROUND-COLOR:#4ae2f7">5SKernellogicpowersupply#2M_DD[12]106IOSDRAMdatabus[12]M_DD[11]107IOSDRAMdatabus[11]M_DD[10]108IOSDRAMdatabus[10]M_DD[9]109IOSDRAMdatabus[9]M_DD[8]110IOSDRAMdatabus[8]M_A[11]/GPIO111IOSDRAMaddressbus[11]orGPIO[20;BACKGROUND-COLOR:#4ae2f7">5]PriorityselectionFunctiondirsft_cfg1[4]=1'b1SDRAMaddressbusM_A[11](default)Osft_cfg8[9]=1'b1DAC_DATA_C[2]I(other)GPIO[20;BACKGROUND-COLOR:#4ae2f7">5]I/OVDD_O3112SI/Opowersupply#3M_CLKO113OSDRAMclockoutputVSS_O3/VSS_K3114SKernellogic/I/Opowersharedgroundsupply#3M_CKE/GPIO110;BACKGROUND-COLOR:#4ae2f7">5IOSDRAMclockenable,orGPIO[26]PriorityselectionFunctiondirsft_cfg0[1]=1'b1DRAMclockenable(default)Osft_cfg8[9]=1'b1DAC_DATA_C[1]I(other)GPIO[26]I/OM_A[9]116IOSDRAMaddressbus[9]M_A[8]117IOSDRAMaddressbus[8]M_A[7]118IOSDRAMaddressbus[7]M_A[6]119I/OSDRAMaddressbus[6]M_A[0;BACKGROUND-COLOR:#4ae2f7">5]120I/OSDRAMaddressbus[0;BACKGROUND-COLOR:#4ae2f7">5]PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice16MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionVDD_K3121SKernellogicpowersupply#3M_A[4]122I/OSDRAMaddressbus[4]M_DQM1/GPIO123I/OSDRAMdatainput/outputmaskforM_DD[10;BACKGROUND-COLOR:#4ae2f7">5:8],orGPIOA[27]M_DQM0/GPIO124I/OSDRAMdatainput/outputmaskforM_DD[7:0]orGPIOA[28]PriorityselectionFunctiondirsft_cfg0[2]=1'b1SDRAMdatainput/outputmaskforM_DD[7:0](default)I/Osft_cfg8[8]=1'b1ADC_MONO_D_R[0;BACKGROUND-COLOR:#4ae2f7">5]Osft_cfg8[9]=1'b1DAC_DATA_B[3]I(other)GPIO[28]I/OM_BA1/GPIO120;BACKGROUND-COLOR:#4ae2f7">5I/OSDRAMbankselectaddress[1]orGPIOA[29]PriorityselectionFunctiondirsft_cfg0[6]=1'b1SDRAMbankselectaddress[1](default)I/Osft_cfg8[8]=1'b1ADC_MONO_D_R[6]Osft_cfg8[9]=1'b1DAC_DATA_B[2]I(other)GPIO[29]I/OM_A[10]126OSDRAMaddressbus[10]M_A[0]127OSDRAMaddressbus[0]VSS_O4/VSS_K4128SKernellogic/I/Opowersharedgroundsupply#4M_A[1]129OSDRAMaddressbus[1]M_A[2]130OSDRAMaddressbus[2]M_A[3]131OSDRAMaddressbus[3]R_WE_B132I/OROM/SRAM/flashwritestrobeR_A17133I/OROM/SRAM/flashaddressbusbit[17]R_A14134I/OROM/SRAM/flashaddressbusbit[14]R_A13130;BACKGROUND-COLOR:#4ae2f7">5I/OROM/SRAM/flashaddressbusbit[13]VDD_O4136SI/Opowersupply#4R_A8137OROM/SRAM/flashaddressbusbit[8]R_A9138OROM/SRAM/flashaddressbusbit[9]R_A11139I/OROM/SRAM/flashaddressbusbit[11]R_A10140OROM/SRAM/flashaddressbusbit[10]PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice17MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionM_DQM3/GPIO141I/OSDRAMdatainput/outputmaskforM_DD[31:24],orGPIO[38]PriorityselectionFunctiondirsft_cfg0[0;BACKGROUND-COLOR:#4ae2f7">5]=1'b1SDRAMdatainput/outputmaskforM_DD[31:24](default)Osft_cfg2[3:2]=2'b11UA0_RXDIsft_cfg1[8:6]=3'b011R_CSALL_BOsft_cfg3[13:12]=2'b10TV_HSYNCI/Osft_cfg4[10;BACKGROUND-COLOR:#4ae2f7">5:13]=3'b010TV_HSYNC_PCOsft_cfg7[7:6]=2'b01PCMCIA_IOW_BOsft_cfg0[13:12]=2'b01TV_LCD_G[2]Osft_cfg7[1]=1'b0,sft_cfg0[11]=1'b0,fm_gpio_len[3:0]>9FM_GPIOB[19]I/Osft_cfg8[8]=1'b1ADC_MONO_D_L[0;BACKGROUND-COLOR:#4ae2f7">5]Osft_cfg8[9]=1'b1DAC_OPA[1]Isft_cfg8[10]=1'b1OGT_BIST_FAILO(other)GPIO[38]I/OM_DQM2/GPIO142I/OSDRAMdatainput/outputmaskforM_DD[23:16],orGPIO[39]PriorityselectionFunctiondirsft_cfg0[4]=1'b1SDRAMdatainput/outputmaskforM_DD[23:16](default)Osft_cfg2[3:2]=2'b11UA0_TXDOsft_cfg3[13:12]=2'b10TV_VSYNCI/Osft_cfg4[10;BACKGROUND-COLOR:#4ae2f7">5:13]=3'b010TV_VSYNC_PCOsft_cfg7[7:6]=2'b01PCMCIA_IOR_BOsft_cfg0[13:12]=2'b01TV_LCD_G[3]Osft_cfg7[1]=1'b0,sft_cfg0[11]=1'b0,fm_gpio_len[3:0]>9FM_GPIOB[18]I/Osft_cfg8[8]=1'b1ADC_MONO_D_L[6]Osft_cfg8[9]=1'b1DAC_OPA[2]Isft_cfg8[10]=1'b1BUF_CTRL_BIST_FAILO(other)GPIO[39]I/OVDD_K4143SKernellogicpowersupply#4R_OE_B144I/OROM/SRAM/flashoutputenableR_D7140;BACKGROUND-COLOR:#4ae2f7">5I/OROM/SRAM/flashdatabusbit[7]R_D6146I/OROM/SRAM/flashdatabusbit[6]R_D0;BACKGROUND-COLOR:#4ae2f7">5147I/OROM/SRAM/flashdatabusbit[0;BACKGROUND-COLOR:#4ae2f7">5]R_D4148I/OROM/SRAM/flashdatabusbit[4]R_D3149I/OROM/SRAM/flashdatabusbit[3]VSS_O0;BACKGROUND-COLOR:#4ae2f7">5/VSS_K0;BACKGROUND-COLOR:#4ae2f7">510;BACKGROUND-COLOR:#4ae2f7">50SKernellogic/I/Opowersharedgroundsupply#0;BACKGROUND-COLOR:#4ae2f7">5PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice18MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionR_D210;BACKGROUND-COLOR:#4ae2f7">51I/OROM/SRAM/flashdatabusbit[2]R_D110;BACKGROUND-COLOR:#4ae2f7">52I/OROM/SRAM/flashdatabusbit[1]R_D010;BACKGROUND-COLOR:#4ae2f7">53I/OROM/SRAM/flashdatabusbit[0]R_A010;BACKGROUND-COLOR:#4ae2f7">54OROM/SRAM/flashaddressbusbit[0]R_A110;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5OROM/SRAM/flashaddressbusbit[1]R_A210;BACKGROUND-COLOR:#4ae2f7">56OROM/SRAM/flashaddressbusbit[2]R_A310;BACKGROUND-COLOR:#4ae2f7">57OROM/SRAM/flashaddressbusbit[3]R_A410;BACKGROUND-COLOR:#4ae2f7">58OROM/SRAM/flashaddressbusbit[4]R_A0;BACKGROUND-COLOR:#4ae2f7">510;BACKGROUND-COLOR:#4ae2f7">59OROM/SRAM/flashaddressbusbit[0;BACKGROUND-COLOR:#4ae2f7">5]R_A6160OROM/SRAM/flashaddressbusbit[6]R_A7161OROM/SRAM/flashaddressbusbit[7]R_A12162I/OROM/SRAM/flashaddressbusbit[12]R_A10;BACKGROUND-COLOR:#4ae2f7">5163I/OROM/SRAM/flashaddressbusbit[10;BACKGROUND-COLOR:#4ae2f7">5]DAC_VREF164AAudioDACreferencevoltage,connecta0.
1uFtogroundDAC_L160;BACKGROUND-COLOR:#4ae2f7">5AAudioDACleft-channeloutputDAC_R166AAudioDACright-channeloutputDAC_VDD167S3.
3vpowersupplyforon-chipaudioDACDAC_VSS168SGroundpinforon-chipaudioDACR_A16169I/OROM/SRAM/flashaddressbusbit[16]R_A18170I/OROM/SRAM/flashaddressbusbit[18]A_IEC_TX/GPIO171I/OIEC-90;BACKGROUND-COLOR:#4ae2f7">58transmitdataPriorityselectionFunctionDirsft_cfg3[8]=1'b1A_IEC_TX(default)Osft_cfg8[8]=1'b1ADC_MONO_C[0]Isft_cfg8[9]=1'b1DAC_OPF[0]I(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">52]I/OA_DATA[0]/GPIO172I/OSerialaudiodataoutputforchannel1/0orGPIOPriorityselectionFunctionDirsft_cfg3[1]=1'b1A_DATA[0](default)Osft_cfg8[8]=1'b1ADC_MONO_C[1]Isft_cfg8[9]=1'b1DAC_OPF[1]I(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">53]I/OVDD_O0;BACKGROUND-COLOR:#4ae2f7">5173SI/Opowersupply#0;BACKGROUND-COLOR:#4ae2f7">5A_DATA[1]/GPIO174I/OSerialaudiodataoutputforchannel3/2orGPIOPriorityselectionFunctionDirsft_cfg3[2]=1'b1A_DATA[1](default)Osft_cfg8[8]=1'b1ADC_MONO_C[2]Isft_cfg8[9]=1'b1DAC_OPF[2]I(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">54]I/OPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice19MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionA_DATA[2]/GPIO170;BACKGROUND-COLOR:#4ae2f7">5I/OSerialaudiodataoutputforchannel0;BACKGROUND-COLOR:#4ae2f7">5/4orGPIOPriorityselectionFunctionDirsft_cfg3[3]=1'b1A_DATA[2](default)Osft_cfg8[8]=1'b1ADC_MONO_PWADIsft_cfg8[9]=1'b1DAC_PDALLI(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5]I/OA_DATA[3]/GPIO176I/OSerialaudiodataoutputforchannel7/6orGPIOPriorityselectionFunctionDirsft_cfg3[4]=1'b1A_DATA[3](default)Osft_cfg8[8]=1'b1ADC_MONO_SPGAIsft_cfg8[9]=1'b1DAC_TESTI(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">56]I/OA_LRCK/GPIO177I/OPCMdataoutputL/RstrobePriorityselectionFunctiondirsft_cfg3[6]=1'b1A_LRCK(default)I/Osft_cfg8[8]=1'b1ADC_MONO_MODE1Isft_cfg8[9]=1'b1DAC_UDI(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">57]I/OVSS_O6/VSS_K6178SKernellogic/I/Opowersharedgroundsupply#6A_BCK/GPIO179I/OPCMbitclockPriorityselectionFunctionDirsft_cfg3[0]=1'b1A_BCK(default)I/Osft_cfg8[8]=1'b1ADC_MONO_MODE1_1Isft_cfg8[9]=1'b1DAC_BGPDI(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">58]I/OA_XCK/GPIO180I/OAudioover-samplingclockPriorityselectionFunctionDirsft_cfg3[9]=1'b1A_XCK(default)I/Osft_cfg8[8]=1'b1ADC_MONO_MODE2Isft_cfg8[9]=1'b1DAC_CLKI(other)GPIO[0;BACKGROUND-COLOR:#4ae2f7">59]I/OUA0_RX/GPIO181I/OUART#0datareceiveorGPIOPriorityselectionFunctionDirsft_cfg2[3:2]=2'b01UART0_RX(default)Isft_cfg3[13:12]=2'b01TV_HSYNCI/Osft_cfg4[10;BACKGROUND-COLOR:#4ae2f7">5:13]=3'b011HSYNC_PCO(other)GPIO[60]I/OPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice20MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionUA0_TX/GPIO182I/OUART#0datatransmitorGPIOPriorityselectionFunctionDirsft_cfg2[3:2]=2'b01UART0_TX(default)Osft_cfg3[13:12]=2'b01TV_VSYNCI/Osft_cfg4[10;BACKGROUND-COLOR:#4ae2f7">5:13]=3'b011VSYNC_PCO(other)GPIO[61]I/OV_COMP183A(VDACCBU)Compensationpin.
Connecta0.
1pFceramiccapacitortobypassthispintoVSSA.
Theleadlengthmustbekeptasshortaspossibletoavoidnoise.
V_BIAS184(VDACCBL)Biasvoltage.
Connecta0.
1pFceramiccapacitortobypassthispintoVSSA.
Theleadlengthmustbekeptasshortaspossibletoavoidnoise.
V_FSADJ180;BACKGROUND-COLOR:#4ae2f7">5AFull-Scaleadjustmentcontrolpin.
Thefull-scalecurrentofD/Aconverterscanbeadjustedbyconnectingaresistor(RSET)betweenthispinandground.
V_REFOUT186A(VDACVREF/bandgapoutput)Voltagereferenceoutput.
Itgeneratestypical1.
2VvoltagereferenceandmaybeusedtodriveV_REFINpindirectly.
V_DAC[0]187AVideoDACoutput#0.
Thisisahigh-impedancecurrentsourceoutput.
Theseoutputscandrivea37.
0;BACKGROUND-COLOR:#4ae2f7">5loaddirectly.
VDD_TVA0188STVDACpowersupply#0VSS_TVA0189STVDACgroundpin#0VDD_TVA1190STVDACpowersupply#1VSS_TVA1191STVDACgroundpin#1V_DAC[3]192AVideoDACoutput#3.
Thisisahigh-impedancecurrentsourceoutput.
Theseoutputscandrivea37.
0;BACKGROUND-COLOR:#4ae2f7">5loaddirectly.
V_DAC[4]193AVideoDACoutput#4.
Thisisahigh-impedancecurrentsourceoutput.
Theseoutputscandrivea37.
0;BACKGROUND-COLOR:#4ae2f7">5loaddirectly.
VDD_TVA2194STVDACpowersupply#2V_DAC[0;BACKGROUND-COLOR:#4ae2f7">5]190;BACKGROUND-COLOR:#4ae2f7">5AVideoDACoutput#0;BACKGROUND-COLOR:#4ae2f7">5.
Thisisahigh-impedancecurrentsourceoutput.
Theseoutputscandrivea37.
0;BACKGROUND-COLOR:#4ae2f7">5loaddirectly.
VSS_TVA2196STVDACgroundpin#2PLL_AVDD197SServoPLL3.
3VpowerLPFO198ANCpinLPFN199ANCpinVREFO200APDFLT201AFDFLT202ALPFNIN203ALGIN204APLL_DS_AVSS200;BACKGROUND-COLOR:#4ae2f7">5SServoPLL/Data-slicergroundRFI206ACNIN207ASLVL208ADS_AVDD209SServoDataslicer3.
3VpowerRF_AVDD210SServoRF3.
3VpowerGMRES211AExternalreferenceresistorinput.
AGCCAP212AExternalAGCcapacitorconnectedtoground.
PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice21MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1SymbolPinNo.
I/ODescriptionRFRP213ORFRPsignaloutput.
RFO214ORFsignaloutput.
FLTIP210;BACKGROUND-COLOR:#4ae2f7">5IDifferentialRFequalizerinput#PFLTIN216IDifferentialRFequalizerinput#NNote:PleasereferenceSPHE802Dservodatasheetforservorelatedinformation.
PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice22MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
10;BACKGROUND-COLOR:#4ae2f7">5.
FUNCTIONALDESCRIPTIONSSPHE8281Disahighlyintegratedsystem-on-chipDVDplayerSoCdesign.
ItincludesDVD/CDfront-endRF,read-channel,datadecoder,servocontroller,hostcontroller,MPEG1/2videodecoder,programmableaudiodecoder,programmableperipheralcontroller,audioDACandmulti-formatTV-encoderonasinglechip.
0;BACKGROUND-COLOR:#4ae2f7">5.
1.
PLLandClockGenSPHE8281DcontainsmultiplePLLstogeneratesystemclockandaudioreferenceclocks.
AllthePLLsreferenceasingleexternal27MHzclockorcrystaltogeneratetherequiredclocks.
SystemclockisthenderivedfromdivisionofthesystemPLLoutput.
PLLvFractionalmultiplesofCLKISYSCLK_GEN/2,/4~/60;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">536VIDCLK_GENOptionalvideoclockinCLKI27MHzVIDCLKSYSCLKPLLasupportstwocenterfrequencies(forboth48kHzfamilyand44.
1kHzfamily)andgeneratesrequiredaudioclocksfromtheaudiosystemclock.
PLLa#1147.
40;BACKGROUND-COLOR:#4ae2f7">56MHz130;BACKGROUND-COLOR:#4ae2f7">5.
470;BACKGROUND-COLOR:#4ae2f7">52MHzAUDCLKGENPLLa#2CD_CLKXCKADCLKIECCLKCLKI27MHz0;BACKGROUND-COLOR:#4ae2f7">5.
2.
PowerControlSPHE8281Dprovidesvariouslevelsofpower-controlmechanisminordertoachieveminimumpowerconsumption.
Automaticpower-save:Mosthardwaremodulesareautomaticallypower-savedwhennotoperating.
Module-levelstop-operation:SPHE8281Dprovidesafunctiontoturnoffspecificmodulefromoperating.
Withoutexplicitwake-up,thehardwaremodulewillremainstaticandconsumelittlepower.
System-leveldoze:Formaximumpower-saving,firmwarecouldfine-tunesystemperformanceaccordingtosystemtask.
0;BACKGROUND-COLOR:#4ae2f7">5.
3.
Embedded32-bitRISCControllerSPHE8281Dincludesapowerful32-bitRISCprocessorasthehostcontroller.
Thishostcontrollerisutilizedtomanageservocontrol,decodingtasksaswellasUItasks.
Itcanaccesstoallthememoryanddevices,cooperatebetweenprocessorsystems.
AudiodecoderandI/OprocessorhandshakewithRISCprocessorthroughthemailboxregisters.
RISCcontrollermailbox(16x16)AudiodecoderI/Oprocessormailbox(16x8)Figure0;BACKGROUND-COLOR:#4ae2f7">5-1CommunicationbetweenprocessorsTheRISCprocessorisequippedwithinstructionanddatacaches.
ThesecachescanaccelerateaccessestotheSDRAMorROMcacheableregions.
RISC32coreI-CACHEBIUD-CACHESMMUProcessorLocalBusROM/FlashinterfaceSystembusInterfaceROMFLASHSRAMPeripheralControlbusOthermodulesD-RAMDMAMemoryInterfaceFigure0;BACKGROUND-COLOR:#4ae2f7">5-2RISCsubsystemPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice23MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1Table:RISCprocessorlocalmemoryconfigurationMemorySpecificationI-Cache8kbyte(2-waysetassociated)D-Cache4kbyte(direct-mapped)D-RAM/DMA1kbytescratchbufferSDRAM,ROMandotherdevicesaremappedtoRISCmemoryspacesasinthefollowingtable:Table:RISCmemorymappingMemoryRangeDescription8000_0000~87ff_ffffSDRAM(cached)a000_0000~a7ff_ffffSDRAM(uncached)8800_0000~8fff_ffffROM/FLASH/SRAM(cached)a800_0000~afff_ffffROM/FLASH/SRAM(uncached)bffe_8000~bffe_ffffPeripheralcontrolregistersbfff_0000~bfff_03ffDMAbufferSPHE8281DincludesfollowingdedicatedRISCperipheralstoassistthesystemtasks:Deviceinterruptcontroller:Deviceinterruptcontrollertakescareofinterruptsourcesfromon-chipdevicesandoffchipsources.
Foreachinterruptsourcethefirmwareisabletoconfiguretheinterruptbehaviorbetweenedge-triggerandlevel-sensitivemode.
Watchdog:WatchdogkeepsmonitoringRISCbehaviorandwheneverfirmwareisinadeadlockorill-behaved,thewatchdogwouldtriggersystem-wiseresetandkeeptheapplicationfunctioningcontinuously.
TimersThereare4-channeltimersand2cascadecountersfortimedtasks.
DuringA/Vdecoding,systemtimecountersareutilizedtosynchronizeaudioandvideoplaybacktiming.
RISCsubsystemperipheralcontrolbusWatchdogwatchdogresetTimersDeviceinterruptcontrollertimerinterrupttoRISCinterruptRISCmonitormonitorinterruptFigure0;BACKGROUND-COLOR:#4ae2f7">5-3RISCdedicatedhardwareTable:DeviceinterruptcontrollersourcesSymbolDescriptionINT_WDOGWatchdoginterrupt(ifresetdisabled)INT_VSYNCInterruptwhenenterverticalresyncINT_FLD_ACTInterruptwhenenteractiveregionINT_FLD_SYNCInterruptwhenleaveactiveregionINT_HOSTHostdeviceinterruptINT_TIMER0Timer0interruptINT_TIMER1Timer1interruptINT_TIMER2ATimer2scaleinterruptINT_TIMER2BTimer2countinterruptINT_TIMER3ATimer3scaleinterruptINT_TIMER3BTimer3countinterruptINT_TIMERWWatchdogtimerinterruptINT_UART0UART0interruptINT_VDP0VideodecoderinterruptINT_DSPDSPinterruptINT_EXT0Externalinterrupt#0INT_EXT1Externalinterrupt#1INT_EXT2Externalinterrupt#2INT_EXT3Externalinterrupt#3INT_IOPIOPinterruptINT_AUDAudiohardwareinterrupt0;BACKGROUND-COLOR:#4ae2f7">5.
4.
ROM/Flash/SRAMControllerTheSPHE8281DprovidesflexibleconnectionstoexternalROM,FlashorSRAM(RFS).
Itcansupportupto4externalRFSdevicesbyusingdifferentchip-selects(R_CS_B[3:0]).
ThefirmwarecanconfigureRFSmemoryanchorregistersandmapthesedevicesintolocationsofRISCmemoryspace.
ForeachmemoryspaceitcanbeinflashmodeorinISAmode.
InFLASHmodetheaccesstimingisdecidedbywait-statesetting,whileinISAmodethecontrollerwillreferenceexternalIO_CHRDYinput.
ProcessorlocalbusPrefetchbufferAddresssequencerAddresstranslatorExternalROMinterfaceWaitstategenerationFigure0;BACKGROUND-COLOR:#4ae2f7">5-4ROM/FLASH/SRAMcontrollerPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice24MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1oe_setupwaitADDR[]WEBDATA[]OEBCSBoe_holdwe_setupwe_holdDATA(forwrite)Address(read)ROM/FlashmodeData(read)waitAddress(write)dataissampledatthispointFigure0;BACKGROUND-COLOR:#4ae2f7">5-0;BACKGROUND-COLOR:#4ae2f7">5ROM/FLASH/SRAMmodetimingoe_setupwaitADDR[]WEBIO_RDYDATA[]OEBCSBoe_holdiochrdy_holdwe_setupwe_holdDATA(forwrite)Address(read)ISAMODEData(read)iochrdy_holdwaitAddress(write)dataissampledatthispointFigure0;BACKGROUND-COLOR:#4ae2f7">5-6ISAmodetiming0;BACKGROUND-COLOR:#4ae2f7">5.
0;BACKGROUND-COLOR:#4ae2f7">5.
CSSDecryptionHardware(Optional)SPHE8281Dhasbuilt-inCSSdecryptionhardwareDMAsupport.
0;BACKGROUND-COLOR:#4ae2f7">5.
6.
MPEGVideoDecoderThesystemincorporatesapowerfulMPEGvideodecodingdatapathandprovidesreal-timevideodecodingofMPEGI/IIbitstream.
ThevideodecoderisahardwiredMPEG1/2decodingdatapath.
Thesystemarchitectureisasinthefigure.
RISCcontrollerisinchargeofpre-processandbufferingsourceintoSDRAMbuffers.
Uponcorrecttimingvideodecoderwillstarttodecodethebitstreamandwritebackreconstructedvideoframeforplayback.
RISCsubsystemdata-inde-muxeddataMemoryInterfaceControlbusVideoDecoderBitstreaminReferenceReconstructedFigure0;BACKGROUND-COLOR:#4ae2f7">5-7InterfacebetweenRISCandVideodecoderAdvancedvideodecodinganddisplaycontrolmechanismisincludedtopreventtearingeffect.
inputFIFOVariablelengthdecoderInversequantizationInverseDCTMotioncompensationinputbufferoutputbufferDecodingcontrolDecodingcontroldisplayinformationQmatrixDCTbufferMemoryInterfaceOutputFIFORISCcontrollerFigure0;BACKGROUND-COLOR:#4ae2f7">5-8Architectureofvideodecodingpipeline0;BACKGROUND-COLOR:#4ae2f7">5.
7.
VideoPostProcessingSPHE8281Dincludespowerfulvideo-post-processingfacilitiestoprovidehighvideoquality.
Itperformfollowingfunctions:YUV411,YUV420,YUV422and8-bitindexedcolorSIFtoCCIR601interpolationMPEG1CIFfilterMPEG1/2chromaverticalinterpolationUpto1/2xhorizontaldecimationUpto1/0;BACKGROUND-COLOR:#4ae2f7">512xverticaldecimationUpto1024xhorizontalandverticalexpansionPowerfulde-interlacinghardwarePanandscanfunctionDe-flickerduringinterlaceddisplayVideocontrast/bright/colorenhancementDuringruntimevideopost-processinghardwarewillfetchvideosourcesfromframebufferandprocessthedataasinthefollowingfigure.
inputbufferDeinterlacelinebufferVerticalfilteringandchromaresamplede-interlacebufferCIFandhorizontalexpansionMemoryinterfacedisplayinterfacePPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice20;BACKGROUND-COLOR:#4ae2f7">5MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
10;BACKGROUND-COLOR:#4ae2f7">5.
8.
ProgrammableAudioDecoderTheSPHE8281Dcontainsahigh-performance24-bitaudioDSPoptimizedforembeddedsystemapplications.
ThisaudioDSPprocessorcanfetchoperandsfromtwomemoriesandperformmultiplication-and-accumulation(MAC)inonecycle.
DuringexecutiontheDSPfetchesinstructionfrommain-memoryorIROM,atthesametimetheICACHEwillstoretheLRUinstructions.
Dataareloadedfromandtomain-memorybythecycle-stealingDMAchannels.
TheDSPworkscloselywithRISCprocessorsbyusingmailboxregistersorshared-memoryprotocol.
WhendownloadedwithdifferentfirmwaretheDSPcouldsupportmulti-standardaudioandactasanacceleratorforRISCinsomecase.
AudioCoreInst.
CacheIROMDataROMDataRAMDataROMDataRAMBIUMemoryinterfaceaudiointerfacecontrollerAudioHardwareFigure0;BACKGROUND-COLOR:#4ae2f7">5-10AudioDSParchitecture0;BACKGROUND-COLOR:#4ae2f7">5.
9.
AudioInterfaceTheaudiointerfaceisinchargeofservicingDSPandmaintainingallaudio-relatedtasks.
ItwouldbuffertheaudioPCMsamplesandformatthemtoaudioDACandSPDIFformats.
Upto8channelofdigitalaudioaresupportedinI2Sornormalmode.
MemoryInterfaceAudioWorkbufferdigitalinputinterfaceADCctrlADCanaloginPCMplaybackIEC90;BACKGROUND-COLOR:#4ae2f7">58IEC90;BACKGROUND-COLOR:#4ae2f7">58BuffercontrolIEC-90;BACKGROUND-COLOR:#4ae2f7">58inputdigitalaudioinputdigitalaudiooutputIEC-90;BACKGROUND-COLOR:#4ae2f7">58outputFigure0;BACKGROUND-COLOR:#4ae2f7">5-11AudioInterfacearchitectureSPHE8281DsupportfollowingaudioDACformatcombinations:32k44.
1k48k64k88.
2k96k192k20;BACKGROUND-COLOR:#4ae2f7">56fsOkOkOkOkOkOkOk384fsOkOkOkOkOkOkOkDataalignmentLeftadjust,I2S,normalformatLRCKframewidth16b,24b,32b,64bDatabits16b,18b,20b,24bDatasignextensionZero-extended,sign-extended0;BACKGROUND-COLOR:#4ae2f7">5.
10.
AudioDACSPHE8281Dincludesa2-channel24-bitaudioqualityDACforaminimumDVDsystem.
0;BACKGROUND-COLOR:#4ae2f7">5.
11.
I/OProcessorTheSPHE8281Dincludesan8-bitmicro-controllertohelphostcontrollerhandlingI/Ojobs.
IR,VFDandotherslowdevicescanbeinterfacedusingthisI/Oprocessor.
0;BACKGROUND-COLOR:#4ae2f7">5.
12.
SDRAMControllerSDRAMcontrollerinSPHE8281Disdesignedtomeetbothflexibleandpowerfulrequirements.
Itcanbeprogrammedtouse1Mx16and4Mx16SDRAMchips.
FordifferentgradeofmemorychipsitcansupportflexibletimingselecttomeetdifferentSDRAMtimingrequirementswhileachievingmaximumperformance.
TheactualspeedofSDRAMinterfacedependsonthesystemconfiguration.
SPHE8281DsupportsSDRAMpower-downmodestosavedynamicoperatingpower.
0;BACKGROUND-COLOR:#4ae2f7">5.
13.
Sub-pictureDecoderForDVDandSVCDsub-picturecontentSPHE8281Dincludesanadvancedmulti-formatsub-picturedecoder.
Itsupportsreal-timeverticalexpansionforPAL/NTSCtranslationorspecialeffect.
0;BACKGROUND-COLOR:#4ae2f7">5.
14.
OnScreenDisplayTheonscreendisplay(OSD)functionoftheSPHE8281DprovidesanoverlaybitmapgraphicsonthefinalTVdisplay.
Applicationscanusethisfunctiontodisplayspecificinformationoverthevideodisplayplanewithoutoperatingonthevideosource.
TheSPHE8281DcandisplaymultipleOSDregionsonasingledisplayframe,whereeveryOSDregionscanbeindifferentsize,locationandcolorformat.
TheOSDhardwaresupports4,16,20;BACKGROUND-COLOR:#4ae2f7">56indexedcoloror16-bitdirectcolor.
OSDregionsarestoredinmainmemorybeforedisplay.
Duringdisplay,OSDdecoderwouldreadtheseheaderanddataandinterprettobeagraphicdatathatoverlaywithvideotobeoutputtothedisplayinterface.
PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice26MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
10;BACKGROUND-COLOR:#4ae2f7">5.
10;BACKGROUND-COLOR:#4ae2f7">5.
DisplayInterfaceThedisplayinterfaceofSPHE8281Dmixesthevideocontentgeneratedfromvideo-post-processing,sub-picture-decoderandon-screen-displaymodules.
Italsoperformscontentcropping,underflowandoverflowcorrectionandoverallhue/brightness/contrastadjustment.
Sub-pictureblend-factorBackgroundcolorVideoframebufferMUXVideoactiveMIXSub-picturesourcedataMIXOSDbitmapdataOSDblend-factorTVdataoutputFigure0;BACKGROUND-COLOR:#4ae2f7">5-12DisplaypipelineThevideoenhancementprocessisshowinfollowingfigure:VideopostprocessingDisplayinterfaceTVencodervideosourceenhancementandbright/contrast/colorcontrolDACgain,linearityadjustmentOSDsub-pictureanalogvideodigitaloutputVideosourceOSDsourceFigure0;BACKGROUND-COLOR:#4ae2f7">5-13Displaypipeline0;BACKGROUND-COLOR:#4ae2f7">5.
16.
VideoDACSPHE8281Dintegrates4-channel10-bithigh-speedcurrentsourceDACsoperatingfrom27MHzto108MHz.
TheseDACoutputscandrivea37.
0;BACKGROUND-COLOR:#4ae2f7">5-Ohmloaddirectly.
Halfcurrent,quartercurrentmodesareprovidedforlowpoweroperationusingexternalcurrentamplifiers.
0;BACKGROUND-COLOR:#4ae2f7">5.
17.
GPIOInSPHE8281Dalmosteverypinthatrelatedtoselectablefeaturescanserveasgeneral-purposeinput-output(GPIO)controlfunction.
Whenapinisprogrammedtothismode,theRISCcontrollerortheI/Oprocessorcantakefullcontroloverthedirectionandoutputlevelbysimplefirmwareprogramming.
0;BACKGROUND-COLOR:#4ae2f7">5.
18.
UARTSPHE8281DprovideoneUARTchannelfordebugging,firmwareupgradingandotheruserapplications.
ThisUARTcansupportstandardserialportbaud-rateandformats.
Italsosupportsautobaud-ratedetectionandhardwareflowcontrol(CTS/RTSpair).
PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice27MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
16.
ELECTRICALSPECIFICATIONS6.
1.
AbsoluteMaximumRatingsParameterSymbolValueUnitVoltageonanypinrelativetoVssVIN-0.
3to0;BACKGROUND-COLOR:#4ae2f7">5.
0;BACKGROUND-COLOR:#4ae2f7">5VVoltageonVDDIOsupplyrelativetoVSSVDDIO-0.
3to3.
40;BACKGROUND-COLOR:#4ae2f7">5VVoltageonVDDKsupplyrelativetoVSSVDDK-0.
3to1.
90VStorageTemperatureTSTG-0;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5to10;BACKGROUND-COLOR:#4ae2f7">50CSolderingTemp.
(Max.
Time)TSOLDER240(for0;BACKGROUND-COLOR:#4ae2f7">5Sec.
Max.
)CShortcircuitcurrent000000;BACKGROUND-COLOR:#ffff00">IOS0;BACKGROUND-COLOR:#4ae2f7">50mANote:Stressesabovethoselistedunder"AbsoluteMaximumRatings"maycausepermanentdamagetothedevice.
Functionaloperationofthisdeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthisspecificationisnotimpliedandexposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectdevicereliability.
6.
2.
DCOperatingConditionsRecommendedOperatingConditions(VoltagereferencedtoVSS=0V,TA=-0to70C)ParameterSymbolMin.
Typ.
Max.
UnitsVoltageonVDDKsupplyrelativetoVSSVDDK1.
701.
801.
90VVoltageonVDDIOsupplyrelativetoVSSVDDIO3.
10;BACKGROUND-COLOR:#4ae2f7">53.
303.
40;BACKGROUND-COLOR:#4ae2f7">5VInputlogichighvoltageVIH2.
0-0;BACKGROUND-COLOR:#4ae2f7">5.
0;BACKGROUND-COLOR:#4ae2f7">5VInputlogiclowvoltageVIL-0.
3-0.
8VOutputlogichighvoltageVOH2.
4--VOutputlogiclowvoltageVOL--0.
4VInputleakagecurrentIL-10-10uA6.
3.
Capacitance(VDDIO=3.
3V,TA=24C,f=108MHz,VREF=1.
4V+-200mV)ParameterSymbolMin.
Typ.
Max.
UnitsInputpincapacitanceCIN-3.
0;BACKGROUND-COLOR:#4ae2f7">5-pFInputpincapacitanceCOUT-3.
0;BACKGROUND-COLOR:#4ae2f7">5-pFBidirectionalpincapacitanceCBIDIR-3.
0;BACKGROUND-COLOR:#4ae2f7">5-pFPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice28MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
16.
4.
ACCharacteristics6.
4.
1.
SDRAMinterfacetimingdiagrams012340;BACKGROUND-COLOR:#4ae2f7">56789101112131410;BACKGROUND-COLOR:#4ae2f7">516171819tRPCAaRAaRBbCBbRAcCAcRAaRBbRActCHtCLtCCtRAStRCtSHtSStRCDtCCDtRRDCAa0CAa1CAa2CAa3DBb0DBb1DBb2DBb3CAc0CAc1CAc2CAc0CAc1DBb0DBb1DBb2DBb3CAa0CAa1CAa2CAa3DHtSACtCDL*Note1RowActive(A-Bank)Read(A-Bank)RowActive(B-Bank)Precharge(A-Bank)RowActive(A-Bank)Write(B-Bank)Read(A-Bank):Don'tcareCLOCKCKECSRASCASADDRBAA10/APDQCL=2CL=3WEDQMtSLZ012340;BACKGROUND-COLOR:#4ae2f7">56789101112131410;BACKGROUND-COLOR:#4ae2f7">516171819HIGHCAaRAaCAbRAaCKECLOCKCSRASCASADDRBAA10/APDQWEDQMDAa0DAa1DAa2DAa3DAa4tBDLDAb0DAb1DAb2DAb3DAb4DAb0;BACKGROUND-COLOR:#4ae2f7">5tRDLRowActive(A-Bank)Write(A-Bank)BuratStopWrite(A-Bank)Precharge(A-Bank)PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice29MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1(RecommendedconditionforDVDplaybackislistedintypicalconditionwithf=121.
0;BACKGROUND-COLOR:#4ae2f7">5MHz)ParameterSymbolMin.
Typ.
Max.
UnitsRowactivetorowactivedelaytRRD124*1SystemclockcycleRAStoCASdelaytRCD124*1SystemclockcycleRowprechargetimetRP124*1SystemclockcycleRowactivetimetRAS10;BACKGROUND-COLOR:#4ae2f7">58*1SystemclockcycleRowcycletimetRC1832*1SystemclockcycleLastdataintonewcolumnaddressdelaytCDL114*1SystemclockcycleColumnaddresstocolumnaddressdelaytCCD111SystemclockcycleCLKcycletime*2tCC68.
21000nsCLKtovalidSDRAMoutputdelay*2tSAC-6.
06.
0;BACKGROUND-COLOR:#4ae2f7">5nsSDRAMoutputdataholdtime*2tOH12-nsCLKhighpulsewidth*3tCH-3-nsCLKlowpulsewidth*3tCL-3-nsCLKtoSDRAMoutputLow-ZtSLZ-1.
0(tCC)nsCLKtoSDRAMoutputHigh-ZtSHZ-6.
0(tSAC)nsNote:1.
Usingmaximumvaluesmaylimitsystemperformance.
2.
Widthofdatawindowcanbeestimatedfrom(tCC-tSAC+tOH).
3.
Widthofclockpulsedependsonsystemclockcycle.
6.
4.
2.
ROM/flashinterfacetimingdiagramsROMCompatibleModeADDR[]WEBDATA[]OEBCSBDATA(forwrite)Address(read)Data(read)Address(write)tDStDHtWEStWEHtACCESStACCESSFigure6-1ROM/flashinterfaceROMmodeaccesstimingParameterSymbolMin.
Typ.
Max.
UnitsROM/SRAM/flashaccesstimetACCESS28*131SystemclockcycleDatasetuptimeforreadtDS0;BACKGROUND-COLOR:#4ae2f7">5--nsDataholdtimeforreadtDH0--nsAddress/datasetuptimebeforewritestrobetWS0131SystemclockcycleAddress/datasetuptimeafterwritestrobetWH0131SystemclockcycleNote:Recommendedvaluewhenf=121.
0;BACKGROUND-COLOR:#4ae2f7">5MHzPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice30MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1ISACompatibleModeADDR[]WEBIO_RDYDATA[]OEBCSBtACCESStWAITtACCESStWEStWEHtIHAddress(write)tOHtOHData(read)Data(write)Address(read)tWAITtIHFigure6-2ROM/flashinterfaceISAmodeaccesstimingParameterSymbolMin.
Typ.
Max.
UnitsISAaccesstime*1tACCESS2-31SystemclockcycleIO_RDYwaittimetWAIT0-1000nsOutputholdtimetOH1--SystemclockcycleInputholdtimetIH0--nsAddress/datasetuptimebeforewritestrobetWS0131SystemclockcycleAddress/datasetuptimeafterwritestrobetWH0131SystemclockcycleNote:AfterthisperiodoftimeIO_RDY_Bmustbestableandindicatescorrectstatusoftargetdevice.
6.
4.
3.
AudiointerfacetimingdiagramsSomeaudiointerfaceconfigurationtimingdiagramsareshownbelow.
LSBMSBLSBMSB0123022122323222112010LRCKAUDATA[]BCKleftchannel222232221rightchannelFigure6-3Normalmode/24bitdata/24bitframe/MSBfirstMSBLSB019310830103123222112010LRCKAUDATA[]BCKleftchannel230rightchannelFigure6-4Rightjustified(normal)mode/24bitdata/32bitframe/MSBfirstPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice31MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
1LSBMSB01223243102212031232221102322LRCKAUDATA[]BCKleftchannelrightchannel21Figure6-0;BACKGROUND-COLOR:#4ae2f7">5Leftjustifiedmode/24bitdata/32bitframe/MSBfirstLSBMSB0122324310320;BACKGROUND-COLOR:#4ae2f7">51230312322211202322LRCKAUDATA[]BCKleftchannelrightchannelDDFigure6-6I2Smode/24bitdata/32bitframeLSBMSBLSBMSB01230221202323222112010LRCKAUDATA[]BCKleftchannel222232221rightchannel1DD2Figure6-7I2Smode/24bitdata/24bitframeParameterSymbolMin.
Typ.
Max.
UnitsBCKrisingtoLRCK/AUDATAtransitiontS-0.
0;BACKGROUND-COLOR:#4ae2f7">5-Systemclockcycle6.
4.
4.
VideotimingdiagramsInterlacedModes204477470;BACKGROUND-COLOR:#4ae2f7">5479473413280;BACKGROUND-COLOR:#4ae2f7">5761291110161310;BACKGROUND-COLOR:#4ae2f7">514201719182122230;BACKGROUND-COLOR:#4ae2f7">5230;BACKGROUND-COLOR:#4ae2f7">520;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5242420;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">522310;BACKGROUND-COLOR:#4ae2f7">5260262261activelineperiodSPactiveperiodVblankingperiod(21)activelineperiodSPactiveperiod266263260;BACKGROUND-COLOR:#4ae2f7">5264270267269268274271273272278270;BACKGROUND-COLOR:#4ae2f7">5277276282279281280283284280;BACKGROUND-COLOR:#4ae2f7">5286287Vblankingperiod(21)activelineperiodSPactiveperiod288activelineperiodSPactiveperiod476474478SPlinenumberVideolinenumberVideolinenumberSPlinenumber262728298610122892902917911Figure6-8NTSC(480i)timingdiagramPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice32MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
12040;BACKGROUND-COLOR:#4ae2f7">5710;BACKGROUND-COLOR:#4ae2f7">5690;BACKGROUND-COLOR:#4ae2f7">5730;BACKGROUND-COLOR:#4ae2f7">567413280;BACKGROUND-COLOR:#4ae2f7">5761291110161310;BACKGROUND-COLOR:#4ae2f7">514201719182122236206226212420;BACKGROUND-COLOR:#4ae2f7">5619310;BACKGROUND-COLOR:#4ae2f7">5307309308SPactiveperiodVblankingperiod(23.
0;BACKGROUND-COLOR:#4ae2f7">5)SPactiveperiod313310312311317314316310;BACKGROUND-COLOR:#4ae2f7">5321318320319320;BACKGROUND-COLOR:#4ae2f7">5322324323329326328327330331332333334Vblankingperiod(24)activelineperiodSPactiveperiod330;BACKGROUND-COLOR:#4ae2f7">5activelineperiodSPactiveperiod476474478SPlinenumberVideolinenumberVideolinenumberSPlinenumber623620;BACKGROUND-COLOR:#4ae2f7">562426278633633733833934079activelineperiodactivelineperiodFigure6-9PAL(0;BACKGROUND-COLOR:#4ae2f7">576i)timingdiagramProgressiveModes40;BACKGROUND-COLOR:#4ae2f7">5910116132780;BACKGROUND-COLOR:#4ae2f7">5230;BACKGROUND-COLOR:#4ae2f7">520;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5240;BACKGROUND-COLOR:#4ae2f7">5221213144440;BACKGROUND-COLOR:#4ae2f7">54647480;BACKGROUND-COLOR:#4ae2f7">521activelineperiodSPactiveperiodSPactiveperiod490;BACKGROUND-COLOR:#4ae2f7">500;BACKGROUND-COLOR:#4ae2f7">51activelineperiod012340;BACKGROUND-COLOR:#4ae2f7">56478479477476Figure6-10NTSC(480p)timingdiagram620;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">56762262462334619621620618894440;BACKGROUND-COLOR:#4ae2f7">5464748617activelineperiodSPactiveperiodSPactiveperiod490;BACKGROUND-COLOR:#4ae2f7">500;BACKGROUND-COLOR:#4ae2f7">51activelineperiod012340;BACKGROUND-COLOR:#4ae2f7">560;BACKGROUND-COLOR:#4ae2f7">5740;BACKGROUND-COLOR:#4ae2f7">570;BACKGROUND-COLOR:#4ae2f7">50;BACKGROUND-COLOR:#4ae2f7">5730;BACKGROUND-COLOR:#4ae2f7">5721243Figure6-11PAL(0;BACKGROUND-COLOR:#4ae2f7">576p)timingdiagramPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice33MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
17.
PACKAGE/PADLOCATION7.
1.
OutlineDimensionsSUNPLUSSPHE8281DYYWWcL1DD1ebE1EAA2A1D2E2SymbolMin.
Nom.
Max.
A--1.
60A10.
00;BACKGROUND-COLOR:#4ae2f7">5-0.
10;BACKGROUND-COLOR:#4ae2f7">5A21.
30;BACKGROUND-COLOR:#4ae2f7">51.
401.
40;BACKGROUND-COLOR:#4ae2f7">5D26.
00BSC.
26.
00BSC.
26.
00BSC.
D124.
00BSC.
24.
00BSC.
24.
00BSC.
E26.
00BSC.
26.
00BSC.
26.
00BSC.
E124.
00BSC.
24.
00BSC.
24.
00BSC.
R20.
08-0.
20R10.
08--θ0O3.
0;BACKGROUND-COLOR:#4ae2f7">5O7Oθ10O--θ211O12O13Oθ311O12O13Oc0.
09-0.
20L0.
40;BACKGROUND-COLOR:#4ae2f7">50.
600.
70;BACKGROUND-COLOR:#4ae2f7">5L11.
00REF1.
00REF1.
00REFS0.
20--Unit:MillimeterPPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice34MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
18.
DISCLAIMERTheinformationappearinginthispublicationisbelievedtobeaccurate.
IntegratedcircuitssoldbySunplusTechnologyarecoveredbythewarrantyandpatentindemnificationprovisionsstipulatedinthetermsofsaleonly.
SUNPLUSmakesnowarranty,expressed,statutoryimpliedorbydescriptionregardingtheinformationinthispublicationorregardingthefreedomofthedescribedchip(s)frompatentinfringement.
FURTHERMORE,SUNPLUSMAKESNOWARRANTYOFMERCHANTABILITYORFITNESSFORANYPURPOSE.
SUNPLUSreservestherighttohaltproductionoralterthespecificationsandpricesatanytimewithoutnotice.
Accordingly,thereaderiscautionedtoverifythatthedatasheetsandotherinformationinthispublicationarecurrentbeforeplacingorders.
Productsdescribedhereinareintendedforuseinnormalcommercialapplications.
Applicationsinvolvingunusualenvironmentalorreliabilityrequirements,e.
g.
militaryequipmentormedicallifesupportequipment,arespecificallynotrecommendedwithoutadditionalprocessingbySUNPLUSforsuchapplications.
Pleasenotethatapplicationcircuitsillustratedinthisdocumentareforreferencepurposesonly.
PPrreelliimmiinnaarryySPHE8281D/DxSunplusConfidentialContentsaresubjecttochangewithoutNotice30;BACKGROUND-COLOR:#4ae2f7">5MAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">5PreliminaryVersion:0.
19.
REVISIONHISTORYDateRevision#DescriptionPageMAY.
19,2000;BACKGROUND-COLOR:#4ae2f7">50.
1Original30;BACKGROUND-COLOR:#4ae2f7">5