TMAXfastreport2.5

2.
5V/3.
3V,2-BitCommonControlLevelTranslatorBusSwitchADG3242Rev.
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FEATURES225pspropagationdelaythroughtheswitch4.
5ΩswitchconnectionbetweenportsDatarate1.
5Gbps2.
5V/3.
3VsupplyoperationSelectablelevelshifting/translationLeveltranslation3.
3Vto2.
5V3.
3Vto1.
8V2.
5Vto1.
8VSmallsignalbandwidth710MHz8-leadSOT-23packageAPPLICATIONS3.
3Vto2.
5Vvoltagetranslation3.
3Vto1.
8Vvoltagetranslation2.
5Vto1.
8VvoltagetranslationBusswitchingBusisolationHotswapHotplugAnalogswitchapplicationsFUNCTIONALBLOCKDIAGRAMA1B1BEA0B004309-001Figure1.
GENERALDESCRIPTIONTheADG3242isa2.
5Vor3.
3V,2-bit,2-port,commoncontroldigitalswitch.
ItisdesignedonalowvoltageCMOSprocess,andprovideslowpowerdissipation,yetgiveshighswitchingspeedandverylowonresistance.
Thisallowstheinputstobeconnectedtotheoutputswithoutadditionalpropagationdelayorgeneratingadditionalgroundbouncenoise.
Theseswitchesareenabledbymeansofacommonbusenable(BE)inputsignal.
Thisdigitalswitchallowsabidirectionalsignaltobeswitchedwhenon.
Intheoffcondition,signallevelsuptothesuppliesareblocked.
Thisdeviceisidealforapplicationsrequiringleveltranslation.
Whenoperatedfroma3.
3Vsupply,leveltranslationfrom3.
3Vinputsto2.
5Voutputsisallowed.
Similarly,ifthedeviceisoper-atedfroma2.
5Vsupplyand2.
5Vinputsareapplied,thedevicetranslatestheoutputsto1.
8V.
Inaddition,aleveltranslatingselectpin(SEL)isincluded.
WhenSELislow,VCCisreducedinternally,allowingforleveltranslationbetween3.
3Vinputsand1.
8Voutputs.
Thismakesthedevicesuitableforapplicationsrequiringleveltranslationbetweendifferentsupplies,suchasconvertertoDSP/microcontrollerinterfacing.
PRODUCTHIGHLIGHTS1.
3.
3Vor2.
5Vsupplyoperation.
2.
Extremelylowpropagationdelaythroughswitch.
3.
4.
5Ωswitchesconnectinputstooutputs.
4.
Level/voltagetranslation.
5.
TinySOT-23package.
ADG3242*PRODUCTPAGEQUICKLINKSLastContentUpdate:02/23/2017COMPARABLEPARTSViewaparametricsearchofcomparableparts.
DOCUMENTATIONDataSheetADG3242:2.
5V/3.
3V,2-Bit,CommonControlLevelTranslatorBusSwitchDataSheetREFERENCEMATERIALSProductSelectionGuideSwitchesandMultiplexersProductSelectionGuideTechnicalArticlesCMOSSwitchesOfferHighPerformanceinLowPower,WidebandApplicationsData-acquisitionsystemusesfaultprotectionEnhancedMultiplexingforMEMSOpticalCrossConnectsDESIGNRESOURCESADG3242MaterialDeclarationPCN-PDNInformationQualityAndReliabilitySymbolsandFootprintsDISCUSSIONSViewallADG3242EngineerZoneDiscussions.
SAMPLEANDBUYVisittheproductpagetoseepricingoptions.
TECHNICALSUPPORTSubmitatechnicalquestionorfindyourregionalsupportnumber.
DOCUMENTFEEDBACKSubmitfeedbackforthisdatasheet.
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,andinsertedintothisdatasheet.
Adynamicchangetothecontentonthispagewillnottriggerachangetoeithertherevisionnumberorthecontentoftheproductdatasheet.
Thisdynamicpagemaybefrequentlymodified.
ADG3242Rev.
A|Page2of16TABLEOFCONTENTSFeatures1Applications.
1FunctionalBlockDiagram1GeneralDescription.
1ProductHighlights1RevisionHistory2Specifications.
3AbsoluteMaximumRatings.
4ESDCaution.
4PinConfigurationsandFunctionDescriptions5TypicalPerformanceCharacteristics6Terminology.
10TimingMeasurementInformation.
11BusSwitchApplications12MixedVoltageOperation,LevelTranslation.
123.
3Vto2.
5VTranslation122.
5Vto1.
8VTranslation123.
3Vto1.
8VTranslation12BusIsolation.
13HotPlugandHotSwapIsolation.
13AnalogSwitching13HighImpedanceduringPower-Up/Power-Down.
13OutlineDimensions.
14OrderingGuide.
14REVISIONHISTORY9/06—Rev.
0toRev.
AUpdatedFormat.
UniversalAddedTable4.
5ChangestotheOrderingGuide.
148/03—Revision0:InitialVersionADG3242Rev.
A|Page3of16SPECIFICATIONSVCC=2.
3Vto3.
6V,GND=0V;allspecificationsTMINtoTMAX,unlessotherwisenoted.
Table1.
BVersion1ParameterSymbolConditionsMinTyp2MaxUnitDCELECTRICALCHARACTERISTICSInputHighVoltageVINHVCC=2.
7Vto3.
6V2.
0VVCC=2.
3Vto2.
7V1.
7VInputLowVoltageVINLVCC=2.
7Vto3.
6V0.
8VVCC=2.
3Vto2.
7V0.
7VInputLeakageCurrentII±0.
01±1μAOffStateLeakageCurrentIOZ0≤A,B≤VCC±0.
01±1μAOnStateLeakageCurrent0≤A,B≤VCC±0.
01±1μAMaximumPassVoltageVPVA/VB=VCC=SEL=3.
3V,IO=5μA2.
02.
52.
9VVA/VB=VCC=SEL=2.
5V,IO=5μA1.
51.
82.
1VVA/VB=VCC=3.
3V,SEL=0V,IO=5μA1.
51.
82.
1VCAPACITANCE3APortOffCapacitanceCAOFFf=1MHz3.
5pFBPortOffCapacitanceCBOFFf=1MHz3.
5pFA,BPortOnCapacitanceCA,CBONf=1MHz7pFControlInputCapacitanceCINf=1MHz4pFSWITCHINGCHARACTERISTICS3PropagationDelayAtoBorBtoA,tPD4tPHL,tPLHCL=50pF,VCC=SEL=3V0.
225nsPropagationDelayMatching55psBusEnableTimeBEtoAorB6tPZH,tPZLVCC=3.
0Vto3.
6V;SEL=VCC13.
24.
6nsVCC=3.
0Vto3.
6V;SEL=0V134nsVCC=2.
3Vto2.
7V;SEL=VCC134nsBusDisableTimeBEtoAorB6tPHZ,tPLZVCC=3.
0Vto3.
6V;SEL=VCC134nsVCC=3.
0Vto3.
6V;SEL=0V12.
53.
8nsVCC=2.
3Vto2.
7V;SEL=VCC12.
53.
4nsMaximumDataRateVCC=SEL=3.
3V;VA/VB=2V1.
5GbpsChannelJitterVCC=SEL=3.
3V;VA/VB=2V45psp-pDIGITALSWITCHOnResistanceRONVCC=3V,SEL=VCC,VA=0V,IBA=8mA4.
58ΩVCC=3V,SEL=VCC,VA=1.
7V,IBA=8mA1228ΩVCC=2.
3V,SEL=VCC,VA=0V,IBA=8mA59ΩVCC=2.
3V,SEL=VCC,VA=1V,IBA=8mA918ΩVCC=3V,SEL=0V,VA=0V,IBA=8mA58ΩVCC=3V,SEL=0V,VA=1V,IBA=8mA12ΩOnResistanceMatchingRONVCC=3V,SEL=VCC,VA=0V,IA=8mA0.
10.
5ΩVCC=3V,SEL=0V,VA=0V,IA=8mA0.
10.
5ΩPOWERREQUIREMENTSVCC2.
33.
6VQuiescentPowerSupplyCurrentICCDigitalinputs=0VorVCC;SEL=VCC0.
011μADigitalinputs=0VorVCC;SEL=0V0.
10.
2mAIncreaseinICCperInput7ICCVCC=3.
6V,BE=3.
0V;SEL=VCC0.
158μA1Temperaturerangeisasfollows:Bversion:40°Cto+85°C.
2Typicalvaluesareat25°C,unlessotherwisestated.
3Guaranteedbydesign,notsubjecttoproductiontest.
4ThedigitalswitchcontributesnopropagationdelayotherthantheRCdelayofthetypicalRONoftheswitchandtheloadcapacitancewhendrivenbyanidealvoltagesource.
Becausethetimeconstantismuchsmallerthantherise/falltimesoftypicaldrivingsignals,itaddsverylittlepropagationdelaytothesystem.
Propagationdelayofthedigitalswitchwhenusedinasystemisdeterminedbythedrivingcircuitonthedrivingsideoftheswitchanditsinteractionwiththeloadonthedrivenside.
5Propagationdelaymatchingbetweenchannelsiscalculatedfromtheonresistancematchingandloadcapacitanceof50pF.
6SeeTimingMeasurementInformationsection.
7ThiscurrentappliestotheControlPinBEonly.
TheAandBportscontributenosignificantacordccurrentsastheytransition.
ADG3242Rev.
A|Page4of16ABSOLUTEMAXIMUMRATINGSTA=25°C,unlessotherwisenoted.
Table2.
ParameterRatingVCCtoGND0.
5Vto+4.
6VDigitalInputstoGND0.
5Vto+4.
6VDCInputVoltage0.
5Vto+4.
6VDCOutputCurrent25mAperchannelOperatingTemperatureRangeIndustrial(BVersion)40°Cto+85°CStorageTemperatureRange65°Cto+150°CJunctionTemperature150°CθJAThermalImpedance206°C/WLeadTemperature,Soldering(10sec)300°CIRReflow,PeakTemperature(<20sec)235°CStressesabovethoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.
Thisisastressratingonly;functionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionofthisspecificationisnotimplied.
Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectdevicereliability.
Onlyoneabsolutemaximumratingcanbeappliedatanyonetime.
ESDCAUTIONADG3242Rev.
A|Page5of16PINCONFIGURATIONSANDFUNCTIONDESCRIPTIONSBE1A02A13GND4VCC8SEL7B06B15ADG3242TOPVIEW(NottoScale)04309-00204309-100ADIDIEMARKA0A1B0B1GNDSELVCCBEADG3242TOPVIEW(NottoScale)Figure2.
PinConfigurationFigure3.
DiePadConfiguration(Diesize:550μm*820μm)Table3.
PinFunctionDescriptionsPinNo.
MnemonicDescription1BEBusEnable(ActiveLow).
2A0PortA0,InputorOutput.
3A1PortA1,InputorOutput.
4GNDGround(0V)Reference.
5B1PortB1,InputorOutput.
6B0PortB0,InputorOutput.
7SELLevelTranslationSelect.
8VCCPositivePowerSupplyVoltage.
Table4.
DiePadCoordinates(MeasuredfromtheCenteroftheDie)MnemonicX(μm)Y(μm)BE+93+303A0+102+150A1+168139GND+126266B188247B0168+121SEL111+279VCC7+303Table5.
TruthTableBESEL1FunctionLLA0=B0,A1=B1,3.
3Vto1.
8VLevelShifting.
LHA0=B0,A1=B1,3.
3Vto2.
5V/2.
5Vto1.
8VLevelShifting.
HXDisconnect.
1SEL=0VonlywhenVDD=3.
3V±10%.
ADG3242Rev.
A|Page6of16TYPICALPERFORMANCECHARACTERISTICS40003.
5VA/VB(V)RON()353025201510520002.
0VA/VB(V)RON()0.
51.
01.
52.
02.
53.
0VCC=3VVCC=3.
3VVCC=3.
6VTA=25°CSEL=VCC04309-003Figure4.
OnResistancevs.
InputVoltage40003.
0VA/VB(V)RON()35302520151050.
51.
01.
52.
02.
5VCC=2.
3VVCC=2.
5VVCC=2.
7V04309-004TA=25°CSEL=VCCFigure5.
OnResistancevs.
InputVoltage40003.
5VA/VB(V)RON()35302520151050.
51.
01.
52.
02.
53.
0VCC=3VVCC=3.
3VVCC=3.
6V04309-005TA=25°CSEL=0VFigure6.
OnResistancevs.
InputVoltage+85°C+25°C–40°C151050.
51.
01.
504309-006VCC=3.
3VSEL=VCCFigure7.
OnResistancevs.
InputVoltageforDifferentTemperatures15001.
2VA/VB(V)RON()+85°C+25°C–40°C0.
51.
010504309-007VCC=2.
5VSEL=VCCFigure8.
OnResistancevs.
InputVoltageforDifferentTemperatures3.
0003.
5VA/VB(V)VOUT(V)0.
51.
01.
52.
02.
53.
0VCC=3.
6VVCC=3.
3VVCC=3V2.
52.
01.
51.
00.
5TA=25°CSEL=VCCIO=–5A04309-008Figure9.
PassVoltagevs.
VCCADG3242Rev.
A|Page7of162.
5003.
03.
02.
5000.
10IO(A)VOUT(V)2.
01.
51.
00.
50.
020.
040.
060.
08VA/VB(V)VOUT(V)VCC=2.
7VVCC=2.
5VVCC=2.
3V2.
01.
51.
00.
50.
51.
01.
52.
02.
5TA=25°CSEL=VCCIO=–5ATA=25°CVA=0VBE=0VCC=3.
3V;SEL=0VVCC=SEL=3.
3VVCC=SEL=2.
5V04309-0094309-0120Figure10.
PassVoltagevs.
VCC2.
5003.
5VA/VB(V)VOUT(V)VCC=3.
6VVCC=3.
3VVCC=3V2.
01.
51.
00.
50.
51.
01.
52.
02.
53.
004309-010TA=25°CSEL=0VIO=–5AFigure11.
PassVoltagevs.
VCC5000050ENABLEFREQUENCY(MHz)ICC(A)TA=25°CVCC=SEL=2.
5V4504003503002502001501005051015202530354045VCC=3.
3V;SEL=0V04309-011VCC=SEL=3.
3VFigure12.
ICCvs.
EnableFrequencyFigure13.
OutputLowCharacteristic3.
02.
50–0.
100IO(A)VOUT(V)2.
01.
51.
00.
5–0.
08–0.
06–0.
04–0.
02TA=25°CVA=VCCBE=0VCC=SEL=3.
3VVCC=SEL=2.
5VVCC=3.
3V;SEL=0V4309-0130Figure14.
OutputHighCharacteristic0–0.
2–1.
203.
02.
52.
01.
51.
00.
5VA/VB(V)QINJ(pC)–0.
4–0.
6–0.
8–1.
0VCC=2.
5VVCC=3.
3VTA=25°CSEL=VCCON→OFFCL=1nF4309-0140Figure15.
ChargeInjectionvs.
SourceVoltageADG3242Rev.
A|Page8of162–80.
031000FREQUENCY(MHz)ATTENUATION(dB)10–1–2–3–4–5–6–710.
11010004309-015TA=25°CVCC=3.
3V/2.
5VSEL=VCCVIN=0dBmN/WANALYZER:RL=RS=50Figure16.
Bandwidthvs.
Frequency0–1000.
031000FREQUENCY(MHz)ATTENUATION(dB)–10–20–30–40–50–60–70–80–9010.
11010004309-016TA=25°CVCC=3.
3V/2.
5VSEL=VCCVIN=0dBmN/WANALYZER:RL=RS=50Figure17.
Crosstalkvs.
Frequency0–1000.
11000FREQUENCY(MHz)ATTENUATION(dB)–10–20–30–40–50–60–70–80–9011010004309-017TA=25°CVCC=3.
3V/2.
5VSEL=VCCVIN=0dBmN/WANALYZER:RL=RS=50Figure18.
OffIsolationvs.
Frequency4.
00–4080TEMPERATURE(°C)TIME(ns)3.
53.
02.
52.
01.
51.
00.
5–200204060ENABLEVCC=SEL=3.
3VVCC=3.
3V;SEL=0VDISABLE04309-018Figure19.
Enable/DisableTimevs.
Temperature4.
00–4080TEMPERATURE(°C)TIME(ns)VCC=SEL=2.
5V3.
53.
02.
52.
01.
51.
00.
5–200204060DISABLEENABLE04309-019Figure20.
Enable/DisableTimevs.
Temperature10090807060504030201000.
51.
91.
71.
51.
31.
10.
90.
7DATARATE(Gbps)JITTER(psp-p)VCC=SEL=3.
3VVIN=1.
5Vp-p20dBATTENUATION04309-020Figure21.
Jittervs.
DataRate;PRBS31ADG3242Rev.
A|Page9of16100959085807570656055500.
51.
91.
71.
51.
31.
10.
90.
7DATARATE(Gbps)EYEWIDTH(%)VCC=SEL=3.
3VVIN=1.
5Vp-p20dBATTENUATION%EYEWIDTH=((CLOCKPERIOD–JITTERp-p)/CLOCKPERIOD)*100%04309-021Figure22.
EyeWidthvs.
DataRate;PRBS3150mV/DIV200ps/DIVVCC=3.
3VSEL=3.
3VVIN=1.
5Vp-p20dBATTENUATIONTA=25°C04309-022Figure23.
EyePattern;1.
5Gbps,VCC=3.
3V;PRBS3120mV/DIV200ps/DIVVCC=2.
5VSEL=2.
5VVIN=1.
5Vp-p20dBATTENUATIONTA=25°C04309-023Figure24.
EyePattern;1.
244Gbps,VCC=2.
5V;PRBS31ADG3242Rev.
A|Page10of16TERMINOLOGYVCCPositivepowersupplyvoltage.
GNDGround(0V)reference.
VINHMinimuminputvoltageforLogic1.
VINLMaximuminputvoltageforLogic0.
IIInputleakagecurrentatthecontrolinputs.
IOZOffstateleakagecurrent.
Itisthemaximumleakagecurrentattheswitchpinintheoffstate.
IOLOnstateleakagecurrent.
Itisthemaximumleakagecurrentattheswitchpinintheonstate.
VPMaximumpassvoltage.
ThemaximumpassvoltagerelatestotheclampedoutputvoltageofanNMOSdevicewhentheswitchinputvoltageisequaltothesupplyvoltage.
RONOhmicresistanceofferedbyaswitchintheonstate.
Itismeasuredatagivenvoltagebyforcingaspecifiedamountofcurrentthroughtheswitch.
ΔRONOnresistancematchbetweenanytwochannels,thatis,RONmaxtoRONmin.
CXOFFOffswitchcapacitance.
CXONOnswitchcapacitance.
CINControlinputcapacitance.
ThisconsistsofBEandSEL.
ICCQuiescentpowersupplycurrent.
ThiscurrentrepresentstheleakagecurrentbetweentheVCCandgroundpins.
Itismeasuredwhenallcontrolinputsareatlogichighorlowlevelandtheswitchesareoff.
ΔICCExtrapowersupplycurrentcomponentfortheENcontrolinputwhentheinputisnotdrivenatthesupplies.
tPLH,tPHLDatapropagationdelaythroughtheswitchintheonstate.
Propaga-tiondelayisrelatedtotheRCtimeconstantRON*CL,whereCListheloadcapacitance.
tPZH,tPZLBusenabletimes.
ThesearethetimestakentocrosstheVTinresponsetothecontrolsignal,BE.
tPHZ,tPLZBusdisabletimes.
Thesearethetimestakentoplacetheswitchinthehighimpedanceoffstateinresponsetothecontrolsignal.
TheyaremeasuredasthetimetakenfortheoutputvoltagetochangebyVΔfromtheoriginalquiescentlevel,withreferencetothelogicleveltransitionatthecontrolinput.
(SeeFigure27forenableanddisabletimes.
)MaxDataRateMaximumrateatwhichdatacanbepassedthroughtheswitch.
ChannelJitterPeak-to-peakvalueofthesumofthedeterministicandrandomjitteroftheswitchchannel.
ADG3242Rev.
A|Page11of16TIMINGMEASUREMENTINFORMATIONForthefollowingloadcircuitandwaveforms,thenotationthatisusedisVINandVOUTwhere:VIN=VAandVOUT=VB,orVIN=VBandVOUT=VAVCCVINVOUTCLRLRLSW1GND2*VCCRTDUTPULSEGENERATORNOTES1.
PULSEGENERATORFORALLPULSES:tR≤2.
5ns,tF≤2.
5ns,FREQUENCY≤10MHz.
2.
CLINCLUDESBOARD,STRAY,ANDLOADCAPACITANCES.
3.
RTISTHETERMINATIONRESISTOR,SHOULDBEEQUALTOZOUTOFTHEPULSEGENERATOR.
04309-024Figure25.
LoadCircuitCONTROLINPUTBE0VtPLHVOUTVTVIHVHVTVLtPLH04309-025Figure26.
PropagationDelayENABLEDISABLECONTROLINPUTBEVIN=0VVIN=VCCVOUTSW1@2VCCVOUTSW1@GNDtPLZtPZHtPHZtPZLVT0VVCCVTVHVH–VΔVLVL+VΔVCC0VVTVINH0V04309-026Figure27.
EnableandDisableTimesTable6.
SwitchPositionTestS1tPLZ,tPZL2*VCCtPHZ,tPZHGNDTable7.
TestConditionsSymbolVCC=3.
3V±0.
3V(SEL=VCC)VCC=2.
5V±0.
2V(SEL=VCC)VCC=3.
3V±0.
3V(SEL=0V)UnitRL500500500ΩVΔ300150150mVCL503030pFVT1.
50.
90.
9VADG3242Rev.
A|Page12of16BUSSWITCHAPPLICATIONSMIXEDVOLTAGEOPERATION,LEVELTRANSLATIONBusswitchesprovideanidealsolutionforinterfacingbetweenmixedvoltagesystems.
TheADG3242issuitableforapplicationswherevoltagetranslationfrom3.
3Vtechnologytoalowervoltagetechnologyisneeded.
Thisdevicetranslatesfrom3.
3Vto1.
8V,from2.
5Vto1.
8V,orfromabidirectional3.
3Vdirectlyto2.
5V.
Figure28showsablockdiagramofatypicalapplicationinwhichauserneedstointerfacebetweena3.
3VADCanda2.
5Vmicro-processor.
Themicroprocessordoesnothave3.
3Vtolerantinputs,therefore,placingtheADG3242betweenthetwodevicesallowsthedevicestocommunicateeasily.
Thebusswitchdirectlyconnectsthetwoblocks,thereforeintroducingminimalpropagationdelay,timingskew,ornoise.
3.
3VADC2.
5V3.
3V2.
5VMICROPROCESSORADG32423.
3V04309-027Figure28.
LevelTranslationBetweena3.
3VADCanda2.
5VMicroprocessor3.
3VTO2.
5VTRANSLATIONWhenVCCis3.
3V(SEL=3.
3V)andtheinputsignalrangeis0VtoVCC,themaximumoutputsignalisclampedtowithinavoltagethresholdbelowtheVCCsupply.
Inthiscase,theoutputislimitedto2.
5V,asshowninFigure30.
Thisdevicecanbeusedfortranslationfrom2.
5Vto3.
3Vdevicesandalsobetweentwo3.
3Vdevices.
ADG32422.
5V2.
5V3.
3V2.
5V3.
3V04309-028Figure29.
3.
3Vto2.
5VVoltageTranslation,SEL=VCCVIN2.
5VVOUT0V3.
3VSWITCHINPUTSWITCHOUTPUT3.
3VSUPPLYSEL=3.
3V04309-029Figure30.
3.
3Vto2.
5VVoltageTranslation,SEL=VCC2.
5VTO1.
8VTRANSLATIONWhenVCCis2.
5V(SEL=2.
5V)andtheinputsignalrangeis0VtoVCC,themaximumoutputsignalisalsoclampedwithinavoltagethresholdbelowtheVCCsupply.
Inthiscase,theoutputislimitedtoapproximately1.
8V,asshowninFigure32.
ADG32421.
8V2.
5V2.
5V04309-030Figure31.
2.
5Vto1.
8VVoltageTranslation,SEL=2.
5VCCVIN1.
8VVOUT0V2.
5VSWITCHINPUTSWITCHOUTPUT2.
5VSUPPLYSEL=2.
5V04309-031Figure32.
2.
5Vto1.
8VVoltageTranslation,SEL=VCC3.
3VTO1.
8VTRANSLATIONTheADG3242offerstheoptionofinterfacingbetweena3.
3Vdeviceanda1.
8Vdevice.
ThisispossiblethroughuseoftheSELpin.
TheSELpinisanactivelowcontrolpin.
SELactivatesinter-nalcircuitryintheADG3242thatallowsvoltagetranslationbetween3.
3Vdevicesand1.
8Vdevices.
WhenVCCis3.
3Vandtheinputsignalrangeis0VtoVCC,themaximumoutputsignalisclampedto1.
8V,asshowninFigure34.
Todothis,theSELpinmustbetiedtoLogic0.
IfSELisunused,itcanbetieddirectlytoVCC.
ADG32421.
8V3.
3V3.
3V04309-032Figure33.
3.
3Vto1.
8VVoltageTranslation,SEL=0VVIN1.
8VVOUT0V3.
3VSWITCHINPUTSWITCHOUTPUT3.
3VSUPPLYSEL=0V04309-033Figure34.
3.
3Vto1.
8VVoltageTranslation,SEL=0VADG3242Rev.
A|Page13of16BUSISOLATIONAcommonrequirementofbusarchitecturesislowcapacitanceloadingofthebus.
Suchsystemsrequirebusbridgedevicesthatextendthenumberofloadsonthebuswithoutexceedingthespec-ifications.
BecausetheADG3242isdesignedspecificallyforapplicationsthatdonotneeddrive,yetrequiresimplelogicfunc-tions,itsolvesthisrequirement.
Thedeviceisolatesaccesstothebus,thusminimizingcapacitanceloading.
BUS/BACKPLANELOADALOADCLOADBLOADDBUSSWITCHLOCATION04309-034Figure35.
LocationofBusSwitchedinaBusIsolationApplicationHOTPLUGANDHOTSWAPISOLATIONTheADG3242issuitableforhotswapandhotplugapplications.
TheoutputsignaloftheADG3242islimitedtoavoltagethatisbelowtheVCCsupply,asshowninFigure30,Figure32,andFigure34.
Thus,theswitchactslikeabuffertotaketheimpactfromthehotinsertion,protectingvitalandexpensivechipsetsfromdamage.
Inhotplugapplications,thesystemcannotbeshutdownwhennewhardwareisbeingadded.
Toovercomethis,abusswitchcanbepositionedonthebackplanebetweenthebusdevicesandthehotplugconnectors.
Thebusswitchisturnedoffduringhotplug.
Figure36showsatypicalexampleofthistypeofapplication.
PLUG-INCARD(1)CARDI/OCARDI/ORAMBUSCPUPLUG-INCARD(2)ADG3242ADG324204309-035Figure36.
ADG3242inaHotPlugApplicationTherearemanysystems,suchasdockingstations,PCIboardsforservers,andlinecardsfortelecommunicationsswitches,thatrequiretheabilitytohandlehotswapping.
Ifthebuscanbeisolatedpriortoinsertionorremoval,thereismorecontroloverthehotswapevent.
Thisisolationcanbeachievedusingbusswitches.
Thebusswitchesarepositionedonthehotswapcardbetweenthecon-nectorandthedevices.
Duringhotswap,thegroundpinofthehotswapcardmustconnecttothegroundpinofthebackplanebeforeconnectingtoanyothersignalorpowerpins.
ANALOGSWITCHINGBusswitchesareusedinmanyanalogswitchingapplications,forexample,videographics.
Busswitchescanhaveloweronresistance,smalleronandoffchannelcapacitance,andbetterfrequencyperformancethantheiranalogcounterparts.
Thebusswitchchannelitself,consistingsolelyofanNMOSswitch,limitstheoperatingvoltage(seeFigure4foratypicalplot),butinmanycases,thisdoesnotpresentanissue.
HIGHIMPEDANCEDURINGPOWER-UP/POWER-DOWNToensurethehighimpedancestateduringpower-uporpower-down,BEmustbetiedtoVCCthroughapull-upresistor.
Theminimumvalueoftheresistorisdeterminedbythecurrentsink-ingcapabilityofthedriver.
ADG3242Rev.
A|Page14of16OUTLINEDIMENSIONS135628472.
90BSC1.
60BSC1.
95BSC0.
65BSC0.
380.
220.
15MAX1.
301.
150.
90SEATINGPLANE1.
45MAX0.
220.
080.
600.
450.
308°4°0°2.
80BSCPIN1INDICATORCOMPLIANTTOJEDECSTANDARDSMO-178-BAFigure37.
8-LeadSmallOutlineTransistorPackage[SOT-23](RJ-8)DimensionsshowninmillimetersORDERINGGUIDEModelTemperatureRangePackageDescriptionPackageOptionBrandingADG3242BRJ-R240°Cto+85°C8-LeadSmallOutlineTransistor[SOT-23]RJ-8SCAADG3242BRJ-REEL40°Cto+85°C8-LeadSmallOutlineTransistor[SOT-23]RJ-8SCAADG3242BRJ-REEL740°Cto+85°C8-LeadSmallOutlineTransistor[SOT-23]RJ-8SCAADG3242BRJZ-REEL7140°Cto+85°C8-LeadSmallOutlineTransistor[SOT-23]RJ-8SOUADG3242BCZ-SF3140°Cto+85°CDieChip1Z=Pb-freepart.
ADG3242Rev.
A|Page15of16NOTESADG3242Rev.
A|Page16of16NOTES2006AnalogDevices,Inc.
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C04309-0-9/06(A)