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2466NS–AVR–10/06FeaturesHigh-performance,Low-powerAVR8-bitMicrocontrollerAdvancedRISCArchitecture–131PowerfulInstructions–MostSingle-clockCycleExecution–32x8GeneralPurposeWorkingRegisters–FullyStaticOperation–Upto16MIPSThroughputat16MHz–On-chip2-cycleMultiplierNonvolatileProgramandDataMemories–16KBytesofIn-SystemSelf-ProgrammableFlashEndurance:10,000Write/EraseCycles–OptionalBootCodeSectionwithIndependentLockBitsIn-SystemProgrammingbyOn-chipBootProgramTrueRead-While-WriteOperation–512BytesEEPROMEndurance:100,000Write/EraseCycles–1KByteInternalSRAM–ProgrammingLockforSoftwareSecurityJTAG(IEEEstd.
1149.
1Compliant)Interface–Boundary-scanCapabilitiesAccordingtotheJTAGStandard–ExtensiveOn-chipDebugSupport–ProgrammingofFlash,EEPROM,Fuses,andLockBitsthroughtheJTAGInterfacePeripheralFeatures–Two8-bitTimer/CounterswithSeparatePrescalersandCompareModes–One16-bitTimer/CounterwithSeparatePrescaler,CompareMode,andCaptureMode–RealTimeCounterwithSeparateOscillator–FourPWMChannels–8-channel,10-bitADC8Single-endedChannels7DifferentialChannelsinTQFPPackageOnly2DifferentialChannelswithProgrammableGainat1x,10x,or200x–Byte-orientedTwo-wireSerialInterface–ProgrammableSerialUSART–Master/SlaveSPISerialInterface–ProgrammableWatchdogTimerwithSeparateOn-chipOscillator–On-chipAnalogComparatorSpecialMicrocontrollerFeatures–Power-onResetandProgrammableBrown-outDetection–InternalCalibratedRCOscillator–ExternalandInternalInterruptSources–SixSleepModes:Idle,ADCNoiseReduction,Power-save,Power-down,StandbyandExtendedStandbyI/OandPackages–32ProgrammableI/OLines–40-pinPDIP,44-leadTQFP,and44-padQFN/MLFOperatingVoltages–2.
7-5.
5VforATmega16L–4.
5-5.
5VforATmega16SpeedGrades–0-8MHzforATmega16L–0-16MHzforATmega16PowerConsumption@1MHz,3V,and25°CforATmega16L–Active:1.
1mA–IdleMode:0.
35mA–Power-downMode:<1A8-bitMicrocontrollerwith16KBytesIn-SystemProgrammableFlashATmega16ATmega16LSummaryNote:Thisisasummarydocument.
AcompletedocumentisavailableonourWebsiteatwww.
atmel.
com.
2ATmega16(L)2466NS–AVR–10/06PinConfigurationsFigure1.
PinoutATmega16DisclaimerTypicalvaluescontainedinthisdatasheetarebasedonsimulationsandcharacteriza-tionofotherAVRmicrocontrollersmanufacturedonthesameprocesstechnology.
MinandMaxvalueswillbeavailableafterthedeviceischaracterized.
(XCK/T0)PB0(T1)PB1(INT2/AIN0)PB2(OC0/AIN1)PB3(SS)PB4(MOSI)PB5(MISO)PB6(SCK)PB7RESETVCCGNDXTAL2XTAL1(RXD)PD0(TXD)PD1(INT0)PD2(INT1)PD3(OC1B)PD4(OC1A)PD5(ICP1)PD6PA0(ADC0)PA1(ADC1)PA2(ADC2)PA3(ADC3)PA4(ADC4)PA5(ADC5)PA6(ADC6)PA7(ADC7)AREFGNDAVCCPC7(TOSC2)PC6(TOSC1)PC5(TDI)PC4(TDO)PC3(TMS)PC2(TCK)PC1(SDA)PC0(SCL)PD7(OC2)PA4(ADC4)PA5(ADC5)PA6(ADC6)PA7(ADC7)AREFGNDAVCCPC7(TOSC2)PC6(TOSC1)PC5(TDI)PC4(TDO)(MOSI)PB5(MISO)PB6(SCK)PB7RESETVCCGNDXTAL2XTAL1(RXD)PD0(TXD)PD1(INT0)PD2(INT1)PD3(OC1B)PD4(OC1A)PD5(ICP1)PD6(OC2)PD7VCCGND(SCL)PC0(SDA)PC1(TCK)PC2(TMS)PC3PB4(SS)PB3(AIN1/OC0)PB2(AIN0/INT2)PB1(T1)PB0(XCK/T0)GNDVCCPA0(ADC0)PA1(ADC1)PA2(ADC2)PA3(ADC3)PDIPTQFP/QFN/MLFNOTE:Bottompadshouldbesolderedtoground.
3ATmega16(L)2466NS–AVR–10/06OverviewTheATmega16isalow-powerCMOS8-bitmicrocontrollerbasedontheAVRenhancedRISCarchitecture.
Byexecutingpowerfulinstructionsinasingleclockcycle,theATmega16achievesthroughputsapproaching1MIPSperMHzallowingthesystemdesignertooptimizepowerconsumptionversusprocessingspeed.
BlockDiagramFigure2.
BlockDiagramINTERNALOSCILLATOROSCILLATORWATCHDOGTIMERMCUCTRL.
&TIMINGOSCILLATORTIMERS/COUNTERSINTERRUPTUNITSTACKPOINTEREEPROMSRAMSTATUSREGISTERUSARTPROGRAMCOUNTERPROGRAMFLASHINSTRUCTIONREGISTERINSTRUCTIONDECODERPROGRAMMINGLOGICSPIADCINTERFACECOMP.
INTERFACEPORTADRIVERS/BUFFERSPORTADIGITALINTERFACEGENERALPURPOSEREGISTERSXYZALU+-PORTCDRIVERS/BUFFERSPORTCDIGITALINTERFACEPORTBDIGITALINTERFACEPORTBDRIVERS/BUFFERSPORTDDIGITALINTERFACEPORTDDRIVERS/BUFFERSXTAL1XTAL2RESETCONTROLLINESVCCGNDMUX&ADCAREFPA0-PA7PC0-PC7PD0-PD7PB0-PB7AVRCPUTWIAVCCINTERNALCALIBRATEDOSCILLATOR4ATmega16(L)2466NS–AVR–10/06TheAVRcorecombinesarichinstructionsetwith32generalpurposeworkingregisters.
Allthe32registersaredirectlyconnectedtotheArithmeticLogicUnit(ALU),allowingtwoindependentregisterstobeaccessedinonesingleinstructionexecutedinoneclockcycle.
TheresultingarchitectureismorecodeefficientwhileachievingthroughputsuptotentimesfasterthanconventionalCISCmicrocontrollers.
TheATmega16providesthefollowingfeatures:16KbytesofIn-SystemProgrammableFlashProgrammemorywithRead-While-Writecapabilities,512bytesEEPROM,1KbyteSRAM,32generalpurposeI/Olines,32generalpurposeworkingregisters,aJTAGinterfaceforBoundary-scan,On-chipDebuggingsupportandprogramming,threeflexibleTimer/Counterswithcomparemodes,InternalandExternalInterrupts,aserialprogrammableUSART,abyteorientedTwo-wireSerialInterface,an8-channel,10-bitADCwithoptionaldifferentialinputstagewithprogrammablegain(TQFPpackageonly),aprogrammableWatchdogTimerwithInternalOscillator,anSPIserialport,andsixsoftwareselectablepowersavingmodes.
TheIdlemodestopstheCPUwhileallowingtheUSART,Two-wireinterface,A/DConverter,SRAM,Timer/Counters,SPIport,andinterruptsystemtocontinuefunctioning.
ThePower-downmodesavestheregistercon-tentsbutfreezestheOscillator,disablingallotherchipfunctionsuntilthenextExternalInterruptorHardwareReset.
InPower-savemode,theAsynchronousTimercontinuestorun,allowingtheusertomaintainatimerbasewhiletherestofthedeviceissleeping.
TheADCNoiseReductionmodestopstheCPUandallI/OmodulesexceptAsynchro-nousTimerandADC,tominimizeswitchingnoiseduringADCconversions.
InStandbymode,thecrystal/resonatorOscillatorisrunningwhiletherestofthedeviceissleeping.
Thisallowsveryfaststart-upcombinedwithlow-powerconsumption.
InExtendedStandbymode,boththemainOscillatorandtheAsynchronousTimercontinuetorun.
ThedeviceismanufacturedusingAtmel'shighdensitynonvolatilememorytechnology.
TheOn-chipISPFlashallowstheprogrammemorytobereprogrammedin-systemthroughanSPIserialinterface,byaconventionalnonvolatilememoryprogrammer,orbyanOn-chipBootprogramrunningontheAVRcore.
ThebootprogramcanuseanyinterfacetodownloadtheapplicationprogramintheApplicationFlashmemory.
Soft-wareintheBootFlashsectionwillcontinuetorunwhiletheApplicationFlashsectionisupdated,providingtrueRead-While-Writeoperation.
Bycombiningan8-bitRISCCPUwithIn-SystemSelf-ProgrammableFlashonamonolithicchip,theAtmelATmega16isapowerfulmicrocontrollerthatprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.
TheATmega16AVRissupportedwithafullsuiteofprogramandsystemdevelopmenttoolsincluding:Ccompilers,macroassemblers,programdebugger/simulators,in-circuitemulators,andevaluationkits.
PinDescriptionsVCCDigitalsupplyvoltage.
GNDGround.
PortA(PA7.
.
PA0)PortAservesastheanaloginputstotheA/DConverter.
PortAalsoservesasan8-bitbi-directionalI/Oport,iftheA/DConverterisnotused.
Portpinscanprovideinternalpull-upresistors(selectedforeachbit).
ThePortAoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.
WhenpinsPA0toPA7areusedasinputsandareexternallypulledlow,theywillsourcecurrentiftheinternalpull-upresistorsareactivated.
ThePortApinsaretri-statedwhenaresetconditionbecomesactive,eveniftheclockisnotrunning.
5ATmega16(L)2466NS–AVR–10/06PortB(PB7.
.
PB0)PortBisan8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).
ThePortBoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.
Asinputs,PortBpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.
ThePortBpinsaretri-statedwhenaresetconditionbecomesactive,eveniftheclockisnotrunning.
PortBalsoservesthefunctionsofvariousspecialfeaturesoftheATmega16aslistedonpage56.
PortC(PC7.
.
PC0)PortCisan8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).
ThePortCoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.
Asinputs,PortCpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.
ThePortCpinsaretri-statedwhenaresetconditionbecomesactive,eveniftheclockisnotrunning.
IftheJTAGinterfaceisenabled,thepull-upresistorsonpinsPC5(TDI),PC3(TMS)andPC2(TCK)willbeacti-vatedevenifaresetoccurs.
PortCalsoservesthefunctionsoftheJTAGinterfaceandotherspecialfeaturesoftheATmega16aslistedonpage59.
PortD(PD7.
.
PD0)PortDisan8-bitbi-directionalI/Oportwithinternalpull-upresistors(selectedforeachbit).
ThePortDoutputbuffershavesymmetricaldrivecharacteristicswithbothhighsinkandsourcecapability.
Asinputs,PortDpinsthatareexternallypulledlowwillsourcecurrentifthepull-upresistorsareactivated.
ThePortDpinsaretri-statedwhenaresetconditionbecomesactive,eveniftheclockisnotrunning.
PortDalsoservesthefunctionsofvariousspecialfeaturesoftheATmega16aslistedonpage61.
RESETResetInput.
Alowlevelonthispinforlongerthantheminimumpulselengthwillgener-ateareset,eveniftheclockisnotrunning.
TheminimumpulselengthisgiveninTable15onpage36.
Shorterpulsesarenotguaranteedtogenerateareset.
XTAL1InputtotheinvertingOscillatoramplifierandinputtotheinternalclockoperatingcircuit.
XTAL2OutputfromtheinvertingOscillatoramplifier.
AVCCAVCCisthesupplyvoltagepinforPortAandtheA/DConverter.
ItshouldbeexternallyconnectedtoVCC,eveniftheADCisnotused.
IftheADCisused,itshouldbecon-nectedtoVCCthroughalow-passfilter.
AREFAREFistheanalogreferencepinfortheA/DConverter.
ResourcesAcomprehensivesetofdevelopmenttools,applicationnotesanddatasheetsareavail-ablefordownloadonhttp://www.
atmel.
com/avr.
6ATmega16(L)2466NS–AVR–10/06RegisterSummaryAddressNameBit7Bit6Bit5Bit4Bit3Bit2Bit1Bit0Page$3F($5F)SREGITHSVNZC7$3E($5E)SPHSP10SP9SP810$3D($5D)SPLSP7SP6SP5SP4SP3SP2SP1SP010$3C($5C)OCR0Timer/Counter0OutputCompareRegister83$3B($5B)GICRINT1INT0INT2–––IVSELIVCE46,67$3A($5A)GIFRINTF1INTF0INTF268$39($59)TIMSKOCIE2TOIE2TICIE1OCIE1AOCIE1BTOIE1OCIE0TOIE083,114,132$38($58)TIFROCF2TOV2ICF1OCF1AOCF1BTOV1OCF0TOV084,115,132$37($57)SPMCRSPMIERWWSB–RWWSREBLBSETPGWRTPGERSSPMEN250$36($56)TWCRTWINTTWEATWSTATWSTOTWWCTWEN–TWIE178$35($55)MCUCRSM2SESM1SM0ISC11ISC10ISC01ISC0030,66$34($54)MCUCSRJTDISC2–JTRFWDRFBORFEXTRFPORF39,67,229$33($53)TCCR0FOC0WGM00COM01COM00WGM01CS02CS01CS0081$32($52)TCNT0Timer/Counter0(8Bits)83$31(1)($51)(1)OSCCALOscillatorCalibrationRegister28OCDROn-ChipDebugRegister225$30($50)SFIORADTS2ADTS1ADTS0–ACMEPUDPSR2PSR1055,86,133,199,219$2F($4F)TCCR1ACOM1A1COM1A0COM1B1COM1B0FOC1AFOC1BWGM11WGM10109$2E($4E)TCCR1BICNC1ICES1–WGM13WGM12CS12CS11CS10112$2D($4D)TCNT1HTimer/Counter1–CounterRegisterHighByte113$2C($4C)TCNT1LTimer/Counter1–CounterRegisterLowByte113$2B($4B)OCR1AHTimer/Counter1–OutputCompareRegisterAHighByte113$2A($4A)OCR1ALTimer/Counter1–OutputCompareRegisterALowByte113$29($49)OCR1BHTimer/Counter1–OutputCompareRegisterBHighByte113$28($48)OCR1BLTimer/Counter1–OutputCompareRegisterBLowByte113$27($47)ICR1HTimer/Counter1–InputCaptureRegisterHighByte114$26($46)ICR1LTimer/Counter1–InputCaptureRegisterLowByte114$25($45)TCCR2FOC2WGM20COM21COM20WGM21CS22CS21CS20127$24($44)TCNT2Timer/Counter2(8Bits)129$23($43)OCR2Timer/Counter2OutputCompareRegister129$22($42)ASSR––––AS2TCN2UBOCR2UBTCR2UB130$21($41)WDTCR–––WDTOEWDEWDP2WDP1WDP041$20(2)($40)(2)UBRRHURSEL–––UBRR[11:8]165UCSRCURSELUMSELUPM1UPM0USBSUCSZ1UCSZ0UCPOL164$1F($3F)EEARHEEAR817$1E($3E)EEARLEEPROMAddressRegisterLowByte17$1D($3D)EEDREEPROMDataRegister17$1C($3C)EECR––––EERIEEEMWEEEWEEERE17$1B($3B)PORTAPORTA7PORTA6PORTA5PORTA4PORTA3PORTA2PORTA1PORTA064$1A($3A)DDRADDA7DDA6DDA5DDA4DDA3DDA2DDA1DDA064$19($39)PINAPINA7PINA6PINA5PINA4PINA3PINA2PINA1PINA064$18($38)PORTBPORTB7PORTB6PORTB5PORTB4PORTB3PORTB2PORTB1PORTB064$17($37)DDRBDDB7DDB6DDB5DDB4DDB3DDB2DDB1DDB064$16($36)PINBPINB7PINB6PINB5PINB4PINB3PINB2PINB1PINB064$15($35)PORTCPORTC7PORTC6PORTC5PORTC4PORTC3PORTC2PORTC1PORTC065$14($34)DDRCDDC7DDC6DDC5DDC4DDC3DDC2DDC1DDC065$13($33)PINCPINC7PINC6PINC5PINC4PINC3PINC2PINC1PINC065$12($32)PORTDPORTD7PORTD6PORTD5PORTD4PORTD3PORTD2PORTD1PORTD065$11($31)DDRDDDD7DDD6DDD5DDD4DDD3DDD2DDD1DDD065$10($30)PINDPIND7PIND6PIND5PIND4PIND3PIND2PIND1PIND065$0F($2F)SPDRSPIDataRegister140$0E($2E)SPSRSPIFWCOLSPI2X140$0D($2D)SPCRSPIESPEDORDMSTRCPOLCPHASPR1SPR0138$0C($2C)UDRUSARTI/ODataRegister161$0B($2B)UCSRARXCTXCUDREFEDORPEU2XMPCM162$0A($2A)UCSRBRXCIETXCIEUDRIERXENTXENUCSZ2RXB8TXB8163$09($29)UBRRLUSARTBaudRateRegisterLowByte165$08($28)ACSRACDACBGACOACIACIEACICACIS1ACIS0200$07($27)ADMUXREFS1REFS0ADLARMUX4MUX3MUX2MUX1MUX0215$06($26)ADCSRAADENADSCADATEADIFADIEADPS2ADPS1ADPS0217$05($25)ADCHADCDataRegisterHighByte218$04($24)ADCLADCDataRegisterLowByte218$03($23)TWDRTwo-wireSerialInterfaceDataRegister180$02($22)TWARTWA6TWA5TWA4TWA3TWA2TWA1TWA0TWGCE1807ATmega16(L)2466NS–AVR–10/06Notes:1.
WhentheOCDENFuseisunprogrammed,theOSCCALRegisterisalwaysaccessedonthisaddress.
Refertothedebug-gerspecificdocumentationfordetailsonhowtousetheOCDRRegister.
2.
RefertotheUSARTdescriptionfordetailsonhowtoaccessUBRRHandUCSRC.
3.
Forcompatibilitywithfuturedevices,reservedbitsshouldbewrittentozeroifaccessed.
ReservedI/Omemoryaddressesshouldneverbewritten.
4.
SomeoftheStatusFlagsareclearedbywritingalogicalonetothem.
NotethattheCBIandSBIinstructionswilloperateonallbitsintheI/ORegister,writingaonebackintoanyflagreadasset,thusclearingtheflag.
TheCBIandSBIinstructionsworkwithregisters$00to$1Fonly.
$01($21)TWSRTWS7TWS6TWS5TWS4TWS3–TWPS1TWPS0179$00($20)TWBRTwo-wireSerialInterfaceBitRateRegister178AddressNameBit7Bit6Bit5Bit4Bit3Bit2Bit1Bit0Page8ATmega16(L)2466NS–AVR–10/06InstructionSetSummaryMnemonicsOperandsDescriptionOperationFlags#ClocksARITHMETICANDLOGICINSTRUCTIONSADDRd,RrAddtwoRegistersRd←Rd+RrZ,C,N,V,H1ADCRd,RrAddwithCarrytwoRegistersRd←Rd+Rr+CZ,C,N,V,H1ADIWRdl,KAddImmediatetoWordRdh:Rdl←Rdh:Rdl+KZ,C,N,V,S2SUBRd,RrSubtracttwoRegistersRd←Rd-RrZ,C,N,V,H1SUBIRd,KSubtractConstantfromRegisterRd←Rd-KZ,C,N,V,H1SBCRd,RrSubtractwithCarrytwoRegistersRd←Rd-Rr-CZ,C,N,V,H1SBCIRd,KSubtractwithCarryConstantfromReg.
Rd←Rd-K-CZ,C,N,V,H1SBIWRdl,KSubtractImmediatefromWordRdh:Rdl←Rdh:Rdl-KZ,C,N,V,S2ANDRd,RrLogicalANDRegistersRd←RdRrZ,N,V1ANDIRd,KLogicalANDRegisterandConstantRd←RdKZ,N,V1ORRd,RrLogicalORRegistersRd←RdvRrZ,N,V1ORIRd,KLogicalORRegisterandConstantRd←RdvKZ,N,V1EORRd,RrExclusiveORRegistersRd←RdRrZ,N,V1COMRdOne'sComplementRd←$FFRdZ,C,N,V1NEGRdTwo'sComplementRd←$00RdZ,C,N,V,H1SBRRd,KSetBit(s)inRegisterRd←RdvKZ,N,V1CBRRd,KClearBit(s)inRegisterRd←Rd($FF-K)Z,N,V1INCRdIncrementRd←Rd+1Z,N,V1DECRdDecrementRd←Rd1Z,N,V1TSTRdTestforZeroorMinusRd←RdRdZ,N,V1CLRRdClearRegisterRd←RdRdZ,N,V1SERRdSetRegisterRd←$FFNone1MULRd,RrMultiplyUnsignedR1:R0←RdxRrZ,C2MULSRd,RrMultiplySignedR1:R0←RdxRrZ,C2MULSURd,RrMultiplySignedwithUnsignedR1:R0←RdxRrZ,C2FMULRd,RrFractionalMultiplyUnsignedR1:R0←(RdxRr)<<1Z,C2FMULSRd,RrFractionalMultiplySignedR1:R0←(RdxRr)<<1Z,C2FMULSURd,RrFractionalMultiplySignedwithUnsignedR1:R0←(RdxRr)<<1Z,C2BRANCHINSTRUCTIONSRJMPkRelativeJumpPC←PC+k+1None2IJMPIndirectJumpto(Z)PC←ZNone2JMPkDirectJumpPC←kNone3RCALLkRelativeSubroutineCallPC←PC+k+1None3ICALLIndirectCallto(Z)PC←ZNone3CALLkDirectSubroutineCallPC←kNone4RETSubroutineReturnPC←STACKNone4RETIInterruptReturnPC←STACKI4CPSERd,RrCompare,SkipifEqualif(Rd=Rr)PC←PC+2or3None1/2/3CPRd,RrCompareRdRrZ,N,V,C,H1CPCRd,RrComparewithCarryRdRrCZ,N,V,C,H1CPIRd,KCompareRegisterwithImmediateRdKZ,N,V,C,H1SBRCRr,bSkipifBitinRegisterClearedif(Rr(b)=0)PC←PC+2or3None1/2/3SBRSRr,bSkipifBitinRegisterisSetif(Rr(b)=1)PC←PC+2or3None1/2/3SBICP,bSkipifBitinI/ORegisterClearedif(P(b)=0)PC←PC+2or3None1/2/3SBISP,bSkipifBitinI/ORegisterisSetif(P(b)=1)PC←PC+2or3None1/2/3BRBSs,kBranchifStatusFlagSetif(SREG(s)=1)thenPC←PC+k+1None1/2BRBCs,kBranchifStatusFlagClearedif(SREG(s)=0)thenPC←PC+k+1None1/2BREQkBranchifEqualif(Z=1)thenPC←PC+k+1None1/2BRNEkBranchifNotEqualif(Z=0)thenPC←PC+k+1None1/2BRCSkBranchifCarrySetif(C=1)thenPC←PC+k+1None1/2BRCCkBranchifCarryClearedif(C=0)thenPC←PC+k+1None1/2BRSHkBranchifSameorHigherif(C=0)thenPC←PC+k+1None1/2BRLOkBranchifLowerif(C=1)thenPC←PC+k+1None1/2BRMIkBranchifMinusif(N=1)thenPC←PC+k+1None1/2BRPLkBranchifPlusif(N=0)thenPC←PC+k+1None1/2BRGEkBranchifGreaterorEqual,Signedif(NV=0)thenPC←PC+k+1None1/2BRLTkBranchifLessThanZero,Signedif(NV=1)thenPC←PC+k+1None1/2BRHSkBranchifHalfCarryFlagSetif(H=1)thenPC←PC+k+1None1/2BRHCkBranchifHalfCarryFlagClearedif(H=0)thenPC←PC+k+1None1/2BRTSkBranchifTFlagSetif(T=1)thenPC←PC+k+1None1/2BRTCkBranchifTFlagClearedif(T=0)thenPC←PC+k+1None1/2BRVSkBranchifOverflowFlagisSetif(V=1)thenPC←PC+k+1None1/2BRVCkBranchifOverflowFlagisClearedif(V=0)thenPC←PC+k+1None1/29ATmega16(L)2466NS–AVR–10/06BRIEkBranchifInterruptEnabledif(I=1)thenPC←PC+k+1None1/2BRIDkBranchifInterruptDisabledif(I=0)thenPC←PC+k+1None1/2DATATRANSFERINSTRUCTIONSMOVRd,RrMoveBetweenRegistersRd←RrNone1MOVWRd,RrCopyRegisterWordRd+1:Rd←Rr+1:RrNone1LDIRd,KLoadImmediateRd←KNone1LDRd,XLoadIndirectRd←(X)None2LDRd,X+LoadIndirectandPost-Inc.
Rd←(X),X←X+1None2LDRd,-XLoadIndirectandPre-Dec.
X←X-1,Rd←(X)None2LDRd,YLoadIndirectRd←(Y)None2LDRd,Y+LoadIndirectandPost-Inc.
Rd←(Y),Y←Y+1None2LDRd,-YLoadIndirectandPre-Dec.
Y←Y-1,Rd←(Y)None2LDDRd,Y+qLoadIndirectwithDisplacementRd←(Y+q)None2LDRd,ZLoadIndirectRd←(Z)None2LDRd,Z+LoadIndirectandPost-Inc.
Rd←(Z),Z←Z+1None2LDRd,-ZLoadIndirectandPre-Dec.
Z←Z-1,Rd←(Z)None2LDDRd,Z+qLoadIndirectwithDisplacementRd←(Z+q)None2LDSRd,kLoadDirectfromSRAMRd←(k)None2STX,RrStoreIndirect(X)←RrNone2STX+,RrStoreIndirectandPost-Inc.
(X)←Rr,X←X+1None2ST-X,RrStoreIndirectandPre-Dec.
X←X-1,(X)←RrNone2STY,RrStoreIndirect(Y)←RrNone2STY+,RrStoreIndirectandPost-Inc.
(Y)←Rr,Y←Y+1None2ST-Y,RrStoreIndirectandPre-Dec.
Y←Y-1,(Y)←RrNone2STDY+q,RrStoreIndirectwithDisplacement(Y+q)←RrNone2STZ,RrStoreIndirect(Z)←RrNone2STZ+,RrStoreIndirectandPost-Inc.
(Z)←Rr,Z←Z+1None2ST-Z,RrStoreIndirectandPre-Dec.
Z←Z-1,(Z)←RrNone2STDZ+q,RrStoreIndirectwithDisplacement(Z+q)←RrNone2STSk,RrStoreDirecttoSRAM(k)←RrNone2LPMLoadProgramMemoryR0←(Z)None3LPMRd,ZLoadProgramMemoryRd←(Z)None3LPMRd,Z+LoadProgramMemoryandPost-IncRd←(Z),Z←Z+1None3SPMStoreProgramMemory(Z)←R1:R0None-INRd,PInPortRd←PNone1OUTP,RrOutPortP←RrNone1PUSHRrPushRegisteronStackSTACK←RrNone2POPRdPopRegisterfromStackRd←STACKNone2BITANDBIT-TESTINSTRUCTIONSSBIP,bSetBitinI/ORegisterI/O(P,b)←1None2CBIP,bClearBitinI/ORegisterI/O(P,b)←0None2LSLRdLogicalShiftLeftRd(n+1)←Rd(n),Rd(0)←0Z,C,N,V1LSRRdLogicalShiftRightRd(n)←Rd(n+1),Rd(7)←0Z,C,N,V1ROLRdRotateLeftThroughCarryRd(0)←C,Rd(n+1)←Rd(n),C←Rd(7)Z,C,N,V1RORRdRotateRightThroughCarryRd(7)←C,Rd(n)←Rd(n+1),C←Rd(0)Z,C,N,V1ASRRdArithmeticShiftRightRd(n)←Rd(n+1),n=0.
.
6Z,C,N,V1SWAPRdSwapNibblesRd(3.
.
0)←Rd(7.
.
4),Rd(7.
.
4)←Rd(3.
.
0)None1BSETsFlagSetSREG(s)←1SREG(s)1BCLRsFlagClearSREG(s)←0SREG(s)1BSTRr,bBitStorefromRegistertoTT←Rr(b)T1BLDRd,bBitloadfromTtoRegisterRd(b)←TNone1SECSetCarryC←1C1CLCClearCarryC←0C1SENSetNegativeFlagN←1N1CLNClearNegativeFlagN←0N1SEZSetZeroFlagZ←1Z1CLZClearZeroFlagZ←0Z1SEIGlobalInterruptEnableI←1I1CLIGlobalInterruptDisableI←0I1SESSetSignedTestFlagS←1S1CLSClearSignedTestFlagS←0S1SEVSetTwosComplementOverflow.
V←1V1CLVClearTwosComplementOverflowV←0V1SETSetTinSREGT←1T1CLTClearTinSREGT←0T1SEHSetHalfCarryFlaginSREGH←1H1MnemonicsOperandsDescriptionOperationFlags#Clocks10ATmega16(L)2466NS–AVR–10/06CLHClearHalfCarryFlaginSREGH←0H1MCUCONTROLINSTRUCTIONSNOPNoOperationNone1SLEEPSleep(seespecificdescr.
forSleepfunction)None1WDRWatchdogReset(seespecificdescr.
forWDR/timer)None1BREAKBreakForOn-ChipDebugOnlyNoneN/AMnemonicsOperandsDescriptionOperationFlags#Clocks11ATmega16(L)2466NS–AVR–10/06OrderingInformationNote:1.
Pb-freepackagingalternative,compliestotheEuropeanDirectiveforRestrictionofHazardousSubstances(RoHSdirec-tive).
AlsoHalidefreeandfullyGreen.
Speed(MHz)PowerSupplyOrderingCodePackageOperationRange82.
7-5.
5VATmega16L-8ACATmega16L-8PCATmega16L-8MC44A40P644M1Commercial(0oCto70oC)ATmega16L-8AIATmega16L-8AU(1)ATmega16L-8PIATmega16L-8PU(1)ATmega16L-8MIATmega16L-8MU(1)44A44A40P640P644M144M1Industrial(-40oCto85oC)164.
5-5.
5VATmega16-16ACATmega16-16PCATmega16-16MC44A40P644M1Commercial(0oCto70oC)ATmega16-16AIATmega16-16AU(1)ATmega16-16PIATmega16-16PU(1)ATmega16-16MIATmega16-16MU(1)44A44A40P640P644M144M1Industrial(-40oCto85oC)PackageType44A44-lead,Thin(1.
0mm)PlasticGullWingQuadFlatPackage(TQFP)40P640-pin,0.
600"Wide,PlasticDualInlinePackage(PDIP)44M144-pad,7x7x1.
0mmbody,leadpitch0.
50mm,QuadFlatNo-Lead/MicroLeadFramePackage(QFN/MLF)12ATmega16(L)2466NS–AVR–10/06PackagingInformation44A2325OrchardParkwaySanJose,CA95131TITLEDRAWINGNO.
RREV.
44A,44-lead,10x10mmBodySize,1.
0mmBodyThickness,0.
8mmLeadPitch,ThinProfilePlasticQuadFlatPackage(TQFP)B44A10/5/2001PIN1IDENTIFIER0~7PIN1LCA1A2AD1DeE1EBCOMMONDIMENSIONS(UnitofMeasure=mm)SYMBOLMINNOMMAXNOTENotes:1.
ThispackageconformstoJEDECreferenceMS-026,VariationACB.
2.
DimensionsD1andE1donotincludemoldprotrusion.
Allowableprotrusionis0.
25mmperside.
DimensionsD1andE1aremaximumplasticbodysizedimensionsincludingmoldmismatch.
3.
Leadcoplanarityis0.
10mmmaximum.
A––1.
20A10.
05–0.
15A20.
951.
001.
05D11.
7512.
0012.
25D19.
9010.
0010.
10Note2E11.
7512.
0012.
25E19.
9010.
0010.
10Note2B0.
30–0.
45C0.
09–0.
20L0.
45–0.
75e0.
80TYP13ATmega16(L)2466NS–AVR–10/0640P62325OrchardParkwaySanJose,CA95131TITLEDRAWINGNO.
RREV.
40P6,40-lead(0.
600"/15.
24mmWide)PlasticDualInlinePackage(PDIP)B40P609/28/01PIN1E1A1BREFEB1CLSEATINGPLANEA0~15DeeBCOMMONDIMENSIONS(UnitofMeasure=mm)SYMBOLMINNOMMAXNOTEA––4.
826A10.
381––D52.
070–52.
578Note2E15.
240–15.
875E113.
462–13.
970Note2B0.
356–0.
559B11.
041–1.
651L3.
048–3.
556C0.
203–0.
381eB15.
494–17.
526e2.
540TYPNotes:1.
ThispackageconformstoJEDECreferenceMS-011,VariationAC.
2.
DimensionsDandE1donotincludemoldFlashorProtrusion.
MoldFlashorProtrusionshallnotexceed0.
25mm(0.
010").
14ATmega16(L)2466NS–AVR–10/0644M12325OrchardParkwaySanJose,CA95131TITLEDRAWINGNO.
RREV.
44M1,44-pad,7x7x1.
0mmBody,LeadPitch0.
50mm,G44M15/27/06COMMONDIMENSIONS(UnitofMeasure=mm)SYMBOLMINNOMMAXNOTEA0.
800.
901.
00A1–0.
020.
05A30.
25REFb0.
180.
230.
30DD25.
005.
205.
406.
907.
007.
106.
907.
007.
10EE25.
005.
205.
40e0.
50BSCL0.
590.
640.
69K0.
200.
260.
41Note:JEDECStandardMO-220,Fig.
1(SAWSingulation)VKKD-3.
TOPVIEWSIDEVIEWBOTTOMVIEWDEMarkedPin#1IDE2D2bePin#1CornerLA1A3ASEATINGPLANEPin#1TrianglePin#1Chamfer(C0.
30)OptionAOptionBPin#1Notch(0.
20R)OptionCKK1235.
20mmExposedPad,MicroLeadFramePackage(MLF)15ATmega16(L)2466NS–AVR–10/06ErrataTherevisionletterinthissectionreferstotherevisionoftheATmega16device.
ATmega16(L)Rev.
MFirstAnalogComparatorconversionmaybedelayedInterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIDCODEmasksdatafromTDIinput1.
FirstAnalogComparatorconversionmaybedelayedIfthedeviceispoweredbyaslowrisingVCC,thefirstAnalogComparatorconver-sionwilltakelongerthanexpectedonsomedevices.
ProblemFix/WorkaroundWhenthedevicehasbeenpoweredorreset,disablethenenabletheAnalogCom-paratorbeforethefirstconversion.
2.
InterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIfoneofthetimerregisterswhichissynchronizedtotheasynchronoustimer2clockiswritteninthecyclebeforeaoverflowinterruptoccurs,theinterruptmaybelost.
ProblemFix/WorkaroundAlwayscheckthattheTimer2Timer/Counterregister,TCNT2,doesnothavethevalue0xFFbeforewritingtheTimer2ControlRegister,TCCR2,orOutputCompareRegister,OCR23.
IDCODEmasksdatafromTDIinputTheJTAGinstructionIDCODEisnotworkingcorrectly.
Datatosucceedingdevicesarereplacedbyall-onesduringUpdate-DR.
ProblemFix/Workaround–IfATmega16istheonlydeviceinthescanchain,theproblemisnotvisible.
–SelecttheDeviceIDRegisteroftheATmega16byissuingtheIDCODEinstructionorbyenteringtheTest-Logic-ResetstateoftheTAPcontrollertoreadoutthecontentsofitsDeviceIDRegisterandpossiblydatafromsucceedingdevicesofthescanchain.
IssuetheBYPASSinstructiontotheATmega16whilereadingtheDeviceIDRegistersofprecedingdevicesoftheboundaryscanchain.
–IftheDeviceIDsofalldevicesintheboundaryscanchainmustbecapturedsimultaneously,theATmega16mustbethefistdeviceinthechain.
ATmega16(L)Rev.
LFirstAnalogComparatorconversionmaybedelayedInterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIDCODEmasksdatafromTDIinput1.
FirstAnalogComparatorconversionmaybedelayedIfthedeviceispoweredbyaslowrisingVCC,thefirstAnalogComparatorconver-sionwilltakelongerthanexpectedonsomedevices.
ProblemFix/WorkaroundWhenthedevicehasbeenpoweredorreset,disablethenenabletheAnalogCom-paratorbeforethefirstconversion.
2.
Interruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimer16ATmega16(L)2466NS–AVR–10/06Ifoneofthetimerregisterswhichissynchronizedtotheasynchronoustimer2clockiswritteninthecyclebeforeaoverflowinterruptoccurs,theinterruptmaybelost.
ProblemFix/WorkaroundAlwayscheckthattheTimer2Timer/Counterregister,TCNT2,doesnothavethevalue0xFFbeforewritingtheTimer2ControlRegister,TCCR2,orOutputCompareRegister,OCR23.
IDCODEmasksdatafromTDIinputTheJTAGinstructionIDCODEisnotworkingcorrectly.
Datatosucceedingdevicesarereplacedbyall-onesduringUpdate-DR.
ProblemFix/Workaround–IfATmega16istheonlydeviceinthescanchain,theproblemisnotvisible.
–SelecttheDeviceIDRegisteroftheATmega16byissuingtheIDCODEinstructionorbyenteringtheTest-Logic-ResetstateoftheTAPcontrollertoreadoutthecontentsofitsDeviceIDRegisterandpossiblydatafromsucceedingdevicesofthescanchain.
IssuetheBYPASSinstructiontotheATmega16whilereadingtheDeviceIDRegistersofprecedingdevicesoftheboundaryscanchain.
–IftheDeviceIDsofalldevicesintheboundaryscanchainmustbecapturedsimultaneously,theATmega16mustbethefistdeviceinthechain.
ATmega16(L)Rev.
KFirstAnalogComparatorconversionmaybedelayedInterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIDCODEmasksdatafromTDIinput1.
FirstAnalogComparatorconversionmaybedelayedIfthedeviceispoweredbyaslowrisingVCC,thefirstAnalogComparatorconver-sionwilltakelongerthanexpectedonsomedevices.
ProblemFix/WorkaroundWhenthedevicehasbeenpoweredorreset,disablethenenabletheAnalogCom-paratorbeforethefirstconversion.
2.
InterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIfoneofthetimerregisterswhichissynchronizedtotheasynchronoustimer2clockiswritteninthecyclebeforeaoverflowinterruptoccurs,theinterruptmaybelost.
ProblemFix/WorkaroundAlwayscheckthattheTimer2Timer/Counterregister,TCNT2,doesnothavethevalue0xFFbeforewritingtheTimer2ControlRegister,TCCR2,orOutputCompareRegister,OCR23.
IDCODEmasksdatafromTDIinputTheJTAGinstructionIDCODEisnotworkingcorrectly.
Datatosucceedingdevicesarereplacedbyall-onesduringUpdate-DR.
ProblemFix/Workaround–IfATmega16istheonlydeviceinthescanchain,theproblemisnotvisible.
–SelecttheDeviceIDRegisteroftheATmega16byissuingtheIDCODEinstructionorbyenteringtheTest-Logic-ResetstateoftheTAPcontrollertoreadoutthecontentsofitsDeviceIDRegisterandpossiblydatafrom17ATmega16(L)2466NS–AVR–10/06succeedingdevicesofthescanchain.
IssuetheBYPASSinstructiontotheATmega16whilereadingtheDeviceIDRegistersofprecedingdevicesoftheboundaryscanchain.
–IftheDeviceIDsofalldevicesintheboundaryscanchainmustbecapturedsimultaneously,theATmega16mustbethefistdeviceinthechain.
ATmega16(L)Rev.
JFirstAnalogComparatorconversionmaybedelayedInterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIDCODEmasksdatafromTDIinput1.
FirstAnalogComparatorconversionmaybedelayedIfthedeviceispoweredbyaslowrisingVCC,thefirstAnalogComparatorconver-sionwilltakelongerthanexpectedonsomedevices.
ProblemFix/WorkaroundWhenthedevicehasbeenpoweredorreset,disablethenenabletheAnalogCom-paratorbeforethefirstconversion.
2.
InterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIfoneofthetimerregisterswhichissynchronizedtotheasynchronoustimer2clockiswritteninthecyclebeforeaoverflowinterruptoccurs,theinterruptmaybelost.
ProblemFix/WorkaroundAlwayscheckthattheTimer2Timer/Counterregister,TCNT2,doesnothavethevalue0xFFbeforewritingtheTimer2ControlRegister,TCCR2,orOutputCompareRegister,OCR23.
IDCODEmasksdatafromTDIinputTheJTAGinstructionIDCODEisnotworkingcorrectly.
Datatosucceedingdevicesarereplacedbyall-onesduringUpdate-DR.
ProblemFix/Workaround–IfATmega16istheonlydeviceinthescanchain,theproblemisnotvisible.
–SelecttheDeviceIDRegisteroftheATmega16byissuingtheIDCODEinstructionorbyenteringtheTest-Logic-ResetstateoftheTAPcontrollertoreadoutthecontentsofitsDeviceIDRegisterandpossiblydatafromsucceedingdevicesofthescanchain.
IssuetheBYPASSinstructiontotheATmega16whilereadingtheDeviceIDRegistersofprecedingdevicesoftheboundaryscanchain.
–IftheDeviceIDsofalldevicesintheboundaryscanchainmustbecapturedsimultaneously,theATmega16mustbethefistdeviceinthechain.
ATmega16(L)Rev.
IFirstAnalogComparatorconversionmaybedelayedInterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIDCODEmasksdatafromTDIinput1.
FirstAnalogComparatorconversionmaybedelayedIfthedeviceispoweredbyaslowrisingVCC,thefirstAnalogComparatorconver-sionwilltakelongerthanexpectedonsomedevices.
ProblemFix/WorkaroundWhenthedevicehasbeenpoweredorreset,disablethenenabletheAnalogCom-paratorbeforethefirstconversion.
18ATmega16(L)2466NS–AVR–10/062.
InterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIfoneofthetimerregisterswhichissynchronizedtotheasynchronoustimer2clockiswritteninthecyclebeforeaoverflowinterruptoccurs,theinterruptmaybelost.
ProblemFix/WorkaroundAlwayscheckthattheTimer2Timer/Counterregister,TCNT2,doesnothavethevalue0xFFbeforewritingtheTimer2ControlRegister,TCCR2,orOutputCompareRegister,OCR23.
IDCODEmasksdatafromTDIinputTheJTAGinstructionIDCODEisnotworkingcorrectly.
Datatosucceedingdevicesarereplacedbyall-onesduringUpdate-DR.
ProblemFix/Workaround–IfATmega16istheonlydeviceinthescanchain,theproblemisnotvisible.
–SelecttheDeviceIDRegisteroftheATmega16byissuingtheIDCODEinstructionorbyenteringtheTest-Logic-ResetstateoftheTAPcontrollertoreadoutthecontentsofitsDeviceIDRegisterandpossiblydatafromsucceedingdevicesofthescanchain.
IssuetheBYPASSinstructiontotheATmega16whilereadingtheDeviceIDRegistersofprecedingdevicesoftheboundaryscanchain.
–IftheDeviceIDsofalldevicesintheboundaryscanchainmustbecapturedsimultaneously,theATmega16mustbethefistdeviceinthechain.
ATmega16(L)Rev.
HFirstAnalogComparatorconversionmaybedelayedInterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIDCODEmasksdatafromTDIinput1.
FirstAnalogComparatorconversionmaybedelayedIfthedeviceispoweredbyaslowrisingVCC,thefirstAnalogComparatorconver-sionwilltakelongerthanexpectedonsomedevices.
ProblemFix/WorkaroundWhenthedevicehasbeenpoweredorreset,disablethenenabletheAnalogCom-paratorbeforethefirstconversion.
2.
InterruptsmaybelostwhenwritingthetimerregistersintheasynchronoustimerIfoneofthetimerregisterswhichissynchronizedtotheasynchronoustimer2clockiswritteninthecyclebeforeaoverflowinterruptoccurs,theinterruptmaybelost.
ProblemFix/WorkaroundAlwayscheckthattheTimer2Timer/Counterregister,TCNT2,doesnothavethevalue0xFFbeforewritingtheTimer2ControlRegister,TCCR2,orOutputCompareRegister,OCR23.
IDCODEmasksdatafromTDIinputTheJTAGinstructionIDCODEisnotworkingcorrectly.
Datatosucceedingdevicesarereplacedbyall-onesduringUpdate-DR.
ProblemFix/Workaround–IfATmega16istheonlydeviceinthescanchain,theproblemisnotvisible.
19ATmega16(L)2466NS–AVR–10/06–SelecttheDeviceIDRegisteroftheATmega16byissuingtheIDCODEinstructionorbyenteringtheTest-Logic-ResetstateoftheTAPcontrollertoreadoutthecontentsofitsDeviceIDRegisterandpossiblydatafromsucceedingdevicesofthescanchain.
IssuetheBYPASSinstructiontotheATmega16whilereadingtheDeviceIDRegistersofprecedingdevicesoftheboundaryscanchain.
–IftheDeviceIDsofalldevicesintheboundaryscanchainmustbecapturedsimultaneously,theATmega16mustbethefistdeviceinthechain.
20ATmega16(L)2466NS–AVR–10/06DatasheetRevisionHistoryPleasenotethatthereferringpagenumbersinthissectionarereferredtothisdocu-ment.
Thereferringrevisioninthissectionarereferringtothedocumentrevision.
Rev.
2466N-10/061.
Updated"Timer/CounterOscillator"onpage31.
2.
Updated"FastPWMMode"onpage102.
3.
UpdatedTable38onpage83,Table40onpage84,Table45onpage112,Table47onpage113,Table50onpage129andTable52onpage130.
4.
UpdatedCcodeexamplein"USARTInitialization"onpage150.
5.
Updated"Errata"onpage343.
Rev.
2466M-04/061.
Updatedtypos.
2.
Updated"SerialPeripheralInterface–SPI"onpage136.
3.
UpdatedTable86onpage222,Table116onpage279,Table121onpage298andTable122onpage300.
Rev.
2466L-06/051.
Updatednotein"BitRateGeneratorUnit"onpage179.
2.
UpdatedvaluesforVINTin"ADCCharacteristics"onpage300.
3.
Updated"SerialProgrammingInstructionset"onpage279.
4.
UpdatedUSARTinitC-codeexamplein"USART"onpage145.
Rev.
2466K-04/051.
Updated"OrderingInformation"onpage11.
2.
MLF-packagealternativechangedto"QuadFlatNo-Lead/MicroLeadFramePackageQFN/MLF".
3.
Updated"ElectricalCharacteristics"onpage294.
Rev.
2466J-10/041.
Updated"OrderingInformation"onpage11.
Rev.
2466I-10/041.
Removedreferencestoanalogground.
2.
UpdatedTable7onpage28,Table15onpage38,Table16onpage42,Table81onpage211,Table116onpage279,andTable119onpage296.
3.
Updated"PinoutATmega16"onpage2.
4.
Updatedfeaturesin"AnalogtoDigitalConverter"onpage205.
5.
Updated"Version"onpage230.
6.
Updated"CalibrationByte"onpage264.
21ATmega16(L)2466NS–AVR–10/067.
Added"PageSize"onpage265.
Rev.
2466H-12/031.
Updated"CalibratedInternalRCOscillator"onpage29.
Rev.
2466G-10/031.
Removed"Preliminary"fromthedatasheet.
2.
ChangedICPtoICP1inthedatasheet.
3.
Updated"JTAGInterfaceandOn-chipDebugSystem"onpage36.
4.
UpdatedassemblyandCcodeexamplesin"WatchdogTimerControlRegis-ter–WDTCR"onpage43.
5.
UpdatedFigure46onpage103.
6.
UpdatedTable15onpage38,Table82onpage218andTable115onpage279.
7.
Updated"TestAccessPort–TAP"onpage223regardingJTAGEN.
8.
UpdateddescriptionfortheJTDbitonpage232.
9.
Addednote2toFigure126onpage255.
10.
AddedanoteregardingJTAGENfusetoTable105onpage263.
11.
UpdatedAbsoluteMaximumRatings*andDCCharacteristicsin"ElectricalCharacteristics"onpage294.
12.
Updated"ATmega16TypicalCharacteristics"onpage302.
13.
Fixedtypofor16MHzQFN/MLFpackagein"OrderingInformation"onpage11.
14.
AddedaproposalforsolvingproblemsregardingtheJTAGinstructionIDCODEin"Errata"onpage15.
Rev.
2466F-02/031.
AddednoteaboutmaskingoutunusedbitswhenreadingtheProgramCounterin"StackPointer"onpage12.
2.
AddedChipEraseasafirststepin"ProgrammingtheFlash"onpage291and"ProgrammingtheEEPROM"onpage292.
3.
Addedthesection"Unconnectedpins"onpage55.
4.
AddedtipsonhowtodisabletheOCDsystemin"On-chipDebugSystem"onpage34.
5.
Removedreferencetothe"Multi-purposeOscillator"applicationnoteand"32kHzCrystalOscillator"applicationnote,whichdonotexist.
6.
AddedinformationaboutPWMsymmetryforTimer0andTimer2.
22ATmega16(L)2466NS–AVR–10/067.
Addednotein"FillingtheTemporaryBuffer(PageLoading)"onpage256aboutwritingtotheEEPROMduringanSPMPageLoad.
8.
RemovedADHSMcompletely.
9.
AddedTable73,"TWIBitRatePrescaler,"onpage183todescribetheTWPSbitsinthe"TWIStatusRegister–TWSR"onpage182.
10.
Addedsection"DefaultClockSource"onpage25.
11.
Addednoteaboutfrequencyvariationwhenusinganexternalclock.
Noteaddedin"ExternalClock"onpage31.
AnextrarowandanoteaddedinTable118onpage296.
12.
VariousminorTWIcorrections.
13.
Added"PowerConsumption"datain"Features"onpage1.
14.
Addedsection"EEPROMWriteDuringPower-downSleepMode"onpage22.
15.
AddednoteaboutDifferentialModewithAutoTriggeringin"PrescalingandConversionTiming"onpage208.
16.
Addedupdated"PackagingInformation"onpage12.
Rev.
2466E-10/021.
Updated"DCCharacteristics"onpage294.
Rev.
2466D-09/021.
ChangedallFlashwrite/erasecyclesfrom1,000to10,000.
2.
Updatedthefollowingtables:Table4onpage26,Table15onpage38,Table42onpage85,Table45onpage112,Table46onpage112,Table59onpage144,Table67onpage168,Table90onpage237,Table102onpage261,"DCCharacteristics"onpage294,Table119onpage296,Table121onpage298,andTable122onpage300.
3.
Updated"Errata"onpage15.
Rev.
2466C-03/021.
UpdatedtypicalEEPROMprogrammingtime,Table1onpage20.
2.
Updatedtypicalstart-uptimeinthefollowingtables:Table3onpage25,Table5onpage27,Table6onpage28,Table8onpage29,Table9onpage29,andTable10onpage30.
3.
UpdatedTable17onpage43withtypicalWDTTime-out.
4.
AddedSomePreliminaryTestLimitsandCharacterizationData.
RemovedsomeoftheTBD'sinthefollowingtablesandpages:Table15onpage38,Table16onpage42,Table116onpage272(tableremovedindocumentreview#D),"ElectricalCharacteristics"onpage294,Table119onpage296,Table121onpage298,andTable122onpage300.
5.
UpdatedTWIChapter.
23ATmega16(L)2466NS–AVR–10/06Addedthenoteattheendofthe"BitRateGeneratorUnit"onpage179.
6.
CorrecteddescriptionofADSCbitin"ADCControlandStatusRegisterA–ADCSRA"onpage220.
7.
ImproveddescriptiononhowtodoapolaritycheckoftheADCdoffresultsin"ADCConversionResult"onpage217.
8.
AddedJTAGversionnumberforrev.
HinTable87onpage230.
9.
AddednotregardingOCDENFusebelowTable105onpage263.
10.
UpdatedProgrammingFigures:Figure127onpage265andFigure136onpage277areupdatedtoalsoreflectthatAVCCmustbeconnectedduringProgrammingmode.
Figure131onpage273addedtoillustratehowtoprogramthefuses.
11.
Addedanoteregardingusageofthe"PROG_PAGELOAD($6)"onpage283and"PROG_PAGEREAD($7)"onpage283.
12.
RemovedalternativealgortihmforleavingJTAGProgrammingmode.
See"LeavingProgrammingMode"onpage291.
13.
AddedCalibratedRCOscillatorcharacterizationcurvesinsection"ATmega16TypicalCharacteristics"onpage302.
14.
CorrectedorderingcodeforQFN/MLFpackage(16MHz)in"OrderingInforma-tion"onpage11.
15.
CorrectedTable90,"ScanSignalsfortheOscillators(1)(2)(3),"onpage237.
2466NS–AVR–10/062006AtmelCorporation.
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