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LowPower,PrecisionAnalogMicrocontrollerwithDualSigma-DeltaADCs,ARMCortex-M3DataSheetADuCM360/ADuCM361Rev.
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OneTechnologyWay,P.
O.
Box9106,Norwood,MA02062-9106,U.
S.
A.
Tel:781.
329.
47002012–2016AnalogDevices,Inc.
Allrightsreserved.
TechnicalSupportwww.
analog.
comFEATURESAnaloginput/outputDual24-bitADCs(ADuCM360)Single24-bitADC(ADuCM361)ProgrammableADCoutputrate(3.
5Hzto3.
906kHz)Simultaneous50Hz/60HznoiserejectionAt50SPScontinuousconversionmodeAt16.
67SPSsingleconversionmodeFlexibleinputmuxforinputchannelselectiontobothADCsTwo24-bitmultichannelADCs(ADC0andADC1)6differentialor12single-endedinputchannels4internalchannelsformonitoringDAC,temperaturesensor,IOVDD/4,andAVDD/4(ADC1only)Programmablegain(1to128)RMSnoise:52nVat3.
53Hz,200nVat50HzProgrammablesensorexcitationcurrentsourcesOn-chipprecisionvoltagereferenceSingle12-bitvoltageoutputDACNPNmodefor4mAto20mAloopapplicationsMicrocontrollerARMCortex-M332-bitprocessorSerialwiredownloadanddebugInternalwatchcrystalforwake-uptimer16MHzoscillatorwith8-wayprogrammabledividerMemory128kBFlash/EEmemory,8kBSRAMIn-circuitdebug/downloadviaserialwireandUARTPowersupplyrange:1.
8Vto3.
6V(maximum)Powerconsumption,MCUactivemodeCoreconsumes290A/MHzOverallsystemcurrentconsumptionof1.
0mAwithcoreoperatingat500kHz(bothADCson,inputbuffersoff,PGAgainof4,oneSPIporton,andalltimerson)Powerconsumption,power-downmode:4A(wake-uptimeractive)On-chipperipheralsUART,I2C,and2*SPIserialI/O16-bitPWMcontroller19-pinmultifunctionGPIOport2general-purposetimersWake-uptimer/watchdogtimerMultichannelDMAandinterruptcontrollerPackageandtemperaturerange48-lead,7mm*7mmLFCSPSpecifiedfor40°Cto+125°CoperationDevelopmenttoolsLowcostQuickStartDevelopmentSystemThird-partycompilerandemulatortoolsupportMultiplefunctionalsafetyfeaturesforimproveddiagnosticsAPPLICATIONSIndustrialautomationandprocesscontrolIntelligentprecisionsensingsystems4mAto20mAloop-poweredsmartsensorsystemsMedicaldevices,patientmonitoringADuCM360/ADuCM361DataSheetRev.
D|Page2of24TABLEOFCONTENTSFeatures1Applications.
1RevisionHistory2GeneralDescription.
3FunctionalBlockDiagrams.
4Specifications.
6MicrocontrollerElectricalSpecifications.
6RMSNoiseResolutionofADC0andADC1.
11I2CTimingSpecifications.
15SPITimingSpecifications16AbsoluteMaximumRatings18ThermalResistance.
18ESDCaution.
18PinConfigurationandFunctionDescriptions.
19TypicalPerformanceCharacteristics.
22TypicalSystemConfiguration23OutlineDimensions.
24OrderingGuide24REVISIONHISTORY6/2016—Rev.
CtoRev.
DChangetoFeaturesSection.
1AddedNote12andNote13,Table16ChangetoInternalReference(1.
2V)Section,Table2,andTable311ChangestoExternalReference(2.
5V)Section,Table6,andTable713ChangetoHumanBodyModelParameter,Table1418ChangestoFigure15.
2310/2014—Rev.
BtoRev.
CChangestoTable1.
6ChangestoTable3.
11ChangestoTable5.
12ChangestoTable7.
13ChangestoTable9.
14ChangestoTable14.
18ChangestoPin35andPin36Descriptions;Table1620ChangestoFigure11.
227/2013—Rev.
AtoRev.
BChangestoFeaturesSectionandGeneralDescriptionSection.
.
.
.
.
.
.
3ChangestoFigure1.
4AddedFigure2,RenumberedSequentially5ChangestoTable1.
6ChangestoTable2andTable310ChangestoTable4andTable511ChangestoTable6andTable712ChangestoTable8andTable913ChangestoTable1617ChangestoFigure14.
2111/2012—Rev.
0toRev.
AChangestoPin35andPin36inTable16.
189/2012—Revision0:InitialVersionDataSheetADuCM360/ADuCM361Rev.
D|Page3of24GENERALDESCRIPTIONTheADuCM360isafullyintegrated,3.
9kSPS,24-bitdataacquisitionsystemthatincorporatesdualhighperformance,multichannelsigma-delta(Σ-Δ)analog-to-digitalconverters(ADCs),a32-bitARMCortex-M3processor,andFlash/EEmemoryonasinglechip.
TheADuCM360isdesignedfordirectinterfacingtoexternalprecisionsensorsinbothwiredandbattery-poweredapplications.
TheADuCM361containsallthefeaturesoftheADuCM360exceptthatonlyone24-bitΣ-ΔADC(ADC1)isavailable.
TheADuCM360/ADuCM361containanon-chip32kHzoscillatorandaninternal16MHzhighfrequencyoscillator.
Thehighfrequencyoscillatorisroutedthroughaprogrammableclockdividerfromwhichtheoperatingfrequencyoftheprocessorcoreclockisgenerated.
Themaximumcoreclockspeedis16MHz;thisspeedisnotlimitedbyoperatingvoltageortemperature.
ThemicrocontrollercoreisalowpowerARMCortex-M3processor,a32-bitRISCmachinethatoffersupto20MIPSpeakperformance.
TheCortex-M3processorincorporatesaflexible,11-channelDMAcontrollerthatsupportsallwiredcommunica-tionperipherals(SPI,UART,andI2C).
Alsointegratedonchipare128kBofnonvolatileFlash/EEmemoryand8kBofSRAM.
TheanalogsubsystemconsistsofdualADCs,eachconnectedtoaflexibleinputmux.
BothADCscanoperateinfullydifferentialandsingle-endedmodes.
Otheron-chipADCfeaturesincludedualprogrammableexcitationcurrentsources,diagnosticcurrentsources,andabiasvoltagegeneratorofAVDD_REG/2(900mV)tosetthecommon-modevoltageofaninputchannel.
Alow-sideinternalgroundswitchisprovidedtoallowpower-downofanexternalcircuit(forexample,abridgecircuit)betweenconversions.
TheADCscontaintwoparallelfilters:asinc3orsinc4filterinparallelwithasinc2filter.
Thesinc3orsinc4filterisusedforprecisionmeasurements.
Thesinc2filterisusedforfastmeasure-mentsandforthedetectionofstepchangesintheinputsignal.
Thedevicescontainalownoise,lowdriftinternalbandgapref-erence,buttheycanbeconfiguredtoacceptoneortwoexternalreferencesourcesinratiometricmeasurementconfigurations.
Anoptiontobuffertheexternalreferenceinputsisprovidedonchip.
Asingle-channelbufferedvoltageoutputDACisalsoprovidedonchip.
TheADuCM360/ADuCM361integratearangeofon-chipperipherals,whichcanbeconfiguredundermicrocontrollersoftwarecontrolasrequiredintheapplication.
TheperipheralsincludeUART,I2C,anddualSPIserialI/Ocommunicationcontrollers;a19-pinGPIOport;twogeneral-purposetimers;awake-uptimer;andasystemwatchdogtimer.
A16-bitPWMcontrollerwithsixoutputchannelsisalsoprovided.
TheADuCM360/ADuCM361arespecificallydesignedtooperateinbattery-poweredapplicationswherelowpoweroperationiscritical.
Themicrocontrollercorecanbeconfiguredinanormaloperatingmodethatconsumes290μA/MHz(includingflash/SRAMIDD).
Anoverallsystemcurrentconsumptionof1mAcanbeachievedwithbothADCson(inputbuffersoff),PGAgainof4,oneSPIporton,andalltimerson.
TheADuCM360/ADuCM361canbeconfiguredinanumberoflowpoweroperatingmodesunderdirectprogramcontrol,includingahibernatemode(internalwake-uptimeractive)thatconsumesonly4A.
Inhibernatemode,peripheralssuchasexternalinterruptsortheinternalwake-uptimercanwakeupthedevice.
Thismodeallowstheparttooperatewithultralowpowerandstillrespondtoasynchronousexternalorperiodicevents.
On-chipfactoryfirmwaresupportsin-circuitserialdownloadviaaserialwireinterface(2-pinJTAGsystem)andUART;non-intrusiveemulationisalsosupportedviatheserialwireinterface.
ThesefeaturesareincorporatedintoalowcostQuickStartDevelopmentSystemthatsupportsthisprecisionanalogmicro-controllerfamily.
Thepartsoperatefromanexternal1.
8Vto3.
6Vvoltagesupplyandarespecifiedoveranindustrialtemperaturerangeof40°Cto+125°C.
MoreinformationontheADuCM360/ADuCM361,seetheUG-367userguide.
ADuCM360/ADuCM361DataSheetRev.
D|Page4of24FUNCTIONALBLOCKDIAGRAMSΣ-ΔMODULATOR24-BITΣ-ΔADCVREFAIN0DAC,TEMP,IOVDD/4,AVDD/4SINC3/4FILTER12-BITDACSINC2FILTERON-CHIP1.
8VANALOGLDOON-CHIP1.
8VDIGITALLDOPOWER-ONRESETON-CHIPOSCILLATOR(1%TYP)16MHzGPIOPORTSUARTPORTS2*SPIPORTSI2CPORTS19GENERAL-PURPOSEI/OPORTSMEMORY128kBFLASH8kBSRAMDMAANDINTERRUPTCONTROLLERTIMER0TIMER1WATCHDOGWAKE-UPTIMERPWMSERIALWIREDEBUG,PROGRAMMINGANDDEBUGARMCORTEX-M3PROCESSOR16MHzVBIASGENERATORPRECISIONREFERENCEADuCM360BUFFERBUFFERBUFFERSELECTABLEVREFSOURCESCURRENTSOURCESAIN1AIN2DACRESETXTALOXTALISWDIOSWCLKDVDD_REGAVDD_REGAVDDAGNDAIN3AIN4/IEXCAIN5/IEXCAIN6/IEXCAIN7/VBIAS0/IEXC/EXTREF2IN+AIN8/EXTREF2IN–AIN9/DACBUFF+AIN10AIN11/VBIAS1IREFGND_SWVREF–INT_REFIOVDDIOVDDVREF+09743-001AMPMOD2GAINΣ-ΔMODULATOR24-BITΣ-ΔADCVREFSINC3/4FILTERAMPMOD2GAINBUFBUFMUXFigure1.
ADuCM360FunctionalBlockDiagramDataSheetADuCM360/ADuCM361Rev.
D|Page5of24AIN0DAC,TEMP,IOVDD/4,AVDD/412-BITDACSINC2FILTERON-CHIP1.
8VANALOGLDOON-CHIP1.
8VDIGITALLDOPOWER-ONRESETON-CHIPOSCILLATOR(1%TYP)16MHzGPIOPORTSUARTPORTS2*SPIPORTSI2CPORTS19GENERAL-PURPOSEI/OPORTSMEMORY128kBFLASH8kBSRAMDMAANDINTERRUPTCONTROLLERTIMER0TIMER1WATCHDOGWAKE-UPTIMERPWMSERIALWIREDEBUG,PROGRAMMINGANDDEBUGARMCORTEX-M3PROCESSOR16MHzVBIASGENERATORPRECISIONREFERENCEADuCM361BUFFERBUFFERBUFFERSELECTABLEVREFSOURCESCURRENTSOURCESAIN1AIN2DACRESETXTALOXTALISWDIOSWCLKDVDD_REGAVDD_REGAVDDAGNDAIN3AIN4/IEXCAIN5/IEXCAIN6/IEXCAIN7/VBIAS0/IEXC/EXTREF2IN+AIN8/EXTREF2IN–AIN9/DACBUFF+AIN10AIN11/VBIAS1IREFGND_SWVREF–INT_REFIOVDDIOVDDVREF+09743-014Σ-ΔMODULATOR24-BITΣ-ΔADCVREFSINC3/4FILTERAMPMOD2GAINBUFMUXFigure2.
ADuCM361FunctionalBlockDiagramADuCM360/ADuCM361DataSheetRev.
D|Page6of24SPECIFICATIONSMICROCONTROLLERELECTRICALSPECIFICATIONSAVDD/IOVDD=1.
8Vto3.
6V.
ThedifferencebetweenAVDDandIOVDDmustbe≤0.
3V.
Internal1.
2Vreference,fCORE=16MHz,allspecificationsatTA=40°Cto+125°C,unlessotherwisenoted.
Table1.
ParameterTestConditions/CommentsMinTypMaxUnitADCSPECIFICATIONSADC0andADC1ConversionRate1Chopoff3.
53906HzChopon3.
51302HzNoMissingCodes1Chopoff,fADC≤500Hz24BitsChopon,fADC≤250Hz24BitsRMSNoiseandDataOutputRatesSeeTable2throughTable9IntegralNonlinearity1Gain=1,inputbufferoff±10ppmofFSRGain=2,4,8,or16±15ppmofFSRGain=32,64,or128±20ppmofFSROffsetError2,3,4,6,7Chopoff;offseterrorisintheorderofthenoisefortheprogrammedgainandupdateratefollowingcalibration±100/gainμVChopon1±1.
0μVOffsetErrorDriftvs.
Temperature1,4,6Chopoff,gain≤41/gainμV/°CChopoff,gain≥8230nV/°CChopon10nV/°COffsetErrorLifetimeStability5Gain=1281μV/1000HrFull-ScaleError1,4,6,7,8±0.
5/gainmVFull-ScaleErrorLifetimeStability5Gain=128±25μV/1000HrGainErrorDriftvs.
Temperature1,4,6ExternalreferenceGain=1,2,4,8,or16±3ppm/°CGain=32,64,or128±6ppm/°CPGAGainMismatchError±0.
15%PowerSupplyRejection1ExternalreferenceChopon,ADCinput=0.
25V,gain=495dBChopoff,ADCinput=7.
8mV,gain=12880dBChopoff,ADCinput=1V,gain=190dBAbsoluteInputVoltageRangeUnbufferedModeAGNDAVDDVBufferedModeGain=1isnotavailable;seetheinfor-mationaboutsiliconanomaliesontheADuCM360/ADuCM361productpageGain≥2AGND+0.
1AVDD0.
1VDifferentialInputVoltageRanges1Forgain=32,64,and128,seeTable3andTable7forallowableinputrangesandnoisevaluesGain=1±VREFVGain=2±500mVGain=4±250mVGain=8±125mVGain=16±62.
5mVCommon-ModeVoltage,VCM1Ideally,VCM=((AIN+)+(AIN))/2;gain=2to128;inputcurrentvarieswithVCM(seeFigure9andFigure10)AGNDAVDDVDataSheetADuCM360/ADuCM361Rev.
D|Page7of24ParameterTestConditions/CommentsMinTypMaxUnitInputCurrent9BufferedModeGain>1(excludingAIN4,AIN5,AIN6,andAIN7pins)1nAGain>1(AIN4,AIN5,AIN6,andAIN7pins)2nAUnbufferedModeInputcurrentvarieswithinputvoltage500nA/VAverageInputCurrentDrift1BufferedModeAIN0,AIN1,AIN2,AIN3±5pA/°CAIN4,AIN5,AIN6,AIN7±16pA/°CAIN8,AIN9,AIN10,AIN11±9pA/°CUnbufferedMode±250pA/V/°CCommon-ModeRejection,DC1OnADCinputADCgain=1,AVDD2V80100dBADCgain=2to12880dBCommon-ModeRejection,50Hz/60Hz150Hz/60Hz±1Hz;fADC=16.
7Hz,chopon;fADC=50Hz,chopoffADCgain=197dBADCgain=2to12890dBNormal-ModeRejection,50Hz/60Hz1OnADCinput50Hz/60Hz±1Hz;fADC=16.
7Hz,chopon;fADC=50Hz,chopoff6080dBTEMPERATURESENSOR1AfterusercalibrationVoltageOutputat25°CProcessorpowereddownorinstandbymodebeforemeasurement82.
1mVVoltageTemperatureCoefficient(TC)250V/°CAccuracy6°CGROUNDSWITCHRON3.
71019AllowableCurrent120kresistoroff,directshorttoground20mAVOLTAGEREFERENCEADCinternalreferenceInternalVREF1.
2VInitialAccuracyMeasuredatTA=25°C0.
1+0.
1%ReferenceTemperatureCoefficient(TC)1,1015±5+15ppm/°CPowerSupplyRejection18290dBEXTERNALREFERENCEINPUTSInputRangeBufferedModeAGND+0.
1AVDD0.
1VUnbufferedModeMinimumdifferentialvoltagebetweenVREF+andVREFpinsis400mV0AVDDVInputCurrentBufferedMode20+4+27nAUnbufferedMode500nA/VNormal-ModeRejection180dBCommon-ModeRejection185100dBReferenceDetectLevels1400mVEXCITATIONCURRENTSOURCESOutputCurrentAvailablefromeachcurrentsource;valueprogrammablefrom10Ato1mA10501000μAInitialToleranceat25°C1IOUT≥50A±5%Drift1Usinginternalreferenceresistor100400ppm/°CUsingexternal150kreferenceresistorbetweenIREFpinandAGND;resistormusthavedriftspecificationof5ppm/°C75400ppm/°CInitialCurrentMatchingat25°C1Matchingbetweenbothcurrentsources±0.
5%ADuCM360/ADuCM361DataSheetRev.
D|Page8of24ParameterTestConditions/CommentsMinTypMaxUnitDriftMatching150ppm/°CLoadRegulation,AVDD1AVDD=3.
3V0.
2%/VOutputCompliance1IOUT=10Ato210AAGND0.
03AVDD0.
45AVDD0.
85VIOUT>210AAGND0.
03AVDD0.
55AVDD1.
1VDACCHANNELSPECIFICATIONSRL=5k,CL=100pFVoltageRangeInternalreference0VREFVExternalreference01.
8VDCSpecifications11Resolution12BitsRelativeAccuracy±3LSBDifferentialNonlinearityGuaranteedmonotonic±0.
5±1LSBOffsetError1.
2Vinternalreference±2±10mVGainErrorVREFrange(reference=1.
2V)±0.
5%NPNMode1Resolution12BitsRelativeAccuracy±3LSBDifferentialNonlinearity±0.
85LSBOffsetError±0.
35mAGainError±0.
75mAOutputCurrentRange0.
00823.
6mAInterpolationMode1,12Onlymonotonicto14bitsResolution14BitsRelativeAccuracy13For14-bitresolution4to+13LSBDifferentialNonlinearityMonotonic(14bits)±0.
5LSBOffsetError1.
2Vinternalreference±2mVGainErrorVREFrange(reference=1.
2V)±1%AVDDrange±1%DACACCHARACTERISTICS1VoltageOutputSettlingTime10sDigital-to-AnalogGlitchEnergy1LSBchangeatmajorcarry(maximumnumberofbitschangessimultaneouslyintheDAC0DATregister)±20nV-secPOWER-ONRESET(POR)PORTripLevelVoltageatDVDDpinPower-onlevel1.
6VPower-downlevel1.
6VTimeoutfromPOR150msWATCHDOGTIMER(WDT)1TimeoutPeriod0.
000038192secTimeoutStepSizeT3CON[3:2]=107.
8125msFLASH/EEMEMORY1Endurance1410,000CyclesDataRetention15TJ=85°C10YearsDIGITALINPUTSAlldigitalinputsInputLeakageCurrentDigitalinputsexceptfortheRESET,SWCLK,andSWDIOpinsLogic1VINH=IOVDDorVINH=1.
8V140μAInternalpull-updisabled1nALogic0VINL=0V160μAInternalpull-updisabled10nADataSheetADuCM360/ADuCM361Rev.
D|Page9of24ParameterTestConditions/CommentsMinTypMaxUnitInputLeakageCurrentRESET,SWCLK,andSWDIOpinsLogic1140μALogic0160μAInputCapacitance110pFLogicInputsInputLowVoltage,VINL0.
2*IOVDDVInputHighVoltage,VINH0.
7*IOVDDVLogicOutputsOutputHighVoltage,VOHISOURCE=1mAIOVDD0.
4VOutputLowVoltage,VOLISINK=1mA0.
4VCRYSTALOSCILLATOR132.
768kHzcrystalinputsLogicInputs,XTALIOnly16InputLowVoltage,VINL0.
8VInputHighVoltage,VINH1.
7VXTALICapacitance6pFXTALOCapacitance6pFON-CHIPLOWPOWEROSCILLATOROscillatorFrequency32.
768kHzAccuracy30±10+30%ON-CHIPHIGHFREQUENCYOSCILLATOROscillatorFrequency16MHzAccuracy40°Cto+125°C1.
8+1.
4%LongTermStability50.
8%/1000HrPROCESSORCLOCKRATE1Nineprogrammablecoreclockselectionswithinspecifiedrange0.
06250.
516MHzUsinganExternalClock0.
03276816MHzPROCESSORSTART-UPTIME1AtPower-OnIncludeskernelpower-onexecutiontime41msAfterResetEventIncludeskernelpower-onexecutiontime1.
44msFromProcessorPower-Down(Mode1,Mode2,andMode3)fCLKistheCortex-M3coreclock3to5fCLKFromTotalHaltorHibernateMode(Mode4orMode5)30.
8μsPOWERREQUIREMENTSPowerSupplyVoltages,VDDAVDD,IOVDD1.
83.
6VPowerConsumptionIDD(MCUActiveMode)17,18Processorclockrate=16MHz;allperipheralson(CLKSYSDIV=0)5.
5mAProcessorclockrate=8MHz;allperipheralson(CLKSYSDIV=1)3mAProcessorclockrate=500kHz;bothADCson(inputbuffersoff)withPGAgain=4,1*SPIporton,alltimerson1mAIDD(MCUPoweredDown)Fulltemperaturerange,totalhaltmode(Mode4)4μAReducedtemperaturerange,40°Cto+85°C4μAIDD,Total(ADC0)18PGAenabled,gain≥32320μAPGAGain=4,8,or16,PGAonly130μAGain=32,64,or128,PGAonly180μAInputBuffers2*inputbuffers=70μA70μADigitalInterfaceandModulator70μAADuCM360/ADuCM361DataSheetRev.
D|Page10of24ParameterTestConditions/CommentsMinTypMaxUnitIDD(ADC1)Inputbuffersoff,gain=4,8,or16only200μAExternalReferenceInputBuffers60μAeach120μA1Thesenumbersarenotproductiontested,butareguaranteedbydesignand/orcharacterizationdataatproductionrelease.
2Testedatgain=4afterinitialoffsetcalibration.
3Measuredwithaninternalshort.
Asystemzero-scalecalibrationremovesthiserror.
4Arecalibrationatanytemperatureremovestheseerrors.
5Thelongtermstabilityspecificationisnoncumulative.
Thedriftinsubsequent1000hourperiodsissignificantlylowerthaninthefirst1000hourperiod.
6Thesenumbersdonotincludeinternalreferencetemperaturedrift.
7Factorycalibratedatgain=1.
8Systemcalibrationataspecificgainremovestheerroratthisgain.
9InputcurrentmeasuredwithoneADCmeasuringachannel.
IfbothADCsmeasurethesameinputchannel,theinputcurrentincreases(approximatelydoubles).
10Measuredusingtheboxmethod.
11ReferenceDAClinearityiscalculatedusingareducedcoderangeof0x0ABto0xF30.
12Measuredusingalow-passfilterwithR=1k,C=100nF.
13AclosedloopcontrolwiththeADCimprovesDACaccuracy.
14Enduranceisqualifiedto10,000cyclesasperJEDECStandard22,MethodA117,andismeasuredat40°C,+25°C,and+125°C.
Typicalenduranceat25°Cis170,000cycles.
15Retentionlifetimeequivalentatjunctiontemperature(TJ)=85°CasperJEDECStandard22,MethodA117.
Retentionlifetimederateswithjunctiontemperature.
16VoltageinputlevelsarerelevantonlyifdrivingXTALinputfromavoltagesource.
Ifacrystalisconnecteddirectly,theinternalcrystalinterfacedeterminesthecommon-modevoltage.
17TypicaladditionalsupplycurrentconsumedduringFlash/EEmemoryprogramanderasecyclesis7mA.
18TotalIDDforADCincludesfiguresforPGA≥32,inputbuffers,digitalinterface,andtheΣ-Δmodulator.
DataSheetADuCM360/ADuCM361Rev.
D|Page11of24RMSNOISERESOLUTIONOFADC0ANDADC1InternalReference(1.
2V)Table2throughTable5providermsnoisespecificationsforADC0andADC1usingtheinternalreference(1.
2V).
Table2andTable3listthermsnoiseforbothADCswithvariousgainandoutputupdateratevalues.
Table4andTable5listthetypicaloutputrmsnoiseeffectivenumberofbits(ENOB)innormalmodeforbothADCswithvariousgainandoutputupdateratevalues.
(Peak-to-peakENOBisshowninparentheses.
)Theseresultsaretakenwiththeinputbuffersoff.
Table2.
RMSNoisevs.
GainandOutputUpdateRate,InternalReference(1.
2V),Gain=1,2,4,8,and16RMSNoise(V)UpdateRate(Hz)Chop/SincADCFLTRegisterValueGain=1,±VREF,ADCxMDE=0x01Gain=2,±500mV,ADCxMDE=0x11Gain=4,±250mV,ADCxMDE=0x21Gain=8,±125mV,ADCxMDE=0x31Gain=16,±62.
5mV,ADCxMDE=0x413.
53On/Sinc30x8E7C1.
050.
450.
230.
1350.
07230Off/Sinc30x007E2.
11.
370.
630.
370.
2250Off/Sinc30x007D3.
71.
60.
830.
470.
29100Off/Sinc30x004D5.
452.
411.
130.
630.
38488Off/Sinc40x100F104.
72.
21.
30.
79976Off/Sinc40x100713.
56.
53.
31.
71.
11953Off/Sinc40x100319.
3104.
72.
61.
553906Off/Sinc40x100167.
03616.
68.
84.
9Table3.
RMSNoisevs.
GainandOutputUpdateRate,InternalReference(1.
2V),Gain=32,64,and128RMSNoise(V)UpdateRate(Hz)Chop/SincADCFLTRegisterValueGain=32,1±37.
5mV,ADCxMDE=0x49Gain=32,1,2±22.
18mV,ADCxMDE=0x51Gain=64,3±18.
75mV,ADCxMDE=0x59Gain=64,3,4±10.
3125mV,ADCxMDE=0x61Gain=128,5±9.
375mV,ADCxMDE=0x69Gain=128,5,6±3.
98mV,ADCxMDE=0x713.
53On/Sinc30x8E7C0.
0670.
0640.
0730.
0550.
0580.
05230Off/Sinc30x007E0.
2020.
20.
1960.
160.
1740.
15550Off/Sinc30x007D0.
240.
240.
250.
210.
210.
2100Off/Sinc30x004D0.
350.
320.
360.
270.
310.
25488Off/Sinc40x100F0.
70.
670.
710.
580.
620.
57976Off/Sinc40x10070.
990.
911.
010.
740.
830.
71953Off/Sinc40x10031.
781.
31.
481.
151.
251.
03906Off/Sinc40x10016.
442.
683.
591.
42.
21.
41ADCxMDE=0x49setsthePGAforagainof16withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x51setsthePGAforagainof32withthemodulatorgainoff.
ADCxMDE=0x49hasslightlyhighernoisebutsupportsawiderinputrange.
2IfAVDD<2.
0VandADCxMDE=0x51,theinputrangeis±17.
5mV.
3ADCxMDE=0x59setsthePGAforagainof32withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x61setsthePGAforagainof64withthemodulatorgainoff.
ADCxMDE=0x59hasslightlyhighernoisebutsupportsawiderinputrange.
4IfAVDD<2.
0VandADCxMDE=0x61,theinputrangeis±8.
715mV.
5ADCxMDE=0x69setsthePGAforagainof64withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x71setsthePGAforagainof128withthemodulatorgainoff.
ADCxMDE=0x69hasslightlyhighernoisebutsupportsawiderinputrange.
6IfAVDD<2.
0VandADCxMDE=0x71,theinputrangeis±3.
828mV.
ADuCM360/ADuCM361DataSheetRev.
D|Page12of24Table4.
TypicalOutputRMSNoiseEffectiveNumberofBitsinNormalMode,InternalReference(1.
2V),Gain=1,2,4,8,and16EffectiveNumberofBits(ENOB)byInputVoltageRangeandGain1UpdateRate(Hz)Chop/SincGain=1,±VREF,ADCxMDE=0x01Gain=2,±500mV,ADCxMDE=0x11Gain=4,±250mV,ADCxMDE=0x21Gain=8,±125mV,ADCxMDE=0x31Gain=16,±62.
5mV,ADCxMDE=0x413.
53On/Sinc321.
1(18.
4p-p)21.
1(18.
4p-p)21.
1(18.
3p-p)20.
8(18.
1p-p)20.
7(18.
0p-p)30Off/Sinc320.
1(17.
4p-p)19.
5(16.
8p-p)19.
6(16.
9p-p)19.
4(16.
6p-p)19.
1(16.
4p-p)50Off/Sinc319.
3(16.
6p-p)19.
25(16.
5p-p)19.
2(16.
5p-p)19.
0(16.
3p-p)18.
7(16.
0p-p)100Off/Sinc318.
7(16.
0p-p)18.
66(15.
9p-p)18.
75(16.
0p-p)18.
6(15.
9p-p)18.
3(15.
6p-p)488Off/Sinc417.
9(15.
2p-p)17.
7(15.
0p-p)17.
8(15.
1p-p)17.
55(14.
8p-p)17.
3(14.
5p-p)976Off/Sinc417.
4(14.
7p-p)17.
2(14.
5p-p)17.
2(14.
5p-p)17.
2(14.
4p-p)16.
8(14.
1p-p)1953Off/Sinc416.
9(14.
2p-p)16.
6(13.
9p-p)16.
7(14.
0p-p)16.
55(13.
8p-p)16.
3(13.
6p-p)3906Off/Sinc415.
1(12.
4p-p)14.
8(12.
0p-p)14.
9(12.
2p-p)14.
8(12.
1p-p)14.
6(11.
9p-p)1RMSbitsarecalculatedasfollows:log2((2*InputRange)/RMSNoise);peak-to-peak(p-p)bitsarecalculatedasfollows:log2((2*InputRange)/(6.
6*RMSNoise)).
Table5.
TypicalOutputRMSNoiseEffectiveNumberofBitsinNormalMode,InternalReference(1.
2V),Gain=32,64,and128EffectiveNumberofBits(ENOB)byInputVoltageRangeandGain1UpdateRate(Hz)Chop/SincGain=32,±37.
5mV,ADCxMDE=0x49Gain=32,±22.
18mV,ADCxMDE=0x51Gain=64,±18.
75mV,ADCxMDE=0x59Gain=64,±10.
3125mV,ADCxMDE=0x61Gain=128,±9.
375mV,ADCxMDE=0x69Gain=128,±3.
98mV,ADCxMDE=0x713.
53On/Sinc319.
8(17.
1p-p)19.
4(16.
7p-p)18.
7(16.
0p-p)18.
5(15.
8p-p)18.
0(15.
3p-p)17.
2(14.
5p-p)30Off/Sinc318.
2(15.
5p-p)17.
75(15.
0p-p)17.
3(14.
6p-p)17.
0(14.
25p-p)16.
45(13.
7p-p)15.
6(12.
9p-p)50Off/Sinc318.
0(15.
2p-p)17.
5(14.
8p-p)16.
93(14.
2p-p)16.
6(13.
86p-p)16.
2(13.
5p-p)15.
3(12.
55p-p)100Off/Sinc317.
4(14.
7p-p)17.
1(14.
35p-p)16.
4(13.
7p-p)16.
2(13.
5p-p)15.
6(12.
9p-p)15.
0(12.
2p-p)488Off/Sinc416.
4(13.
7p-p)16.
0(13.
3p-p)15.
4(12.
7p-p)15.
1(12.
4p-p)14.
6(11.
9p-p)13.
8(11.
0p-p)976Off/Sinc415.
9(13.
2p-p)15.
6(12.
85p-p)14.
91(12.
2p-p)14.
8(12.
0p-p)14.
2(11.
5p-p)13.
4(10.
75p-p)1953Off/Sinc415.
1(12.
4p-p)15.
05(12.
3p-p)14.
4(11.
6p-p)14.
1(11.
4p-p)13.
6(10.
9p-p)13.
0(10.
2p-p)3906Off/Sinc413.
2(10.
5p-p)14.
0(11.
3p-p)13.
1(10.
4p-p)13.
8(11.
1p-p)12.
8(10.
1p-p)12.
5(9.
75p-p)1RMSbitsarecalculatedasfollows:log2((2*InputRange)/RMSNoise);peak-to-peak(p-p)bitsarecalculatedasfollows:log2((2*InputRange)/(6.
6*RMSNoise)).
DataSheetADuCM360/ADuCM361Rev.
D|Page13of24ExternalReference(2.
5V)Table6throughTable9providermsnoisespecificationsforADC0andADC1usingtheexternalreference(2.
5V).
Table6andTable7listthermsnoiseforbothADCswithvariousgainandoutputupdateratevalues.
Table8andTable9listthetypicaloutputrmsnoiseeffectivenumberofbits(ENOB)innormalmodeforbothADCswithvariousgainandoutputupdateratevalues.
(Peak-to-peakENOBisshowninparentheses.
)Theseresultsaretakenwiththeinputbuffersoff.
Table6.
RMSNoisevs.
GainandOutputUpdateRate,ExternalReference(2.
5V),Gain=1,2,4,8,and16RMSNoise(V)UpdateRate(Hz)Chop/SincADCFLTRegisterValueGain=1,±VREF,ADCxMDE=0x01Gain=2,±500mV,ADCxMDE=0x11Gain=4,±250mV,ADCxMDE=0x21Gain=8,±125mV,ADCxMDE=0x31Gain=16,±62.
5mV,ADCxMDE=0x413.
53On/Sinc30x8E7C1.
10.
50.
270.
170.
08830Off/Sinc30x007E31.
40.
850.
440.
2750Off/Sinc30x007D3.
92.
20.
920.
460.
3100Off/Sinc30x004D5.
22.
81.
250.
630.
38488Off/Sinc40x100F9.
35.
02.
51.
20.
75976Off/Sinc40x100712.
573.
51.
751.
21953Off/Sinc40x100320.
0105.
72.
61.
713906Off/Sinc40x1001140.
070.
035.
017.
28.
9Table7.
RMSNoisevs.
GainandOutputUpdateRate,ExternalReference(2.
5V),Gain=32,64,and128RMSNoise(V)UpdateRate(Hz)Chop/SincADCFLTRegisterValueGain=32,1±62.
5mV,ADCxMDE=0x49Gain=32,1,2±22.
18mV,ADCxMDE=0x51Gain=64,3±22.
18mV,ADCxMDE=0x59Gain=64,3,4±10.
3125mV,ADCxMDE=0x61Gain=128,5±10.
3125mV,ADCxMDE=0x69Gain=128,5,6±3.
98mV,ADCxMDE=0x713.
53On/Sinc30x8E7C0.
0760.
070.
0880.
060.
0680.
05830Off/Sinc30x007E0.
210.
220.
210.
190.
1750.
1750Off/Sinc30x007D0.
2650.
210.
270.
20.
2250.
19100Off/Sinc30x004D0.
370.
320.
3660.
280.
320.
26488Off/Sinc40x100F0.
730.
70.
730.
570.
640.
5976Off/Sinc40x10071.
10.
831.
010.
770.
890.
751953Off/Sinc40x10032.
051.
31.
61.
241.
31.
13906Off/Sinc40x10019.
44.
85.
12.
653.
21.
881ADCxMDE=0x49setsthePGAforagainof16withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x51setsthePGAforagainof32withthemodulatorgainoff.
ADCxMDE=0x49hasslightlyhighernoisebutsupportsawiderinputrange.
2IfAVDD<2.
0VandADCxMDE=0x51,theinputrangeis±17.
5mV.
3ADCxMDE=0x59setsthePGAforagainof32withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x61setsthePGAforagainof64withthemodulatorgainoff.
ADCxMDE=0x59hasslightlyhighernoisebutsupportsawiderinputrange.
4IfAVDD<2.
0VandADCxMDE=0x61,theinputrangeis±8.
715mV.
5ADCxMDE=0x69setsthePGAforagainof64withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x71setsthePGAforagainof128withthemodulatorgainoff.
ADCxMDE=0x69hasslightlyhighernoisebutsupportsawiderinputrange.
6IfAVDD<2.
0VandADCxMDE=0x71,theinputrangeis±3.
828mV.
ADuCM360/ADuCM361DataSheetRev.
D|Page14of24Table8.
TypicalOutputRMSNoiseEffectiveNumberofBitsinNormalMode,ExternalReference(2.
5V),Gain=1,2,4,8,and16EffectiveNumberofBits(ENOB)byInputVoltageRangeandGain1UpdateRate(Hz)Chop/SincGain=1,±VREF,ADCxMDE=0x01Gain=2,±500mV,ADCxMDE=0x11Gain=4,±250mV,ADCxMDE=0x21Gain=8,±125mV,ADCxMDE=0x31Gain=16,±62.
5mV,ADCxMDE=0x413.
53On/Sinc322.
1(19.
4p-p)20.
9(18.
2p-p)20.
8(18.
1p-p)20.
5(17.
7p-p)20.
43(17.
7p-p)30Off/Sinc320.
7(18.
0p-p)19.
4(16.
7p-p)19.
2(16.
4p-p)19.
1(16.
4p-p)18.
82(16.
1p-p)50Off/Sinc320.
3(17.
6p-p)18.
8(16.
1p-p)19.
05(16.
3p-p)19.
05(16.
3p-p)18.
66(15.
9p-p)100Off/Sinc319.
9(17.
2p-p)18.
4(15.
7p-p)18.
6(15.
9p-p)18.
6(15.
9p-p)18.
32(15.
6p-p)488Off/Sinc419.
0(16.
3p-p)17.
6(14.
9p-p)17.
6(14.
9p-p)17.
7(14.
9p-p)17.
34(14.
6p-p)976Off/Sinc418.
6(15.
9p-p)17.
1(14.
4p-p)17.
1(14.
4p-p)17.
1(14.
4p-p)16.
66(13.
9p-p)1953Off/Sinc417.
9(15.
2p-p)16.
6(13.
9p-p)16.
4(13.
7p-p)16.
55(13.
8p-p)16.
15(13.
4p-p)3906Off/Sinc415.
1(12.
4p-p)13.
8(11.
1p-p)13.
8(11.
1p-p)13.
8(11.
1p-p)13.
77(11.
05p-p)1RMSbitsarecalculatedasfollows:log2((2*InputRange)/RMSNoise);peak-to-peak(p-p)bitsarecalculatedasfollows:log2((2*InputRange)/(6.
6*RMSNoise)).
Table9.
TypicalOutputRMSNoiseEffectiveNumberofBitsinNormalMode,ExternalReference(2.
5V),Gain=32,64,and128EffectiveNumberofBits(ENOB)byInputVoltageRangeandGain1UpdateRate(Hz)Chop/SincGain=32,±62.
5mV,ADCxMDE=0x49Gain=32,±22.
18mV,ADCxMDE=0x51Gain=64,±22.
18mV,ADCxMDE=0x59Gain=64,±10.
3125mV,ADCxMDE=0x61Gain=128,±10.
3125mV,ADCxMDE=0x69Gain=128,±3.
98mV,ADCxMDE=0x713.
53On/Sinc319.
6(16.
9p-p)19.
3(16.
55p-p)18.
4(15.
7p-p)18.
4(15.
7p-p)17.
8(15.
1p-p)17.
1(14.
3p-p)30Off/Sinc318.
2(15.
5p-p)17.
6(14.
9p-p)17.
2(14.
5p-p)16.
7(14.
0p-p)16.
4(13.
7p-p)15.
5(12.
8p-p)50Off/Sinc317.
8(15.
1p-p)17.
7(15.
0p-p)16.
8(14.
1p-p)16.
65(13.
9p-p)16.
1(13.
4p-p)15.
35(12.
6p-p)100Off/Sinc317.
4(14.
6p-p)17.
1(14.
35p-p)16.
4(13.
7p-p)16.
2(13.
4p-p)15.
6(12.
85p-p)14.
9(12.
2p-p)488Off/Sinc416.
4(13.
7p-p)16.
0(13.
2p-p)15.
4(12.
7p-p)15.
1(12.
4p-p)14.
6(11.
85p-p)14.
0(11.
2p-p)976Off/Sinc415.
8(13.
1p-p)15.
7(13.
0p-p)14.
9(12.
2p-p)14.
7(12.
0p-p)14.
1(11.
4p-p)13.
4(10.
6p-p)1953Off/Sinc414.
9(12.
1p-p)15.
1(12.
3p-p)14.
25(11.
5p-p)14.
0(11.
3p-p)13.
55(10.
8p-p)12.
8(10.
1p-p)3906Off/Sinc412.
7(10.
0p-p)13.
2(10.
4p-p)12.
6(9.
9p-p)12.
9(10.
2p-p)12.
25(9.
5p-p)12.
0(9.
3p-p)1RMSbitsarecalculatedasfollows:log2((2*InputRange)/RMSNoise);peak-to-peak(p-p)bitsarecalculatedasfollows:log2((2*InputRange)/(6.
6*RMSNoise)).
DataSheetADuCM360/ADuCM361Rev.
D|Page15of24I2CTIMINGSPECIFICATIONSThecapacitiveloadforeachI2Cbusline(CB)is400pFmaximumaspertheI2Cbusspecifications.
I2Ctimingisguaranteedbydesign,butisnotproductiontested.
Table10.
I2CTiminginFastMode(400kHz)ParameterDescriptionMinMaxUnittLSerialclock(SCL)lowpulsewidth1300nstHSCLhighpulsewidth600nstSHDStartconditionholdtime600nstDSUDatasetuptime100nstDHDDataholdtime0nstRSUSetuptimeforrepeatedstart600nstPSUStopconditionsetuptime600nstBUFBusfreetimebetweenastopconditionandastartcondition1.
3stRRisetimeforbothSCLandserialdata(SDA)20+0.
1CB300nstFFalltimeforbothSCLandSDA20+0.
1CB300nstSUPPulsewidthofsuppressedspike050nsTable11.
I2CTiminginStandardMode(100kHz)ParameterDescriptionMinMaxUnittLSCLlowpulsewidth4.
7μstHSCLhighpulsewidth4.
0nstSHDStartconditionholdtime4.
7μstDSUDatasetuptime250nstDHDDataholdtime0μstRSUSetuptimeforrepeatedstart4.
0μstPSUStopconditionsetuptime4.
0μstBUFBusfreetimebetweenastopconditionandastartcondition4.
7μstRRisetimeforbothSCLandSDA1μstFFalltimeforbothSCLandSDA300nsSDA(I/O)tBUFMSBLSBACKMSB1981SCL(I)PSSTOPCONDITIONSTARTCONDITIONS(R)REPEATEDSTARTtSUPtRtFtFtRtHtLtSUPtDSUtDHDtRSUtDHDtDSUtSHDtPSU09743-002Figure3.
I2C-CompatibleInterfaceTimingADuCM360/ADuCM361DataSheetRev.
D|Page16of24SPITIMINGSPECIFICATIONSTable12.
SPIMasterModeTimingParameterDescriptionMinTypMaxUnittSLSCLKlowpulsewidth1(SPIDIV+1)*tUCLKnstSHSCLKhighpulsewidth1(SPIDIV+1)*tUCLKnstDAVDataoutputvalidafterSCLKedge035.
5nstDOSUDataoutputsetuptimebeforeSCLKedge1(SPIDIV+1)*tUCLKnstDSUDatainputsetuptimebeforeSCLKedge58.
7nstDHDDatainputholdtimeafterSCLKedge16nstDFDataoutputfalltime1235.
5nstDRDataoutputrisetime1235.
5nstSRSCLKrisetime1235.
5nstSFSCLKfalltime1235.
5ns1tUCLK=62.
5ns.
Itcorrespondstotheinternal16MHzclockbeforetheclockdivider.
SCLK(POLARITY=0)CS1/2SCLKCYCLESCLK(POLARITY=1)MOSIMSBBIT6TOBIT1LSBMISOMSBINBIT6TOBIT1LSBINtSHtCStSL3/4SCLKCYCLEtSFStSRtSFtDRtDFtDAVtDSUtDHD09743-003Figure4.
SPIMasterModeTiming(PhaseMode=1)SCLK(POLARITY=0)SCLK(POLARITY=1)MOSIMSBBIT6TOBIT1LSBMISOMSBINBIT6TOBIT1LSBINtSHtSRtSFtDRtDFtDAVtDOSUtDSUtDHDCS1SCLKCYCLEtCStSL1SCLKCYCLEtSFS09743-004Figure5.
SPIMasterModeTiming(PhaseMode=0)DataSheetADuCM360/ADuCM361Rev.
D|Page17of24Table13.
SPISlaveModeTimingParameterDescriptionMinTypMaxUnittCSCStoSCLKedge62.
5nstSLSCLKlowpulsewidth1(SPIDIV+1)*tUCLKnstSHSCLKhighpulsewidth162.
5(SPIDIV+1)*tUCLKnstDAVDataoutputvalidafterSCLKedge49.
1nstDSUDatainputsetuptimebeforeSCLKedge20.
2nstDHDDatainputholdtimeafterSCLKedge10.
1nstDFDataoutputfalltime1235.
5nstDRDataoutputrisetime1235.
5nstSRSCLKrisetime1235.
5nstSFSCLKfalltime1235.
5nstDOCSDataoutputvalidafterCSedge25nstSFSCShighafterSCLKedge0ns1tUCLK=62.
5ns.
Itcorrespondstotheinternal16MHzclockbeforetheclockdivider.
SCLK(POLARITY=0)CSSCLK(POLARITY=1)tSHtSLtSRtSFtSFSMISOMSBBIT6TOBIT1LSBMOSIMSBINBIT6TOBIT1LSBINtDHDtDSUtDAVtDRtDFtCS09743-005Figure6.
SPISlaveModeTiming(PhaseMode=1)SCLK(POLARITY=0)CSSCLK(POLARITY=1)tSHtSLtSRtSFtSFSMISOMSBBIT6TOBIT1LSBMOSIMSBINBIT6TOBIT1LSBINtDHDtDSUtDAVtDRtDFtDOCStCS09743-006Figure7.
SPISlaveModeTiming(PhaseMode=0)ADuCM360/ADuCM361DataSheetRev.
D|Page18of24ABSOLUTEMAXIMUMRATINGSTable14.
ParameterRatingAVDDtoAGND0.
3Vto+3.
96VIOVDDtoDGND0.
3Vto+3.
96VAGNDtoDGND0.
3Vto+0.
3VAVDDtoDVDD0.
3Vto+0.
3VDigitalInputVoltagetoDGND0.
3Vto+3.
96VDigitalOutputVoltagetoDGND0.
3Vto+3.
96VAnalogInputstoAGND0.
3Vto+3.
96VOperatingTemperatureRange40°Cto+125°CStorageTemperatureRange65°Cto+150°CJunctionTemperature150°CESDRating,AllPinsHumanBodyModel(HBM)±2kVField-InducedChargedDeviceModel(FICDM)±1kVPeakSolderReflowTemperatureSnPbAssemblies(10secto30sec)240°CPb-FreeAssemblies(20secto40sec)260°CStressesatorabovethoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetotheproduct.
Thisisastressratingonly;functionaloperationoftheproductattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionofthisspecificationisnotimplied.
Operationbeyondthemaximumoperatingconditionsforextendedperiodsmayaffectproductreliability.
THERMALRESISTANCEθJAisspecifiedfortheworst-caseconditions,thatis,adevicesolderedinacircuitboardforsurface-mountpackages.
Table15.
ThermalResistancePackageTypeθJAUnit48-LeadLFCSP_WQ27°C/WESDCAUTIONDataSheetADuCM360/ADuCM361Rev.
D|Page19of24PINCONFIGURATIONANDFUNCTIONDESCRIPTIONS123P0.
7/POR/SOUTP0.
6/IRQ2/SINP0.
5/CTS/IRQ14P0.
4/RTS/ECLKO5P0.
3/IRQ0/CS16P0.
2/MOSI1/SDA/SOUT7P0.
1/SCLK1/SCL/SIN24AIN7/VBIAS0/IEXC/EXTREF2IN+23AIN6/IEXC22AIN5/IEXC21IREF20INT_REF19DAC18AVDD_REG17AVDD16AGND15VREF–14VREF+13GND_SW44P1.
6/IRQ6/PWM4/MOSI045P1.
7/IRQ7/PWM5/CS046P2.
0/SCL/UARTCLK47SWCLK48SWDIO43P1.
5/IRQ5/PWM3/SCLK042P1.
4/PWM2/MISO041P1.
3/PWM1/DSR40P1.
2/PWM0/RI39P1.
1/IRQ4/PWMTRIP/DTR38P1.
0/IRQ3/PWMSYNC/EXTCLK37IOVDDTOPVIEW(NottoScale)ADuCM360/ADuCM36125AIN4/IEXC26AIN327AIN228AIN129AIN030DVDD_REG31IOVDD32XTALI33XTALO34P2.
2/BM35P2.
1/SDA/UARTDCDNOTES1.
THELFCSPHASANEXPOSEDPADTHATMUSTBESOLDEREDTOAMETALPLATEONTHEPCBFORMECHANICALREASONSANDTODGND.
36RESET8P0.
0/MISO19AIN11/VBIAS110AIN1011AIN9/DACBUFF+12AIN8/EXTREF2IN–09743-007Figure8.
PinConfigurationTable16.
PinFunctionDescriptionsPinNo.
MnemonicDescription1RESETResetPin,ActiveLowInput.
Aninternalpull-upisprovided.
2P2.
1/SDA/UARTDCDGeneral-PurposeInput/OutputP2.
1/I2CSerialDataPin/UARTDataCarrierDetectPin.
3P2.
2/BMGeneral-PurposeInput/OutputP2.
2/BootModeInputSelectPin.
Whenthispinisheldlowduringandforashorttimeafteranyresetsequence,thepartentersUARTdownloadmode.
4XTALOExternalCrystalOscillatorOutputPin.
Optional32.
768kHzsourceforreal-timeclock.
5XTALIExternalCrystalOscillatorInputPin.
Optional32.
768kHzsourceforreal-timeclock.
6IOVDDDigitalSystemSupplyPin.
ThispinmustbeconnectedtoDGNDviaa0.
1Fcapacitor.
7DVDD_REGThispinmustbeconnectedtoDGNDviaa470nFcapacitorandtoPin18,AVDD_REG.
8AIN0ADCAnalogInput0.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
9AIN1ADCAnalogInput1.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
10AIN2ADCAnalogInput2.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
11AIN3ADCAnalogInput3.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
12AIN4/IEXCADCAnalogInput4/ExcitationCurrentSource.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN4).
ThispincanalsobeconfiguredastheoutputpinforExcitationCurrentSource0orExcitationCurrentSource1(IEXC).
13GND_SWSensorPowerSwitchtoAnalogGroundReference.
ADuCM360/ADuCM361DataSheetRev.
D|Page20of24PinNo.
MnemonicDescription14VREF+ExternalReferencePositiveInput.
AnexternalreferencecanbeappliedbetweentheVREF+andVREFpins.
15VREFExternalReferenceNegativeInput.
AnexternalreferencecanbeappliedbetweentheVREF+andVREFpins.
16AGNDAnalogSystemGroundReferencePin.
17AVDDAnalogSystemSupplyPin.
ThispinmustbeconnectedtoAGNDviaa0.
1Fcapacitor.
18AVDD_REGInternalAnalogRegulatorSupplyOutput.
ThispinmustbeconnectedtoAGNDviaa470nFcapacitorandtoPin7,DVDD_REG.
19DACDACVoltageOutput.
20INT_REFInternalReference.
Thispinmustbeconnectedtogroundviaa470nFdecouplingcapacitor.
21IREFOptionalReferenceCurrentResistorConnectionfortheExcitationCurrentSources.
Thereferencecurrentusedfortheexcitationcurrentsourcesissetbyalowdrift(5ppm/°C)externalresistorconnectedtothispin.
22AIN5/IEXCADCAnalogInput5/ExcitationCurrentSource.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN5).
ThispincanalsobeconfiguredastheoutputpinforExcitationCurrentSource0orExcitationCurrentSource1(IEXC).
23AIN6/IEXCADCAnalogInput6/ExcitationCurrentSource.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN6).
ThispincanalsobeconfiguredastheoutputpinforExcitationCurrentSource0orExcitationCurrentSource1(IEXC).
24AIN7/VBIAS0/IEXC/EXTREF2IN+ADCAnalogInput7/BiasVoltageOutput/ExcitationCurrentSource/ExternalReference2PositiveInput.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN7).
Thispincanalsobeconfiguredasananalogoutputpintogenerateabiasvoltage,VBIAS0ofAVDD_REG/2(VBIAS0);astheoutputpinforExcitationCurrentSource0orExcitationCurrentSource1(IEXC);orasthepositiveinputforExternalReference2(EXTREF2IN+).
25AIN8/EXTREF2INADCAnalogInput8/ExternalReference2NegativeInput.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN8).
ThispincanalsobeconfiguredasthenegativeinputforExternalReference2(EXTREF2IN).
26AIN9/DACBUFF+ADCAnalogInput9/NoninvertingInputtotheDACOutputBuffer.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN9).
ThispincanalsobeconfiguredasthenoninvertinginputtotheDACoutputbufferwhentheDACisconfiguredforNPNmode(DACBUFF+).
27AIN10ADCAnalogInput10.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
28AIN11/VBIAS1ADCAnalogInput11/BiasVoltageOutput.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN11).
Thispincanalsobeconfiguredasananalogoutputpintogenerateabiasvoltage,VBIAS1ofAVDD_REG/2(VBIAS1).
29P0.
0/MISO1General-PurposeInput/OutputP0.
0/SPI1MasterInput,SlaveOutputPin.
30P0.
1/SCLK1/SCL/SINGeneral-PurposeInput/OutputP0.
1/SPI1SerialClockPin/I2CSerialClockPin/UARTSerialInput(DataInputfortheUARTDownloader).
31P0.
2/MOSI1/SDA/SOUTGeneral-PurposeInput/OutputP0.
2/SPI1MasterOutput,SlaveInputPin/I2CSerialDataPin/UARTSerialOutput(DataOutputfortheUARTDownloader).
32P0.
3/IRQ0/CS1General-PurposeInput/OutputP0.
3/ExternalInterruptRequest0/SPI1ChipSelectPin(ActiveLow).
33P0.
4/RTS/ECLKOGeneral-PurposeInput/OutputP0.
4/UARTRequest-to-SendSignal/ExternalClockOutputPinforTestPurposes.
34P0.
5/CTS/IRQ1General-PurposeInput/OutputP0.
5/UARTClear-to-SendSignal/ExternalInterruptRequest1.
35P0.
6/IRQ2/SINGeneral-PurposeInput/OutputP0.
6/ExternalInterruptRequest2/UARTSerialInput.
NotusedbyUARTdownloader.
36P0.
7/POR/SOUTGeneral-PurposeInput/OutputP0.
7/Power-OnResetPin(ActiveHigh)/UARTSerialOutput.
NotusedbyUARTdownloader.
37IOVDDDigitalSystemSupplyPin.
ThispinmustbeconnectedtoDGNDviaa0.
1Fcapacitor.
38P1.
0/IRQ3/PWMSYNC/EXTCLKGeneral-PurposeInput/OutputP1.
0/ExternalInterruptRequest3/PWMExternalSynchronizationInput/ExternalClockInputPin.
39P1.
1/IRQ4/PWMTRIP/DTRGeneral-PurposeInput/OutputP1.
1/ExternalInterruptRequest4/PWMExternalTripInput/UARTDataTerminalReadyPin.
40P1.
2/PWM0/RIGeneral-PurposeInput/OutputP1.
2/PWM0Output/UARTRingIndicatorPin.
41P1.
3/PWM1/DSRGeneral-PurposeInput/OutputP1.
3/PWM1Output/UARTDataSetReadyPin.
42P1.
4/PWM2/MISO0General-PurposeInput/OutputP1.
4/PWM2Output/SPI0MasterInput,SlaveOutputPin.
DataSheetADuCM360/ADuCM361Rev.
D|Page21of24PinNo.
MnemonicDescription43P1.
5/IRQ5/PWM3/SCLK0General-PurposeInput/OutputP1.
5/ExternalInterruptRequest5/PWM3Output/SPI0SerialClockPin.
44P1.
6/IRQ6/PWM4/MOSI0General-PurposeInput/OutputP1.
6/ExternalInterruptRequest6/PWM4Output/SPI0MasterOutput,SlaveInputPin.
45P1.
7/IRQ7/PWM5/CS0General-PurposeInput/OutputP1.
7/ExternalInterruptRequest7/PWM5Output/SPI0ChipSelectPin(ActiveLow).
46P2.
0/SCL/UARTCLKGeneral-PurposeInput/OutputP2.
0/I2CSerialClockPin/InputClockPinforUARTBlockOnly.
47SWCLKSerialWireDebugClockInputPin.
48SWDIOSerialWireDebugDataInput/OutputPin.
EPExposedPad.
TheLFCSPhasanexposedpadthatmustbesolderedtoametalplateonthePCBformechanicalreasonsandtoDGND.
ADuCM360/ADuCM361DataSheetRev.
D|Page22of24TYPICALPERFORMANCECHARACTERISTICS6050403020INPUTCURRENT(nA)100–100.
51.
01.
5COMMON-MODEVOLTAGE(V)2.
02.
53.
03.
50–20–3009743-008IPIP–ININFigure9.
InputCurrentvs.
Common-ModeVoltage(VCM),Gain=4,ADCInput=250mV,AVDD=3.
6V,TA=25°C,VCM=((AIN+)+(AIN))/2543210INPUTCURRENT(nA)–1–2–30.
51.
01.
5COMMON-MODEVOLTAGE(V)2.
02.
53.
03.
50–4–509743-009IPIP–ININFigure10.
InputCurrentvs.
Common-ModeVoltage(VCM),Gain=128,ADCInput=7.
8125mV,AVDD=3.
6V,TA=25°C,VCM=((AIN+)+(AIN))/2–40–20020140000001200000010000000800000060000004000000200000040TEMPERATURE(°C)ADCCODES608010012009743-010Figure11.
ADCCodes(DecimalValues)vs.
DieTemperatureMeasurementsarefortheTemperatureSensorOnly050100150200250020040060080010001200SETTLINGTIME(ms)CAPACITANCE(nF)BOOST=0BOOST=3009743-011Figure12.
VBIASOutputSettlingTimevs.
LoadCapacitance,TA=25°C,IOVDDandAVDD=3.
3V05101520253000.
51.
01.
52.
02.
53.
03.
5PULL-UPRESISTANCE(k)VOLTAGE(V)09743-012Figure13.
DigitalInputPinPull-UpResistanceValuevs.
VoltageAppliedtoDigitalPin,TA=25°C,IOVDD=3.
4V010203040506000.
51.
01.
52.
0PULL-UPRESISTANCE(k)VOLTAGE(V)09743-013Figure14.
DigitalInputPinPull-UpResistanceValuevs.
VoltageAppliedtoDigitalPin,TA=25°C,IOVDD=1.
8VDataSheetADuCM360/ADuCM361Rev.
D|Page23of24TYPICALSYSTEMCONFIGURATIONFigure15showsatypicalADuCM360/ADuCM361configuration.
Thisfigureillustratessomeofthehardwareconsiderations.
ThebottomoftheLFCSPpackagehasanexposedpadthatmustbesolderedtoametalplateonthePCBformechanicalreasonsandtoDGND.
ThemetalplateofthePCBcanbeconnectedtoground.
The0.
47FcapacitorontheAVDD_REGandDVDD_REGpinsshouldbeplacedasclosetothepinsaspossible.
Innoisyenvironments,anadditional1nFcapacitorcanbeaddedtoIOVDDandAVDD.
123P0.
7/POR/SOUTP0.
6/IRQ2/SINP0.
5/CTS/IRQ14P0.
4/RTS/ECLKO5P0.
3/IRQ0/CS16P0.
2/MOSI1/SDA/SOUT7P0.
1/SCLK1/SCL/SIN24AIN7/VBIAS0/IEXC/EXTREF2IN+23AIN6/IEXC22AIN5/IEXC21IREF20INT_REF19DAC18AVDD_REG17AVDD16AGND12pF12pF15VREF–14VREF+13GND_SW44P1.
6/IRQ6/PWM4/MOSI045P1.
7/IRQ7/PWM5/CS046P2.
0/SCL/UARTCLK47SWCLK48SWDIOSWCLKSWDIO43P1.
5/IRQ5/PWM3/SCLK042P1.
4/PWM2/MISO041P1.
3/PWM1/DSR40P1.
2/PWM0/RI39P1.
1/IRQ4/PWMTRIP/DTR38P1.
0/IRQ3/PWMSYNC/EXTCLK37IOVDDADuCM36025AIN4/IEXC26AIN327AIN228AIN129AIN030DVDD_REGDVDDDGND31IOVDD32XTALI33XTALO34P2.
2/BM35P2.
1/SDA/UARTDCD36RESETRESETRESETRESET8P0.
0/MISO19AIN11/VBIAS110AIN1011AIN9/DACBUFF+12AIN8/EXTREF2IN–0.
47F0.
47F0.
1F150kGNDDGNDSWIOTXSWCLKRX5VUSBSWDIOINTERFACEBOARDCONNECTORSWCLKDVDDDGNDDGND0.
1FAVDD0.
47F0.
1F0.
1F1F0.
1F5601.
6INOUTENGNDDGNDDGNDDGNDAVDDDVDDAGNDAGNDAGND4.
7F4.
7FADP1720ARMZ-3.
309743-100DGNDFigure15.
TypicalSystemConfigurationADuCM360/ADuCM361DataSheetRev.
D|Page24of24OUTLINEDIMENSIONS112408-BFORPROPERCONNECTIONOFTHEEXPOSEDPAD,REFERTOTHEPINCONFIGURATIONANDFUNCTIONDESCRIPTIONSSECTIONOFTHISDATASHEET.
COMPLIANTTOJEDECSTANDARDSMO-220-WKKD.
10.
50BSCBOTTOMVIEWTOPVIEWPIN1INDICATOR7.
00BSCSQ48132425363712EXPOSEDPADPIN1INDICATOR5.
205.
10SQ5.
000.
450.
400.
35SEATINGPLANE0.
800.
750.
700.
05MAX0.
02NOM0.
25MIN0.
20REFCOPLANARITY0.
080.
300.
230.
18Figure16.
48-LeadLeadFrameChipScalePackage[LFCSP_WQ]7mm*7mmBody,VeryVeryThinQuad(CP-48-4)DimensionsshowninmillimetersORDERINGGUIDEModel1ADCsFlash/SRAMTemperatureRangePackageDescriptionPackageOptionOrderingQuantityADuCM360BCPZ128Dual24-Bit128kB/8kB40°Cto+125°C48-LeadLFCSP_WQCP-48-4ADuCM360BCPZ128-R7Dual24-Bit128kB/8kB40°Cto+125°C48-LeadLFCSP_WQCP-48-4750ADuCM361BCPZ128Single24-Bit128kB/8kB40°Cto+125°C48-LeadLFCSP_WQCP-48-4ADuCM361BCPZ128-R7Single24-Bit128kB/8kB40°Cto+125°C48-LeadLFCSP_WQCP-48-4750EVAL-ADuCM360QSPZADuCM360QuickStartPlusDevelopmentSystem1Z=RoHSCompliantPart.
I2CreferstoacommunicationsprotocoloriginallydevelopedbyPhilipsSemiconductors(nowNXPSemiconductors).
2012–2016AnalogDevices,Inc.
Allrightsreserved.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
D09743-0-6/16(D)
DDocumentFeedbackInformationfurnishedbyAnalogDevicesisbelievedtobeaccurateandreliable.
However,noresponsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorotherrightsofthirdpartiesthatmayresultfromitsuse.
Specificationssubjecttochangewithoutnotice.
NolicenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofAnalogDevices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
OneTechnologyWay,P.
O.
Box9106,Norwood,MA02062-9106,U.
S.
A.
Tel:781.
329.
47002012–2016AnalogDevices,Inc.
Allrightsreserved.
TechnicalSupportwww.
analog.
comFEATURESAnaloginput/outputDual24-bitADCs(ADuCM360)Single24-bitADC(ADuCM361)ProgrammableADCoutputrate(3.
5Hzto3.
906kHz)Simultaneous50Hz/60HznoiserejectionAt50SPScontinuousconversionmodeAt16.
67SPSsingleconversionmodeFlexibleinputmuxforinputchannelselectiontobothADCsTwo24-bitmultichannelADCs(ADC0andADC1)6differentialor12single-endedinputchannels4internalchannelsformonitoringDAC,temperaturesensor,IOVDD/4,andAVDD/4(ADC1only)Programmablegain(1to128)RMSnoise:52nVat3.
53Hz,200nVat50HzProgrammablesensorexcitationcurrentsourcesOn-chipprecisionvoltagereferenceSingle12-bitvoltageoutputDACNPNmodefor4mAto20mAloopapplicationsMicrocontrollerARMCortex-M332-bitprocessorSerialwiredownloadanddebugInternalwatchcrystalforwake-uptimer16MHzoscillatorwith8-wayprogrammabledividerMemory128kBFlash/EEmemory,8kBSRAMIn-circuitdebug/downloadviaserialwireandUARTPowersupplyrange:1.
8Vto3.
6V(maximum)Powerconsumption,MCUactivemodeCoreconsumes290A/MHzOverallsystemcurrentconsumptionof1.
0mAwithcoreoperatingat500kHz(bothADCson,inputbuffersoff,PGAgainof4,oneSPIporton,andalltimerson)Powerconsumption,power-downmode:4A(wake-uptimeractive)On-chipperipheralsUART,I2C,and2*SPIserialI/O16-bitPWMcontroller19-pinmultifunctionGPIOport2general-purposetimersWake-uptimer/watchdogtimerMultichannelDMAandinterruptcontrollerPackageandtemperaturerange48-lead,7mm*7mmLFCSPSpecifiedfor40°Cto+125°CoperationDevelopmenttoolsLowcostQuickStartDevelopmentSystemThird-partycompilerandemulatortoolsupportMultiplefunctionalsafetyfeaturesforimproveddiagnosticsAPPLICATIONSIndustrialautomationandprocesscontrolIntelligentprecisionsensingsystems4mAto20mAloop-poweredsmartsensorsystemsMedicaldevices,patientmonitoringADuCM360/ADuCM361DataSheetRev.
D|Page2of24TABLEOFCONTENTSFeatures1Applications.
1RevisionHistory2GeneralDescription.
3FunctionalBlockDiagrams.
4Specifications.
6MicrocontrollerElectricalSpecifications.
6RMSNoiseResolutionofADC0andADC1.
11I2CTimingSpecifications.
15SPITimingSpecifications16AbsoluteMaximumRatings18ThermalResistance.
18ESDCaution.
18PinConfigurationandFunctionDescriptions.
19TypicalPerformanceCharacteristics.
22TypicalSystemConfiguration23OutlineDimensions.
24OrderingGuide24REVISIONHISTORY6/2016—Rev.
CtoRev.
DChangetoFeaturesSection.
1AddedNote12andNote13,Table16ChangetoInternalReference(1.
2V)Section,Table2,andTable311ChangestoExternalReference(2.
5V)Section,Table6,andTable713ChangetoHumanBodyModelParameter,Table1418ChangestoFigure15.
2310/2014—Rev.
BtoRev.
CChangestoTable1.
6ChangestoTable3.
11ChangestoTable5.
12ChangestoTable7.
13ChangestoTable9.
14ChangestoTable14.
18ChangestoPin35andPin36Descriptions;Table1620ChangestoFigure11.
227/2013—Rev.
AtoRev.
BChangestoFeaturesSectionandGeneralDescriptionSection.
.
.
.
.
.
.
3ChangestoFigure1.
4AddedFigure2,RenumberedSequentially5ChangestoTable1.
6ChangestoTable2andTable310ChangestoTable4andTable511ChangestoTable6andTable712ChangestoTable8andTable913ChangestoTable1617ChangestoFigure14.
2111/2012—Rev.
0toRev.
AChangestoPin35andPin36inTable16.
189/2012—Revision0:InitialVersionDataSheetADuCM360/ADuCM361Rev.
D|Page3of24GENERALDESCRIPTIONTheADuCM360isafullyintegrated,3.
9kSPS,24-bitdataacquisitionsystemthatincorporatesdualhighperformance,multichannelsigma-delta(Σ-Δ)analog-to-digitalconverters(ADCs),a32-bitARMCortex-M3processor,andFlash/EEmemoryonasinglechip.
TheADuCM360isdesignedfordirectinterfacingtoexternalprecisionsensorsinbothwiredandbattery-poweredapplications.
TheADuCM361containsallthefeaturesoftheADuCM360exceptthatonlyone24-bitΣ-ΔADC(ADC1)isavailable.
TheADuCM360/ADuCM361containanon-chip32kHzoscillatorandaninternal16MHzhighfrequencyoscillator.
Thehighfrequencyoscillatorisroutedthroughaprogrammableclockdividerfromwhichtheoperatingfrequencyoftheprocessorcoreclockisgenerated.
Themaximumcoreclockspeedis16MHz;thisspeedisnotlimitedbyoperatingvoltageortemperature.
ThemicrocontrollercoreisalowpowerARMCortex-M3processor,a32-bitRISCmachinethatoffersupto20MIPSpeakperformance.
TheCortex-M3processorincorporatesaflexible,11-channelDMAcontrollerthatsupportsallwiredcommunica-tionperipherals(SPI,UART,andI2C).
Alsointegratedonchipare128kBofnonvolatileFlash/EEmemoryand8kBofSRAM.
TheanalogsubsystemconsistsofdualADCs,eachconnectedtoaflexibleinputmux.
BothADCscanoperateinfullydifferentialandsingle-endedmodes.
Otheron-chipADCfeaturesincludedualprogrammableexcitationcurrentsources,diagnosticcurrentsources,andabiasvoltagegeneratorofAVDD_REG/2(900mV)tosetthecommon-modevoltageofaninputchannel.
Alow-sideinternalgroundswitchisprovidedtoallowpower-downofanexternalcircuit(forexample,abridgecircuit)betweenconversions.
TheADCscontaintwoparallelfilters:asinc3orsinc4filterinparallelwithasinc2filter.
Thesinc3orsinc4filterisusedforprecisionmeasurements.
Thesinc2filterisusedforfastmeasure-mentsandforthedetectionofstepchangesintheinputsignal.
Thedevicescontainalownoise,lowdriftinternalbandgapref-erence,buttheycanbeconfiguredtoacceptoneortwoexternalreferencesourcesinratiometricmeasurementconfigurations.
Anoptiontobuffertheexternalreferenceinputsisprovidedonchip.
Asingle-channelbufferedvoltageoutputDACisalsoprovidedonchip.
TheADuCM360/ADuCM361integratearangeofon-chipperipherals,whichcanbeconfiguredundermicrocontrollersoftwarecontrolasrequiredintheapplication.
TheperipheralsincludeUART,I2C,anddualSPIserialI/Ocommunicationcontrollers;a19-pinGPIOport;twogeneral-purposetimers;awake-uptimer;andasystemwatchdogtimer.
A16-bitPWMcontrollerwithsixoutputchannelsisalsoprovided.
TheADuCM360/ADuCM361arespecificallydesignedtooperateinbattery-poweredapplicationswherelowpoweroperationiscritical.
Themicrocontrollercorecanbeconfiguredinanormaloperatingmodethatconsumes290μA/MHz(includingflash/SRAMIDD).
Anoverallsystemcurrentconsumptionof1mAcanbeachievedwithbothADCson(inputbuffersoff),PGAgainof4,oneSPIporton,andalltimerson.
TheADuCM360/ADuCM361canbeconfiguredinanumberoflowpoweroperatingmodesunderdirectprogramcontrol,includingahibernatemode(internalwake-uptimeractive)thatconsumesonly4A.
Inhibernatemode,peripheralssuchasexternalinterruptsortheinternalwake-uptimercanwakeupthedevice.
Thismodeallowstheparttooperatewithultralowpowerandstillrespondtoasynchronousexternalorperiodicevents.
On-chipfactoryfirmwaresupportsin-circuitserialdownloadviaaserialwireinterface(2-pinJTAGsystem)andUART;non-intrusiveemulationisalsosupportedviatheserialwireinterface.
ThesefeaturesareincorporatedintoalowcostQuickStartDevelopmentSystemthatsupportsthisprecisionanalogmicro-controllerfamily.
Thepartsoperatefromanexternal1.
8Vto3.
6Vvoltagesupplyandarespecifiedoveranindustrialtemperaturerangeof40°Cto+125°C.
MoreinformationontheADuCM360/ADuCM361,seetheUG-367userguide.
ADuCM360/ADuCM361DataSheetRev.
D|Page4of24FUNCTIONALBLOCKDIAGRAMSΣ-ΔMODULATOR24-BITΣ-ΔADCVREFAIN0DAC,TEMP,IOVDD/4,AVDD/4SINC3/4FILTER12-BITDACSINC2FILTERON-CHIP1.
8VANALOGLDOON-CHIP1.
8VDIGITALLDOPOWER-ONRESETON-CHIPOSCILLATOR(1%TYP)16MHzGPIOPORTSUARTPORTS2*SPIPORTSI2CPORTS19GENERAL-PURPOSEI/OPORTSMEMORY128kBFLASH8kBSRAMDMAANDINTERRUPTCONTROLLERTIMER0TIMER1WATCHDOGWAKE-UPTIMERPWMSERIALWIREDEBUG,PROGRAMMINGANDDEBUGARMCORTEX-M3PROCESSOR16MHzVBIASGENERATORPRECISIONREFERENCEADuCM360BUFFERBUFFERBUFFERSELECTABLEVREFSOURCESCURRENTSOURCESAIN1AIN2DACRESETXTALOXTALISWDIOSWCLKDVDD_REGAVDD_REGAVDDAGNDAIN3AIN4/IEXCAIN5/IEXCAIN6/IEXCAIN7/VBIAS0/IEXC/EXTREF2IN+AIN8/EXTREF2IN–AIN9/DACBUFF+AIN10AIN11/VBIAS1IREFGND_SWVREF–INT_REFIOVDDIOVDDVREF+09743-001AMPMOD2GAINΣ-ΔMODULATOR24-BITΣ-ΔADCVREFSINC3/4FILTERAMPMOD2GAINBUFBUFMUXFigure1.
ADuCM360FunctionalBlockDiagramDataSheetADuCM360/ADuCM361Rev.
D|Page5of24AIN0DAC,TEMP,IOVDD/4,AVDD/412-BITDACSINC2FILTERON-CHIP1.
8VANALOGLDOON-CHIP1.
8VDIGITALLDOPOWER-ONRESETON-CHIPOSCILLATOR(1%TYP)16MHzGPIOPORTSUARTPORTS2*SPIPORTSI2CPORTS19GENERAL-PURPOSEI/OPORTSMEMORY128kBFLASH8kBSRAMDMAANDINTERRUPTCONTROLLERTIMER0TIMER1WATCHDOGWAKE-UPTIMERPWMSERIALWIREDEBUG,PROGRAMMINGANDDEBUGARMCORTEX-M3PROCESSOR16MHzVBIASGENERATORPRECISIONREFERENCEADuCM361BUFFERBUFFERBUFFERSELECTABLEVREFSOURCESCURRENTSOURCESAIN1AIN2DACRESETXTALOXTALISWDIOSWCLKDVDD_REGAVDD_REGAVDDAGNDAIN3AIN4/IEXCAIN5/IEXCAIN6/IEXCAIN7/VBIAS0/IEXC/EXTREF2IN+AIN8/EXTREF2IN–AIN9/DACBUFF+AIN10AIN11/VBIAS1IREFGND_SWVREF–INT_REFIOVDDIOVDDVREF+09743-014Σ-ΔMODULATOR24-BITΣ-ΔADCVREFSINC3/4FILTERAMPMOD2GAINBUFMUXFigure2.
ADuCM361FunctionalBlockDiagramADuCM360/ADuCM361DataSheetRev.
D|Page6of24SPECIFICATIONSMICROCONTROLLERELECTRICALSPECIFICATIONSAVDD/IOVDD=1.
8Vto3.
6V.
ThedifferencebetweenAVDDandIOVDDmustbe≤0.
3V.
Internal1.
2Vreference,fCORE=16MHz,allspecificationsatTA=40°Cto+125°C,unlessotherwisenoted.
Table1.
ParameterTestConditions/CommentsMinTypMaxUnitADCSPECIFICATIONSADC0andADC1ConversionRate1Chopoff3.
53906HzChopon3.
51302HzNoMissingCodes1Chopoff,fADC≤500Hz24BitsChopon,fADC≤250Hz24BitsRMSNoiseandDataOutputRatesSeeTable2throughTable9IntegralNonlinearity1Gain=1,inputbufferoff±10ppmofFSRGain=2,4,8,or16±15ppmofFSRGain=32,64,or128±20ppmofFSROffsetError2,3,4,6,7Chopoff;offseterrorisintheorderofthenoisefortheprogrammedgainandupdateratefollowingcalibration±100/gainμVChopon1±1.
0μVOffsetErrorDriftvs.
Temperature1,4,6Chopoff,gain≤41/gainμV/°CChopoff,gain≥8230nV/°CChopon10nV/°COffsetErrorLifetimeStability5Gain=1281μV/1000HrFull-ScaleError1,4,6,7,8±0.
5/gainmVFull-ScaleErrorLifetimeStability5Gain=128±25μV/1000HrGainErrorDriftvs.
Temperature1,4,6ExternalreferenceGain=1,2,4,8,or16±3ppm/°CGain=32,64,or128±6ppm/°CPGAGainMismatchError±0.
15%PowerSupplyRejection1ExternalreferenceChopon,ADCinput=0.
25V,gain=495dBChopoff,ADCinput=7.
8mV,gain=12880dBChopoff,ADCinput=1V,gain=190dBAbsoluteInputVoltageRangeUnbufferedModeAGNDAVDDVBufferedModeGain=1isnotavailable;seetheinfor-mationaboutsiliconanomaliesontheADuCM360/ADuCM361productpageGain≥2AGND+0.
1AVDD0.
1VDifferentialInputVoltageRanges1Forgain=32,64,and128,seeTable3andTable7forallowableinputrangesandnoisevaluesGain=1±VREFVGain=2±500mVGain=4±250mVGain=8±125mVGain=16±62.
5mVCommon-ModeVoltage,VCM1Ideally,VCM=((AIN+)+(AIN))/2;gain=2to128;inputcurrentvarieswithVCM(seeFigure9andFigure10)AGNDAVDDVDataSheetADuCM360/ADuCM361Rev.
D|Page7of24ParameterTestConditions/CommentsMinTypMaxUnitInputCurrent9BufferedModeGain>1(excludingAIN4,AIN5,AIN6,andAIN7pins)1nAGain>1(AIN4,AIN5,AIN6,andAIN7pins)2nAUnbufferedModeInputcurrentvarieswithinputvoltage500nA/VAverageInputCurrentDrift1BufferedModeAIN0,AIN1,AIN2,AIN3±5pA/°CAIN4,AIN5,AIN6,AIN7±16pA/°CAIN8,AIN9,AIN10,AIN11±9pA/°CUnbufferedMode±250pA/V/°CCommon-ModeRejection,DC1OnADCinputADCgain=1,AVDD2V80100dBADCgain=2to12880dBCommon-ModeRejection,50Hz/60Hz150Hz/60Hz±1Hz;fADC=16.
7Hz,chopon;fADC=50Hz,chopoffADCgain=197dBADCgain=2to12890dBNormal-ModeRejection,50Hz/60Hz1OnADCinput50Hz/60Hz±1Hz;fADC=16.
7Hz,chopon;fADC=50Hz,chopoff6080dBTEMPERATURESENSOR1AfterusercalibrationVoltageOutputat25°CProcessorpowereddownorinstandbymodebeforemeasurement82.
1mVVoltageTemperatureCoefficient(TC)250V/°CAccuracy6°CGROUNDSWITCHRON3.
71019AllowableCurrent120kresistoroff,directshorttoground20mAVOLTAGEREFERENCEADCinternalreferenceInternalVREF1.
2VInitialAccuracyMeasuredatTA=25°C0.
1+0.
1%ReferenceTemperatureCoefficient(TC)1,1015±5+15ppm/°CPowerSupplyRejection18290dBEXTERNALREFERENCEINPUTSInputRangeBufferedModeAGND+0.
1AVDD0.
1VUnbufferedModeMinimumdifferentialvoltagebetweenVREF+andVREFpinsis400mV0AVDDVInputCurrentBufferedMode20+4+27nAUnbufferedMode500nA/VNormal-ModeRejection180dBCommon-ModeRejection185100dBReferenceDetectLevels1400mVEXCITATIONCURRENTSOURCESOutputCurrentAvailablefromeachcurrentsource;valueprogrammablefrom10Ato1mA10501000μAInitialToleranceat25°C1IOUT≥50A±5%Drift1Usinginternalreferenceresistor100400ppm/°CUsingexternal150kreferenceresistorbetweenIREFpinandAGND;resistormusthavedriftspecificationof5ppm/°C75400ppm/°CInitialCurrentMatchingat25°C1Matchingbetweenbothcurrentsources±0.
5%ADuCM360/ADuCM361DataSheetRev.
D|Page8of24ParameterTestConditions/CommentsMinTypMaxUnitDriftMatching150ppm/°CLoadRegulation,AVDD1AVDD=3.
3V0.
2%/VOutputCompliance1IOUT=10Ato210AAGND0.
03AVDD0.
45AVDD0.
85VIOUT>210AAGND0.
03AVDD0.
55AVDD1.
1VDACCHANNELSPECIFICATIONSRL=5k,CL=100pFVoltageRangeInternalreference0VREFVExternalreference01.
8VDCSpecifications11Resolution12BitsRelativeAccuracy±3LSBDifferentialNonlinearityGuaranteedmonotonic±0.
5±1LSBOffsetError1.
2Vinternalreference±2±10mVGainErrorVREFrange(reference=1.
2V)±0.
5%NPNMode1Resolution12BitsRelativeAccuracy±3LSBDifferentialNonlinearity±0.
85LSBOffsetError±0.
35mAGainError±0.
75mAOutputCurrentRange0.
00823.
6mAInterpolationMode1,12Onlymonotonicto14bitsResolution14BitsRelativeAccuracy13For14-bitresolution4to+13LSBDifferentialNonlinearityMonotonic(14bits)±0.
5LSBOffsetError1.
2Vinternalreference±2mVGainErrorVREFrange(reference=1.
2V)±1%AVDDrange±1%DACACCHARACTERISTICS1VoltageOutputSettlingTime10sDigital-to-AnalogGlitchEnergy1LSBchangeatmajorcarry(maximumnumberofbitschangessimultaneouslyintheDAC0DATregister)±20nV-secPOWER-ONRESET(POR)PORTripLevelVoltageatDVDDpinPower-onlevel1.
6VPower-downlevel1.
6VTimeoutfromPOR150msWATCHDOGTIMER(WDT)1TimeoutPeriod0.
000038192secTimeoutStepSizeT3CON[3:2]=107.
8125msFLASH/EEMEMORY1Endurance1410,000CyclesDataRetention15TJ=85°C10YearsDIGITALINPUTSAlldigitalinputsInputLeakageCurrentDigitalinputsexceptfortheRESET,SWCLK,andSWDIOpinsLogic1VINH=IOVDDorVINH=1.
8V140μAInternalpull-updisabled1nALogic0VINL=0V160μAInternalpull-updisabled10nADataSheetADuCM360/ADuCM361Rev.
D|Page9of24ParameterTestConditions/CommentsMinTypMaxUnitInputLeakageCurrentRESET,SWCLK,andSWDIOpinsLogic1140μALogic0160μAInputCapacitance110pFLogicInputsInputLowVoltage,VINL0.
2*IOVDDVInputHighVoltage,VINH0.
7*IOVDDVLogicOutputsOutputHighVoltage,VOHISOURCE=1mAIOVDD0.
4VOutputLowVoltage,VOLISINK=1mA0.
4VCRYSTALOSCILLATOR132.
768kHzcrystalinputsLogicInputs,XTALIOnly16InputLowVoltage,VINL0.
8VInputHighVoltage,VINH1.
7VXTALICapacitance6pFXTALOCapacitance6pFON-CHIPLOWPOWEROSCILLATOROscillatorFrequency32.
768kHzAccuracy30±10+30%ON-CHIPHIGHFREQUENCYOSCILLATOROscillatorFrequency16MHzAccuracy40°Cto+125°C1.
8+1.
4%LongTermStability50.
8%/1000HrPROCESSORCLOCKRATE1Nineprogrammablecoreclockselectionswithinspecifiedrange0.
06250.
516MHzUsinganExternalClock0.
03276816MHzPROCESSORSTART-UPTIME1AtPower-OnIncludeskernelpower-onexecutiontime41msAfterResetEventIncludeskernelpower-onexecutiontime1.
44msFromProcessorPower-Down(Mode1,Mode2,andMode3)fCLKistheCortex-M3coreclock3to5fCLKFromTotalHaltorHibernateMode(Mode4orMode5)30.
8μsPOWERREQUIREMENTSPowerSupplyVoltages,VDDAVDD,IOVDD1.
83.
6VPowerConsumptionIDD(MCUActiveMode)17,18Processorclockrate=16MHz;allperipheralson(CLKSYSDIV=0)5.
5mAProcessorclockrate=8MHz;allperipheralson(CLKSYSDIV=1)3mAProcessorclockrate=500kHz;bothADCson(inputbuffersoff)withPGAgain=4,1*SPIporton,alltimerson1mAIDD(MCUPoweredDown)Fulltemperaturerange,totalhaltmode(Mode4)4μAReducedtemperaturerange,40°Cto+85°C4μAIDD,Total(ADC0)18PGAenabled,gain≥32320μAPGAGain=4,8,or16,PGAonly130μAGain=32,64,or128,PGAonly180μAInputBuffers2*inputbuffers=70μA70μADigitalInterfaceandModulator70μAADuCM360/ADuCM361DataSheetRev.
D|Page10of24ParameterTestConditions/CommentsMinTypMaxUnitIDD(ADC1)Inputbuffersoff,gain=4,8,or16only200μAExternalReferenceInputBuffers60μAeach120μA1Thesenumbersarenotproductiontested,butareguaranteedbydesignand/orcharacterizationdataatproductionrelease.
2Testedatgain=4afterinitialoffsetcalibration.
3Measuredwithaninternalshort.
Asystemzero-scalecalibrationremovesthiserror.
4Arecalibrationatanytemperatureremovestheseerrors.
5Thelongtermstabilityspecificationisnoncumulative.
Thedriftinsubsequent1000hourperiodsissignificantlylowerthaninthefirst1000hourperiod.
6Thesenumbersdonotincludeinternalreferencetemperaturedrift.
7Factorycalibratedatgain=1.
8Systemcalibrationataspecificgainremovestheerroratthisgain.
9InputcurrentmeasuredwithoneADCmeasuringachannel.
IfbothADCsmeasurethesameinputchannel,theinputcurrentincreases(approximatelydoubles).
10Measuredusingtheboxmethod.
11ReferenceDAClinearityiscalculatedusingareducedcoderangeof0x0ABto0xF30.
12Measuredusingalow-passfilterwithR=1k,C=100nF.
13AclosedloopcontrolwiththeADCimprovesDACaccuracy.
14Enduranceisqualifiedto10,000cyclesasperJEDECStandard22,MethodA117,andismeasuredat40°C,+25°C,and+125°C.
Typicalenduranceat25°Cis170,000cycles.
15Retentionlifetimeequivalentatjunctiontemperature(TJ)=85°CasperJEDECStandard22,MethodA117.
Retentionlifetimederateswithjunctiontemperature.
16VoltageinputlevelsarerelevantonlyifdrivingXTALinputfromavoltagesource.
Ifacrystalisconnecteddirectly,theinternalcrystalinterfacedeterminesthecommon-modevoltage.
17TypicaladditionalsupplycurrentconsumedduringFlash/EEmemoryprogramanderasecyclesis7mA.
18TotalIDDforADCincludesfiguresforPGA≥32,inputbuffers,digitalinterface,andtheΣ-Δmodulator.
DataSheetADuCM360/ADuCM361Rev.
D|Page11of24RMSNOISERESOLUTIONOFADC0ANDADC1InternalReference(1.
2V)Table2throughTable5providermsnoisespecificationsforADC0andADC1usingtheinternalreference(1.
2V).
Table2andTable3listthermsnoiseforbothADCswithvariousgainandoutputupdateratevalues.
Table4andTable5listthetypicaloutputrmsnoiseeffectivenumberofbits(ENOB)innormalmodeforbothADCswithvariousgainandoutputupdateratevalues.
(Peak-to-peakENOBisshowninparentheses.
)Theseresultsaretakenwiththeinputbuffersoff.
Table2.
RMSNoisevs.
GainandOutputUpdateRate,InternalReference(1.
2V),Gain=1,2,4,8,and16RMSNoise(V)UpdateRate(Hz)Chop/SincADCFLTRegisterValueGain=1,±VREF,ADCxMDE=0x01Gain=2,±500mV,ADCxMDE=0x11Gain=4,±250mV,ADCxMDE=0x21Gain=8,±125mV,ADCxMDE=0x31Gain=16,±62.
5mV,ADCxMDE=0x413.
53On/Sinc30x8E7C1.
050.
450.
230.
1350.
07230Off/Sinc30x007E2.
11.
370.
630.
370.
2250Off/Sinc30x007D3.
71.
60.
830.
470.
29100Off/Sinc30x004D5.
452.
411.
130.
630.
38488Off/Sinc40x100F104.
72.
21.
30.
79976Off/Sinc40x100713.
56.
53.
31.
71.
11953Off/Sinc40x100319.
3104.
72.
61.
553906Off/Sinc40x100167.
03616.
68.
84.
9Table3.
RMSNoisevs.
GainandOutputUpdateRate,InternalReference(1.
2V),Gain=32,64,and128RMSNoise(V)UpdateRate(Hz)Chop/SincADCFLTRegisterValueGain=32,1±37.
5mV,ADCxMDE=0x49Gain=32,1,2±22.
18mV,ADCxMDE=0x51Gain=64,3±18.
75mV,ADCxMDE=0x59Gain=64,3,4±10.
3125mV,ADCxMDE=0x61Gain=128,5±9.
375mV,ADCxMDE=0x69Gain=128,5,6±3.
98mV,ADCxMDE=0x713.
53On/Sinc30x8E7C0.
0670.
0640.
0730.
0550.
0580.
05230Off/Sinc30x007E0.
2020.
20.
1960.
160.
1740.
15550Off/Sinc30x007D0.
240.
240.
250.
210.
210.
2100Off/Sinc30x004D0.
350.
320.
360.
270.
310.
25488Off/Sinc40x100F0.
70.
670.
710.
580.
620.
57976Off/Sinc40x10070.
990.
911.
010.
740.
830.
71953Off/Sinc40x10031.
781.
31.
481.
151.
251.
03906Off/Sinc40x10016.
442.
683.
591.
42.
21.
41ADCxMDE=0x49setsthePGAforagainof16withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x51setsthePGAforagainof32withthemodulatorgainoff.
ADCxMDE=0x49hasslightlyhighernoisebutsupportsawiderinputrange.
2IfAVDD<2.
0VandADCxMDE=0x51,theinputrangeis±17.
5mV.
3ADCxMDE=0x59setsthePGAforagainof32withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x61setsthePGAforagainof64withthemodulatorgainoff.
ADCxMDE=0x59hasslightlyhighernoisebutsupportsawiderinputrange.
4IfAVDD<2.
0VandADCxMDE=0x61,theinputrangeis±8.
715mV.
5ADCxMDE=0x69setsthePGAforagainof64withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x71setsthePGAforagainof128withthemodulatorgainoff.
ADCxMDE=0x69hasslightlyhighernoisebutsupportsawiderinputrange.
6IfAVDD<2.
0VandADCxMDE=0x71,theinputrangeis±3.
828mV.
ADuCM360/ADuCM361DataSheetRev.
D|Page12of24Table4.
TypicalOutputRMSNoiseEffectiveNumberofBitsinNormalMode,InternalReference(1.
2V),Gain=1,2,4,8,and16EffectiveNumberofBits(ENOB)byInputVoltageRangeandGain1UpdateRate(Hz)Chop/SincGain=1,±VREF,ADCxMDE=0x01Gain=2,±500mV,ADCxMDE=0x11Gain=4,±250mV,ADCxMDE=0x21Gain=8,±125mV,ADCxMDE=0x31Gain=16,±62.
5mV,ADCxMDE=0x413.
53On/Sinc321.
1(18.
4p-p)21.
1(18.
4p-p)21.
1(18.
3p-p)20.
8(18.
1p-p)20.
7(18.
0p-p)30Off/Sinc320.
1(17.
4p-p)19.
5(16.
8p-p)19.
6(16.
9p-p)19.
4(16.
6p-p)19.
1(16.
4p-p)50Off/Sinc319.
3(16.
6p-p)19.
25(16.
5p-p)19.
2(16.
5p-p)19.
0(16.
3p-p)18.
7(16.
0p-p)100Off/Sinc318.
7(16.
0p-p)18.
66(15.
9p-p)18.
75(16.
0p-p)18.
6(15.
9p-p)18.
3(15.
6p-p)488Off/Sinc417.
9(15.
2p-p)17.
7(15.
0p-p)17.
8(15.
1p-p)17.
55(14.
8p-p)17.
3(14.
5p-p)976Off/Sinc417.
4(14.
7p-p)17.
2(14.
5p-p)17.
2(14.
5p-p)17.
2(14.
4p-p)16.
8(14.
1p-p)1953Off/Sinc416.
9(14.
2p-p)16.
6(13.
9p-p)16.
7(14.
0p-p)16.
55(13.
8p-p)16.
3(13.
6p-p)3906Off/Sinc415.
1(12.
4p-p)14.
8(12.
0p-p)14.
9(12.
2p-p)14.
8(12.
1p-p)14.
6(11.
9p-p)1RMSbitsarecalculatedasfollows:log2((2*InputRange)/RMSNoise);peak-to-peak(p-p)bitsarecalculatedasfollows:log2((2*InputRange)/(6.
6*RMSNoise)).
Table5.
TypicalOutputRMSNoiseEffectiveNumberofBitsinNormalMode,InternalReference(1.
2V),Gain=32,64,and128EffectiveNumberofBits(ENOB)byInputVoltageRangeandGain1UpdateRate(Hz)Chop/SincGain=32,±37.
5mV,ADCxMDE=0x49Gain=32,±22.
18mV,ADCxMDE=0x51Gain=64,±18.
75mV,ADCxMDE=0x59Gain=64,±10.
3125mV,ADCxMDE=0x61Gain=128,±9.
375mV,ADCxMDE=0x69Gain=128,±3.
98mV,ADCxMDE=0x713.
53On/Sinc319.
8(17.
1p-p)19.
4(16.
7p-p)18.
7(16.
0p-p)18.
5(15.
8p-p)18.
0(15.
3p-p)17.
2(14.
5p-p)30Off/Sinc318.
2(15.
5p-p)17.
75(15.
0p-p)17.
3(14.
6p-p)17.
0(14.
25p-p)16.
45(13.
7p-p)15.
6(12.
9p-p)50Off/Sinc318.
0(15.
2p-p)17.
5(14.
8p-p)16.
93(14.
2p-p)16.
6(13.
86p-p)16.
2(13.
5p-p)15.
3(12.
55p-p)100Off/Sinc317.
4(14.
7p-p)17.
1(14.
35p-p)16.
4(13.
7p-p)16.
2(13.
5p-p)15.
6(12.
9p-p)15.
0(12.
2p-p)488Off/Sinc416.
4(13.
7p-p)16.
0(13.
3p-p)15.
4(12.
7p-p)15.
1(12.
4p-p)14.
6(11.
9p-p)13.
8(11.
0p-p)976Off/Sinc415.
9(13.
2p-p)15.
6(12.
85p-p)14.
91(12.
2p-p)14.
8(12.
0p-p)14.
2(11.
5p-p)13.
4(10.
75p-p)1953Off/Sinc415.
1(12.
4p-p)15.
05(12.
3p-p)14.
4(11.
6p-p)14.
1(11.
4p-p)13.
6(10.
9p-p)13.
0(10.
2p-p)3906Off/Sinc413.
2(10.
5p-p)14.
0(11.
3p-p)13.
1(10.
4p-p)13.
8(11.
1p-p)12.
8(10.
1p-p)12.
5(9.
75p-p)1RMSbitsarecalculatedasfollows:log2((2*InputRange)/RMSNoise);peak-to-peak(p-p)bitsarecalculatedasfollows:log2((2*InputRange)/(6.
6*RMSNoise)).
DataSheetADuCM360/ADuCM361Rev.
D|Page13of24ExternalReference(2.
5V)Table6throughTable9providermsnoisespecificationsforADC0andADC1usingtheexternalreference(2.
5V).
Table6andTable7listthermsnoiseforbothADCswithvariousgainandoutputupdateratevalues.
Table8andTable9listthetypicaloutputrmsnoiseeffectivenumberofbits(ENOB)innormalmodeforbothADCswithvariousgainandoutputupdateratevalues.
(Peak-to-peakENOBisshowninparentheses.
)Theseresultsaretakenwiththeinputbuffersoff.
Table6.
RMSNoisevs.
GainandOutputUpdateRate,ExternalReference(2.
5V),Gain=1,2,4,8,and16RMSNoise(V)UpdateRate(Hz)Chop/SincADCFLTRegisterValueGain=1,±VREF,ADCxMDE=0x01Gain=2,±500mV,ADCxMDE=0x11Gain=4,±250mV,ADCxMDE=0x21Gain=8,±125mV,ADCxMDE=0x31Gain=16,±62.
5mV,ADCxMDE=0x413.
53On/Sinc30x8E7C1.
10.
50.
270.
170.
08830Off/Sinc30x007E31.
40.
850.
440.
2750Off/Sinc30x007D3.
92.
20.
920.
460.
3100Off/Sinc30x004D5.
22.
81.
250.
630.
38488Off/Sinc40x100F9.
35.
02.
51.
20.
75976Off/Sinc40x100712.
573.
51.
751.
21953Off/Sinc40x100320.
0105.
72.
61.
713906Off/Sinc40x1001140.
070.
035.
017.
28.
9Table7.
RMSNoisevs.
GainandOutputUpdateRate,ExternalReference(2.
5V),Gain=32,64,and128RMSNoise(V)UpdateRate(Hz)Chop/SincADCFLTRegisterValueGain=32,1±62.
5mV,ADCxMDE=0x49Gain=32,1,2±22.
18mV,ADCxMDE=0x51Gain=64,3±22.
18mV,ADCxMDE=0x59Gain=64,3,4±10.
3125mV,ADCxMDE=0x61Gain=128,5±10.
3125mV,ADCxMDE=0x69Gain=128,5,6±3.
98mV,ADCxMDE=0x713.
53On/Sinc30x8E7C0.
0760.
070.
0880.
060.
0680.
05830Off/Sinc30x007E0.
210.
220.
210.
190.
1750.
1750Off/Sinc30x007D0.
2650.
210.
270.
20.
2250.
19100Off/Sinc30x004D0.
370.
320.
3660.
280.
320.
26488Off/Sinc40x100F0.
730.
70.
730.
570.
640.
5976Off/Sinc40x10071.
10.
831.
010.
770.
890.
751953Off/Sinc40x10032.
051.
31.
61.
241.
31.
13906Off/Sinc40x10019.
44.
85.
12.
653.
21.
881ADCxMDE=0x49setsthePGAforagainof16withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x51setsthePGAforagainof32withthemodulatorgainoff.
ADCxMDE=0x49hasslightlyhighernoisebutsupportsawiderinputrange.
2IfAVDD<2.
0VandADCxMDE=0x51,theinputrangeis±17.
5mV.
3ADCxMDE=0x59setsthePGAforagainof32withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x61setsthePGAforagainof64withthemodulatorgainoff.
ADCxMDE=0x59hasslightlyhighernoisebutsupportsawiderinputrange.
4IfAVDD<2.
0VandADCxMDE=0x61,theinputrangeis±8.
715mV.
5ADCxMDE=0x69setsthePGAforagainof64withamodulatorgainof2.
Themodulatorgainof2isimplementedbyadjustingthesamplingcapacitorsintothemodulator.
ADCxMDE=0x71setsthePGAforagainof128withthemodulatorgainoff.
ADCxMDE=0x69hasslightlyhighernoisebutsupportsawiderinputrange.
6IfAVDD<2.
0VandADCxMDE=0x71,theinputrangeis±3.
828mV.
ADuCM360/ADuCM361DataSheetRev.
D|Page14of24Table8.
TypicalOutputRMSNoiseEffectiveNumberofBitsinNormalMode,ExternalReference(2.
5V),Gain=1,2,4,8,and16EffectiveNumberofBits(ENOB)byInputVoltageRangeandGain1UpdateRate(Hz)Chop/SincGain=1,±VREF,ADCxMDE=0x01Gain=2,±500mV,ADCxMDE=0x11Gain=4,±250mV,ADCxMDE=0x21Gain=8,±125mV,ADCxMDE=0x31Gain=16,±62.
5mV,ADCxMDE=0x413.
53On/Sinc322.
1(19.
4p-p)20.
9(18.
2p-p)20.
8(18.
1p-p)20.
5(17.
7p-p)20.
43(17.
7p-p)30Off/Sinc320.
7(18.
0p-p)19.
4(16.
7p-p)19.
2(16.
4p-p)19.
1(16.
4p-p)18.
82(16.
1p-p)50Off/Sinc320.
3(17.
6p-p)18.
8(16.
1p-p)19.
05(16.
3p-p)19.
05(16.
3p-p)18.
66(15.
9p-p)100Off/Sinc319.
9(17.
2p-p)18.
4(15.
7p-p)18.
6(15.
9p-p)18.
6(15.
9p-p)18.
32(15.
6p-p)488Off/Sinc419.
0(16.
3p-p)17.
6(14.
9p-p)17.
6(14.
9p-p)17.
7(14.
9p-p)17.
34(14.
6p-p)976Off/Sinc418.
6(15.
9p-p)17.
1(14.
4p-p)17.
1(14.
4p-p)17.
1(14.
4p-p)16.
66(13.
9p-p)1953Off/Sinc417.
9(15.
2p-p)16.
6(13.
9p-p)16.
4(13.
7p-p)16.
55(13.
8p-p)16.
15(13.
4p-p)3906Off/Sinc415.
1(12.
4p-p)13.
8(11.
1p-p)13.
8(11.
1p-p)13.
8(11.
1p-p)13.
77(11.
05p-p)1RMSbitsarecalculatedasfollows:log2((2*InputRange)/RMSNoise);peak-to-peak(p-p)bitsarecalculatedasfollows:log2((2*InputRange)/(6.
6*RMSNoise)).
Table9.
TypicalOutputRMSNoiseEffectiveNumberofBitsinNormalMode,ExternalReference(2.
5V),Gain=32,64,and128EffectiveNumberofBits(ENOB)byInputVoltageRangeandGain1UpdateRate(Hz)Chop/SincGain=32,±62.
5mV,ADCxMDE=0x49Gain=32,±22.
18mV,ADCxMDE=0x51Gain=64,±22.
18mV,ADCxMDE=0x59Gain=64,±10.
3125mV,ADCxMDE=0x61Gain=128,±10.
3125mV,ADCxMDE=0x69Gain=128,±3.
98mV,ADCxMDE=0x713.
53On/Sinc319.
6(16.
9p-p)19.
3(16.
55p-p)18.
4(15.
7p-p)18.
4(15.
7p-p)17.
8(15.
1p-p)17.
1(14.
3p-p)30Off/Sinc318.
2(15.
5p-p)17.
6(14.
9p-p)17.
2(14.
5p-p)16.
7(14.
0p-p)16.
4(13.
7p-p)15.
5(12.
8p-p)50Off/Sinc317.
8(15.
1p-p)17.
7(15.
0p-p)16.
8(14.
1p-p)16.
65(13.
9p-p)16.
1(13.
4p-p)15.
35(12.
6p-p)100Off/Sinc317.
4(14.
6p-p)17.
1(14.
35p-p)16.
4(13.
7p-p)16.
2(13.
4p-p)15.
6(12.
85p-p)14.
9(12.
2p-p)488Off/Sinc416.
4(13.
7p-p)16.
0(13.
2p-p)15.
4(12.
7p-p)15.
1(12.
4p-p)14.
6(11.
85p-p)14.
0(11.
2p-p)976Off/Sinc415.
8(13.
1p-p)15.
7(13.
0p-p)14.
9(12.
2p-p)14.
7(12.
0p-p)14.
1(11.
4p-p)13.
4(10.
6p-p)1953Off/Sinc414.
9(12.
1p-p)15.
1(12.
3p-p)14.
25(11.
5p-p)14.
0(11.
3p-p)13.
55(10.
8p-p)12.
8(10.
1p-p)3906Off/Sinc412.
7(10.
0p-p)13.
2(10.
4p-p)12.
6(9.
9p-p)12.
9(10.
2p-p)12.
25(9.
5p-p)12.
0(9.
3p-p)1RMSbitsarecalculatedasfollows:log2((2*InputRange)/RMSNoise);peak-to-peak(p-p)bitsarecalculatedasfollows:log2((2*InputRange)/(6.
6*RMSNoise)).
DataSheetADuCM360/ADuCM361Rev.
D|Page15of24I2CTIMINGSPECIFICATIONSThecapacitiveloadforeachI2Cbusline(CB)is400pFmaximumaspertheI2Cbusspecifications.
I2Ctimingisguaranteedbydesign,butisnotproductiontested.
Table10.
I2CTiminginFastMode(400kHz)ParameterDescriptionMinMaxUnittLSerialclock(SCL)lowpulsewidth1300nstHSCLhighpulsewidth600nstSHDStartconditionholdtime600nstDSUDatasetuptime100nstDHDDataholdtime0nstRSUSetuptimeforrepeatedstart600nstPSUStopconditionsetuptime600nstBUFBusfreetimebetweenastopconditionandastartcondition1.
3stRRisetimeforbothSCLandserialdata(SDA)20+0.
1CB300nstFFalltimeforbothSCLandSDA20+0.
1CB300nstSUPPulsewidthofsuppressedspike050nsTable11.
I2CTiminginStandardMode(100kHz)ParameterDescriptionMinMaxUnittLSCLlowpulsewidth4.
7μstHSCLhighpulsewidth4.
0nstSHDStartconditionholdtime4.
7μstDSUDatasetuptime250nstDHDDataholdtime0μstRSUSetuptimeforrepeatedstart4.
0μstPSUStopconditionsetuptime4.
0μstBUFBusfreetimebetweenastopconditionandastartcondition4.
7μstRRisetimeforbothSCLandSDA1μstFFalltimeforbothSCLandSDA300nsSDA(I/O)tBUFMSBLSBACKMSB1981SCL(I)PSSTOPCONDITIONSTARTCONDITIONS(R)REPEATEDSTARTtSUPtRtFtFtRtHtLtSUPtDSUtDHDtRSUtDHDtDSUtSHDtPSU09743-002Figure3.
I2C-CompatibleInterfaceTimingADuCM360/ADuCM361DataSheetRev.
D|Page16of24SPITIMINGSPECIFICATIONSTable12.
SPIMasterModeTimingParameterDescriptionMinTypMaxUnittSLSCLKlowpulsewidth1(SPIDIV+1)*tUCLKnstSHSCLKhighpulsewidth1(SPIDIV+1)*tUCLKnstDAVDataoutputvalidafterSCLKedge035.
5nstDOSUDataoutputsetuptimebeforeSCLKedge1(SPIDIV+1)*tUCLKnstDSUDatainputsetuptimebeforeSCLKedge58.
7nstDHDDatainputholdtimeafterSCLKedge16nstDFDataoutputfalltime1235.
5nstDRDataoutputrisetime1235.
5nstSRSCLKrisetime1235.
5nstSFSCLKfalltime1235.
5ns1tUCLK=62.
5ns.
Itcorrespondstotheinternal16MHzclockbeforetheclockdivider.
SCLK(POLARITY=0)CS1/2SCLKCYCLESCLK(POLARITY=1)MOSIMSBBIT6TOBIT1LSBMISOMSBINBIT6TOBIT1LSBINtSHtCStSL3/4SCLKCYCLEtSFStSRtSFtDRtDFtDAVtDSUtDHD09743-003Figure4.
SPIMasterModeTiming(PhaseMode=1)SCLK(POLARITY=0)SCLK(POLARITY=1)MOSIMSBBIT6TOBIT1LSBMISOMSBINBIT6TOBIT1LSBINtSHtSRtSFtDRtDFtDAVtDOSUtDSUtDHDCS1SCLKCYCLEtCStSL1SCLKCYCLEtSFS09743-004Figure5.
SPIMasterModeTiming(PhaseMode=0)DataSheetADuCM360/ADuCM361Rev.
D|Page17of24Table13.
SPISlaveModeTimingParameterDescriptionMinTypMaxUnittCSCStoSCLKedge62.
5nstSLSCLKlowpulsewidth1(SPIDIV+1)*tUCLKnstSHSCLKhighpulsewidth162.
5(SPIDIV+1)*tUCLKnstDAVDataoutputvalidafterSCLKedge49.
1nstDSUDatainputsetuptimebeforeSCLKedge20.
2nstDHDDatainputholdtimeafterSCLKedge10.
1nstDFDataoutputfalltime1235.
5nstDRDataoutputrisetime1235.
5nstSRSCLKrisetime1235.
5nstSFSCLKfalltime1235.
5nstDOCSDataoutputvalidafterCSedge25nstSFSCShighafterSCLKedge0ns1tUCLK=62.
5ns.
Itcorrespondstotheinternal16MHzclockbeforetheclockdivider.
SCLK(POLARITY=0)CSSCLK(POLARITY=1)tSHtSLtSRtSFtSFSMISOMSBBIT6TOBIT1LSBMOSIMSBINBIT6TOBIT1LSBINtDHDtDSUtDAVtDRtDFtCS09743-005Figure6.
SPISlaveModeTiming(PhaseMode=1)SCLK(POLARITY=0)CSSCLK(POLARITY=1)tSHtSLtSRtSFtSFSMISOMSBBIT6TOBIT1LSBMOSIMSBINBIT6TOBIT1LSBINtDHDtDSUtDAVtDRtDFtDOCStCS09743-006Figure7.
SPISlaveModeTiming(PhaseMode=0)ADuCM360/ADuCM361DataSheetRev.
D|Page18of24ABSOLUTEMAXIMUMRATINGSTable14.
ParameterRatingAVDDtoAGND0.
3Vto+3.
96VIOVDDtoDGND0.
3Vto+3.
96VAGNDtoDGND0.
3Vto+0.
3VAVDDtoDVDD0.
3Vto+0.
3VDigitalInputVoltagetoDGND0.
3Vto+3.
96VDigitalOutputVoltagetoDGND0.
3Vto+3.
96VAnalogInputstoAGND0.
3Vto+3.
96VOperatingTemperatureRange40°Cto+125°CStorageTemperatureRange65°Cto+150°CJunctionTemperature150°CESDRating,AllPinsHumanBodyModel(HBM)±2kVField-InducedChargedDeviceModel(FICDM)±1kVPeakSolderReflowTemperatureSnPbAssemblies(10secto30sec)240°CPb-FreeAssemblies(20secto40sec)260°CStressesatorabovethoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetotheproduct.
Thisisastressratingonly;functionaloperationoftheproductattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionofthisspecificationisnotimplied.
Operationbeyondthemaximumoperatingconditionsforextendedperiodsmayaffectproductreliability.
THERMALRESISTANCEθJAisspecifiedfortheworst-caseconditions,thatis,adevicesolderedinacircuitboardforsurface-mountpackages.
Table15.
ThermalResistancePackageTypeθJAUnit48-LeadLFCSP_WQ27°C/WESDCAUTIONDataSheetADuCM360/ADuCM361Rev.
D|Page19of24PINCONFIGURATIONANDFUNCTIONDESCRIPTIONS123P0.
7/POR/SOUTP0.
6/IRQ2/SINP0.
5/CTS/IRQ14P0.
4/RTS/ECLKO5P0.
3/IRQ0/CS16P0.
2/MOSI1/SDA/SOUT7P0.
1/SCLK1/SCL/SIN24AIN7/VBIAS0/IEXC/EXTREF2IN+23AIN6/IEXC22AIN5/IEXC21IREF20INT_REF19DAC18AVDD_REG17AVDD16AGND15VREF–14VREF+13GND_SW44P1.
6/IRQ6/PWM4/MOSI045P1.
7/IRQ7/PWM5/CS046P2.
0/SCL/UARTCLK47SWCLK48SWDIO43P1.
5/IRQ5/PWM3/SCLK042P1.
4/PWM2/MISO041P1.
3/PWM1/DSR40P1.
2/PWM0/RI39P1.
1/IRQ4/PWMTRIP/DTR38P1.
0/IRQ3/PWMSYNC/EXTCLK37IOVDDTOPVIEW(NottoScale)ADuCM360/ADuCM36125AIN4/IEXC26AIN327AIN228AIN129AIN030DVDD_REG31IOVDD32XTALI33XTALO34P2.
2/BM35P2.
1/SDA/UARTDCDNOTES1.
THELFCSPHASANEXPOSEDPADTHATMUSTBESOLDEREDTOAMETALPLATEONTHEPCBFORMECHANICALREASONSANDTODGND.
36RESET8P0.
0/MISO19AIN11/VBIAS110AIN1011AIN9/DACBUFF+12AIN8/EXTREF2IN–09743-007Figure8.
PinConfigurationTable16.
PinFunctionDescriptionsPinNo.
MnemonicDescription1RESETResetPin,ActiveLowInput.
Aninternalpull-upisprovided.
2P2.
1/SDA/UARTDCDGeneral-PurposeInput/OutputP2.
1/I2CSerialDataPin/UARTDataCarrierDetectPin.
3P2.
2/BMGeneral-PurposeInput/OutputP2.
2/BootModeInputSelectPin.
Whenthispinisheldlowduringandforashorttimeafteranyresetsequence,thepartentersUARTdownloadmode.
4XTALOExternalCrystalOscillatorOutputPin.
Optional32.
768kHzsourceforreal-timeclock.
5XTALIExternalCrystalOscillatorInputPin.
Optional32.
768kHzsourceforreal-timeclock.
6IOVDDDigitalSystemSupplyPin.
ThispinmustbeconnectedtoDGNDviaa0.
1Fcapacitor.
7DVDD_REGThispinmustbeconnectedtoDGNDviaa470nFcapacitorandtoPin18,AVDD_REG.
8AIN0ADCAnalogInput0.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
9AIN1ADCAnalogInput1.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
10AIN2ADCAnalogInput2.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
11AIN3ADCAnalogInput3.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
12AIN4/IEXCADCAnalogInput4/ExcitationCurrentSource.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN4).
ThispincanalsobeconfiguredastheoutputpinforExcitationCurrentSource0orExcitationCurrentSource1(IEXC).
13GND_SWSensorPowerSwitchtoAnalogGroundReference.
ADuCM360/ADuCM361DataSheetRev.
D|Page20of24PinNo.
MnemonicDescription14VREF+ExternalReferencePositiveInput.
AnexternalreferencecanbeappliedbetweentheVREF+andVREFpins.
15VREFExternalReferenceNegativeInput.
AnexternalreferencecanbeappliedbetweentheVREF+andVREFpins.
16AGNDAnalogSystemGroundReferencePin.
17AVDDAnalogSystemSupplyPin.
ThispinmustbeconnectedtoAGNDviaa0.
1Fcapacitor.
18AVDD_REGInternalAnalogRegulatorSupplyOutput.
ThispinmustbeconnectedtoAGNDviaa470nFcapacitorandtoPin7,DVDD_REG.
19DACDACVoltageOutput.
20INT_REFInternalReference.
Thispinmustbeconnectedtogroundviaa470nFdecouplingcapacitor.
21IREFOptionalReferenceCurrentResistorConnectionfortheExcitationCurrentSources.
Thereferencecurrentusedfortheexcitationcurrentsourcesissetbyalowdrift(5ppm/°C)externalresistorconnectedtothispin.
22AIN5/IEXCADCAnalogInput5/ExcitationCurrentSource.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN5).
ThispincanalsobeconfiguredastheoutputpinforExcitationCurrentSource0orExcitationCurrentSource1(IEXC).
23AIN6/IEXCADCAnalogInput6/ExcitationCurrentSource.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN6).
ThispincanalsobeconfiguredastheoutputpinforExcitationCurrentSource0orExcitationCurrentSource1(IEXC).
24AIN7/VBIAS0/IEXC/EXTREF2IN+ADCAnalogInput7/BiasVoltageOutput/ExcitationCurrentSource/ExternalReference2PositiveInput.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN7).
Thispincanalsobeconfiguredasananalogoutputpintogenerateabiasvoltage,VBIAS0ofAVDD_REG/2(VBIAS0);astheoutputpinforExcitationCurrentSource0orExcitationCurrentSource1(IEXC);orasthepositiveinputforExternalReference2(EXTREF2IN+).
25AIN8/EXTREF2INADCAnalogInput8/ExternalReference2NegativeInput.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN8).
ThispincanalsobeconfiguredasthenegativeinputforExternalReference2(EXTREF2IN).
26AIN9/DACBUFF+ADCAnalogInput9/NoninvertingInputtotheDACOutputBuffer.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN9).
ThispincanalsobeconfiguredasthenoninvertinginputtotheDACoutputbufferwhentheDACisconfiguredforNPNmode(DACBUFF+).
27AIN10ADCAnalogInput10.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode.
28AIN11/VBIAS1ADCAnalogInput11/BiasVoltageOutput.
ThispincanbeconfiguredasapositiveornegativeinputtoeitherADCindifferentialorsingle-endedmode(AIN11).
Thispincanalsobeconfiguredasananalogoutputpintogenerateabiasvoltage,VBIAS1ofAVDD_REG/2(VBIAS1).
29P0.
0/MISO1General-PurposeInput/OutputP0.
0/SPI1MasterInput,SlaveOutputPin.
30P0.
1/SCLK1/SCL/SINGeneral-PurposeInput/OutputP0.
1/SPI1SerialClockPin/I2CSerialClockPin/UARTSerialInput(DataInputfortheUARTDownloader).
31P0.
2/MOSI1/SDA/SOUTGeneral-PurposeInput/OutputP0.
2/SPI1MasterOutput,SlaveInputPin/I2CSerialDataPin/UARTSerialOutput(DataOutputfortheUARTDownloader).
32P0.
3/IRQ0/CS1General-PurposeInput/OutputP0.
3/ExternalInterruptRequest0/SPI1ChipSelectPin(ActiveLow).
33P0.
4/RTS/ECLKOGeneral-PurposeInput/OutputP0.
4/UARTRequest-to-SendSignal/ExternalClockOutputPinforTestPurposes.
34P0.
5/CTS/IRQ1General-PurposeInput/OutputP0.
5/UARTClear-to-SendSignal/ExternalInterruptRequest1.
35P0.
6/IRQ2/SINGeneral-PurposeInput/OutputP0.
6/ExternalInterruptRequest2/UARTSerialInput.
NotusedbyUARTdownloader.
36P0.
7/POR/SOUTGeneral-PurposeInput/OutputP0.
7/Power-OnResetPin(ActiveHigh)/UARTSerialOutput.
NotusedbyUARTdownloader.
37IOVDDDigitalSystemSupplyPin.
ThispinmustbeconnectedtoDGNDviaa0.
1Fcapacitor.
38P1.
0/IRQ3/PWMSYNC/EXTCLKGeneral-PurposeInput/OutputP1.
0/ExternalInterruptRequest3/PWMExternalSynchronizationInput/ExternalClockInputPin.
39P1.
1/IRQ4/PWMTRIP/DTRGeneral-PurposeInput/OutputP1.
1/ExternalInterruptRequest4/PWMExternalTripInput/UARTDataTerminalReadyPin.
40P1.
2/PWM0/RIGeneral-PurposeInput/OutputP1.
2/PWM0Output/UARTRingIndicatorPin.
41P1.
3/PWM1/DSRGeneral-PurposeInput/OutputP1.
3/PWM1Output/UARTDataSetReadyPin.
42P1.
4/PWM2/MISO0General-PurposeInput/OutputP1.
4/PWM2Output/SPI0MasterInput,SlaveOutputPin.
DataSheetADuCM360/ADuCM361Rev.
D|Page21of24PinNo.
MnemonicDescription43P1.
5/IRQ5/PWM3/SCLK0General-PurposeInput/OutputP1.
5/ExternalInterruptRequest5/PWM3Output/SPI0SerialClockPin.
44P1.
6/IRQ6/PWM4/MOSI0General-PurposeInput/OutputP1.
6/ExternalInterruptRequest6/PWM4Output/SPI0MasterOutput,SlaveInputPin.
45P1.
7/IRQ7/PWM5/CS0General-PurposeInput/OutputP1.
7/ExternalInterruptRequest7/PWM5Output/SPI0ChipSelectPin(ActiveLow).
46P2.
0/SCL/UARTCLKGeneral-PurposeInput/OutputP2.
0/I2CSerialClockPin/InputClockPinforUARTBlockOnly.
47SWCLKSerialWireDebugClockInputPin.
48SWDIOSerialWireDebugDataInput/OutputPin.
EPExposedPad.
TheLFCSPhasanexposedpadthatmustbesolderedtoametalplateonthePCBformechanicalreasonsandtoDGND.
ADuCM360/ADuCM361DataSheetRev.
D|Page22of24TYPICALPERFORMANCECHARACTERISTICS6050403020INPUTCURRENT(nA)100–100.
51.
01.
5COMMON-MODEVOLTAGE(V)2.
02.
53.
03.
50–20–3009743-008IPIP–ININFigure9.
InputCurrentvs.
Common-ModeVoltage(VCM),Gain=4,ADCInput=250mV,AVDD=3.
6V,TA=25°C,VCM=((AIN+)+(AIN))/2543210INPUTCURRENT(nA)–1–2–30.
51.
01.
5COMMON-MODEVOLTAGE(V)2.
02.
53.
03.
50–4–509743-009IPIP–ININFigure10.
InputCurrentvs.
Common-ModeVoltage(VCM),Gain=128,ADCInput=7.
8125mV,AVDD=3.
6V,TA=25°C,VCM=((AIN+)+(AIN))/2–40–20020140000001200000010000000800000060000004000000200000040TEMPERATURE(°C)ADCCODES608010012009743-010Figure11.
ADCCodes(DecimalValues)vs.
DieTemperatureMeasurementsarefortheTemperatureSensorOnly050100150200250020040060080010001200SETTLINGTIME(ms)CAPACITANCE(nF)BOOST=0BOOST=3009743-011Figure12.
VBIASOutputSettlingTimevs.
LoadCapacitance,TA=25°C,IOVDDandAVDD=3.
3V05101520253000.
51.
01.
52.
02.
53.
03.
5PULL-UPRESISTANCE(k)VOLTAGE(V)09743-012Figure13.
DigitalInputPinPull-UpResistanceValuevs.
VoltageAppliedtoDigitalPin,TA=25°C,IOVDD=3.
4V010203040506000.
51.
01.
52.
0PULL-UPRESISTANCE(k)VOLTAGE(V)09743-013Figure14.
DigitalInputPinPull-UpResistanceValuevs.
VoltageAppliedtoDigitalPin,TA=25°C,IOVDD=1.
8VDataSheetADuCM360/ADuCM361Rev.
D|Page23of24TYPICALSYSTEMCONFIGURATIONFigure15showsatypicalADuCM360/ADuCM361configuration.
Thisfigureillustratessomeofthehardwareconsiderations.
ThebottomoftheLFCSPpackagehasanexposedpadthatmustbesolderedtoametalplateonthePCBformechanicalreasonsandtoDGND.
ThemetalplateofthePCBcanbeconnectedtoground.
The0.
47FcapacitorontheAVDD_REGandDVDD_REGpinsshouldbeplacedasclosetothepinsaspossible.
Innoisyenvironments,anadditional1nFcapacitorcanbeaddedtoIOVDDandAVDD.
123P0.
7/POR/SOUTP0.
6/IRQ2/SINP0.
5/CTS/IRQ14P0.
4/RTS/ECLKO5P0.
3/IRQ0/CS16P0.
2/MOSI1/SDA/SOUT7P0.
1/SCLK1/SCL/SIN24AIN7/VBIAS0/IEXC/EXTREF2IN+23AIN6/IEXC22AIN5/IEXC21IREF20INT_REF19DAC18AVDD_REG17AVDD16AGND12pF12pF15VREF–14VREF+13GND_SW44P1.
6/IRQ6/PWM4/MOSI045P1.
7/IRQ7/PWM5/CS046P2.
0/SCL/UARTCLK47SWCLK48SWDIOSWCLKSWDIO43P1.
5/IRQ5/PWM3/SCLK042P1.
4/PWM2/MISO041P1.
3/PWM1/DSR40P1.
2/PWM0/RI39P1.
1/IRQ4/PWMTRIP/DTR38P1.
0/IRQ3/PWMSYNC/EXTCLK37IOVDDADuCM36025AIN4/IEXC26AIN327AIN228AIN129AIN030DVDD_REGDVDDDGND31IOVDD32XTALI33XTALO34P2.
2/BM35P2.
1/SDA/UARTDCD36RESETRESETRESETRESET8P0.
0/MISO19AIN11/VBIAS110AIN1011AIN9/DACBUFF+12AIN8/EXTREF2IN–0.
47F0.
47F0.
1F150kGNDDGNDSWIOTXSWCLKRX5VUSBSWDIOINTERFACEBOARDCONNECTORSWCLKDVDDDGNDDGND0.
1FAVDD0.
47F0.
1F0.
1F1F0.
1F5601.
6INOUTENGNDDGNDDGNDDGNDAVDDDVDDAGNDAGNDAGND4.
7F4.
7FADP1720ARMZ-3.
309743-100DGNDFigure15.
TypicalSystemConfigurationADuCM360/ADuCM361DataSheetRev.
D|Page24of24OUTLINEDIMENSIONS112408-BFORPROPERCONNECTIONOFTHEEXPOSEDPAD,REFERTOTHEPINCONFIGURATIONANDFUNCTIONDESCRIPTIONSSECTIONOFTHISDATASHEET.
COMPLIANTTOJEDECSTANDARDSMO-220-WKKD.
10.
50BSCBOTTOMVIEWTOPVIEWPIN1INDICATOR7.
00BSCSQ48132425363712EXPOSEDPADPIN1INDICATOR5.
205.
10SQ5.
000.
450.
400.
35SEATINGPLANE0.
800.
750.
700.
05MAX0.
02NOM0.
25MIN0.
20REFCOPLANARITY0.
080.
300.
230.
18Figure16.
48-LeadLeadFrameChipScalePackage[LFCSP_WQ]7mm*7mmBody,VeryVeryThinQuad(CP-48-4)DimensionsshowninmillimetersORDERINGGUIDEModel1ADCsFlash/SRAMTemperatureRangePackageDescriptionPackageOptionOrderingQuantityADuCM360BCPZ128Dual24-Bit128kB/8kB40°Cto+125°C48-LeadLFCSP_WQCP-48-4ADuCM360BCPZ128-R7Dual24-Bit128kB/8kB40°Cto+125°C48-LeadLFCSP_WQCP-48-4750ADuCM361BCPZ128Single24-Bit128kB/8kB40°Cto+125°C48-LeadLFCSP_WQCP-48-4ADuCM361BCPZ128-R7Single24-Bit128kB/8kB40°Cto+125°C48-LeadLFCSP_WQCP-48-4750EVAL-ADuCM360QSPZADuCM360QuickStartPlusDevelopmentSystem1Z=RoHSCompliantPart.
I2CreferstoacommunicationsprotocoloriginallydevelopedbyPhilipsSemiconductors(nowNXPSemiconductors).
2012–2016AnalogDevices,Inc.
Allrightsreserved.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
D09743-0-6/16(D)
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