3.45批处理for

1TypicalApplicationFeaturesDescriptionNanopowerBuck-BoostDC/DCwithIntegratedCoulombCounterTheLTC3335isahighefficiency,lowquiescentcurrent(680nA)buck-boostDC/DCconverterwithanintegratedprecisioncoulombcounterwhichmonitorsaccumulatedbatterydischargeinlonglifebatterypoweredapplications.
Thebuck-boostcanoperatedownto1.
8Vonitsinputandprovideseightpin-selectableoutputvoltageswithupto50mAofoutputcurrent.
Thecoulombcounterstorestheaccumulatedbatterydis-chargeinaninternalregisteraccessibleviaanI2Cinterface.
TheLTC3335featuresaprogrammabledischargealarmthreshold.
Whenthethresholdisreached,aninterruptisgeneratedattheIRQpin.
Toaccommodateawiderangeofbatterytypesandsizes,thepeakinputcurrentcanbeselectedfromaslowas5mAtoashighas250mAandthefull-scalecoulombcounterhasaprogrammablerangeof32,768:1.
TheLTC3335isavailableina3mm*4mmQFN-20package.
EfficiencyvsLoadfor100mAIPEAKSettingApplicationsn680nAInputQuiescentCurrent(OutputinRegulationatNoLoad)n1.
8Vto5.
5VInputOperatingRangenSelectableOutputVoltagesof1.
8V,2.
5V,2.
8V,3V,3.
3V,3.
6V,4.
5V,5VnIntegratedCoulombCounterMeasuresAccumulatedBatteryDischargen±5%BatteryDischargeMeasurementAccuracynProgrammablePeakInputCurrentof5mA,10mA,15mA,25mA,50mA,100mA,150mA,250mAnUpto50mAofOutputCurrentnUpto90%EfficiencynProgrammableCoulombCounterPrescalerforWideRangeofBatterySizesnProgrammableDischargeAlarmThresholdnI2CInterfacenLowProfile(0.
75mm)20-Lead(3mm*4mm)QFNPackagenLongLifetimePrimaryCellBatteryApplicationsnWirelessSensorsnRemoteMonitorsnDustNetworksSmartMeshApplicationsL,LT,LTC,LTM,LinearTechnology,theLinearlogo,SmartMeshandDustNetworksareregisteredtrademarksofLinearTechnologyCorporation.
Allothertrademarksarethepropertyoftheirrespectiveowners.
SDAGNDLTC333510k2.
2mHTO47HPGOOD3335TA01I2CSCLOUT[2:0]IRQPVOUTDVCCPBAT47FPRIMARYCELLBAT1.
8VTO5VIPEAK=5mATO250mASW1SW2VOUT10kEN33IPK[2:0]10F+ILOAD(mA)0.
0010EFFICIENCY(%)908070605040302010100110100BAT=3.
6VL=150HDCR=0.
3Ω0.
013335TA01a0.
1VOUT=5VVOUT=3.
3VVOUT=2.
5VVOUT=1.
8V2PinConfigurationAbsoluteMaximumRatingsBAT,PBAT,VOUT,PVOUTVoltage.
0.
3Vto6VEN,OUT[2:0],IPK[2:0]Voltage.
.
.
.
.
.
–0.
3Vto[Lesserof(BAT+0.
3V)or6V]DVCC,SDA,SCLVoltage.
0.
3Vto6VPGOOD,IRQVoltage.
.
.
.
.
.
–0.
3Vto[Lesserof(DVCC+0.
3V)or6V]SW1,SW2Current.
350mAOperatingJunctionTemperatureRange(Notes2,3)40°Cto125°CStorageTemperatureRange.
65°Cto150°C(Note1)2019181778TOPVIEW21PGNDUDCPACKAGE20-LEAD(3mm*4mm)PLASTICQFN910654321111213141516SDADVCCOUT2OUT1OUT0GNDDENIPK2IPK1IPK0VOUTPVOUTSCLIRQPGOODGNDABATPBATSW1SW2TJMAX=125°C,θJA=52°C/WEXPOSEDPAD(PIN21)ISPGND,MUSTBESOLDEREDTOPCBOrderInformationLEADFREEFINISHTAPEANDREELPARTMARKINGPACKAGEDESCRIPTIONTEMPERATURERANGELTC3335EUDC#PBFLTC3335EUDC#TRPBFLGTR20-Lead(3mm*4mm)PlasticQFN–40°Cto125°CLTC3335IUDC#PBFLTC3335IUDC#TRPBFLGTR20-Lead(3mm*4mm)PlasticQFN–40°Cto125°CConsultLTCMarketingforpartsspecifiedwithwideroperatingtemperatureranges.
ConsultLTCMarketingforinformationonnonstandardleadbasedfinishparts.
Formoreinformationonleadfreepartmarking,goto:http://www.
linear.
com/leadfree/Formoreinformationontapeandreelspecifications,goto:http://www.
linear.
com/tapeandreel/3Theldenotesthespecificationswhichapplyoverthefulloperatingjunctiontemperaturerange,otherwisespecificationsareatTA=25°C(Note2).
BAT=PBAT=DVCC=3.
6V,GNDA=GNDD=PGND=0V,VOUT=PVOUT.
ElectricalCharacteristicsPARAMETERCONDITIONSMINTYPMAXUNITSBuck-BoostDC/DCInputVoltageRangel1.
85.
5VInputQuiescentCurrentShutdownSleeping(InRegulation)NotSleepingBATandPBATCombinedEN=0EN=1EN=1,ISW1=ISW2=0(Note4)4406803607001000540nAnAARegulatedOutputVoltage1.
8VOutputSettingSleepThresholdWake-UpThresholdll1.
7371.
8061.
7941.
863VV2.
5VOutputSettingSleepThresholdWake-UpThresholdll2.
4252.
5082.
4922.
575VV2.
8VOutputSettingSleepThresholdWake-UpThresholdll2.
7162.
8092.
7912.
884VV3VOutputSettingSleepThresholdWake-UpThresholdll2.
9103.
0102.
9903.
090VV3.
3VOutputSettingSleepThresholdWake-UpThresholdll3.
2003.
3113.
2893.
400VV3.
6VOutputSettingSleepThresholdWake-UpThresholdll3.
4923.
6123.
5883.
708VV4.
5VOutputSettingSleepThresholdWake-UpThresholdll4.
3654.
5154.
4854.
635VV5VOutputSettingSleepThresholdWake-UpThresholdll4.
8505.
0174.
9835.
150VVPGOODFallingThreshold(Note5)l899295%VOUTLeakageCurrentAllOutputSettings,VOUTinRegulation100150nAInputPeakSwitchCurrent250mAIPEAKSetting(Note6)l225200250250275275mAmA150mAIPEAKSetting(Note6)l135125150150165165mAmA100mAIPEAKSetting(Note6)l9085100100110110mAmA50mAIPEAKSetting(Note6)l4542.
550505555mAmA25mAIPEAKSetting(Note6)l21.
520252527.
527.
5mAmA15mAIPEAKSetting(Note6)l12.
512151516.
516.
5mAmA10mAIPEAKSetting(Note6)l8.
25810101111mAmA5mAIPEAKSetting(Note6)l43.
75555.
55.
5mAmAIZEROCurrentThreshold(Note7)AllIPEAKSettings0mAAvailableOutputCurrent100mAIPEAKSetting,VOUT=3.
3V20mA4Theldenotesthespecificationswhichapplyoverthefulloperatingjunctiontemperaturerange,otherwisespecificationsareatTA=25°C(Note2).
BAT=PBAT=DVCC=3.
6V,GNDA=GNDD=PGND=0V,VOUT=PVOUT.
ElectricalCharacteristicsPARAMETERCONDITIONSMINTYPMAXUNITSPMOSSwitchAOn-Resistance(FromPBATtoSW1)250mAIPEAKSetting150mAIPEAKSetting100mAIPEAKSetting50mAIPEAKSetting25mAIPEAKSetting15mAIPEAKSetting10mAIPEAKSetting5mAIPEAKSetting0.
380.
550.
761.
402.
674.
366.
4812.
82ΩΩΩΩΩΩΩΩNMOSSwitchBOn-Resistance(FromSW1toPGND)250mAIPEAKSetting150mAIPEAKSetting100mAIPEAKSetting50mAIPEAKSetting25mAIPEAKSetting15mAIPEAKSetting10mAIPEAKSetting5mAIPEAKSetting0.
570.
851.
202.
264.
377.
1810.
6921.
20ΩΩΩΩΩΩΩΩNMOSSwitchCOn-Resistance(FromSW2toPGND)IPK[2:0]=1xxIPK[2:0]=0xx0.
372.
05ΩΩPMOSSwitchDOn-Resistance(FromPVOUTtoSW2)PVOUT=VOUT=3.
3V250mAIPEAKSetting150mAIPEAKSetting100mAIPEAKSetting50mAIPEAKSetting25mAIPEAKSetting15mAIPEAKSetting10mAIPEAKSetting5mAIPEAKSetting0.
600.
861.
182.
144.
066.
619.
8119.
40ΩΩΩΩΩΩΩΩPMOSSwitchLeakageSwitchesA,DSW1=SW2=0V,BAT=5.
5V,VOUT=5.
5V010nANMOSSwitchLeakageSwitchesB,CSW1=BAT=5.
5V,SW2=VOUT=5.
5V010nACoulombCounterqLSB(forPrescalersettingM=0)(Notes8,9)250mAIPEAKSetting7.
031Ahr150mAIPEAKSetting4.
218Ahr100mAIPEAKSetting(Note10)l2.
7282.
8122.
896Ahr50mAIPEAKSetting1.
406Ahr25mAIPEAKSetting703.
1mAhr15mAIPEAKSetting421.
8mAhr10mAIPEAKSetting281.
2mAhr5mAIPEAKSetting140.
6mAhrFull-ScaleCoulombCount(BatteryCapacity)5mAIPEAKSetting,M=15,L=2.
2mH;(SmallestBattery)1.
094mAhr100mAIPEAKSetting,M=8,L=100μHl2.
7172.
8012.
885Ahr250mAIPEAKSetting,M=0,L=47μH;(LargestBattery)1793AhrTotalUnadjustedCoulombCounterError(Note10)Buck-BoostSwitching,100mAIPEAKSetting,VOUT=3.
3V,BAT=3.
6Vl–55%DigitalInputsandOutputDVCCVoltagel1.
85.
5VDigitalInputHighVoltageForPinsEN,IPK[2:0],OUT[2:0]ForPinsSDA,SCLlBAT–0.
570V%DVCC5Theldenotesthespecificationswhichapplyoverthefulloperatingjunctiontemperaturerange,otherwisespecificationsareatTA=25°C(Note2).
BAT=PBAT=DVCC=3.
6V,GNDA=GNDD=PGND=0V,VOUT=PVOUT.
ElectricalCharacteristicsNote1:StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.
ExposuretoanyAbsoluteMaximumRatingconditionforextendedperiodsmayaffectdevicereliabilityandlifetime.
Note2:TheLTC3335istestedunderpulsedloadconditionssuchthatTJ≈TA.
TheLTC3335Eisguaranteedtomeetspecificationsfrom0°Cto85°C.
Specificationsoverthe–40°Cto125°Coperatingjunctiontemperaturerangeareassuredbydesign,characterization,andcorrelationwithstatisticalprocesscontrols.
TheLTC3335Iisguaranteedoverthe–40°Cto125°Coperatingjunctiontemperaturerange.
Notethatthemaximumambienttemperatureconsistentwiththesespecificationsisdeterminedbyspecificoperatingconditionsinconjunctionwithboardlayout,theratedpackagethermalimpedance,andotherenvironmentalfactors.
Note3:TJiscalculatedfromtheambientTAandpowerdissipationPDaccordingtothefollowingformula:TJ=TA+(PDθJA).
Note4:Dynamicsupplycurrentishigherduetogatechargebeingdeliveredattheswitchingfrequency.
Note5:ThePGOODFallingThresholdisspecifiedasapercentageoftheaverageofthemeasuredsleepandwake-upthresholdsforeachselectedoutput.
ThePGOODrisingthresholdisequaltothesleepthreshold.
SeeRegulatedOutputVoltagespecification.
Note6:Forthe100mAIPEAKsetting,thevaluegiveninthetableismeasuredinaclosed-loopset-upwitha100Hinductor,a3.
6VBATvoltage,andtheLTC3335switching.
FortheothersevenIPEAKsettings,thevaluesgiveninthetablearecalculatedfromanopen-loopDCmeasurementofIPEAK(LTC3335notswitching),thepropagationdelayoftheIPEAKcomparator,andtherecommendedinductorvalueforeachIPEAKsetting.
Note7:IZEROmeasurementsareperformedwhentheLTC3335isnotswitching.
ThevaluesseeninoperationwillbeslightlylowerduetothepropagationdelayofthecomparatorsNote8:TheequivalentchargeofanLSBintheaccumulatedchargeregisterdependsontheIPEAKsettingandtheinternalpre-scalingfactorM.
SeeChoosingCoulombCounterPrescalerMsectionformoreinformation.
1mAhr=3.
6As=3.
6C.
Note9:ThevaluesgiveninthetableareforapplicationsusingtherecommendedinductorvalueforeachIPEAKsetting.
Note10:ThespecifiedaccuracyofqLSBinpercentisbetterthanthatofthecorrespondingIPEAKbecausethefull-scaleONtimeoftheAC(ON)timemeasurementisinternallyadjustedtocompensateforerrorsintheactualIPEAKvalue.
TheTotalUnadjustedCoulombCounterErrorspecifiedincludesanyinaccuracyinqLSB.
PARAMETERCONDITIONSMINTYPMAXUNITSDigitalInputLowVoltageForPinsEN,IPK[2:0],OUT[2:0]ForPinsSDA,SCLl0.
530V%DVCCDigitalOutputHighVoltageForPinsPGOOD,IRQ;1AOutofPinlDVCC–0.
5VDigitalOutputLowVoltageForPinsPGOOD,IRQ;1AIntoPinForPinSDA;3mAIntoPinl0.
50.
4VVInputHighCurrentForPinsEN,IPK[2:0],OUT[2:0],SDA,SCL010nAInputLowCurrentForPinsEN,IPK[2:0],OUT[2:0],SDA,SCL010nAI2CTimingCharacteristics(SeeFigure1)I2CReadAddressI2CWriteAddress1100100111001000ClockOperatingFrequencyfSCL400kHzBusFreeTimeBetweenSTOP/STARTtBUF1.
3sRepeatedSTARTSet-UpTimetSU,STA600nsHoldTime(Repeated)STARTConditiontHD,STA600nsSet-UpTimeforSTOPConditiontSU,STO600nsDataSet-UpTime(Input)tSU,DAT100nsDataHoldTime(Input)tHD,DATI0sDataHoldTime(Output)tHD,DATO00.
9sClock/DataFallTimetf20300nsClock/DataRiseTimetr20300nsClockLOWPeriodtLOW1.
3sClockHIGHPeriodtHIGH0.
6sSpikeSuppressionTimetSP50ns6TimingDiagramSDASCLSSrPStHD,STAS=START,Sr=REPEATEDSTART,P=STOPtHD,DATtSU,STAtSU,STOtSU,DATtLOWtHD,STAtSPtBUFtrtftrtftHIGH3335TDFigure1.
DefinitionofTimingonI2CBus7TypicalPerformanceCharacteristics1.
8VOutputvsTemperature2.
5VOutputvsTemperature2.
8VOutputvsTemperature3VOutputvsTemperature3.
3VOutputvsTemperature3.
6VOutputvsTemperatureTA=25°C,BAT=PBAT=3.
6V,GNDA=GNDD=PGND=0V,VOUT=PVOUT=3.
3V,100mAIPEAKsetting,unlessotherwisenoted.
BAT(V)2.
4IBAT(nA)1100130015005.
43335G0190080070060030020010040050010001200140003.
64.
83.
01.
84.
2125°C85°C25°C–45°CBAT(V)2.
4IBAT(nA)1500170019005.
43335G02130012001100100090080070060050040030020010014001600180003.
64.
83.
01.
84.
2125°C85°C25°C–45°CTEMPERATURE(°C)–30–10IBAT+IPBAT(A)3613653711303335G0335735535335134934735936336736934334570110103050–5090BAT=1.
8VBAT=3.
6VBAT=5.
5VInputQuiescentCurrent(Active)vsTemperatureInputQuiescentCurrentinShutdownvsBATInputQuiescentCurrentinSleepvsBATTEMPERATURE(°C)–30VOUT(V)1.
781.
821.
861101303335G041.
741.
701.
681.
661.
761.
801.
841.
721.
641.
621.
60105090–10–503070SLEEPTHRESHOLDWAKE-UPTHRESHOLDPGOODFALLINGTEMPERATURE(°C)–30VOUT(V)2.
382.
462.
541101303335G052.
302.
342.
422.
502.
262.
22105090–10–503070SLEEPTHRESHOLDWAKE-UPTHRESHOLDPGOODFALLINGTEMPERATURE(°C)–30VOUT(V)2.
722.
802.
881101303335G062.
642.
562.
682.
762.
842.
602.
52105090–10–503070SLEEPTHRESHOLDWAKE-UPTHRESHOLDPGOODFALLINGTEMPERATURE(°C)–30VOUT(V)2.
903.
003.
101101303335G072.
802.
752.
852.
953.
052.
70105090–10–503070SLEEPTHRESHOLDWAKE-UPTHRESHOLDPGOODFALLINGTEMPERATURE(°C)–30VOUT(V)3.
153.
253.
351101303335G083.
053.
103.
203.
303.
00105090–10–503070SLEEPTHRESHOLDWAKE-UPTHRESHOLDPGOODFALLINGTEMPERATURE(°C)–30VOUT(V)3.
503.
603.
701101303335G093.
403.
353.
303.
253.
453.
553.
653.
20105090–10–503070SLEEPTHRESHOLDWAKE-UPTHRESHOLDPGOODFALLING8TypicalPerformanceCharacteristicsTA=25°C,BAT=PBAT=3.
6V,GNDA=GNDD=PGND=0V,VOUT=PVOUT=3.
3V,100mAIPEAKsetting,unlessotherwisenoted.
IPEAKvsTemperature,250mASettingIPEAKvsTemperature,100mASettingIPEAKvsTemperature,5mASettingIPEAKvsBAT,250mASettingIPEAKvsBAT,100mASettingIPEAKvsBAT,5mASetting4.
5VOutputvsTemperature5VOutputvsTemperatureIVOUTvsTemperatureTEMPERATURE(°C)–30VOUT(V)4.
404.
504.
601101303335G104.
304.
254.
204.
154.
104.
054.
354.
454.
554.
00105090–10–503070SLEEPTHRESHOLDWAKE-UPTHRESHOLDPGOODFALLINGTEMPERATURE(°C)–30VOUT(V)4.
905.
005.
101101303335G114.
804.
754.
704.
654.
604.
554.
854.
955.
054.
50105090–10–503070SLEEPTHRESHOLDWAKE-UPTHRESHOLDPGOODFALLINGTEMPERATURE(°C)–30IVOUT(nA)1201602001101303335G12806040201001401800105090–10–503070VOUT=5VTEMPERATURE(°C)–30IPEAK(mA)2482462442522541101303335G13240238236234232242250230105090–10–503070TEMPERATURE(°C)–30IPEAK(mA)100.
099.
298.
4101.
61101303335G1496.
896.
095.
294.
493.
692.
897.
6100.
892.
0105090–10–503070TEMPERATURE(°C)–30IPEAK(mA)5.
004.
964.
925.
081101303335G154.
844.
804.
764.
724.
684.
644.
885.
044.
60105090–10–503070BAT(V)IPEAK(mA)2602582562624.
24.
85.
43335G162522502462482442422402542382.
41.
83.
03.
6BAT(V)IPEAK(mA)1041031054.
24.
85.
43335G1710110099989796102952.
41.
83.
03.
6BAT(V)IPEAK(mA)5.
205.
155.
254.
24.
85.
43335G185.
055.
004.
954.
904.
854.
805.
104.
752.
41.
83.
03.
69TypicalPerformanceCharacteristicsTA=25°C,BAT=PBAT=3.
6V,GNDA=GNDD=PGND=0V,VOUT=PVOUT=3.
3V,100mAIPEAKsetting,unlessotherwisenoted.
RDS(ON)vsTemperature,5mASettingRDS(ON)vsTemperature,250mASettingRDS(ON)vsTemperature,250mASettingTEMPERATURE(°C)RDS(ON)(Ω)7570801101303335G2260555045353025201510540650–301030507090–50–10NMOSC,BAT=5.
5VNMOSC,BAT=1.
8VPMOSD,VOUT=5VPMOSD,VOUT=1.
8VRDS(ON)vsTemperature,5mASettingEfficiencyvsLoadCurrentfor250mAIPEAKSettingEfficiencyvsLoadCurrentfor100mAIPEAKSettingEfficiencyvsLoadCurrentfor5mAIPEAKSettingEfficiencyvsBATfor250mAIPEAKSettingEfficiencyvsBATfor100mAIPEAKSettingTEMPERATURE(°C)RDS(ON)(Ω)2.
252.
002.
501101303335G191.
501.
251.
000.
750.
250.
501.
750.
00–301030507090–50–10NMOSB,BAT=5.
5VNMOSB,BAT=1.
8VPMOSA,BAT=5.
5VPMOSA,BAT=1.
8VTEMPERATURE(°C)RDS(ON)(Ω)2.
252.
002.
501101303335G201.
501.
251.
000.
750.
250.
501.
750.
00–301030507090–50–10NMOSC,BAT=5.
5VNMOSC,BAT=1.
8VPMOSD,VOUT=5VPMOSD,VOUT=1.
8VTEMPERATURE(°C)RDS(ON)(Ω)7570801101303335G2160555045353025201510540650–301030507090–50–10NMOSB,BAT=5.
5VNMOSB,BAT=1.
8VPMOSA,BAT=5.
5VPMOSA,BAT=1.
8VILOAD(mA)EFFICIENCY(%)9080100101003335G236050403010207000.
011.
00.
0010.
1VOUT=5VVOUT=3.
3VVOUT=2.
5VVOUT=1.
8VBAT=3.
6VL=47HDCR=0.
33ΩILOAD(mA)EFFICIENCY(%)9080100101003335G246050403010207000.
011.
00.
0010.
1VOUT=5VVOUT=3.
3VVOUT=2.
5VVOUT=1.
8VBAT=3.
6VL=100HDCR=0.
6ΩILOAD(mA)EFFICIENCY(%)90801000.
11.
03335G256050403010207000.
0010.
01VOUT=5VVOUT=3.
3VVOUT=2.
5VVOUT=1.
8VBAT=3.
6VL=2.
2mHDCR=11ΩBAT(V)EFFICIENCY(%)90801003.
84.
34.
85.
33335G26605070401.
82.
32.
83.
3ILOAD=5AILOAD=25AILOAD=250AILOAD=25mAVOUT=3.
3VL=47HDCR=0.
33ΩBAT(V)EFFICIENCY(%)90801003.
84.
34.
85.
33335G27605070401.
82.
32.
83.
3ILOAD=5AILOAD=10AILOAD=100AILOAD=10mAVOUT=3.
3VL=100HDCR=0.
6Ω10TypicalPerformanceCharacteristicsTA=25°C,BAT=PBAT=3.
6V,GNDA=GNDD=PGND=0V,VOUT=PVOUT=3.
3V,100mAIPEAKsetting,unlessotherwisenoted.
Buck-BoostMaximumLoadvsBATfor250mAIPEAKSettingBuck-BoostMaximumLoadvsBATfor5mAIPEAKSettingBuck-BoostMaximumLoadvsBATfor100mAIPEAKSettingBuck-BoostLineRegulation,VOUT=3.
3V,100mAIPEAKSettingBuck-BoostLoadRegulation,VOUT=3.
3V,100mAIPEAKSettingBuck-BoostLoadStepTransientBuck-BoostSwitchingWaveformsInputQuiescentCurrentIntoPBATDuetoGateCharge,VOUT=3.
3V,RunningContinuousEfficiencyvsBATfor5mAIPEAKSettingBAT(V)EFFICIENCY(%)9070801003.
84.
34.
85.
33335G2850304060201.
82.
32.
83.
3ILOAD=1AILOAD=5AILOAD=50AILOAD=500AVOUT=3.
3VL=2.
2mHDCR=11ΩBAT(V)MAXILOAD(mA)90801004.
24.
85.
43335G296050403020107002.
41.
83.
03.
6VOUT=1.
8VVOUT=3.
3VVOUT=5VBAT(V)MAXILOAD(mA)3632404.
24.
85.
43335G3024201612842802.
41.
83.
03.
6VOUT=1.
8VVOUT=3.
3VVOUT=5VBAT(V)MAXILOAD(mA)1.
81.
62.
04.
24.
85.
43335G311.
21.
00.
80.
60.
20.
41.
402.
41.
83.
03.
6VOUT=1.
8VVOUT=3.
3VVOUT=5VBAT(V)VOUT(V)3.
313.
333.
353.
343335G323.
293.
283.
303.
323.
273.
64.
24.
85.
42.
43.
01.
8ILOAD=10mAILOAD=1mALOADCURRENT(mA)VOUT(V)3.
313.
333.
343335G333.
293.
283.
303.
323.
271100.
010.
10.
001BAT=3.
6VBAT=5.
5VBAT=1.
8V2ms/DIVOUTPUTVOLTAGE20mV/DIVLOADCURRENT10mA/DIV3335G34BAT=3.
6V,VOUT=3.
3VCOUT=47F,L=100H100mAIPEAKSETTINGLOADSTEPFROM1mATO20mA20s/DIVOUTPUTVOLTAGE50mV/DIVSW1VOLTAGE5V/DIVSW2VOLTAGE5V/DIVINDUCTORCURRENT50mA/DIV3335G35BAT=3.
6V,VOUT=3.
3VCOUT=100F,L=100H100mAIPEAKSETTINGILOAD=10mABAT(V)2.
32.
8IPBAT(A)651655.
33335G36115215154.
83.
33.
84.
31.
8IPEAK=150mAIPEAK=50mAIPEAK=15mAIPEAK=5mAIPEAK=250mAIPEAK=100mAIPEAK=25mAIPEAK=10mA11TypicalPerformanceCharacteristicsTA=25°C,BAT=PBAT=3.
6V,GNDA=GNDD=PGND=0V,VOUT=PVOUT=3.
3V,100mAIPEAKsetting,unlessotherwisenoted.
TotalUnadjustedCoulombCounterErrorDuringContinuousSwitching(150mAIPEAKSetting)TotalUnadjustedCoulombCounterErrorDuringContinuousSwitching(50mAIPEAKSetting)TotalUnadjustedCoulombCounterErrorDuringContinuousSwitching(25mAIPEAKSetting)TotalUnadjustedCoulombCounterErrorDuringContinuousSwitching(15mAIPEAKSetting)TotalUnadjustedCoulombCounterErrorDuringContinuousSwitching(10mAIPEAKSetting)TotalUnadjustedCoulombCounterErrorDuringContinuousSwitching(5mAIPEAKSetting)TotalUnadjustedCoulombCounterErrorDuringContinuousSwitching(100mAIPEAKSetting)TotalUnadjustedCoulombCounterErrorDuringContinuousSwitching(250mAIPEAKSetting)BAT(V)ERROR(%)42353.
84.
34.
85.
33335G370–2–3–4–11–51.
82.
32.
83.
3VOUT=5VVOUT=3.
3VVOUT=1.
8VBAT(V)ERROR(%)42353.
84.
34.
85.
33335G380–2–3–4–11–51.
82.
32.
83.
3VOUT=5VVOUT=3.
3VVOUT=1.
8VBAT(V)ERROR(%)42353.
84.
34.
85.
33335G390–2–3–4–11–51.
82.
32.
83.
3VOUT=5VVOUT=3.
3VVOUT=1.
8VBAT(V)ERROR(%)435213.
84.
34.
85.
33335G400–3–4–5–2–1–61.
82.
32.
83.
3VOUT=5VVOUT=3.
3VVOUT=1.
8VBAT(V)ERROR(%)54323.
83.
34.
84.
35.
33335G4110–1–2–3–8–9–10–4–5–6–7–111.
82.
82.
3VOUT=5VVOUT=3.
3VVOUT=1.
8VBAT(V)ERROR(%)533.
84.
34.
85.
33335G421–1–7–9–11–13–17–15–3–5–191.
82.
32.
83.
3VOUT=5VVOUT=3.
3VVOUT=1.
8VBAT(V)ERROR(%)533.
84.
34.
85.
33335G431–1–7–9–11–13–19–21–23–15–17–3–5–251.
82.
32.
83.
3VOUT=5VVOUT=3.
3VVOUT=1.
8VBAT(V)ERROR(%)53.
84.
34.
85.
33335G442–4–7–28–31–25–10–13–16–19–22–1–40–34–371.
82.
32.
83.
3VOUT=5VVOUT=3.
3VVOUT=1.
8V12PinFunctionsSDA(Pin1):SerialDataInput/OutputfortheI2CSerialPort.
TheI2CinputlevelsarescaledwithrespecttoDVCCforI2Ccompliance.
Donotfloat.
DVCC(Pin2):SupplyRailfortheI2CSerialBus.
DVCCsetsthereferenceleveloftheSDAandSCLpinsforI2Ccompliance.
TheexternalI2Cpull-upresistorsonSDAandSCLshouldconnecttoDVCC.
Dependingontheparticularapplication,DVCCcanbeconnectedtoBAT,toVOUT,ortoaseparateexternalsupplybetween1.
8Vand5.
5V.
InmostapplicationsDVCCwillbeconnectedtotheI/OrailofthemicroprocessorreadingtheI2Cregisters.
OUT[2:0](Pin3,4,5):VOUTVoltageSelectBits.
TiehightoBATorlowtoGNDAtoselectthedesiredVOUT(seeTable2).
Donotfloat.
GNDD(Pin6):Signalgroundforinternaldigitalcircuits.
ConnecttoGNDAandPGND.
BAT(Pin7):Buck-BoostInputVoltageSensePin.
Con-necttoPBAT.
PBAT(Pin8):Buck-BoostInputVoltage.
Thispinisthepowerinputoftheregulator.
ConnecttoBAT.
SW1(Pin9):Buck-BoostSwitchPin.
ConnectedtointernalpowerswitchesAandB.
Connectaninductor(valueinTable8)betweenthisnodeandSW2.
SW2(Pin10):Buck-BoostSwitchPin.
ConnectedtointernalpowerswitchesCandD.
Connectaninductor(valueinTable8)betweenthisnodeandSW1.
PVOUT(Pin11):Buck-BoostOutputVoltage.
Thispinisthepoweroutputoftheregulator.
ConnecttoVOUT.
VOUT(Pin12):Buck-BoostOutputVoltageSensePin.
ConnecttoPVOUT.
IPK[2:0](Pin15,14,13):PeakInputCurrentSelectBits.
TiehightoBATorlowtoGNDAtoselectdesiredIPEAK(seeTable1).
Donotfloat.
EN(Pin16):Buck-BoostEnableInput.
TiehightoBATorlowtoGNDAtoenable/disablethebuck-boost.
IfENispulledlow,thebuck-boostisdisabledbutinternalregistercontentsaresaved.
Donotfloat.
GNDA(Pin17):Signalgroundforinternalanalogcircuits.
ConnecttoGNDDandPGND.
PGOOD(Pin18):PowerGoodOutput.
LogicleveloutputreferencedtoDVCC.
Thisoutputispulledlowafterthebuck-boostisenabledandremainslowuntilVOUTreachesregulation.
IRQ(Pin19):InterruptOutput.
LogicleveloutputreferencedtoDVCC.
Activelow.
ThispinisnormallylogichighbutwilltransitionlowwhenthepresetalarmlevelisreachedorifthereisanoverflowineitherthecoulombcounterortheAC(ON)timemeasurement.
SCL(Pin20):SerialClockInputfortheI2CSerialPort.
TheI2CinputlevelsarescaledwithrespecttoDVCCforI2Ccompliance.
Donotfloat.
PGND(ExposedPadPin21):PowerGround.
TheExposedPadconnectstothesourcesoftheinternalN-channelpowerMOSFETs.
ItshouldbesolderedtothePCBandelectricallyconnectedtosystemgroundthroughtheshort-estandlowestimpedanceconnectionpossible.
ConnecttoGNDAandGNDD.
13BlockDiagramGNDAGNDDPGND(EXPOSEDPAD)OUT[0]OUT[1]OUT[2]PGOODSLEEPIZEROIRQPGNDAC(ON)PVOUTVOUTSW1SW2BATGNDAGNDAPBAT3335BDI2CVREF_PGVREFDVCCSCLSDAIPEAKIPEAK_SETVREFABDCVREF_PGCOULOMBCOUNTER–+–+BUCK-BOOSTCONTROLBANDGAPREFERENCE3IPK[0]ENIPK[1]IPK[2]3IPEAK910111234518192161712021613141578GNDAGNDD14OperationBuck-BoostRegulatorThebuck-boostregulatorconsistsoffourinternalswitches,labeledA,B,C,andD,asshowninFigure2,andcontrolcircuitrywhichtogetherconnecttheinputandoutputvoltagestothepowerinductor.
Figure2.
PowerFETsThiscyclerepeatsuntiltheoutputvoltagerisestoavalueslightlyhigherthantheregulationpoint(sleepthreshold)afterwhichtheconverterentersalowquiescentcurrentsleepstatethatmonitorstheoutputvoltagewithasleepcomparator.
Duringsleep,loadcurrentisprovidedbytheoutputcapacitor.
Whentheoutputvoltagefallstoavalueslightlylowerthantheregulationpoint(wake-upthreshold)thebuck-boostregulatorwakesupandthentheinductorcurrentstartsrampingupagainwithin3s(typical).
ThishystereticmethodofprovidingaregulatedoutputvoltagereduceslossesassociatedwithFETswitchingwhileregulatingatlightloads.
VOUTcanbesetviathevoltageselectpinsOUT[2:0]from1.
8Vto5V(seeTable2).
Table2.
OutputVoltageSelectionviaPinsOUT2OUT1OUT0VOUT0001.
8V0012.
5V0102.
8V0113.
0V1003.
3V1013.
6V1104.
5V1115.
0VWhenthesleepcomparatorsensesthattheoutputvoltagehasreachedthesleepthreshold,thebuck-boostconvertermaybeinthemiddleofacyclewithcurrentstillflowingthroughtheinductor.
Theconverterentersthelowqui-escentcurrentsleepstateonlyattheendofafullAC-BDcycleaftertheinductorcurrentreaches0mA.
Thisbehaviorisnecessaryforcountingcoulombsaccurately.
Duringstart-upanduntilVOUTrisestoapproximately1.
2V,switchDisheldoffanditsbodydiodeconducts.
ThisensuresproperIPEAK/IZEROoperationforcoulombcounteraccuracy.
Thebuck-boostoperatesasanH-BridgeforallBATandVOUTconditionswhennotinsleep.
ThismeansthatswitchesAandCarealwaysontogether,followedbyswitchesBandDalwaysontogether.
AhystereticvoltagealgorithmisusedtocontroltheoutputthroughinternalfeedbackfromtheVOUTsensepin.
Thebuck-boostregulatorchargestheoutputcapacitorthroughtheinductor.
CurrentisdeliveredfirstbyrampingtheinductorcurrentuptoIPEAKthroughswitchesAandC,andthenrampingitdownto0mAthroughswitchesBandD.
TheIPEAKlevelisprogrammableviatheIPK[2:0]pinsandrangesfrom5mAto250mA(seeTable1).
Table1.
IPEAKSelectionIPK2IPK1IPK0IPEAK0005mA00110mA01015mA01125mA10050mA101100mA110150mA111250mADPBATBATSW1PVOUTVOUT3335F02ACBSW2100H15OperationFigure3valueandtheidealIPEAKvalueduetosupply,temperature,andprocessvariations.
Thisresultsinaveryaccurate"measurement"ofthechargetransferredfromthebatteryduringeachAC(ON)cyclewhichisrepresentedasan8-bitnumberandthenaddedtothepreviousaccumulatedtotalcoulombcounteachtimeswitchesAandCturnon.
Theaddercarrybitistheclockfortheremaining42-bitripplecounter.
Whenthebuck-boostisinsleep,thecoulombcounterholdsitsstateanddrawsnocurrent.
Thereareatotalof50bitsinthecoulombcounterchain,butonlythe8MSBsmaybereadbackoverI2C.
ThesebitsarecontainedinregisterC,theaccumulatedchargeregister.
Theamountofchargerepresentedbytheleastsignificantbit(qLSB)oftheaccumulatedchargeregister(RegisterC)isgivenintheElectricalCharacteristicssectionforall8IPEAKsettingsforthecaseofthedefaultprescalersetting(M=0,whichusesthefulllengthoftheinternalcounter).
SeeChoosingCoulombCounterPrescalerMsectionforinstructionsoncalculatingqLSBwithanonzeroprescalersetting.
I2CInterfaceThe7-bithard-wiredI2CaddressoftheLTC3335is1100100[R/W].
TheLTC3335isaslave-onlydevicemean-ingthattheserialclockline(SCL)isonlyaninputwhiletheserialdataline(SDA)isbidirectional.
InternalRegistersTheLTC3335has5internalsubaddressedI2Cregisters,asshowninTable3.
RegistersA,B,andEarewriteonly,RegisterCisread/write,andRegisterDisreadonly,asshowninTables4,5,and6,respectively.
Table3.
RegisterMapSUBADDRESSREGISTERNAMEREGISTERDESCRIPTIONR/WDEFAULT01hAVOUTselectionandprescalerselectionW00h02hBAlarmthresholdWFFh03hCAccumulatedchargeR/W00h04hDAlarmsR00h05hEInterruptregisterW00hR=read,W=writeVOUTPowerGoodApowergoodcomparatorisprovidedfortheVOUToutput.
ThePGOODpintransitionshighwhentheLTC3335firstgoestosleep,indicatingthatVOUThasreachedregulation.
IttransitionslowwhenVOUTfallsto92%(typical)ofitsaveragevalueatregulation.
CoulombCounterTheLTC3335integratesaprecisioncoulombcountertomonitortheaccumulatedchargethatistransferredfromthebatterywheneverthebuck-boostconverterisdeliveringcurrenttoVOUT.
Thebuck-boostconverteroperatesasanH-BridgeforallBAT/VOUTconditionswhennotinsleep(seeFigure3).
SwitchesAandCturnONatthebeginningofeachburstcycle.
InductorcurrentrampstoIPEAKandthenswitchesAandCturnOFF.
SwitchesBandDthenturnONuntiltheinductorcurrentrampstozero(IZERO).
ThiscyclerepeatsuntilVOUTreachesthesleepthreshold.
ACBDtACqAC(ON)SLEEPTIMEBURSTSLEEP03335F03ILIPEAKACBDtACIfIPEAKandtheswitchAC(ON)time(tAC)arebothknown,thentheBATdischargecoulombs(shadedareainFigure3)canbecalculatedbycountingthenumberofAC(ON)cyclesandmultiplyingbythechargeperAC(ON)cyclegiveninFormula(1)below:qAC(ON)=IPEAKtAC2(1)Whenthebuck-boostisoperating,theLTC3335measurestheactualAC(ON)timerelativetoafullscaleONtime(tFS,approximately11.
74s)whichisinternallyadjustedtocompensatefordifferencesbetweentheactualIPEAK16OperationTable4.
WriteRegistersA,B,andEBITNAMEOPERATIONDEFAULTA[3:0]PrescalerBitsSetcoulombcounterprescalingfactorMfrom0to150000A[7:4]VOUTSelectionSelectionofoutputvoltage0000B[7:0]AlarmLevelCoulombcountalarmlevelthresholdcalculatedbytheuserbasedonbatterycapacityandIPEAKcurrent11111111E[0]Clear_IntClearinterrupt(Alarmreset)0E[1]CounterTestCountercheckusingIRQpin0E[7:2]NotUsedTable5.
Read/WriteRegisterCBITNAMEOPERATIONDEFAULTC[7:0]AccumulatedChargeReadback8MSBsofcounterdata00000000Table6.
ReadRegisterDBITNAMEOPERATIONDEFAULTD[0]AC(ON)TimeOverflowAC(ON)timeoperatingfault(tAC>tFS)duetoimproperlychoseninductorvaluetimingouttheAC(ON)measurement0D[1]CoulombCounterOverflowCoulombcounteroperatingfaultduetoanimproperlychosenprescalercausingtheripplecountertooverflow0D[2]AlarmTripAccumulatorRegisterCvaluehasmetorexceededtheAlarmthresholdsetinRegisterB0D[7:3]NotUsed00000OutputVoltageSettingViaI2CSelectionoftheoutputvoltagecanbedonenotonlyviapinsOUT[2:0],butalsoviaI2C(seeTable7).
TheusercanchangetheVOUTsettingsdynamicallybywritingtoregisterA.
NotethatbitA[7]mustbesetto1forbitsA[6:4]totakeeffect.
Table7.
VOUTSelectionBitsBITSETDESCRIPTIONA[4]0/1OverwriteOUT0PinA[5]0/1OverwriteOUT1PinA[6]0/1OverwriteOUT2PinA[7]1Mustbe1tosetoutputvoltageviaI2CChoosingCoulombCounterPrescalerMTopreservedigitalresolutionforawiderangeofbatterycapacitiesandpeakcurrentvalues,theLTC3335includesaprogrammableprescaler.
Theusercansettheprescalervaluefrom0to15bywritingbitsA[3:0].
Thedefaultvaluefortheprescaleris0.
TousethemajorityoftherangeofAccumulatedChargeRegisterC,theprescalerfactor(M)shouldbechosenforagivenbatterycapacityQBATbasedonFormula(2):M=log2qLSB255QBAT(2)whereQBATisthebatterysizeinAhrandqLSBisthetypicalvalue(forM=0)fromtheElectricalCharacteristicstablefortheselectedIPEAK.
Mmustbeaninteger,sotheresultofFormula(2)mustberoundeddowntothenextintegervalue.
Mhasamaximumvalueof15.
AsmallercapacitybatterywillrequireahigherprescalerfactorMthanalargercapacitybatteryforthesameIPEAK.
Likewise,alowerIPEAKwillrequireahigherprescalerfac-torMthanahigherIPEAKforthesamecapacitybattery.
Theamountofchargerepresentedbytheleastsignificantbit(qLSB_M)oftheaccumulatedchargeregisterisgivenby:qLSB_M=qLSB2M(3)whereqLSBisthetypicalvalueinElectricalCharacteristicstablefortheselectedIPEAK.
CounterCheckTestSettingthebitE[1]=1allowstheusertoverifythatthecoulombcounterisoperatingcorrectlywithouthavingtowaitfortheaccumulatedchargeregistertoincrementfrom00000000.
InthismodetheinputclockoftheripplecounterisoutputtotheIRQpin,andthefrequencyofswitchingseenattheIRQpinwillincreasewithoutputload.
17OperationAlarmAnalarmcausestheIRQpintobepulledlow.
TheusercanreadregisterDtodeterminewhatcausedthealarm.
Thealarmcanthenbeclearedbywriting1tobitE[0].
Theclearinterruptbitisself-clearingaftertakingactionontheIRQpin.
Whenclearinganalarm,ifanotheralarmtrips,theIRQpinwillgohighfor1s(typical)beforereturninglowagain.
Duringthistime,theclearinterruptbitE[0]isalsoresettozero.
Thereare3differentfault/alarmconditions:1)AnAC(ON)timeoverflow(D[0]ishigh)duetoanim-properlychoseninductorvaluetimingouttheAC(ON)timemeasurement.
AfterthealarmisclearedtheIRQpingoeshighandstayshighatleastuntilthenextAC(ON)pulseismeasured.
AdifferentinductororIPEAKsettingneedstobechosentokeepthealarmfromcontinuouslytripping.
2)Acoulombcounteroverflow(D[1]ishigh)duetoanimproperlychosenprescalervaluecausingtheripplecountertooverflow.
AfterthealarmisclearedtheIRQpinisreleasedfor1sandlaterpulledlowagainun-lessregisterCisoverwrittenwithalowervalueandtheprescalerischanged.
3)Thepresetalarmlevelisreached(D[2]ishigh)whenthe8MSBsoftheripplecounterareequaltoorhigherthanthe8bitsinregisterB.
TheusershouldincreasethealarmthresholdinregisterBandthenwritebitE[0]to1toclearthealarm.
ThealarmthresholdisonlycheckedaftereachAC(ON)pulseorwhenawritetoregisterCisdoneviaI2C.
Therefore,ifbitE[0]issetto1toclearanalarminter-ruptwithoutalsochangingthecontentsofregisterBand/orC,andthisoccursduringalongsleeptime,theIRQpinisclearedanddoesn'tgobacklowagainuntilthenextAC(ON)pulse.
PowerUpSequenceWhenthebatteryisfirstinsertedandtheinternalcircuitsarepoweringup,theLTC3335resetsallregisterstotheirdefaultstates,includingtheadderandtheripplecounter.
Thebuck-boostrequiresafinitestartuptimeuntilVOUTchargesuptothetargetvalue.
WhenVOUTreachesthePGOODthreshold,thePGOODpingoeshigh.
Duringtheentirestart-upsequence,thecoulombcountercountscorrectly.
IftheENpinispulledlow,thebuck-boostisdisabled.
However,thedigitalregistercontentsofthecoulombcounterremainsavedinmemory.
Whenre-enabled,thecoulombcountercontinuescountingfromwhereitleftoff.
ThedigitalregistersareresetonlyiftheBATvoltageislost.
DVCCI2CPowerSupplyTheDVCCpincanbeconnectedtoBAT,toVOUT,ortoaseparateexternalsupplybetween1.
8Vand5.
5V.
Apower-on-resetcircuitmonitorstheDVCCsupply.
ForDVCCvoltagesbelow1.
3V(typical),theI2Cinterfaceisdisabled.
Theusercan'treadorwrite,butthecoulombcounterisstillfullyfunctional.
IftheBATvoltageislost,thecoulombcounterandthebuck-boostareswitchedoffandthecontentsofalldigitalregistersarelost.
ThefullfunctionalityofthecoulombcounterisguaranteedforBATvoltagesequaltoorgreaterthan1.
8V.
IfDVCCisconnectedtoVOUTortoaseparateexternalsupply,thecoulombcounterisstillfullyfunctional,evenifVOUT=0Vsuchasduringstartup.
Fortheexternalpull-upresistorsontheSDAandSCLpins,10kΩisrecommended.
18Input/OutputCapacitorSelectionTheinputcapacitorforthebuck-boostontheBATpinshouldbebypassedwithatleast4.
7μFtoGND.
Incaseswheretheseriesresistanceofthebatteryishigh,alargercapacitormaybedesiredtohandletransients.
Alargercapacitormayalsobenecessarywhenoperatingcloseto1.
8VathigherIPEAKsettingstopreventthebat-teryvoltagefromfallingbelow1.
8Vwhenthebuck-boostisswitching.
Thedurationforwhichthebuck-boostregulatorsleepsdependsontheloadcurrentandthesizeoftheVOUTcapacitor.
Thesleeptimedecreasesastheloadcurrentincreasesand/orastheoutputcapacitordecreases.
TheDCsleephysteresiswindowis±6mVforthe1.
8Voutputsettingandscaleslinearlywiththeoutputvoltagesetting(±12mVforthe3.
6Vsetting,etc.
).
Ideallythismeansthatthesleeptimeisdeterminedbythefollowingequation:tSLEEP=COUTVDC_HYSILOAD(4)Thisistrueforoutputcapacitanceontheorderof100μForlarger,butastheoutputcapacitancedecreasestowards10μF,delaysintheinternalsleepcomparatoralongwiththeloadcurrentitselfmayresultintheVOUTvoltageslewingpasttheDCthresholds.
ThiswilllengthenthesleeptimeandincreaseVOUTripple.
Anoutputcapacitancelessthan22μFisnotrecommendedasVOUTripplecouldincreasetoanundesirablelevel.
Iftransientloadcurrentshigherthanthemaximumde-liverablearerequired,thenalargercapacitorshouldbeusedattheoutput.
ThiscapacitorwillbecontinuouslydischargedduringaloadconditionandthecapacitorcanbesizedforanacceptabledropinVOUT:COUT=tLOADILOAD–IDC/DCVOUT+–VOUT–(5)HereVOUT+isthevalueofVOUTwhenPGOODgoeshighandVOUT–isthedesiredlowerlimitofVOUT.
IDC/DCistheaveragecurrentbeingdeliveredfromthebuck-boostconverter,andtLOADisthedurationofthetransientload.
TheLTC3335alwaysoperatesasanH-bridge,evenatstart-up.
Thestart-updurationisdependentontheloadcurrentandtheoutputcapacitor;alargeroutputcapacitormakesthestart-uptimelonger.
AstandardsurfacemountceramiccapacitorcanbeusedforCOUT.
Someapplications,however,maybenefitfromalowleakagealuminumelectrolyticcapacitororasupercapacitor.
ThesecapacitorscanbeobtainedfrommanufacturerssuchasVishay,IllinoisCapacitor,AVX,orCAP-XX.
InductorSelectionTheAC(ON)andBD(ON)timesaredeterminedtofirstorderbyBAT,VOUT,theinductorvalue,andtheIPEAKcurrentsetting.
ACON()=IPEAKLBAT(6)BDON()=IPEAKLVOUT(7)Thebuck-boostisdesignedtoworkwitha100μHinductorfortypicalapplicationsusingthe100mApeakcurrentsetting.
FortheothersevenIPEAKsettingstheinductorvalueshouldscalesoastokeeptheIPEAKLproductapproximatelyconstant.
Thismaintainson-timesrequiredforaccuratecoulombcounteroperation.
Thenominalrecommendedinductorvalue(LREC)foreachIPEAKsettingisgiveninTable8.
Table8.
RecommendedInductorValueLRECvsIPEAKIPEAKSETTING(mA)LREC(H)522001010001568025470502201001001506825047ApplicationsInformation19ApplicationsInformationHighervalueinductorsprovidethebenefitoflowerswitch-inglossesbyincreasingbothAC(ON)andBD(ON).
How-ever,caremustbetakensothatAC(ON)neverexceedsthemaxfull-scaletimetFS(11.
74s).
RecommendedinductorvaluesfromTable8assurethatforBATfrom1.
8Vto5.
5V,VOUTfrom1.
8Vto5V,and±20%inductorvariation,theAC(ON)timeisalwaysbelow11.
74s.
IfintheapplicationtheminimumBATvoltageishigherthan1.
8V,theinductorvaluecanbeincreasedusingtheformulabelow:LMAX=BATMINLREC1.
8(8)whereLMAXisthemaximuminductorvalue(includingproductiontolerance),LRECistheinductorvaluefromTable8andBATMINistheminimumBATvoltageusedintheapplication.
Inductorstypicallyhaveproductiontolerancesof±20%.
TheDCRoftheinductorcanhaveanimpactonefficiencyasitisasourceofloss.
InadditionitisasourceoferrorforthecoulombcounterbecauseitincreasesthenonlinearityoftheinductorcurrentduringtheAC(ON)time.
ChooseaninductorwithanISATratingatleast50%greaterthantheselectedIPEAKvalue.
Table9listsseveralinductorsthatworkwell.
Trade-offsbetweenprice,size,andDCRshouldbeevaluated.
LoadCurrentCapabilityThemaximumloadcurrentthebuck-boostcansupportdependsontheIPEAKsetting,theBATvoltage,andtheVOUTvoltageandisideallygivenby:ILOAD(MAX)=IPEAK2BATBAT+VOUT(9)However,duetofiniteRDS(ON)ofpowerFETsA,B,C,andD,aswellasinductorDCR,themaximumdeliverablecurrentisactuallylower.
RefertothecurvesgivenintheTypicalPerformanceCharacteristicssectionforactualloadcurrentcapabilityundervariousconditions.
CoulombCounterErrorsThebatterydischargecoulombsiscalculatedbycount-ingthenumberofAC(ON)cyclesandmultiplyingbythenumberofcoulombsperAC(ON)timegivenbythefol-lowingformula:qACON()=IPEAKtAC2(10)ThisformulaassumesthattheLTC3335inputquiescentcurrent,gatechargecurrent,RDS(ON)ofthepowerswitches,andtheinductorDCRhavenegligibleeffect.
Italsoas-sumesthateverypulsestartsfromaninductorcurrentequalto0andendsatIPEAK.
Thecontributionofeachoftheseerrorswillbediscussedinthefollowingsections.
InputQuiescentCurrentErrorThecontrolcircuitofthebuck-boostconsumesDCquies-centcurrentwhennotinsleep.
ThiscurrentisdependentonBATvoltageandtemperatureasshownintheTypicalPerformanceCharacteristicssection.
Thiscurrent,(typi-cally360A)generatesasmallerroratthe250mApeakcurrentsetting,butcanbesignificantforlowerpeakcur-rentsettingsasshowninFigures4and5.
Whenthebuck-boostissleeping,theDCquiescentcurrentistypically680nA.
Thisequatestoanerrorof5.
96mAhrperyearofcumulativesleeptime.
Forabatterycapacityof18.
3Ahr,theerrorisonly0.
033%peryear.
AsshowninFigure6,forloadcurrentssmallerthanapproximately100A,thesleepcurrentcanresultinasignificanterror.
20ApplicationsInformationTable9.
RecommendedInductorsfortheLTC3335MANUFACTURERPARTFAMILYL(H)ISAT(MAX)(A)DCRMAX(Ω)WIDTH(mm)LENGTH(mm)HEIGHT(mm)For250mAIPEAKSettingCoilcraftLPS5030470.
550.
335.
515.
512.
9VishayIDCS-2512470.
50.
236.
64.
452.
92SumidaCDRH4D29470.
360.
2395.
15.
13WurthWE-TPCSMD4828470.
50.
284.
84.
82.
8For150mAIPEAKSettingCoilcraftLPS5030680.
440.
445.
515.
512.
9VishayIDCS-2512680.
40.
296.
64.
452.
92SumidaCDRH4D29680.
30.
3555.
15.
13WurthWE-TPCSMD4828680.
40.
44.
84.
82.
8For100mAIPEAKSettingCoilcraftLPS50301000.
320.
65.
515.
512.
9VishayIDCS-25121000.
30.
486.
64.
452.
92SumidaCDRH4D291000.
240.
5235.
15.
13WurthWE-TPCSMD48281000.
290.
64.
84.
82.
8For50mAIPEAKSettingCoilcraftLPS50302200.
2451.
355.
515.
512.
9VishayIDCS-25122200.
220.
776.
64.
452.
92SumidaCDRH60D452200.
391.
026.
46.
14.
8WurthWE-TPCSMD48282200.
21.
254.
84.
82.
8For25mAIPEAKSettingCoilcraftLPS50304700.
1462.
85.
515.
512.
9VishayIDCS-25124700.
191.
86.
64.
452.
92SumidaCDMPIH58D284700.
143663.
2WurthWE-TPCSMD48284700.
1252.
64.
84.
82.
8For15mAIPEAKSettingCoilcraftLPS50306800.
1263.
85.
515.
512.
9VishayIDCS-25126800.
182.
26.
64.
452.
92SumidaCDMPIH58D286800.
124.
4663.
2WurthWE-PDSMD73326800.
225.
737.
37.
33.
2For10mAIPEAKSettingCoilcraftLPS503010000.
115.
15.
515.
512.
9VishayIDCS-251210000.
153.
46.
64.
452.
92SumidaCDMPIH58D2810000.
096.
6663.
2WurthWE-TPCSMD482810000.
0874.
84.
82.
8For5mAIPEAKSettingCoilcraftLPS503022000.
08115.
515.
512.
9VishayIDCS-251222000.
18.
56.
64.
452.
92SumidaCDMPIH58D2822000.
06516.
5663.
2WurthWE-PD2SMD105422000.
265.
31095.
421ApplicationsInformationFigure6.
TypicalErrorDuetoSleepCurrent(250mAIPEAKSetting,VOUT=3.
3V)BATVOLTAGE(V)ERROR(%)–0.
8–0.
40.
05.
33335F04–1.
0–0.
6–0.
2–1.
22.
83.
84.
82.
31.
83.
34.
3VOUT=1.
8VVOUT=3.
3VVOUT=5VTA=25°CBATVOLTAGE(V)ERROR(%)–20–1005.
33335G05–25–30–35–15–5–402.
83.
84.
82.
31.
83.
34.
3VOUT=1.
8VVOUT=3.
3VVOUT=5VTA=25°CFigure4.
TypicalErrorDuetoInputQuiescentCurrentfor250mAIPEAKSettingFigure5.
TypicalErrorDuetoInputQuiescentCurrentfor5mAIPEAKSettingLOADCURRENT(mA)0.
10ERROR(%)–2023335F06–4–5–6–7–8–9–3–11–1010.
001.
000.
01BAT=5.
5VBAT=4.
2VBAT=3.
6VBAT=1.
8VTA=25°CGateChargeCurrentErrorThegatechargecurrentneededtoturnonandoffswitchesA,B,andCisalsoasourceoferrorforthecoulombcounter.
ThiserrorincreasesathigherBATvoltagesandisgenerallyhigheratlowIPEAKsettingsasshowninFigures7,8,and9.
GatechargecurrentforswitchDisprovidedfromtheoutputanddoesnotcreateanerror.
PowerSwitchesRDS(ON)ErrorThebatterydischargecoulombsarecalculatedassumingthattheinductorcurrentrisestotheIPEAKsettingvaluelinearly.
However,finiteRDS(ON)ofswitchesAandCcausetheactualinductorcurrenttobowslightlywhichcreatesanundercountinthecoulombcounter(seeFigure10).
ThiserrorincreasesatlowerBATvoltagesandathighertemperature.
InductorDCRErrorAninductorwithhighDCRgeneratesthesametypeoferrorasthepowerswitchesRDS(ON)errorduetoasimilarnonlinearbowingoftheinductorcurrentwaveform.
UsingtherecommendedinductorsfromTable9assuresthatthecoulombcountererrorduetotheDCRissmall.
OtherErrorsEachoftheindividualcoulombcountererrortermsdiscussedaboveresultsinanundercountofthebatterydischargecoulombs(negativepercenterror).
Thereare,however,othererrortermswhichcancontributetoanover-countofthebatterydischargecoulombs(positivepercenterror).
Forexample,IZEROcanbeslightlynegativeundersomeconditions,andthisresultsinaslightovercount.
ThisparticularerrorismorelikelytooccuratlowBATvoltages,highIPEAKsettings,and/orhighVOUTvoltages.
TotalCoulombCounterErrorThetotalunadjustedcoulombcountererrorcurvesintheTypicalPerformanceCharacteristicssectionshowactualdatatakenfromanactualcircuitandincludetheeffectsofalloftheabovementionederrorsourceswiththeexceptionofthesleepcurrenterror,asthesecurvesweretakenwithcontinuousswitching.
Theerrorspresent22ApplicationsInformationBAT(V)ERROR(%)–1–203.
84.
34.
85.
33335F07–4–5–3–61.
82.
32.
83.
310mA25mA100mA250mA5mA15mA50mA150mABAT(V)ERROR(%)–1–3–203.
84.
34.
85.
33335F08–5–4–61.
82.
32.
83.
310mA25mA100mA250mA5mA15mA50mA150mABAT(V)ERROR(%)–1–3–203.
84.
34.
85.
33335F09–5–4–7–61.
82.
32.
83.
310mA25mA100mA250mA5mA15mA50mA150mAFigure7.
TypicalErrorDuetoGateChargeCurrentVOUT=1.
8V,AmbientTemperatureFigure10.
Figure8.
TypicalErrorDuetoGateChargeCurrentVOUT=3.
3V,AmbientTemperatureFigure9.
TypicalErrorDuetoGateChargeCurrentVOUT=5V,AmbientTemperaturetACqAC(ON)ERRORTIME3335F10ILACREALINDUCTORCURRENTBDduringcontinuousswitchingarewell-characterizedforagivensetofoperatingconditionsandcantofirstorderbecompensatedforbyapplyingamultiplicativescalefactortotherawcoulombcountreportedbytheLTC3335.
Theerrorduetothesleepcurrentcanthenbecompensatedforbyaddinganoffsettermequaltothesleepcurrentmultipliedbythecumulativesleeptime(orifnotknown,thebatteryservicetime).
Theerroradjustmentisgivenbythefollowingformula:AdjustedCoulombCount=(RawCoulombCount)[1/(1+Error)]+(5.
96mAhr)Years/qLSB_MwhereErroristheerrorin%fromFiguresG37-G44intheTypicalPerformanceCharacteristics,qLSB_MistheleastsignificantbitoftheaccumulatedchargeregisterforthechosenPrescalerMinAhr,andYearsisthenumberofyearsofcumulativebatteryservice.
Thefollowingtwoexamplesfurtherillustratehowtocompensatefortherawcoulombcounterror.
Example1:ATadiranTL4903primarycell(3.
6Vnominal,2.
4Ahr)ispoweringa3.
3VoutputandtheIPEAKsettingis100mA.
TheappropriateprescalerisM=8.
FromcurveG39intheTypicalPerformanceCharacteristics,thenominalerrorforcontinuousswitchingundertheseconditionsisonly+0.
5%.
TherawcoulombcountC[7:0]readfromtheLTC3335canbeadjustedbymultiplyingby1/(1+0.
005).
Tothisresult,theerrorduetothesleepcurrent(5.
96mAhrforeachyearofuse)canbeadded,butthisadditionaltermcorrespondstolessthan0.
25%ofthebattery'sca-pacityperyearofservice.
Inthisexample,thedifferencebetweentherawandadjustedcoulombcountisminimal.
23ApplicationsInformationExample2:APanasonicCR2032primarycell(3.
0Vnomi-nal,225mAhr)ispoweringa5VoutputandtheIPEAKsettingis5mA.
TheappropriateprescalerisM=7.
FromcurveG44intheTypicalPerformanceCharacteristics,thenominalerrorforcontinuousswitchingunderthesecondi-tionsis–16%.
Inthiscasetherawcoulombcounterrorissignificantifleftunadjusted.
Supposeafter6monthsofbatteryservice,theaccumulatedchargeregisterC[7:0]reads28h(hex)or40(decimal).
Theadjustedcoulombcountisgivenby:AdjustedCoulombCount=40(1/(1–0.
16)+(5.
96mAhr)0.
5/(140.
6mAhr/27)=51Theadjustedcoulombcountwillmoreaccuratelyrepresenttheactualcoulombsandthepresetalarmlevel(ifused)canbeappropriatelyadjustedtocompensateforthis:AdjustedAlarmSetCount=[(DesiredAlarmLevel/100)QBAT)-(5.
96mAhrYears)](1+Error/100)1/qLSB_MwhereDesiredAlarmLevelisthepercentageofthebatterycapacityatwhichtotripthealarm.
I2CInterfaceTheLTC3335communicateswithabusmasterusingthestandardI2C2-wireserialinterface.
TheTimingDiagram(Figure1)showstherelationshipofthesignalsonthebus.
Thetwobuslines,SDAandSCL,mustbeHIGHwhenthebusisnotinuse.
Externalpull-upresistorsarerequiredontheselines.
TheI2Ccontrolsignals,SDAandSCL,arescaledinternallytotheDVCCsupply.
DVCCshouldbeconnectedtothesamepowersupplyasthebuspull-upresistors.
TheI2CporthasanundervoltagelockoutontheDVCCpin.
WhenDVCCisbelowapproximately1.
3V,theI2Cserialportisdisabled.
BusSpeedTheI2Cportisdesignedtooperateatspeedsofupto400kHz.
Ithasbuilt-intimingdelaystoensurecorrectoperationwhenaddressedfromanI2Ccompliantmasterdevice.
Italsocontainsinputfiltersdesignedtosuppressglitches.
STARTandSTOPConditionsAbusmastersignalsthebeginningofcommunicationsbytransmittingaSTARTcondition.
ASTARTconditionisgeneratedbytransitioningSDAfromHIGHtoLOWwhileSCLisHIGH.
Themastermaytransmiteithertheslavewriteaddressortheslavereadaddress.
OncedataiswrittentotheLTC3335,themastermaytransmitaSTOPcondi-tionwhichcommandstheLTC3335toactuponitsnewcommandset.
ASTOPconditionissentbythemasterbytransitioningSDAfromLOWtoHIGHwhileSCLisHIGH.
ByteFormatEachframesenttoorreceivedfromtheLTC3335mustbeeightbitslong,followedbyanextraclockcyclefortheacknowledgebit.
ThedatamustbesenttotheLTC3335mostsignificantbit(MSB)first.
MasterandSlaveTransmittersandReceiversDevicesconnectedtoanI2Cbusmaybeclassifiedaseithermasterorslave.
Atypicalbusiscomposedofoneormoremasterdevicesandanumberofslavedevices.
Somedevicesarecapableofactingaseitheramasteroraslave,buttheymaynotchangeroleswhileatransactionisinprogress.
Thetransmitter/receiverrelationshipisdistinctfromthatofmasterandslave.
ThetransmitterisresponsibleforcontroloftheSDAlineduringtheeightbitdataportionofeachframe.
ThereceiverisresponsibleforcontrolofSDAduringtheninthandfinalacknowledgeclockcycleofeachframe.
AlltransactionsareinitiatedbythemasterwithaSTARTorrepeatSTARTcondition.
Themastercontrolstheactive(falling)edgeofeachclockpulseonSCL,regardlessofitsstatusastransmitterorreceiver.
TheslavedeviceneverbringsSCLLOW.
TheLTC3335doesnotclockstretchandwillneverholdSCLLOWunderanycircumstance.
24ApplicationsInformationThemasterdevicebeginseachI2Ctransactionasthetransmitterandtheslavedevicebeginseachtransactionasthereceiver.
Forbuswriteoperations,themasteractsasthetransmitterandtheslaveactsasreceiverforthedurationofthetransaction.
Forbusreadoperations,themasterandslaveexchangetransmit/receiverolesfollowingtheaddressframefortheremainderofthetransaction.
AcknowledgeTheacknowledgesignal(ACK)isusedforhandshakingbetweenthetransmitterandreceiver.
WhentheLTC3335iswrittento,itacknowledgesitswriteaddressaswellasthesubsequentdatabytesasaslavereceiver.
Whenitisreadfrom,theLTC3335acknowledgesitsreadaddressasaslavereceiver.
TheLTC3335thenchangestoaslavetransmitterandthemasterreceivermayoptionallyacknowl-edgereceiptofthefollowingdatabytefromtheLTC3335.
Theacknowledgerelatedclockpulseisalwaysgeneratedbythebusmaster.
Thetransmitter(masterorslave)releasestheSDAline(HIGH)duringtheacknowledgeclockcycle.
Thereceiver(slaveormaster)pullsdowntheSDAlineduringtheacknowledgeclockpulsesothatitisastableLOWduringtheHIGHperiodofthisclockpulse.
WhentheLTC3335isreadfrom,itreleasestheSDAlineaftertheeighthdatabitsothatthemastermayacknowl-edgereceiptofthedata.
TheI2Cspecificationcallsforanotacknowledge(NACK)bythemasterreceiverfollowingthelastdatabyteduringareadtransaction.
UponreceiptoftheNACK,theslavetransmitterisinstructedtoreleasecontrolofthebus.
BecausetheLTC3335onlytransmitsonebyteofdataunderanycircumstance,amasterac-knowledgingornotacknowledgingthedatasentbytheLTC3335hasnoconsequence.
TheLTC3335willreleasethebusineithercase.
SlaveAddressTheLTC3335respondstoa7-bitaddresswhichhasbeenfactoryprogrammedto1100100[R/W].
TheLSBoftheaddressbyte,knownastheread/writebit,shouldbe0whenwritingdatatotheLTC3335,and1whenreadingdatafromit.
Consideringtheaddressan8-bitword,thenthewriteaddressis0xC8,andthereadaddressis0xC9.
TheLTC3335willacknowledgebothitsreadandwriteaddresses.
SubaddressedAccessTheLTC3335hasthreewriteregistersforcontrolinput,onereadregisterforalarmreportingandoneread/writeregisterfortheaccumulatedbatterydischarge.
TheyareaccessedbytheI2CportviaasubaddressedpointersystemwhereeachsubaddressvaluepointstooneofthefivecontrolorstatusregisterswithintheLTC3335.
SeeTable3forsubaddressinformation.
ThesubaddresspointerisalwaysthefirstbytewrittenimmediatelyfollowingtheLTC3335writeaddressdur-ingbuswriteoperations.
ThesubaddresspointervaluepersistsafterthebuswriteoperationandwilldeterminewhichdatabyteisreturnedbytheLTC3335duringanysubsequentbusreadoperations.
BusWriteOperationThebusmasterinitiatescommunicationwiththeLTC3335withaSTARTconditionandtheLTC3335'swriteaddress.
IftheaddressmatchesthatoftheLTC3335,theLTC3335returnsanacknowledge.
Thebusmastershouldthende-liverthesubaddress.
ThesubaddressvalueistransferredtoaspecialpointerregisterwithintheLTC3335uponthereturnofthesubaddressacknowledgebitbytheLTC3335.
Ifthemasterwishestocontinuethewritetransaction,itmaythendeliverthedatabyte.
ThedatabyteistransferredtoaninternalpendingdataregisteratthelocationofthesubaddresspointerwhentheLTC3335acknowledgesthedatabyte.
TheLTC3335isthenreadytoreceiveanewsubaddress,optionallyrepeatingthe[SUBADDRESS][DATA]cycleindefinitely.
Afterthewriteaddress,theoddpositionbytesalwaysrepresentasubaddresspointeras-signmentandtheevenpositionbytesalwaysrepresentdatatobestoredatthelocationreferencedbythesubaddresspointer.
ThemastermayterminatecommunicationwiththeLTC3335afteranyevenoroddnumberofbyteswith25ApplicationsInformationeitherarepeatSTARToraSTOPcondition.
IfarepeatSTARTconditionisinitiatedbythemaster,theLTC3335,oranyotherchipontheI2Cbus,canthenbeaddressed.
TheLTC3335willremember,butnotacton,thelastinputofvaliddatathatitreceivedateachsubaddresslocation.
Thiscyclecanalsocontinueindefinitely.
Onceallchipsonthebushavebeenaddressedandsentvaliddata,aglobalSTOPcanbesentandtheLTC3335willimmediatelyupdateallofitscommandregisterswiththemostrecentpendingdatathatithadpreviouslyreceived.
BusReadOperationTheLTC3335contains2readableregisters.
Oneisreadonlyandcontainsalarminformation(RegisterD).
Theothercontainsaccumulatedbatterydischargeinformation(RegisterC)whichmaybebothwrittenandreadbackbythebusmaster.
Onlyonesubaddresseddataregisterisaccessibleduringeachbusreadoperation.
ThedatareturnedbytheLTC3335isfromthedataregisterpointedtobythecontentsofthesubaddresspointerregister.
Thepointerregistercontentsaredeterminedbythepreviousbuswriteoperation.
Inpreparationforabusreadoperation,itmaybead-vantageousforabusmastertoprematurelyterminateawritetransactionwithaSTOPorrepeatSTARTconditionaftertransmittingonlyanoddnumberofbytes.
Thelasttransmittedbytethenrepresentsapointertotheregisterofinterestforthesubsequentbusreadoperation.
ThebusmasterreadsstatusdatafromtheLTC3335withaSTARTorrepeatSTARTconditionfollowedbytheLTC3335readaddress.
IfthereadaddressmatchesthatoftheLTC3335,theLTC3335returnsanacknowledge.
Followingtheacknowledgementofitsreadaddress,theLTC3335returnsonebitofstatusinformationforeachofthenexteightclockcyclesfromtheregisterselectedbythesubaddresspointer.
AdditionalclockcyclesfromthemasterafterthesingledatabytehasbeenreadwillleavetheSDAlinehigh(0xFFtransmitted).
TheLTC3335willneveracknowledgeanybytesduringabusreadoperationwiththeexceptionofitsreadaddress.
Toreadthesameregisteragain,thetransactionmayberepeatedstartingwithaSTARTfollowedbytheLTC3335readaddress.
Itisnotnecessarytorewritethesubaddresspointerregisterifthesubaddresshasnotchanged.
Toreadadifferentregister,awritetransactionmustbeinitiatedwithaSTARTorrepeatSTARTfollowedbytheLTC3335writeaddressandsubaddresspointerbytebeforethereadtransactionmayberepeated.
Whenthecontentsofthesubaddresspointerregisterpointtowrite-onlycommandregister(A,B,E),thedatareturnedinabusreadoperationisthependingcommanddataatthatlocationifithadbeenmodifiedsincethelastSTOPcondition.
AfteraSTOPcondition,allpendingdataiscopiedtothecommandregistersforimmediateeffect.
WhenthecontentsofthesubaddresspointerregisterpointtothewritableandreadablecommandregisterC,thedatareturnedinabusreadoperationisdataatthatlocation,notthependingcommanddatafrompreviouswriteoperation.
AfteraSTOPcondition,allpendingdataiscopiedtothecommandregistersforimmediateeffectandafollowingreadoperationcanreadtheeffect.
Whenthecontentsofthesubaddresspointerregisterpointtotheread-onlyalarmregisterD,thedatareturnedisasnapshotofthestateoftheLTC3335ataparticularinstantintime.
Ifnointerruptrequestsarepending,thestatusdataissampledwhentheLTC3335acknowledgesitsreadaddress,justbeforetheLTC3335beginsdatatransmissionduringabusreadoperation.
Whenanalarm/faultoccurs,theIRQpinisdrivenlowanddataislatchedinthealarmregisterDatthatmoment.
AnysubsequentreadoperationfromregisterDwillreturnthisfrozendatatofacilitatedeterminationofthecauseoftheinterruptrequest.
AfterthebusmasterclearstheLTC3335interruptrequest(E[0]=1),thestatuslatchesarecleared.
Busreadoperationswillthenagainreturneitherasnapshotofthedataatthereadaddressacknowledge,oratthetimeofthenextinterruptassertion,whichevercomesfirst.
26typicalapplicationLi-IonBATTERY3.
6V10FIPEAK=100mA(3V)(3.
3V)DC/DC47F10k10k10FI2CPSW1BATVOUTPVOUTSCLSDA12VMAINSUPPLYSYSTEMSUPPLY3V3.
3VVtPGOOD3335TA03IRQDVCCPBATIPK[2]IPK[1]IPK[0]OUT[2]OUT[1]OUT[0]ENGNDSW2LTC33353.
3VSYSTEMSUPPLY3VINBACKUPMAINSUPPLY12V100H+LiFePO4BATTERY3.
2V10FIPEAK=250mA100H47F10FCAPSWLTC3388-1PGOODEND1D0STBYGNDVINVOUTVIN247F5V1.
8VI2CPSW1BATVOUTPVOUTSCLSDAPGOOD3335TA04IRQDVCCPBATIPK[2]IPK[1]IPK[0]OUT[2]OUT[1]OUT[0]ENGNDSW2LTC333510k10k+47HBackupPowerSupplyDual5V/1.
8VRegulatorWhereLTC3335CountsCoulombsforBothOutputRails27InformationfurnishedbyLinearTechnologyCorporationisbelievedtobeaccurateandreliable.
However,noresponsibilityisassumedforitsuse.
LinearTechnologyCorporationmakesnorepresenta-tionthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
PackageDescriptionPleaserefertohttp://www.
linear.
com/designtools/packaging/forthemostrecentpackagedrawings.
3.
00±0.
101.
50REF4.
00±0.
10NOTE:1.
DRAWINGISNOTAJEDECPACKAGEOUTLINE2.
DRAWINGNOTTOSCALE3.
ALLDIMENSIONSAREINMILLIMETERS4.
DIMENSIONSOFEXPOSEDPADONBOTTOMOFPACKAGEDONOTINCLUDEMOLDFLASH.
MOLDFLASH,IFPRESENT,SHALLNOTEXCEED0.
15mmONANYSIDE5.
EXPOSEDPADSHALLBESOLDERPLATED6.
SHADEDAREAISONLYAREFERENCEFORPIN1LOCATIONONTHETOPANDBOTTOMOFPACKAGEPIN1TOPMARK(NOTE6)0.
40±0.
10192012BOTTOMVIEW—EXPOSEDPAD2.
50REF0.
75±0.
05R=0.
115TYPPIN1NOTCHR=0.
20OR0.
25*45°CHAMFER0.
25±0.
050.
50BSC0.
200REF0.
00–0.
05(UDC20)QFN1106REVRECOMMENDEDSOLDERPADPITCHANDDIMENSIONSAPPLYSOLDERMASKTOAREASTHATARENOTSOLDERED0.
70±0.
050.
25±0.
052.
50REF3.
10±0.
054.
50±0.
051.
50REF2.
10±0.
053.
50±0.
05PACKAGEOUTLINER=0.
05TYP1.
65±0.
102.
65±0.
101.
65±0.
052.
65±0.
050.
50BSCUDCPackage20-LeadPlasticQFN(3mm*4mm)(ReferenceLTCDWG#05-08-1742Rev)28LINEARTECHNOLOGYCORPORATION2015LT0815PRINTEDINUSALinearTechnologyCorporation1630McCarthyBlvd.
,Milpitas,CA95035-7417(408)432-1900FAX:(408)434-0507www.
linear.
com/LTC3335RelatedPartsTypicalApplicationPARTNUMBERDESCRIPTIONCOMMENTSLTC2941BatteryGasGaugewithI2CInterface2.
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7Vto5.
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4Vto15V,IQ=1.
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7Vto20V,BAT:1.
8Vto5.
5V,750nAIQ5mm*5mmQFN-32PackageLTC3331NanopowerBuck-BoostDC/DCwithEnergyHarvestingBatteryChargerVIN:2.
7Vto20V,BATFloat:3.
45V/4V/4.
1V/4.
2V,950nAIQ5mm*5mmQFN-32PackageLTC3388-1/LTC3388-320V,50mAHighEfficiencyNanopowerStep-DownRegulatorVIN:2.
7Vto20V,VOUT:Fixed1.
1Vto5.
5V,IQ=720nA,ISD=400nA,MSOP-10,3mm*3mmDFN-10PackagesLTC3588-1/LTC3588-2NanopowerEnergyHarvestingPowerSupplywithUpto100mAofOutputCurrentVIN:2.
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2mH(PCOULOMBSNOTCOUNTED)PGOOD3335TA02SCLOUT[0]OUT[1]OUT[2]IRQDVCCPVOUTENPBAT47FLi-SOCI2BATTERYBAT2.
5VSYSTEMSUPPLY3.
6VSW1SW2VOUT10kIPK[2]IPK[1]IPK[0]10FIPEAK=5mA+PI2CLithium-ThionylChloridePrimaryBatteryPoweredApplication