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aADP3020OneTechnologyWay,P.
O.
Box9106,Norwood,MA02062-9106,U.
S.
A.
Tel:781/329-4700WorldWideWebSite:http://www.
analog.
comFax:781/326-8703AnalogDevices,Inc.
,2000High-EfciencyNotebookComputerPowerSupplyControllerFUNCTIONALBLOCKDIAGRAMPOWER-ONRESETLINEARCONTROLLERVIN5.
5VTO25V3.
3VQ52.
5VSS3Q1Q2Q3SS5Q45VL1L2PWRGDADP3020REF5VLINEAR3.
3VSMPS5VSMPS1.
20VPFO3.
3VSMPSFEATURESWideInputVoltageRange:4.
5Vto25VHighConversionEfciency>96%IntegratedCurrentSense—NoExternalResistorRequiredLowShutdownCurrent:7A(Typical)DualSynchronousBuckControllerswithSelectablePWM/Power-SavingModeOperationBuilt-InGateDriveBoostCircuitforDrivingExternalN-ChannelMOSFETsTwoIndependentlyProgrammableOutputVoltagesFixed3.
3VorAdjustable(1.
25VtoVIN–0.
5V)Fixed5VorAdjustable(1.
25VtoVIN–0.
5V)ProgrammablePWMFrequencyIntegratedLinearRegulatorControllerExtensiveCircuitProtectionFunctions38-LeadTSSOPPackageAPPLICATIONSNotebookComputersandPDAsPortableInstrumentsGeneralPurposeDC-DCConvertersGENERALDESCRIPTIONTheADP3020isahighlyefcientdualsynchronousbuckswitch-ingregulatorcontrolleroptimizedforconvertingthebatteryoradapterinputintothesystemsupplyvoltagesrequiredinnote-bookcomputers.
TheADP3020usesadual-modePWM/PowerSavingModearchitecturetomaintainefciencyoverawideloadrange.
Theoscillatorfrequencycanbeprogrammedfor200kHz,300kHz,or400kHzoperation,oritcanbesynchro-nizedtoanexternalclocksignalofupto600kHz.
TheADP3020providesaccurateandreliableshortcircuitpro-tectionusinganinternalcurrentsensecircuit,whichreducescostandincreasesoverallefciency.
Otherprotectionfeaturesincludeprogrammablesoft-start,UVLO,andintegratedoutputundervoltage/overvoltageprotection.
TheADP3020containsalinearregulatorcontrollerthatisdesignedtodriveanexternalP-channelMOSFETorPNPtransistor.
Thelinearregulatoroutputisadjustable,andcanbeusedtogeneratetheauxiliaryvoltagesrequiredinmanylaptopdesigns.
OBSOLETE–2–REV.
0ADP3020–SPECIFICATIONS(@TA=–40Cto+85C,VIN=12V,SS5=SS3=INTVCC,INTVCCLoad=0mA,REFLoad=0mA,MODE=0V,SYNC=0V,SD=5V,unlessotherwisenoted.
)ParameterSymbolConditionsMinTypMaxUnitINTERNAL5VREGULATORINTVCCInputVoltageRange5.
525V5VVoltageTA=25°C4.
955.
0255.
15VLineRegulation5.
5V≤VIN≤25V0.
3mV/VTotalVariationLine,Temp4.
85.
2VSwitchoverVoltageAUXVCCfromLowtoHigh4.
654.
754.
85VSwitchoverHysteresisAUXVCCfromHightoLow100mVUndervoltageLockoutINTVCCFalling3.
63.
84.
2VThresholdVoltageUndervoltageLockout120mVHysteresisREFERENCEOutputVoltage2REF5.
5V≤VIN≤25V1.
1851.
1971.
209VSUPPLYCURRENTIQShutdownCurrentSD=0V715AStandbyCurrentSS3=SS5=SD2=0V250400ASD=5VQuiescentCurrentNoLoads,MODE=5V0.
951.
8mA(PWMMode)SS3=SS5=SD2=5VFB5=FB3=FB2=1.
25V,ADJ/FX5=ADJ/FX3=5VQuiescentCurrentNoLoads,MODE=0V650A(Power-SavingMode)SS3=SS5=SD2=5VFB5=FB3=FB2=1.
25V,ADJ/FX5=ADJ/FX3=5VOSCILLATORFrequencyfOSCSYNC=AGND176200224kHzSYNC=REF264300336kHzSYNC=INTVCC352400448kHzSYNCInputFrequencyRange230600kHzInputLowVoltage3tF≤200ns0.
4VInputHighVoltage3tR≤200ns4.
6VInputCurrentSYNC=REF1.
2APOWERGOODPWRGDOutputVoltageInRegulation10kPull-Upto5V4.
8VOutputVoltageOutofRegulation10kPull-Upto5V0.
4VFB54.
75V,andbothoftheswitchersareinPowerSavingmode,theinternal5VLDOisturnedoff.
ThechipispoweredbyAUXVCCpin.
Thereisa2%hysteresisforthispin.
33SDShutdownControlInput,ActiveLow.
IfSD=0V,thechipisinshutdownwithverylowquiescentcur-rent.
Forautomaticstart-up,connectSDtoVINdirectly.
34PGNDPowerGround.
35DRVL5LowSideDriverfor5VBuckConverter.
36SW5SwitchingNode(Inductor)Connectionfor5VBuckConverter.
37DRVH5HighSideGateDriverfor5VBuckConverter.
38BST5BoostCapacitorConnectionforHighSideGateDriverofthe5VBuckConverter.
ABSOLUTEMAXIMUMRATINGS*VINtoAGND0.
3Vto+27VAGNDtoPGND0.
3VINTVCCAGND–0.
3Vto+6VBST5,BST3toPGND0.
3Vto+32VBST5toSW50.
3Vto+6VBST3toSW30.
3Vto+6VCS5,CS3AGND–0.
3VtoVINSW3,SW5toPGND0.
3VtoVIN+0.
3VSDAGND–0.
3Vto+27VDRVL5/3toPGND0.
3Vto(INTVCC+0.
3V)DRVH5/3toSW5/30.
3Vto(INTVCC+0.
3V)AllOtherInputsandOutputsAGND–0.
3VtoINTVCC+0.
3VθJA98°C/WOperatingAmbientTemperatureRange40°Cto+85°CJunctionTemperatureRange40°Cto+150°CStorageTemperatureRange65°Cto+150°CLeadTemperatureRange(Soldering10sec)300°C*Thisisastressratingonly;operationbeyondtheselimitscancausethedevicetobepermanentlydamaged.
PINCONFIGURATIONORDERINGGUIDEModelTemperatureRangePackageDescriptionPackageOptionADP3020ARU–40°Cto+85°CThinShrinkSmallOutlineRU-381413121110981234765191817161520292827323130383736353433232221262524TOPVIEW(NottoScale)ADP3020BST5DRVH5SW5DRVL5PGNDSDAUXVCCINTVCCVINDRVL3SW3DRVH3BST3DRV2FB2SD2CPORPWRGDCS5FB5EAN5EAO5PFISS5CLSET5REFAGNDCLSET3MODESYNCSS3PFOEAO3EAN3FB3CS3ADJ/FX3ADJ/FX5OBSOLETEADP3020–6–REV.
0CONTROLLOGICINTVCCDRV2FB2SD2CPORPWRGDAGNDSYNC+–CS52.
5V3.
3V1.
2VINTVCC–3mV1.
22VQRSDUPLICATEFORSECONDCONTROLLERSHUTDOWN1.
2V2.
5VON5POWER–ONRESETSS5EAO5EAN51.
2V1.
2V1.
44V0.
96VOCFB5FB5DRVL5SW5VOUT55V1.
2VREFINPUT5V+5VLINEARREGAUXVCCCLSET5BST54.
7VDRVH5VIN1.
2V200kHz/300kHz/400kHzOSCADJ/FX5–+4APGND0.
7AMODE14mV72mVADP3020SD1.
18V303332318911122122252423654337353638721PFOPFI+–191.
20V204A1.
2VREFULVO+–+–+–+2%+–+–+––2%0%EA+–+–+–34+–+–+20%+––20%+–+–Figure1.
BlockDiagram(AllSwitchesandComponentsAreShownforFixedOutputOperation)OBSOLETEADP3020–7–REV.
0TypicalPerformanceCharacteristics–OUTPUTCURRENT–A100EFFICIENCY–%90807060500.
010.
1110VIN=6VVIN=15VFigure2.
Efciencyvs.
5VOutputCurrentOUTPUTCURRENT–A100EFFICIENCY–%90807060500.
010.
1110VIN=6VVIN=15VFigure3.
Efciencyvs.
3.
3VOutputCurrentOUTPUTCURRENT–A100EFFICIENCY–%90807060500.
010.
1110VIN=6VVIN=15VFigure4.
Efciencyvs.
2.
5VOutputCurrentOUTPUTCURRENT–A100EFFICIENCY–%90807060500.
010.
1110VIN=6VVIN=15VFigure5.
Efciency,1.
5VOutputCurrentINPUTVOLTAGE–V5CURRENT–A1015208001000120060025+85C+25C–40CFigure6.
PWMModeInputCurrentvs.
InputVoltageINPUTVOLTAGE–V5CURRENT–A10152090040025800700600500+85C+25C–40CFigure7.
PSVModeInputCurrentvs.
InputVoltageOBSOLETEADP3020–8–REV.
0INPUTVOLTAGE–V5CURRENT–A10152020025030010025150+25C–40C+85CFigure8.
InputStandbyCurrentvs.
InputVoltageINPUTVOLTAGE–V5CURRENT–A1015202310025+25C–40C1+85C674589Figure9.
InputShutdownCurrentvs.
InputVoltageAMBIENTTEMPERATURE–C–40FREQUENCY–kHz–10205029531529030530031080SYNC=REFVIN=25VIN=12VIN=7.
5VIN=5.
5Figure10.
PWMModeOscillatorFrequencyvs.
TemperatureAMBIENTTEMPERATURE–C–40CURRENTLIMITTHRESHOLD–mV–30–20–10502500150100200VIN=5.
5VTO25VCLSET=GND01020304050607080Figure11.
CurrentLimitThresholdvs.
TemperatureAMBIENTTEMPERATURE–C–40REFERENCEOUTPUT–V–30–20–101.
1801.
2101.
1901.
1851.
195010203040506070801.
2001.
205VIN=5.
5VTO25VFigure12.
ReferenceOutputvs.
TemperatureCH1=3.
3VOUTPUTCH2=2.
5VOUTPUTCH3=SS3CH4=SS5T[]CH12.
00VCH21.
00VM200MSCH4740mVCH31.
00VCH41.
00VVIN=12VTEKSTOP:SINGLESEQ250S/sFigure13.
Soft-StartSequencingOBSOLETEADP3020–9–REV.
0CH1=5VOUTPUTCH2=IOUT=10mATO3AT[]CH1200mVCH22.
00VM200sCH21.
88VSTOPFigure14.
Power-SavingMode,TransientResponseT[]CH1200mVCH25.
00VM400sCH21.
90VCH1=5VOUTPUT(IOUT=20mA)CH2=SW5STOPFigure15.
Power-SavingMode,WaveformsCH1=5VOUTPUTCH2=IOUT=10mATO3AT[]CH1200mVCH22.
00VM200sCH21.
88VSTOPFigure16.
PWMMode,TransientResponseCH1CH2T[]CH110.
0VCH2200mVM5.
00msCH110.
8VTEKSTOP:SINGLESEQ250S/sFigure17.
VIN=7.
5Vto22VTransient,2.
5VOutput,CH1–InputVoltage,CH2–OutputVoltageOBSOLETEADP3020–10–REV.
0THEORYOFOPERATIONTheADP3020isadual-mode,step-downpowersupplycontrollerfornotebookcomputersorsimilarbattery-poweredapplications.
Thedevicecontainstwosynchronousstep-downbuckcontrol-lersandalinearregulatorcontroller.
ThebuckcontrollersintheADP3020havetheabilitytoprovideeitherxed3.
3Vand5Voutputsorindependentlyadjustable(1.
25VtoVIN–0.
5V)out-puts.
Highefciencyoverabroadloadrangeisachievedbyusingaproprietarydual-modePWM/power-saving(PSV)modearchitec-ture.
Efciencyisfurtherimprovedbydeletingtheexternalcurrentsenseresistor,whichisthemaincontributortolossduringhighcurrent,lowoutputvoltageconditions.
CIRCUITDESCRIPTIONDual-ModeArchitectureTheADP3020containstwoindependentdual-mode,synchro-nousbuckcontrollers.
TraditionalconstantfrequencyPWMbuckconverterssufferfromrelativelylowefciencyunderlightloadconditions.
Inordertomaintainhighefciencyoverawideloadrange,theADP3020usesaproprietarydual-modearchi-tecture.
Atmoderatetoheavyloads,thebuckconverteroperatesinthetraditionalPulsewidthModulation(PWM)mode.
Atlightloads,PSVmodeisusedtoincreasesystemefciency.
Apropri-etarydetectionschemeisusedfortransitionfromonemodetotheother.
Inputcurrenttothehigh-sideMOSFETisdetectedwhengoingfromPWMmodetoPSVmode,andoutputvoltageinfor-mationisusedwhenchangingfromPSVmodetoPWMmode.
Whenthehigh-sideN-channelMOSFETisturnedon,thecurrentgoingthroughtheN-channelMOSFETismeasuredasavoltagebetweenCSandSW.
IfthepeakcurrentthroughtheMOSFETislessthan20%ofthecurrentlimitvaluesetbyCLSET,aninternalcounterthatisbasedontheoscillatorfrequencywillbestarted.
Ifthecurrentstaysbelowthisthresholdfor16PWMcycles,thebuckconverterwillenterpower-savingmode.
Thecounterwillautomaticallyresetifthepeakcurrentishigherthan20%ofthecurrentlimitvalueanytimepriortowhenthecounterreaches16.
InPSVmode,thebuckconverterworkslikeawindowregula-tor.
IftheoutputvoltagedropsbelowthePWMmodenominaloutputvoltage,thehigh-sideMOSFETwillbeturnedon.
Itwillremainonuntiltheoutputcapacitorsarechargedupto2%abovethePWMmodenominaloutputvoltage.
Thehigh-sideMOSFETwillthenbelatchedoffuntiltheoutputcapacitorsaredischargedtothelowerthreshold.
Thedischargerateisdepen-dentontheoutputcapacitorvalueandloadcurrent.
ItisimportanttonotethatthecurrentlimitthresholdwheninPSVmodeisapproximately1/4ofthecurrentlimitthresholdwheninPWMmode.
IfalargeloadisappliedtotheconverterwheninPSVmode(forexample,largerthanthecurrentlimitinPSVmode),theoutputwillcontinuetodropduetothelowercurrentlimitthresholdofPSVmode.
Whentheoutputvoltagedropsto2%belowthePWMmodenominalvoltage,theconverterwillautomaticallyreturntoPWMmode.
OnceinPWMmode,thecurrentlimitisquadrupled,andtheoutputwillbechargeduptothenominallevel,aslongastheloaddoesnotexceedthehigherPWMcurrentlimit.
PWM/PSVOperation(MODE)TableIshowsthesummaryoftheoperatingmodesofthesynchro-nousbuckcontrollers.
TheMODEpindetermineswhetherornotthecontrollersremaininPWMmodeunderallloadconditions.
MODEcanbedrivenbyanexternalTTLlogicsignal.
WhenMODEispulledHIGH,PSVmodeoperationisdisabled,andthesystemisalwaysinconstantfrequencyPWMmode.
InordertoenablePSVmodeatlightloads,theMODEpinneedstobepulledLOW.
TableI.
PWMModeandPSVModeLoadOperatingModeCurrentModeDescriptionHighXPWMConstant-FrequencyPWMLowHeavyPWMConstant-FrequencyPWMLowModeratePWMConstant-FrequencyPWMLowLightPSVVariable-Frequency,BurstModeX=Don'tCare.
ForcingtheADP3020toalwaysremaininconstantfrequencyPWMmodecanbeusedtoreduceinterference,asthisallowslteringofthexedfundamentalfrequencyanditsharmonics.
TheoperatingfrequencyshouldbecarefullychosensothatboththefundamentalandharmonicfrequenciesarenotwithinsensitiveaudioorIFbands.
Thisisparticularlyimportantinnoise-sensitiveapplicationssuchasmultimediasystems,cellularphones,com-puterswithbuilt-inRFcommunications,andPDAs.
Iftwoormoreswitchingregulatorsareusedinasystem,itisbesttosyn-chronizealltheswitchingregulatorstoasinglemasterregulatororanexternalclocksignal.
Internal5VSupply(INTVCC)Aninternallowdropoutregulator(LDO)generatesa5Vsupply(INTVCC)thatpowersallofthefunctionalblockswithintheIC.
ThetotalcurrentratingofthisLDOis50mA.
However,thiscurrentisusedforsupplyinggate-drivepower,anditisnotrecommendedthatcurrentbedrawnfromthispinforotherpurposes.
BypassINTVCCtoAGNDwitha4.
7Fcapacitor.
AUVLOcircuitisalsoincludedintheregulator.
WhenINTVCC2.
6V,theregulatorsareinnormaloperatingmode.
Thecon-trollersareforcedtostayinPWMmodeduringthesoft-startperiod.
Theminimumsoft-starttime(~20s)issetbyaninter-nalcapacitor.
TableIIshowstheADP3020operatingmodes.
CurrentLimiting(CLSET)Acycle-by-cyclecurrentlimitingschemeisusedbymonitoringcurrentthroughthetopN-channelMOSFETwhenitisturnedon.
Bymeasuringthevoltagedropacrossthehigh-sideMOSFETVDS(ON),theexternalsenseresistorcanbedeleted.
ThecurrentlimitvaluecanbesetbyCLSET.
WhenCLSET=Floating,themaximumVDS(ON)=72mVatroomtemperature;whenCLSET=0V,themaximumVDS(ON)=144mVatroomtemperature.
AnexternalresistorcanbeconnectedbetweenCLSETandAGNDtochooseavaluebetween72mVand144mV.
ThetemperaturecoefcientofRDS(ON)oftheN-channelMOSFETiscanceledbytheinternalcurrentlimitcircuitry,sothatanaccuratecurrentlimitvaluecanbeobtainedoverawidetemperaturerange.
InPSVmode,thecurrentlimitvalueisreducedtoabout1/4ofthevalueinPWMmodetoreducetheinterferencenoisetoothercomponentsonthePCboard.
OutputUndervoltageProtectionEachswitchingcontrollerhasanundervoltageprotectioncircuit.
Whenthecurrentflowingthroughthehigh-sideMOSFETreachesthecurrentlimitcontinuouslyforeightclockcycles,andtheoutputvoltageisbelow20%ofthenominaloutputvoltage,bothcontrollerswillbelatchedoffandwillnotrestartuntilSDorSS3/SS5istoggled,oruntilVINiscycledbelow4V.
Thisfeatureisdisabledduringsoftstart.
OutputOvervoltageProtectionBothconverteroutputsarecontinuouslymonitoredforovervolt-age.
Ifeitheroutputvoltageishigherthanthenominaloutputvoltagebymorethan20%,bothconverter'shigh-sidegatedrivers(DRVH5/3)willbelatchedoff,andthelow-sidegatedriverswillbelatchedon,andwillnotrestartuntilSDorSS5/SS3aretoggled,oruntilVINiscycledbelow4V.
Thelow-sidegatedriver(DRVL)iskepthighwhenthecontrollerisinoff-stateandtheoutputvoltageislessthan93%ofthenominaloutputvoltage.
Dischargingtheoutputcapacitorsthroughthemaininductorandlow-sideN-channelMOSFETwillcausetheout-puttoring.
ThiswillmaketheoutputmomentarilygobelowGND.
Topreventdamagetothecircuit,useareverse-biased1ASchottkydiodeacrosstheoutputcapacitorstoclampthenegativesurge.
PowerGoodOutput(PWRGD)TheADP3020alsoprovidesaPWRGDsignalforthemicropro-cessor.
Duringstart-up,thePWRGDpinisheldlowuntil5Voutputiswithin–4%ofitspresetvoltage.
Then,afteratimedelaydeterminedbyanexternaltimingcapacitorconnectedfromCPORtoGND,PWRGDwillbeactivelypulleduptoINTVCCbyanexternalpull-upresistor.
CPORcanalsobeusedasamanualreset(MR)function.
Whenthe5Voutputislowerthanthepresetvoltagebymorethan8%,PWRGDisimmediatelypulledlow.
LinearRegulatorControllerTheADP3020includesanonboardlinearregulatorcontroller.
AnexternalPNPtransistorcanbeusedforoperationupto1A.
Forhigheroutputcurrentapplications,alowthresholdPMOScanbeusedasthepasstransistor.
Theoutputvoltagecanbesetbyaresistordivider.
TheminimumoutputvoltageoftheLDOis1.
25V,whilethemaximumoutputvoltagedependsonwheretheLDOinputisconnectedandthedropoutvoltageoftheexternalpasstransistor.
TableII.
OperatingModesSDSS5SS3ModeDescriptionLowXXShutdownAllCircuitsTurnedOffHighSS54.
0V.
Thisconverterdesignisoptimizedtodeliverthebestperformancewithina7.
5Vto18Vrange,whichisthenominalvoltageforthreetofourcellLi-Ionbatterystacks.
Volt-agesabove18Vmayoccurunderlightloadsandwhenthesystemispoweredfromanacadapterwithnobatteryinstalled.
MaximumOutputCurrentandMOSFETSelectionThemaximumoutputcurrentforeachswitchingregulatorislim-itedbysensingthevoltagedropbetweenthedrainandsourceofthehigh-sideMOSFETwhenitisturnedon.
AcurrentsensecomparatorsensesvoltagedropbetweenCS5andSW5forthe5VconverterandbetweenCS3andSW3forthe3.
3Vconverter.
Thesensecomparatorthresholdis72mVwhentheprogram-mingpin,CLSET,isfloating,andis144mVwhenCLSETisconnectedtoground.
Current-limitingisbasedonsensingthepeakcurrent.
Peakcurrentvarieswithinputvoltageanddependsontheinductorvalue.
Thehighertheripplecurrentorinputvoltage,thelowertheconvertermaximumoutputcurrentatthesetcurrentsenseamplierthreshold.
Therelationbetweenpeakanddcoutputcurrentisgivenby:IIVVVfLVPEAKOUTOUTINMAXOUTINMAX=+****()()–2(2)AtagivencurrentcomparatorthresholdVTHandMOSFETRDS(ON),themaximuminductorpeakcurrentis:IVRPEAKTHDSON=()(3)RearrangingEquation2tosolveforIOUT(MAX)gives:IVRVVVfLVOUTMAXTHDSONOUTINMAXOUTINMAX()()()()––=****2(4)Normally,VTHshouldbesettoitsmaximumvalueof144mV.
Forexample,inthecircuitofFigure19,anSi4410,whichhasanRDS(ON)of13.
5mwouldhaveamaximumpeakcurrentlimitofaround10A.
Alessefcientwaytoachievemaximumpowerfromtheconverteristodesigntheinductorwithalargerinductance,(i.
e.
,alowerripplecurrent).
Thishelpsreducethepeak-to-dccurrentratioandincreasesmaximumconverteroutput,butmayalsoincreasetheinductorvalueanditssize.
Itisimportanttorememberthatthiscurrentlimitcircuitisdesignedtoprotectagainsthighcurrentorshortcircuitcondi-tionsonly.
ThiswillprotecttheICandMOSFETslongenoughtoallowtheoutputundervoltageprotectioncircuitrytolatchoffthesupply.
OBSOLETEADP3020–13–REV.
0C14A10FC14B10FD210BQ040L26.
8HR2130k38373635343332313029282726252423222120CS5FB5EAN5EAO5ADJ/FX5SS5CLSET5BST5DRVH5SW5DRVL5PGNDSDAUXVCCINTVCCVINDRVL3SW3DRVH3BST3DRV2FB2SD2CPORPWRGDPFOREFAGNDCLSET3MODESYNCSS3ADJ/FX3EAO3EAN3FB3CS3PFIU1ADP3020C168pFR1010kC18150pFC41FR116.
2kC19330pFD61N4148C17100nFQ5SI4410Q4SI4410C161FR61012345678910111213141516171819D410BQ040(OPTIONAL)C27A68FC27B68FVOUT55V,4A++D310BQ040(OPTIONAL)C24A68FC24B68FVOUT333.
3V,4A++Q2SI4410Q5SI4410100nFC154.
7FC131FC20A10FC20B10FD110BQ040L16.
8HC264.
7FVOUT252.
5V,1.
5AR947kC281FR171kR813kR712kC1133FR24210kR2660.
4kC12R1210kR1310kPWRGDPFOR144.
7C224.
7FVIN5.
5V-25VR247kR347kC51nFR475kC8470pFC968pFC61FD51N4148R510C2330pFQ1IRF7404Figure19.
45W,TripleOutputDC-DCConverterOBSOLETEADP3020–14–REV.
0NominalInductorValueTheinductordesignisbasedontheassumptionthattheinduc-torripplecurrentis30%ofthemaximumoutputdccurrentatnominal12Vinputvoltage.
Theinductorripplecurrentandinductancevaluearenotcritical,butthischoiceisquiteimpor-tantinanalyzingthetrade-offsbetweencost,size,efciency,andvolume.
Thehighertheripplecurrent,thelowertheinduc-torsizeandvolume.
However,thiswillleadtohigheraclossesinthewindings.
Conversely,ahigherinductorvaluemeanslowerripplecurrentandsmalleroutputltercapacitors,buttransientresponsewillbeslower.
Thedesignoftheinductorshouldbebasedonthemaximumoutputcurrentplus15%(1/2ofthe30%rippleallowance)atthenominalinputvoltage:LVVVVIfINNOMOUTOUTINNOMOUT**3()()–(5)OptimumstandardinductorvaluesforthethreepowerlevelsareshowninTableIV.
TableIV.
StandardInductorValuesFreq.
3.
3V/2A3.
3V/4A3.
3V/10A5V/2A5V/4A5V/10A200kHz20H8.
2H3.
3H22H10H4.
7H300kHz12H6.
8H2.
2H15H8.
2H3.
3H400kHz10H4.
7H1.
5H10H6.
8H2.
2HInductorSelectionOncethevaluefortheinductorisknown,therearetwowaystoproceed;eithertodesigntheinductorin-houseortobuytheclosestinductorthatmeetstheoveralldesigngoals.
StandardInductorsBuyingastandardinductorwillprovidethefastest,easiestsolu-tion,andmanycompaniesoffersuitablepowerinductorsolutions.
AlistofpowerinductormanufacturersisgiveninTableV.
DESIGNINGTHEINDUCTORIN-HOUSECoreMaterialConcernsThereareseveralgoodchoicesforlowcorelossmaterialsathighfrequency.
TwoexamplesaredistributedgapKoolMupowderedcoresfromMagneticsandsoftferritecores,material3F3,3F4,3D3,or4C4,fromPhilips.
Tominimizetheaccoreloss,especiallywhentheinductorvalueisrelativelylowandripplecurrentishigh,theuseoflowfrequencypowderedironcoresandlowfrequencyferritecores(speciedforfrequencyupto100kHz)shouldbeavoided.
Theripplecurrentisakeyfac-torforoptimizationoftheconverterdesignanddeterminescorelossestoalargeextent.
Selectingahighripplecurrentmeansarelativelylowinductorvalue.
This,foragivencoresize,reflectsalowernumberofturnsandhighercoreloss.
CoreGeometryTherearetwomaincategoriesofferromagneticcoresthatcouldbeusedinthistypeofapplication.
Openmagneticlooptypessuchasbeads,beadsonleads,rods,andslugsprovidethelow-estcost,butdonothavefocusedmagneticeldsinthecore.
TheradiatedEMIdistributedaroundthemagneticeldmaycreateproblemswithnoiseinterferenceinelectroniccircuitssurroundingthechoke.
Othertypesarecoreswithclosedmag-neticpaths,suchaspotcores,PQ,U,andEcores,toroids,etc.
Thecostofthesecoresishigher,butEMIandRFIperformanceisbetter.
Agoodcompromisebetweenpriceandperformancearecoreswithatoroidalshape,usedprimarilyinthrough-holeprintingboarddesigns.
Averycost-effectivesolutionbased,notonclosed-loopcore,butongoodshieldedopen-loopcore,aresurface-mountpowerinductors,DO,DT,andDSSeriesfromCoilcraft.
TableV.
RecommendedInductorManufacturersMurataElectronicsCoilcraftCoiltronicsNorthAmericaInc.
Phone:847/639-6400Phone:561/241-7876Phone:770/436-1300Fax:847/639-1469Fax:561/241-9339Fax:770/436-3030Web:www.
coilcraft.
comWeb:www.
coiltronics.
comWeb:www.
murata.
comSMTPowerInductors,SMTPowerInductors,SMTPowerInductors,Series1608,3308,3316,5022,5022HC,SeriesUNI-PAC2,UNI-PAC3andUNI-PAC4,SeriesLQT2535DO3340,LowCostSolutionLowCostSolutionBestforLowEMI/RFISMTShieldedPowerInductors,SMTPowerInductors,SeriesDS5022,DS3316,DT3316,Series,ECONO-PAC,VERSA-PAC,BestforLowEMI/RFIBestforLowProleorFlexibleDesign.
PowerInductorsandChokes,PowerInductorsCTXSeries,ChipInductorsSeriesDC1012,PCV-0,PCV-1,PCV-2,LowEMI/RFI,LowCostToroidalInductorsLQN6C,LQS66CPCH-27,PCH-45,LowCostbutNotMiniature.
OBSOLETEADP3020–15–REV.
0TheDesignThedetailsofdesigningthepowerinductorarecoveredinmanyreferencetexts,andwillnotbecoveredhere.
Examplesofsoft-wareandreferencebooksthatcanbeusedforquickdesignofthepowerinductoraregivenbelow:Software—MagneticDesignerfromIntusoft,www.
intusoft.
com"DesigningMagneticComponentsforHighFrequencyDC-DCConverters,"McLyman,KgMagneticsInc.
,ISBN1-883107-00-08(foradvancedusers)"PowerSupplyCookbook,"MartyBrown,EDNSeriesforDesignEngineers,ISBN0-7506-9442-4(forbeginnersandintermediateusers)CINandCOUTSelectionIncontinuousconductionmode,thesourcecurrentoftheupperMOSFETisapproximatelyasquarewaveofdutycycleVOUT/VIN.
Topreventlargevoltagetransients,alowESRinputcapacitorsizedforthemaximumrmscurrentmustbeused.
Themaximumrmscapacitorcurrentisgivenby:IVVVIVRMSOUTINOUTMAXIN–(6)ThisformulahasamaximumatVIN=2*VOUT,whereIRMS=IOUT/2.
Notethatthecapacitormanufacturer'sripplecurrentratingsareoftenbasedononly2000hoursoflife.
Thismakesitadvisabletofurtherderatethecapacitor,ortochooseacapacitorratedatahighertemperaturethanrequired.
Severalcapacitorsmayalsobeparalleledtomeetsizeorheightrequirementsinthedesign.
Ifelectrolyticortantalumcapacitorsareused,anaddi-tional0.
1F–1FceramicbypasscapacitorshouldbeplacedinparallelwithCIN.
TheselectionofCOUTisdrivenbytherequiredeffectiveseriesresistance(ESR)andthedesiredoutputripple.
Agoodruleofthumbistolimittheripplevoltageto1%ofthenominaloutputvoltage.
Itisassumedthatthetotalrippleiscausedbytwofactors:25%comesfromtheCOUTbulkcapacitancevalue,and75%comesfromthecapacitorESR.
ThevalueofCOUTcanbedeter-minedby:CIfVOUTRIPPLERIPPLE=**2(7)whereIRIPPLE=0.
3*IOUTandVRIPPLE=0.
01*VOUT.
ThemaximumacceptableESRofCOUTcanthenbefoundusing:ESRVIRIPPLERIPPLE≤*075.
(8)ManufacturerssuchasVishay,AVX,Elna,WIMAandSanyoprovidegoodhigh-performancecapacitors.
Sanyo'sOSCONsemiconductordielectriccapacitorshavelowerESRforagivensize,atasomewhathigherprice.
ChoosingsufcientcapacitorstomeettheESRrequirementforCOUTwillnormallyexceedtheamountofcapacitanceneededtomeettheripplecurrentrequirement.
Insurface-mountapplications,multiplecapacitorsmayhavetobeparalleledtomeetthecapacitance,ESR,orRMScurrenthandlingrequirements.
Aluminumelectrolyticanddrytantalumcapacitorsareavailableinsurface-mountcongurations.
Inthecaseoftantalum,itiscriticalthatcapacitorsaresurgetestedforuseinswitchingpowersupplies.
RecommendationsforoutputcapacitorsareshowninTableVI.
PowerMOSFETSelectionN-channelpowerMOSFETsmustbeselectedforusewiththeADP3020forboththemainandsynchronousswitch.
ThemainselectionparametersforthepowerMOSFETsarethethresholdvoltage(VGS(TH))andON-resistance(RDS(ON)).
AninternalLDOgeneratesa5Vsupplythatisboostedabovetheinputvoltageusingabootstrapcircuit.
Thisfloating5VsupplyisusedfortheupperMOSFETgatedrive.
Logic-levelthresholdMOSFETsmustbeusedforboththemainandsynchronousswitches.
Maximumoutputcurrent(IMAX)determinestheRDS(ON)require-mentforthetwopowerMOSFETs.
WhentheADP3020isoperatingincontinuousmode,thesimplifyingassumptioncanbemadethatoneofthetwoMOSFETsisalwaysconductingtheloadcurrent.
ThedutycyclesfortheMOSFETsaregivenby:UpperMOSFETDutyCycleVVOUTIN=(9)LowerMOSFETDutyCycleVVVINOUTIN=–(10)TableVI.
RecommendedCapacitorManufacturersMaximumOutputCurrent2A4A10AInputCapacitorsTOKINMultilayerTOKINMultilayerTOKINMultilayerCeramicCaps,22F/25VCeramicCaps,2*22F/25VCeramicCaps,2*22F/25VP/N:C55Y5U1E226ZP/N:C55Y5U1E226ZP/N:C55Y5U1E226ZTAIYOYUDENINC.
TAIYOYUDENINC.
VISHEYCeramicCaps,CeramicCaps,Y5VSeriesCeramicCaps,Y5VSeriesZ5USeries,2*15F/25V10F/25V2*10F/25VP/N:TMK432BJ106KMP/N:TMK432BJ106KMOutputCapacitorsSANYOPOSCAPTPCSANYOPOSCAPTPCSANYOPOSCAPTPB+3.
3VOutputSeries,68F/10VSeries,2*68F/10VSeries,2*220F/4.
0VOutputCapacitorsSANYOPOSCAPTPCSANYOPOSCAPTPCSANYOPOSCAPTPB+5VOutputSeries,68F/10VSeries,2*68F/10VSeries,2*330F/6.
3VOBSOLETEADP3020–16–REV.
0Fromthedutycycle,therequiredminimumRDS(ON)foreachMOSFETcanbederivedbythefollowingequations:UpperMOSFET:RUpperVPVITDSONINDOUTMAX***+()21α(11)LowerMOSFET:RLowerVPVVITDSONINDINOUTMAX()()–=*()21α(12)wherePDistheallowablepowerdissipationandαisthetempera-turedependencyofRDS(ON).
PDwillbedeterminedbyefciencyand/orthermalrequirements(seeEfciency).
(1+αT)isgen-erallygivenforaMOSFETintheformofanormalizedRDS(ON)vs.
temperaturecurve,butα=0.
007/°CcanbeusedasanapproximationforlowvoltageMOSFETs.
MaximumMOSFETpowerdissipationoccursatmaximumoutputcurrent,andcanbecalculatedasfollows:UpperMOSFET:PUpperVVIRTDOUTINMAXDSON()()()21α(13)LowerMOSFET:PLowerVVVIRTDINOUTINMAXDSON()–()()21α(14)TheSchottkydiode,D1showninFigure19,conductsonlyduringthedeadtimebetweenconductionofthetwopowerMOSFETs.
D1'spurposeistopreventthebody-diodeofthelowerN-channelMOSFETfromturningonandstoringchargeduringthedeadtime,whichcouldcostasmuchas1%inefciency.
D1shouldbeselectedforforwardvoltageoflessthan0.
5VwhenconductingIMAX.
RecommendedtransistorsforupperandlowerMOSFET'saregiveninTableVII.
TableVII.
RecommendedMOSFETsMaximumOutput2A4A10AVishay/Si4412DY,Si4410DY,Si4874DY,Siliconix28m13.
5m7.
5mInternationalIRF7805,IRF7811,IRFBA3803,Rectier11m8.
9m5.
5mIRF7805,IRF7809,11m7.
5mSoftStartThesoft-starttimeofeachofswitchingregulatorcanbepro-grammedbyconnectingasoft-startcapacitortothecorrespondingsoft-startpin(SS3orSS5).
Thetimeittakeseachregulatortorampuptoitsfulldutyratiodependsproportionallyonthevaluesofthesoft-startcapacitors.
Thechargingcurrentis4A±20%.
Thecapacitorvaluetosetagivensoft-starttime,tSS,isgivenby:CAtVpFSSSS*()426.
()(15)FixedorAdjustableOutputVoltageEachswitchingcontrolleroftheADP3020canbeprogrammedtooperatewithaxedoradjustableoutputvoltage.
AsshownbythegeneralapplicationschematicinFigure19,puttingtheADP3020intoxedmodegivesanominaloutputof3.
3Vand5Vforthetwoswitchingbuckconverters.
Byusingtwoidenti-calresistordividersperconverter,anyoutputvoltagebetween1.
25VandVIN–0.
5Vcanbeset.
Thecenterpointofonedividerisconnectedtothefeedbackpin,FB,andthecenterpointoftheotheridenticaldividerisconnectedtoEAN.
Itisimportanttouse1%resistors.
Agoodvalueforthelowerlegresistorsis10k,1%,thentheupperlegresistorsforagivenoutputvoltagecanbedeterminedby:RVVkUPPEROUT=–.
.
()12012(16)TableVIIIshowstheresistorvaluesforthemostcommonout-putvoltages.
TableVIII.
TypicalFeedbackResistorValuesVOUT1.
25V1.
3V1.
5V1.
8V2.
0V2.
5V3.
0V3.
3V5.
0VRUPPER4128252.
49k4.
99k6.
65k10.
7k15.
0k17.
4k31.
6kRLOWER10k10k10k10k10k10k10k10k10kOBSOLETEADP3020–17–REV.
0PWMMode/Power-Saving(PSV)ModeOperationThemodeofoperationforbothswitchingregulatorscanbepresetusingtheMODEpin.
WhenMODEisHIGH,orconnectedtoINTVCC,bothconvertersworkonlyinPWMmode,regardlessofoutputcurrent.
MODEconnectedtoGNDmakesbothcon-vertersoperateinadualPWM/PSVmodeofoperation.
Indualmode,eachconverterhasitsownboundaryoutputcurrentwhentheconverterswitchesfromPSVmodetoPWMmodeandviceversa.
Thereisanoutputcurrenthysteresisforeachmodetran-sitiontoavoidimproperoperation.
Thereareseveraldesignrecommendationsregardingdualmodeoperation.
ThetripoutputcurrentlevelforswitchingbetweenPWMmodeandPSVmodeisapercentageofthepeakcurrentsensedviatheinternalcurrentsensecomparator.
However,thevalueofthatcurrentdependsontheRDS(ON)oftheupperMOSFET.
Forexample,ifthedesignusesanSi4420versusanSi4410powerMOSFET(9mvs.
13.
5m)themaximumoutputpoweroftheconverterandthemodetripoutputcurrentwillbothbe50%higher.
EfciencyEnhancementTheefciencyofeachswitchingregulatorisinverselypropor-tionaltothelossesduringtheswitchingconversion.
Themainfactorstoconsiderwhenattemptingtomaximizeefciencyare:1.
Resistivelosses,whichincludetheRDS(ON)ofupperandlowerMOSFETs,traceresistancesandoutputchokewireresistance.
Theselossescontributeamajorpartoftheoverallpowerlossinlowvoltagebattery-poweredapplications.
However,tryingtoreducetheseresistivelossesbyusingmultipleMOSFETsandthicktracesmaytendtoleadtolowerefciencyandhigherprice.
Thisisduetothetrade-offbetweenreducedresistivelossandincreasedgatedrivelossthatmustbeconsideredwhenoptimizingefciency.
2.
Switchinglossesduetothelimitedtimeofswitchingtransitions.
ThisoccursduetogatedrivelossesofbothupperandlowerMOSFETs,andswitchingnodecapacitivelosses,aswellasthroughhysteresisandeddy-currentlossesinpowerchoke.
Inputandoutputcapacitorripplecurrentlossesshouldalsobeconsideredasswitchinglosses.
Theselossesareinput-voltage-dependentandcanbeestimatedasfollows:PVICfSWLOSSINMAXSN25185.
.
(17)whereCSNistheoverallcapacitanceoftheswitchingnoderelatedtoloss.
3.
Supplycurrentoftheswitchingcontroller(independentoftheinputcurrentredirectedtosupplytheMOSFETs'gates).
Thisisaverysmallportionoftheoverallloss,butitdoesincreasewithinputvoltage.
TransientResponseConsiderationsBothstabilityandregulatorloopresponsecanbecheckedbylookingattheloadtransientresponse.
Switchingregulatorstakeseveralcyclestorespondtoastepinoutputloadcurrent.
Whenaloadstepoccurs,outputvoltageshiftsbyanamountequaltothecurrentstepmultipliedbythetotalESRofthesummedoutputcapacitorarray.
Outputovershootorringingduringtherecoverytime(inbothdirectionsofthecurrentstepchange)indicatesastabilityproblem.
Theexternalfeedbackcompensationcompo-nentsshowninFigure18shouldprovideadequatecompensationformostapplications.
FeedbackLoopCompensationTheADP3020usesVoltageModecontroltostabilizetheswitch-ingcontrolleroutputs.
Figure20showsthevoltagemodecontrolloopforoneofthebuckswitchingregulators.
Theinternalrefer-encevoltageVREFisappliedtothepositiveinputoftheinternalerroramplier.
TheotherinputoftheerroramplierisEAN,andisinternallyconnectedtothefeedbacksensingpinFBviaaninternalresistor.
Theerrorampliercreatestheclosed-loopvoltagelevelforthepulsewidthmodulatorthatdrivestheexternalpowerMOSFETs.
TheoutputLCltersmoothsthepulse-widthmodulatedinputvoltagetoadcoutputvoltage.
VOUTCOUTL1PWMCOMPARATORADP3020VINDRVHDRVLPARASITICESREAOEANREFR1R3C1C2C3R2FBVRAMPFigure20.
BuckRegulatorVoltageControlLoopThepulsewidthmodulatortransferfunctionisVOUT/VEAOUT,whereVEAOUTistheoutputvoltageoftheerroramplier.
Thatfunctionisdominatedbytheimpedanceoftheoutputlterwithitsdouble-poleresonancefrequency(fLC)andasinglezeroatoutputcapacitor(fESR)andthedcgainofthemodulator,equaltotheinputvoltagedividedbythepeakrampheight(VRAMP),whichisequaltoVREF(1.
2V):fLCLCFOUT=**12π(18)FESRCESROUT=**12π(19)OBSOLETEADP3020–18–REV.
0Thecompensationnetworkconsistsoftheinternalerrorampli-erandtwoexternalimpedancenetworksZINandZFB.
OncetheapplicationandtheoutputltercapacitanceandESRarechosen,thespeciccomponentvaluesoftheexternalimpedancenet-worksZINandZFBcanbedetermined.
Therearetwodesigncriteriaforachievingstableswitchingregulatorbehaviorwithinthelineandloadrange.
Oneisthemaximumbandwidthoftheloop,whichaffectsfasttransientresponse,ifneeded,andtheotheristheminimumacceptedbythedesignphasemargin.
Thephasemarginisthedifferencebetweentheclosed-loopphaseand180degrees.
Recommendedphasemarginis45to60degreesformostapplications.
TheequationsforcalculatingthecompensationPolesandZerosare:fRCCCCP11221212=***+π(20)fRCP21233=**π(21)fRCZ11221=**π(22)fRRCZ212133=*+*π()(23)ThevalueoftheinternalresistorR1is71kforthe3.
3Vswitchingregulator,and128kforthe5Vswitchingregulator.
CompensationLoopDesignandTestMethod1.
Choosethegain(R2/R1)forthedesiredbandwidth.
2.
PlacefZ120%–30%belowfLC.
3.
PlacefZ220%–30%abovefLC.
4.
PlacefP1atfESR,checktheoutputcapacitorforworst-caseESRtolerances.
5.
PlacefP2at40%–60%ofoscillatorfrequency.
6.
Estimatephasemarginsinfullfrequencyrange(zerofrequencytozerogaincrossingfrequency).
7.
Applythedesignedcompensationandtestthetransientresponseunderamoderatesteploadchange(30%–60%)andvariousinputvoltages.
Monitortheoutputvoltageviaoscilloscope.
Thevoltageovershootorundershootshouldbewithin1%–3%ofthenominaloutput,withoutringingandabnormaloscillation.
AdditionalApplicationCircuitsThemultipleoutputsandwideinputvoltagerangeoftheADP3020makeitaveryflexibleICforuseinawidevarietyofapplications.
Forexample,theADP3020canbeusedtogeneratelowvoltage(<4.
0V)outputsfroma5Vsupply.
ThecircuitshowninFig-ure21convertsthe5Vinputintoa3.
3Vanda2.
5Voutput.
ThecircuitofFigure22usesasecondarywindingonthe5Voutputtogenerateanunregulated15Vrailwhichisthenregu-latedto12VbytheLDOoutputoftheADP3020.
OBSOLETEADP3020–19–REV.
0C14A10FC14B10FD210BQ040L24.
7HR16.
9k38373635343332313029282726252423222120CS5FB5EAN5EAO5ADJ/FX5SS5CLSET5BST5DRVH5SW5DRVL5PGNDSDAUXVCCINTVCCVINDRVL3SW3DRVH3BST3DRV2FB2SD2CPORPWRGDPFOREFAGNDCLSET3MODESYNCSS3ADJ/FX3EAO3EAN3FB3CS3PFIU1ADP3020C1150pFR1610kC41FR116.
2kC19330pFD61N4148C17100nFQ5SI4410Q4SI4410C161FR61012345678910111213141516171819D410BQ040(OPTIONAL)C27A68FC27B68FVOUT252.
5V,3A++D310BQ040(OPTIONAL)C24A68FC24B68FVOUT333.
3V,4A++Q2SI4410Q5SI4410C154.
7FC131FC20A10FC20B10FD110BQ040L14.
7HC264.
7FVOUT151.
5V,1.
5AR94.
7kC281FR17100R83.
16kR712kC1133FC12100nFR1210kPWRGDR144.
7C224.
7FVIN4.
5V-5.
5VR247kR347kC51nFR475kC8470pFC968pFC61FR1510.
7kD51N4148R510R102.
2kC182.
2nFR134.
7C26.
8nFQ1NDS8434Figure21.
5Vto2.
5V/3.
3VDC-DCConverterOBSOLETEADP3020–20–REV.
0LayoutConsiderationsThefollowingguidelinesarerecommendedforoptimalperfor-manceofaswitchingregulatorinaportablePCsystem:GeneralRecommendations1.
Forbestresults,afour-layer(minimum)PCBisrecom-mended.
Thisshouldallowtheneededversatilityforcontrolcircuitryinterconnectionswithoptimalplacement,asignalgroundplane,powerplanesforbothpowergroundandtheinputpower,andwideinterconnectiontracesintherestofthepowerdeliverycurrentpaths.
Eachsquareunitof1ouncecoppertracehasaresistanceof~0.
53matroomtemperature.
2.
WheneverhighcurrentsmustberoutedbetweenPCBlayers,viasshouldbeusedliberallytocreateseveralparallelcurrentpathssothattheresistanceandinductanceintroducedbythesecurrentpathsisminimizedandtheviacurrentratingisnotexceeded.
3.
Thepowerandgroundplanesshouldoverlapeachotheraslittleaspossible.
Itisgenerallyeasiest(althoughnotneces-sary)tohavethepowerandsignalgroundplanesonthesamePCBlayer.
Theplanesshouldbeconnectednearesttotherstinputcapacitorwheretheinputgroundcurrentflowsfromtheconverterbacktothebattery.
C14A10FC14B10FD210BQ040L2*R1130k38373635343332313029282726252423222120CS5FB5EAN5EAO5ADJ/FX5SS5CLSET5BST5DRVH5SW5DRVL5PGNDSDAUXVCCINTVCCVINDRVL3SW3DRVH3BST3DRV2FB2SD2CPORPWRGDPFOREFAGNDCLSET3MODESYNCSS3ADJ/FX3EAO3EAN3FB3CS3PFIU1ADP3020C168pFR1010kC18150pFC41FR116.
2kC19330pFD61N4148C17100nFQ5SI4410Q4SI4410C161FR61012345678910111213141516171819C27A68FC27B68FVOUT55V,4A++C24A68FC24B68FVOUT333.
3V,4A++Q2SI4410Q3SI4410C154.
7FC131FC14A10FC14B10FD110BQ040L16.
8HC314.
7FVOUT1212V,100mAR94.
7kC281FR171kR89.
09kR71kC324.
7FR24210kR2660.
4kC12100nFR1210kR1310kPWRGDPFOR144.
7C224.
7FVIN5.
5V-25VR247kR347kC51nFR475kC8470pFC968pFC61FD51N4148R510N2N1*L24.
7HN2/N1=2:1C2330pFQ12N3906D111N4148Figure22.
UsingaSecondaryWindingandanLDOPostRegulatortoGenerate12VOBSOLETEADP3020–21–REV.
04.
Ifcriticalsignallines(includingthevoltageandcurrentsenselinesoftheADP3020)mustcrossthroughpowercircuitry,itisbestifasignalgroundplanecanbeinterposedbetweenthosesignallinesandthetracesofthepowercircuitry.
Thisservesasashieldtominimizenoiseinjectionintothesig-nalsattheexpenseofmakingsignalgroundabitnoisier.
5.
ThePGNDpinoftheADP3020shouldconnectrsttoaceramicbypasscapacitorontheVINpin,andthenintothepowergroundplaneusingtheshortestpossibletrace.
How-ever,thepowergroundplaneshouldnotextendunderothersignalcomponents,includingtheADP3020itself.
Ifneces-sary,followtheprecedingguidelinetousethesignalplaneasashieldbetweenthepowergroundplaneandthesignalcircuitry.
6.
TheAGNDpinoftheADP3020shouldconnectrsttotheREFcapacitor,andthenintothesignalgroundplane.
Incaseswherenosignalgroundplanecanbeused,shortinterconnec-tionstoothersignalgroundcircuitryinthepowerconvertershouldbeused.
7.
Theoutputcapacitorsofthepowerconvertershouldbeconnectedtothesignalgroundplaneeventhoughpowercurrentflowsinthegroundofthesecapacitors.
Forthisreason,itisadvisedtoavoidcriticalgroundconnections(e.
g.
,thesignalcircuitryofthepowerconverter)inthesignalgroundplanebetweentheinputandoutputcapacitors.
Itisalsoadvisedtokeeptheplanarinterconnectionpathshort(i.
e.
,haveinputandoutputcapacitorsclosetogether).
8.
Theoutputcapacitorsshouldalsobeconnectedascloselyaspossibletotheload(orconnector)thatreceivesthepower.
Iftheloadisdistributed,thecapacitorsshouldalsobedis-tributed,andgenerallyinproportiontowheretheloadtendstobemoredynamic.
9.
Absolutelyavoidcrossinganysignallinesovertheswitchingpowerpathloop,describedbelow.
PowerCircuitry10.
TheswitchingpowerpathshouldberoutedonthePCBtoencompassthesmallestpossibleareainordertominimizeradiatedswitchingnoiseenergy(i.
e.
,EMI).
FailuretotakeproperprecautionoftenresultsinEMIproblemsfortheentirePCsystemaswellasnoise-relatedoperationalprob-lemsinthepowerconvertercontrolcircuitry.
Theswitchingpowerpathistheloopformedbythecurrentpaththroughtheinputcapacitors,thetwoFETs(andthepowerSchottkydiodeifused),includingallinterconnectingPCBtracesandplanes.
Theuseofshortandwideinterconnectiontracesisespeciallycriticalinthispathfortworeasons:itmini-mizestheinductanceintheswitchingloop,whichcancausehigh-energyringing,anditaccommodatesthehighcurrentdemandwithminimalvoltageloss.
11.
ApowerSchottkydiode(1~2Adcrating)placedfromthelowerFET'ssource(anode)todrain(cathode)willhelptominimizeswitchingpowerdissipationintheupperFET.
IntheabsenceofaneffectiveSchottkydiode,thisdissipationoccursthroughthefollowingsequenceofswitchingevents.
ThelowerFETturnsoffinadvanceoftheupperFETturningon(necessarytopreventcross-conduction).
Thecirculatingcurrentinthepowerconverter,nolongerndingapathforcurrentthroughthechannelofthelowerFET,drawscur-rentthroughtheinherentbody-draindiodeoftheFET.
TheupperFETturnson,andthereverserecoverychar-acteristicofthelowerFET'sbody-draindiodepreventsthedrainvoltagefrombeingpulledhighquickly.
TheupperFETthenconductsverylargecurrentwhileitmomentarilyhasahighvoltageforcedacrossit,whichtrans-latesintoaddedpowerdissipationintheupperFET.
TheSchottkydiodeminimizesthisproblembycarryingamajorityofthecirculatingcurrentwhenthelowerFETisturnedoff,andbyvirtueofitsessentiallynonexistentreverserecov-erytime.
12.
Wheneverapower-dissipatingcomponent(e.
g.
,apowerMOSFET)issolderedtoaPCB,theliberaluseofvias,bothdirectlyonthemountingpadandimmediatelysur-roundingit,isrecommended.
Twoimportantreasonsforthisare:improvedcurrentratingthroughthevias(ifitisacurrentpath),andimprovedthermalperformance,espe-ciallyiftheviasareextendedtotheoppositesideofthePCBwhereaplanecanmorereadilytransfertheheattotheair.
13.
Theoutputpowerpath,thoughnotascriticalastheswitch-ingpowerpath,shouldalsoberoutedtoencompassasmallarea.
Theoutputpowerpathisformedbythecurrentpaththroughtheinductor,theoutputcapacitors,andbacktotheinputcapacitors.
14.
ForbestEMIcontainment,thepowergroundplaneshouldextendfullyunderallthepowercomponentsexcepttheoutputcapacitors.
Theseare:theinputcapacitors,thepowerMOSFETsandSchottkydiode,theinductor,andanysnub-bingelementsthatmightbeaddedtodampenringing.
Avoidextendingthepowergroundunderanyothercircuitryorsignallines,includingthevoltageandcurrentsenselines.
SignalCircuitry15.
TheCSandSWtracesshouldbeKelvin-connectedtotheupperMOSFETdrainandsourcesothattheadditionalvoltagedropduetocurrentflowonthePCBatthecurrentsensecomparatorconnectionsdoesnotaffectthesensedvoltage.
ItisdesirabletohavetheADP3020closetotheout-putcapacitorbankandnotintheoutputpowerpath,sothatanyvoltagedropbetweentheoutputcapacitorsandtheAGNDpinisminimized,andvoltageregulationisnotcompromised.
OBSOLETEADP3020–22–REV.
0OUTLINEDIMENSIONSDimensionsshownininchesand(mm).
38-LeadTSSOP(RU-38)38201910.
386(9.
80)0.
378(9.
60)0.
177(4.
50)0.
169(4.
30)PIN1SEATINGPLANE0.
006(0.
15)0.
002(0.
05)0.
0200(0.
50)BSC0.
0433(1.
10)MAX0.
0106(0.
27)0.
0067(0.
17)0.
0079(0.
20)0.
0035(0.
090)0.
028(0.
70)0.
020(0.
50)800.
252(6.
40)BSCC3773–5–4/00(rev.
0)PRINTEDINU.
S.
A.
OBSOLETE