组件eset

UCD90124Awww.
ti.
com.
cnZHCS693–JANUARY2012支持高级配置和电源接口(ACPI)并可进行风扇控制的12电压轨电源排序器和监视器查询样品:UCD90124A1特性说明2可对12个电压轨进行监视及排序此UCD90124A是一款12电压轨PMBus/I2C可寻址电源排序器和监视器.
该器件集成了一个12位ADC,–所有电压轨每400μs进行一次采样此ADC可监视多达12个电源电压输入.
26个GPIO引–具有2.
5V,0.
5%内部VREF的12位模数转换器(ADC)脚可被用于电源启用,加电复位信号,外部中断,级–排序基于时间,电压轨及引脚相关性联,或者其它系统功能.
这些引脚中的12个引脚提–每个监视器具有4个可编程欠压及过压阈值供PWM功能.
通过使用这些引脚,UCD90124A支持每个监视器可提供非易失性误差及峰值日志记录风扇控制,裕度调节,和通用PWM功能.
(多达12个故障详细表目)运用引脚选定电压轨状态功能可实现特定的电源状态.
针对10个电压轨的闭环裕度调节能力该功能允许使用多达3个GPI来启用和停用任意电压–裕度输出可调节轨电压以与用户规定的裕度门限轨.
对于执行系统低功耗模式及用于硬件设备的高级相匹配配置和电源接口(ACPI)规范而言,这一点是很有用处可编程安全装置定时器及系统复位的.
灵活的数字I/O配置可利用引脚选择电压轨状态这个TI的融合数字电源设计人员软件用于器件配置.
这款基于PC的图形用户界面(GUI)提供了一种用多相PWM时钟发生器于配置,存储和监视所有系统操作参数的直观界面.
–时钟频率从15.
259kHz到125MHz–能够为同步开关模式电源配置独立的时钟输出JTAG和I2C/SMBus/PMBus接口应用范围工业用/自动测试设备(ATE)电信及网络设备服务器和存储系统任何需要对多个电源轨进行排序和监视的系统1Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
2PMBus,融合数字电源aretrademarksofTexasInstruments.
PRODUCTIONDATAinformationiscurrentasofpublicationdate.
Copyright2012,TexasInstrumentsIncorporatedProductsconformtospecificationsperthetermsoftheTexasInstrumentsstandardwarranty.
ProductionprocessingdoesnotEnglishDataSheet:SLVSAN8necessarilyincludetestingofallparameters.
UCD90124AZHCS693–JANUARY2012www.
ti.
com.
cnThisintegratedcircuitcanbedamagedbyESD.
TexasInstrumentsrecommendsthatallintegratedcircuitsbehandledwithappropriateprecautions.
Failuretoobserveproperhandlingandinstallationprocedurescancausedamage.
ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.
Precisionintegratedcircuitsmaybemoresusceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications.
FUNCTIONALBLOCKDIAGRAMORDERINGINFORMATIONForthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTIWebsiteatwww.
ti.
com.
ABSOLUTEMAXIMUMRATINGS(1)VALUEUNITVoltageappliedatV33DtoDVSS–0.
3to3.
8VVoltageappliedatV33AtoAVSS–0.
3to3.
8VVoltageappliedtoanyotherpin(2)–0.
3to(V33A+0.
3)VStoragetemperature(Tstg)–40to150°CHuman-bodymodel(HBM)2.
5kVESDratingCharged-devicemodel(CDM)750V(1)StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.
ThesearestressratingsonlyandfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperatingConditionsisnotimplied.
Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2)AllvoltagesreferencedtoVSSTHERMALINFORMATIONUCD90124ATHERMALMETRIC(1)UNITSRGC(64)PINSθJAJunction-to-ambientthermalresistance26.
4θJC(top)Junction-to-case(top)thermalresistance21.
2θJBJunction-to-boardthermalresistance1.
7°C/WψJTJunction-to-topcharacterizationparameter0.
7ψJBJunction-to-boardcharacterizationparameter8.
8θJC(bottom)Junction-to-case(bottom)thermalresistance1.
7(1)有关传统和新的热度量的更多信息,请参阅IC封装热度量应用报告SPRA953.
2Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012RECOMMENDEDOPERATINGCONDITIONSMINNOMMAXUNITSupplyvoltageduringoperation(V33D,V33DIO,V33A)33.
33.
6VOperatingfree-airtemperaturerange,TA–40110°CJunctiontemperature,TJ125°CELECTRICALCHARACTERISTICSoveroperatingfree-airtemperaturerange(unlessotherwisenoted)PARAMETERTESTCONDITIONSMINNOMMAXUNITSUPPLYCURRENTIV33AVV33A=3.
3V8mAIV33DIOVV33DIO=3.
3V2mASupplycurrent(1)IV33DVV33D=3.
3V40mAVV33D=3.
3V,storingconfigurationparametersinIV33D50mAflashmemoryEXTERNALLYSUPPLIED3.
3VPOWERVV33D,VV33DIODigital3.
3-VpowerTA=25°C33.
6VVV33A,Analog3.
3-VpowerTA=25°C33.
6VANALOGINPUTS(MON1–MON13)VMONInputvoltagerangeMON1–MON902.
5VMON10–MON130.
22.
5VINLADCintegralnonlinearity–2.
52.
5mVIlkgInputleakagecurrent3Vappliedtopin100nAIOFFSETInputoffsetcurrent1-ksourceimpedance–55μAMON1–MON9,groundreference8MΩRINInputimpedanceMON10–MON13,groundreference0.
51.
53MCINInputcapacitance10pFtCONVERTADCsampleperiod16voltagessampled,3.
89μsec/sample400μsecADC2.
5V,internalreferenceaccuracy0°Cto125°C–0.
50.
5%VREF–40°Cto125°C–11%ANALOGINPUT(PMBUS_ADDRx)IBIASBiascurrentforPMBusAddrpins911μAVADDR_OPENVoltage–openpinPMBUS_ADDR0,PMBUS_ADDR1open2.
26VVADDR_SHORTVoltage–shortedpinPMBUS_ADDR0,PMBUS_ADDR1shorttoground0.
124VTinternalInternaltemperaturesenseaccuracyOverrangefrom0°Cto100°C-55°CDIGITALINPUTSANDOUTPUTSVOLLow-leveloutputvoltageIOL=6mA(2),V33DIO=3VDgnd+V0.
25VOHHigh-leveloutputvoltageIOH=–6mA(3),V33DIO=3VV33DIOV–0.
6VIHHigh-levelinputvoltageV33DIO=3V2.
13.
6VVILLow-levelinputvoltageV33DIO=3.
5V1.
4VFANCONTROLINPUTSANDOUTPUTSTPWM_FREQFAN-PWMfrequencyFPWM1-815.
259125000kHzPWM110PWM21PWM3-40.
0017800DUTYPWMFAN-PWMdutycyclerange0100%TachRANGEFAN-TACHresolutionFor1Tachpulseperrevolution30RPMtMINFAN-TACHminimumpulsewidthEitherpositiveornegativepolarity200s(1)Typicalsupplycurrentvaluesarebasedondeviceprogrammedbutnotconfigured,andnoperipheralsconnectedtoanypins.
(2)Themaximumtotalcurrent,IOLmax,foralloutputscombined,shouldnotexceed12mAtoholdthemaximumvoltagedropspecified.
(3)Themaximumtotalcurrent,IOHmax,foralloutputscombined,shouldnotexceed48mAtoholdthemaximumvoltagedropspecified.
Copyright2012,TexasInstrumentsIncorporated3UCD90124AZHCS693–JANUARY2012www.
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cnELECTRICALCHARACTERISTICS(continued)overoperatingfree-airtemperaturerange(unlessotherwisenoted)PARAMETERTESTCONDITIONSMINNOMMAXUNITMARGININGOUTPUTSTPWM_FREQMARGINING-PWMfrequencyFPWM1-815.
260125000kHzPWM3-40.
0017800DUTYPWMMARGINING-PWMdutycyclerange0100%SYSTEMPERFORMANCEVDDSlewMinimumVDDslewrateVDDslewratebetween2.
3Vand2.
9V0.
25V/msSupplyvoltageatwhichdevicecomesVRESETForpower-onreset(POR)2.
4VoutofresettRESETLow-pulsedurationneededatRESETpinToresetdeviceduringnormaloperation2μSf(PCLK)InternaloscillatorfrequencyTA=125°C,TA=25°C240250260MHztretentionRetentionofconfigurationparametersTJ=25°C100YearsWrite_CyclesNumberofnonvolatileerase/writecyclesTJ=25°C20Kcycles4Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012PMBus/SMBus/I2CThetimingcharacteristicsandtimingdiagramforthecommunicationsinterfacethatsupportsI2C,SMBusandPMBusisshownbelow.
I2C/SMBus/PMBusTIMINGREQUIREMENTSTA=–40°Cto85°C,3V50mscausesresetofanytransactionthatisinprogress.
ThisspecificationisvalidwhentheNC_SMBcontrolbitremainsinthedefaultclearedstate(CLK[0]=0).
(3)t(LOW:SEXT)isthecumulativetimeaslavedeviceisallowedtoextendtheclockcyclesinonemessagefrominitialstarttothestop.
(4)Falltimetf=0.
9VDDto(VILMAX–0.
15)(5)Risetimetr=(VILMAX–0.
15)to(VIHMIN+0.
15)Figure1.
I2C/SMBusTimingDiagramFigure2.
BusTiminginExtendedModeCopyright2012,TexasInstrumentsIncorporated5UCD90124AZHCS693–JANUARY2012www.
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cnDEVICEINFORMATIONFigure3.
UCD90124APINASSIGNMENTTable1.
PINFUNCTIONSPINNAMEPINNO.
I/OTYPEDESCRIPTIONANALOGMONITORINPUTSMON11IAnaloginput(0V–2.
5V)MON22IAnaloginput(0V–2.
5V)MON33IAnaloginput(0V–2.
5V)MON44IAnaloginput(0V–2.
5V)MON55IAnaloginput(0V–2.
5V)MON66IAnaloginput(0V–2.
5V)MON759IAnaloginput(0V–2.
5V)MON862IAnaloginput(0V–2.
5V)6Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012Table1.
PINFUNCTIONS(continued)PINNAMEPINNO.
I/OTYPEDESCRIPTIONMON963IAnaloginput(0V–2.
5V)MON1050IAnaloginput(0V–2.
5V)MON1152IAnaloginput(0V–2.
5V)MON1254IAnaloginput(0V–2.
5V)MON1356IAnaloginput(0V–2.
5V)GPIOGPIO111I/OGeneral-purposediscreteI/OGPIO212I/OGeneral-purposediscreteI/OGPIO313I/OGeneral-purposediscreteI/OGPIO414I/OGeneral-purposediscreteI/OGPIO1325I/OGeneral-purposediscreteI/OGPIO1429I/OGeneral-purposediscreteI/OGPIO1530I/OGeneral-purposediscreteI/OGPIO1633I/OGeneral-purposediscreteI/OGPIO1734I/OGeneral-purposediscreteI/OGPIO1835I/OGeneral-purposediscreteI/OPWMOUTPUTSFPWM1/GPIO517I/O/PWMPWM(15.
259kHzto125MHz)orGPIOFPWM2/GPIO618I/O/PWMPWM(15.
259kHzto125MHz)orGPIOFPWM3/GPIO719I/O/PWMPWM(15.
259kHzto125MHz)orGPIOFPWM4/GPIO820I/O/PWMPWM(15.
259kHzto125MHz)orGPIOFPWM5/GPIO921I/O/PWMPWM(15.
259kHzto125MHz)orGPIOFPWM6/GPIO1022I/O/PWMPWM(15.
259kHzto125MHz)orGPIOFPWM7/GPIO1123I/O/PWMPWM(15.
259kHzto125MHz)orGPIOFPWM8/GPIO1224I/O/PWMPWM(15.
259kHzto125MHz)orGPIOPWM1/GPI131I/PWMFixed10-kHzPWMoutputorGPIPWM2/GPI232I/PWMFixed1-kHzPWMoutputorGPIPWM3/GPI342I/PWMPWM(0.
93Hzto7.
8125MHz)orGPIPWM4/GPI441I/PWMPWM(0.
93Hzto7.
8125MHz)orGPIPMBusCOMMINTERFACEPMBUS_CLK15I/OPMBusclock(musthavepullupto3.
3V)PMBUS_DATA16I/OPMBusdata(musthavepullupto3.
3V)PMBALERT#27OPMBusalert,active-low,open-drainoutput(musthavepullupto3.
3V)PMBUS_CNTRL28IPMBuscontrolPMBUS_ADDR061IPMBusanalogaddressinput.
Least-significantaddressbitPMBUS_ADDR160IPMBusanalogaddressinput.
Most-significantaddressbitJTAGTRCK10OTestreturnclockTCK/GPIO1936I/OTestclockorGPIOTDO/GPIO2037I/OTestdataoutorGPIOTDI/GPIO2138I/OTestdatain(tietoVddwith10-kΩresistor)orGPIOTMS/GPIO2239I/OTestmodeselect(tietoVddwith10-kΩresistor)orGPIOTRST40ITestreset–tietogroundwith10-kΩresistorCopyright2012,TexasInstrumentsIncorporated7UCD90124AZHCS693–JANUARY2012www.
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cnTable1.
PINFUNCTIONS(continued)PINNAMEPINNO.
I/OTYPEDESCRIPTIONINPUTPOWERANDGROUNDSRESET9Active-lowdeviceresetinput.
Holdlowforatleast2μstoresetthedevice.
V33FB583.
3-Vlinearregulatorfeedbackconnection.
Leaveunconnected.
V33A46Analog3.
3-Vsupply.
Refertothelayoutguidelinessection.
V33D45Digitalcore3.
3-Vsupply.
Refertothelayoutguidelinessection.
V33DIO17DigitalI/O3.
3-Vsupply.
Refertothelayoutguidelinessection.
V33DIO244DigitalI/O3.
3-Vsupply.
Refertothelayoutguidelinessection.
BPCap471.
8-Vbypasscapacitor–tie0.
1-μFcapacitortoanalogground.
AVSS149AnaloggroundAVSS248AnaloggroundAVSS364AnaloggroundDVSS18DigitalgroundDVSS226DigitalgroundDVSS343DigitalgroundQFPgroundpadNAThermalpad–tietogroundplane.
FUNCTIONALDESCRIPTIONTIFUSIONGUITheTexasInstrumentsFusionDigitalPowerDesignerisprovidedfordeviceconfiguration.
ThisPC-basedgraphicaluserinterface(GUI)offersanintuitiveI2C/PMBusinterfacetothedevice.
ItallowsthedesignengineertoconfigurethesystemoperatingparametersfortheapplicationwithoutdirectlyusingPMBuscommands,storetheconfigurationtoon-chipnonvolatilememory,andobservesystemstatus(voltage,etc).
FusionDigitalPowerDesignerisreferencedthroughoutthedatasheetasFusionGUIandmanysectionsincludescreenshots.
TheFusionGUIcanbedownloadedfromwww.
ti.
com.
PMBUSINTERFACEThePMBusisaserialinterfacespecificallydesignedtosupportpowermanagement.
ItisbasedontheSMBusinterfacethatisbuiltontheI2Cphysicalspecification.
TheUCD90124Asupportsrevision1.
1ofthePMBusstandard.
Whereverpossible,standardPMBuscommandsareusedtosupportthefunctionofthedevice.
ForuniquefeaturesoftheUCD90124A,MFR_SPECIFICcommandsaredefinedtoconfigureoractivatethosefeatures.
ThesecommandsaredefinedintheUCD90xxxSequencerandSystemHealthControllerPMBUSCommandReference(SLVU352).
ThemostcurrentUCD90xxxPMBusCommandReferencecanbefoundwithintheTIFusionDigitalPowerDesignersoftware:http://focus.
ti.
com/docs/toolsw/folders/print/fusion_digital_power_designer.
htmlviatheHelpMenu(Help,Documentation&HelpCenter,Sequencerstab,Documentationsection).
ThisdocumentmakesfrequentmentionofthePMBusspecification.
Specifically,thisdocumentisPMBusPowerSystemManagementProtocolSpecificationPartII–CommandLanguage,Revision1.
1,dated5February2007.
ThespecificationispublishedbythePowerManagementBusImplementersForumandisavailablefromwww.
pmbus.
org.
TheUCD90124AisPMBuscompliant,inaccordancewiththeCompliancesectionofthePMBusspecification.
ThefirmwareisalsocompliantwiththeSMBus1.
1specification,includingsupportfortheSMBusALERTfunction.
Thehardwarecansupporteither100-kHzor400-kHzPMBusoperation.
8Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012THEORYOFOPERATIONModernelectronicsystemsoftenusenumerousmicrocontrollers,DSPs,FPGAs,andASICs.
Eachdevicecanhavemultiplesupplyvoltagestopowerthecoreprocessor,analog-to-digitalconverterorI/O.
Thesedevicesaretypicallysensitivetotheorderandtimingofhowthevoltagesaresequencedonandoff.
TheUCD90124Acansequencesupplyvoltagestopreventmalfunctions,intermittentoperation,ordevicedamagecausedbyimproperpoweruporpowerdown.
Appropriatehandlingofunder-andovervoltagefaultscanextendsystemlifeandimprovelongtermreliability.
TheUCD90124Astorespowersupplyfaultstoon-chipnonvolatileflashmemoryforaidinsystemfailureanalysis.
Tachmonitorinputs,PWMoutputsandtemperaturemeasurementscanbecombinedwithachoicebetweentwobuilt-infan-controlalgorithmstoprovideastand-alonefancontrollerforindependentoperationofuptofourfans.
Systemreliabilitycanbeimprovedthroughfour-cornertestingduringsystemverification.
Duringfour-cornertesting,thesystemisoperatedattheminimumandmaximumexpectedambienttemperatureandwitheachpowersupplysettotheminimumandmaximumoutputvoltage,commonlyreferredtoasmargining.
TheUCD90124Acanbeusedtoimplementaccurateclosed-loopmarginingofupto10powersupplies.
TheUCD90124A12-railsequencercanbeusedinaPMBus-orpin-basedcontrolenvironment.
TheTIFusionGUIprovidesapowerfulbutsimpleinterfaceforconfiguringsequencingsolutionsforsystemswithbetweenoneand12powersuppliesusing12analogvoltage-monitorinputs,fourGPIsand22highlyconfigurableGPIOs.
Arailincludesvoltage,apower-supplyenableandamarginingoutput.
Atleastonemustbeincludedinaraildefinition.
Oncetheuserhasdefinedhowthepower-supplyrailsshouldoperateinaparticularsystem,analoginputpinsandGPIOscanbeselectedtomonitorandenableeachsupply(Figure4).
Copyright2012,TexasInstrumentsIncorporated9UCD90124AZHCS693–JANUARY2012www.
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cnFigure4.
FusionGUIPin-AssignmentTabAfterthepinshavebeenconfigured,otherkeymonitoringandsequencingcriteriaareselectedforeachrailfromtheVoutConfigtab(Figure5):Nominaloperatingvoltage(Vout)Undervoltage(UV)andovervoltage(OV)warningandfaultlimitsMargin-lowandmargin-highvaluesPower-goodonandpower-goodofflimitsPMBusorpin-basedsequencingcontrol(On/OffConfig)RailsandGPIsforSequenceOndependenciesRailsandGPIsforSequenceOffdependenciesTurn-onandturn-offdelaytimingMaximumtimeallowedforarailtoreachPOWER_GOOD_ONorPOWER_GOOD_OFFafterbeingenabled10Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012ordisabledOtherrailstoturnoffincaseofafaultonarail(fault-shutdownslaves)Figure5.
FusionGUIVOUT-ConfigTabTheSynchronizemargins/limits/PGtoVoutcheckboxisaneasywaytochangethenominaloperatingvoltageofarailandalsoupdatealloftheotherlimitsassociatedwiththatrailaccordingtothepercentagesshowntotherightofeachentry.
TheplotintheupperleftsectionofFigure5showsasimulationoftheoverallsequence-onandsequence-offconfiguration,includingthenominalvoltage,theturnonandturnoffdelaytimes,thepower-goodonandpower-goodoffvoltagesandanytimingdependenciesbetweentherails.
AfterarailvoltagehasreacheditsPOWER_GOOD_ONvoltageandisconsideredtobeinregulation,itiscomparedagainsttwoUVandtwoOVthresholdsinordertodetermineifawarningorfaultlimithasbeenexceeded.
Ifafaultisdetected,theUCD90124Arespondsbasedonavarietyofflexible,user-configuredoptions.
Faultscancauserailstorestart,shutdownimmediately,sequenceoffusingturnoffdelaytimesorshutdownagroupofrailsandsequencethembackon.
Differenttypesoffaultscanresultindifferentresponses.
Faultresponses,alongwithanumberofotherparametersincludinguser-specificmanufacturinginformationandexternalscalingandoffsetvalues,areselectedinthedifferenttabswithintheConfigurefunctionoftheFusionGUI.
Oncetheconfigurationsatisfiestheuserrequirements,itcanbewrittentodeviceSRAMifFusionGUIisconnectedtoaUCD90124AusinganI2C/PMBus.
SRAMcontentscanthenbestoredtodataflashmemorysothattheconfigurationremainsinthedeviceafteraresetorpowercycle.
Copyright2012,TexasInstrumentsIncorporated11UCD90124AZHCS693–JANUARY2012www.
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cnTheFusionGUIMonitorpagehasanumberofoptions,includingadevicedashboardandasystemdashboard,forviewingandcontrollingdeviceandsystemstatus.
Figure6.
FusionGUIMonitorPageTheUCD90124Aalsohasstatusregistersforeachrailandthecapabilitytologfaultstoflashmemoryforuseinsystemtroubleshooting.
Thisishelpfulintheeventofapower-supplyorsystemfailure.
Thestatusregisters(Figure7)andthefaultlog(Figure8)areavailableintheFusionGUI.
SeetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReference(SLVU352)andthePMBusSpecificationfordetaileddescriptionsofeachstatusregisterandsupportedPMBuscommands.
12Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012Figure7.
FusionGUIRail-StatusRegisterCopyright2012,TexasInstrumentsIncorporated13UCD90124AZHCS693–JANUARY2012www.
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cnFigure8.
FusionGUIFlash-ErrorLog(LoggedFaults)POWER-SUPPLYSEQUENCINGTheUCD90124Acancontroltheturn-onandturn-offsequencingofupto12voltagerailsbyusingaGPIOtosetapower-supplyenablepinhighorlow.
InPMBus-baseddesigns,thesystemPMBusmastercaninitiateasequence-oneventbyassertingthePMBUS_CNTRLpinorbysendingtheOPERATIONcommandovertheI2Cserialbus.
Inpin-baseddesigns,thePMBUS_CNTRLpincanalsobeusedtosequence-onandsequence-off.
Theauto-enablesettingignorestheOPERATIONcommandandthePMBUS_CNTRLpin.
Sequence-onisstartedatpowerupafteranydependenciesandtimedelaysaremetforeachrail.
Arailisconsideredtobeonorwithinregulationwhenthemeasuredvoltageforthatrailcrossesthepower-goodon(POWER_GOOD_ON(1))limit.
Therailisstillinregulationuntilthevoltagedropsbelowpower-goodoff(POWER_GOOD_OFF).
Inthecasethatthereisn'tvoltagemonitoringsetforagivenrail,thatrailisconsideredONifitiscommandedon(eitherbyOPERATIONcommand,PMBUSCNTRLpin,orauto-enable)and(TON_DELAY+TON_MAX_FAULT_LIMIT)timepasses.
Also,arailisconsideredOFFifthatrailiscommandedOFFand(TOFF_DELAY+TOFF_MAX_WARN_LIMIT)timepasses(1)Inthisdocument,configurationparameterssuchasPowerGoodOnarereferredtousingFusionGUInames.
TheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferencenameisshowninparentheses(POWER_GOOD_ON)thefirsttimetheparameterappears.
14Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012Turn-onSequencingThefollowingsequence-onoptionsaresupportedforeachrail:Monitoronly–donotsequence-onFixeddelaytime(TON_DELAY)afteranOPERATIONcommandtoturnonFixeddelaytimeafterassertionofthePMBUS_CNTRLpinFixedtimeafteroneoragroupofparentrailsachievesregulation(POWER_GOOD_ON)FixedtimeafteradesignatedGPIhasreachedauser-specifiedstateAnycombinationofthepreviousoptionsThemaximumTON_DELAYtimeis3276ms.
Turn-offSequencingThefollowingsequence-offoptionsaresupportedforeachrail:Monitoronly–donotsequence-offFixeddelaytime(TOFF_DELAY)afteranOPERATIONcommandtoturnoffFixeddelaytimeafterdeassertionofthePMBUS_CNTRLpinFixedtimeafteroneoragroupofparentrailsdropbelowregulation(POWER_GOOD_OFF)Fixeddelaytimeinresponsetoanundervoltage,overvoltage,ormaxturn-onfaultontherailFixeddelaytimeinresponsetoafaultonadifferentrailwhensetasafaultshutdownslavetothefaultedrailFixeddelaytimeinresponsetoaGPIreachingauser-specifiedstateAnycombinationofthepreviousoptionsThemaximumTOFF_DELAYtimeis3276ms.
Figure9.
Sequence-onandSequence-offTimingSequencingConfigurationOptionsInadditiontotheturn-onandturn-offsequencingoptions,thetimebetweenwhenarailisenabledandwhenthemonitoredrailvoltagemustreachitspower-good-onsettingcanbeconfiguredusingmaxturn-on(TON_MAX_FAULT_LIMIT).
Maxturn-oncanbesetin1-msincrements.
Avalueof0msmeansthatthereisnolimitandthedevicecantrytoturnontheoutputvoltageindefinitely.
Railscanbeconfiguredtoturnoffimmediatelyortosequence-offaccordingtorailandGPIdependencies,anduser-defineddelaytimes.
AsequencedshutdownisconfiguredbyselectingtheappropriaterailandGPIdependencies,andturn-offdelay(TOFF_DELAY)timesforeachrail.
Theturn-offdelaytimesbeginwhenthePMBUS_CNTRLpinisdeasserted,whenthePMBusOPERATIONcommandisusedtogiveasoft-stopcommand,orwhenafaultoccursonarailthathasotherrailssetasfault-shutdownslaves.
Shutdownsononerailcaninitiateshutdownsofotherrailsorcontrollers.
InsystemswithmultipleUCD90124As,itispossibleforeachcontrollertobebothamasterandaslavetoanothercontroller.
Copyright2012,TexasInstrumentsIncorporated15UCD90124AZHCS693–JANUARY2012www.
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cnPINSELECTEDRAILSTATESThisfeatureallowswiththeuseofupto3GPIstoenableanddisableanyrail.
Thisisusefulforimplementingsystemlow-powermodesandtheAdvancedConfigurationandPowerInterface(ACPI)specificationthatisusedforoperatingsystemdirectedpowermanagementinserversandPCs.
Inupto8systemstates,thepowersystemdesignercandefinewhichrailsareonandwhichrailsareoff.
Ifanewstateispresentedontheinputpins,andarailisrequiredtochangestate,itwilldosowithregardtoitssequence-onorsequence-offdependencies.
TheOPERATIONcommandismodifiedwhenthisfunctioncausesarailtochangeitsstate.
ThismeansthattheON_OFF_CONFIGforagivenrailmustbesettousetheOPERATIONcommandforthisfunctiontohaveanyeffectontherailstate.
Thefirst3pinsconfiguredwiththeGPI_CONFIGcommandareusedtoselect1of8systemstates.
Wheneverthedeviceisreset,thesepinsaresampledandthesystemstate,ifenabled,willbeusedtoupdateeachrailstate.
Whenselectinganewsystemstate,changestothestatusoftheGPIsmustnottakelongerthan1microsecond.
SeetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferenceforcompleteconfigurationsettingsofPIN_SELECTED_RAIL_STATES.
Table2.
GPISelectionofSystemStatesSystemGPI2StateGPI1StateGPI0StateStateNOTAssertedNOTAssertedNOTAsserted0NOTAssertedNOTAssertedAsserted1NOTAssertedAssertedNOTAsserted2NOTAssertedAssertedAsserted3AssertedNOTAssertedNOTAsserted4AssertedNOTAssertedAsserted5AssertedAssertedNOTAsserted6AssertedAssertedAsserted7MONITORINGTheUCD90124Ahas13monitorinputpins(MONx)thataremultiplexedintoa2.
5Vreferenced12-bitADC.
Themonitorpinscanbeconfiguredsothattheycanmeasurevoltagesignalstoreportvoltage,currentandtemperaturetypemeasurements.
Asinglerailcanincludeallthreemeasurementtypes,eachmonitoredonseparateMONpins.
Ifarailhasbothvoltageandcurrentassignedtoit,thentheusercancalculatepowerfortherail.
DigitalfilteringappliedtoeachMONinputdependsonthetypeofsignal.
Voltageinputshavenofiltering.
Currentandtemperatureinputshavealow-passfilter.
Althoughthemonitorresultscanbereportedwitharesolutionofabout15μV,therealconversionresolutionof610μVisfixedbythe2.
5-Vreferenceandthe12-bitADC.
Table3.
VoltageRangeandResolutionVOLTAGERANGERESOLUTION(Volts)(millivolts)0to127.
996093.
906250to63.
998051.
953130to31.
999020.
976560to15.
999510.
488240to7.
999760.
244140to3.
999880.
122070to1.
999940.
061040to0.
999970.
0305216Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012VOLTAGEMONITORINGUpto12railvoltagescanbemonitoredusingtheanaloginputpins.
Theinputvoltagerangeis0V–2.
5VforMONpins1-6,59,62and63.
Pins50,52,54and56canmeasuredownto0.
2V.
Anyvoltagebetween0Vand0.
2Vonthesepinsisreadas0.
2V.
Externalresistorscanbeusedtoattenuatevoltageshigherthan2.
5V.
TheADCoperatescontinuously,requiring3.
89μstoconvertasingleanaloginput.
Eachrailissampledbythesequencingandmonitoringalgorithmevery400μs.
Themaximumsourceimpedanceofanysampledvoltageshouldbelessthan4k.
Thesourceimpedancelimitisparticularlyimportantwhenaresistor-dividernetworkisusedtolowerthevoltageappliedtotheanaloginputpins.
MON1-MON6canbeconfiguredusingdigitalhardwarecomparators,whichcanbeusedtoachievefasterfaultresponses.
Eachhardwarecomparatorhasfourthresholds(twoUV(FaultandWarning)andtwoOV(FaultandWarning)).
ThehardwarecomparatorsrespondtoUVorOVconditionsinabout80μs(fasterthan400sfortheADCinputs)andcanbeusedtodisablerailsorassertGPOs.
Theonlyfaultresponseavailableforthehardwarecomparatorsistoshutdownimmediately.
Aninternal2.
5-VreferenceisusedbytheADC.
TheADCreferencehasatoleranceof±0.
5%between0°Cand125°Candatoleranceof±1%between–40°Cand125°C.
Anexternalvoltagedividerisrequiredformonitoringvoltageshigherthan2.
5V.
ThenominalrailvoltageandtheexternalscalefactorcanbeenteredintotheFusionGUIandareusedtoreporttheactualvoltagebeingmonitoredinsteadoftheADCinputvoltage.
ThenominalvoltageisusedtosettherangeandprecisionofthereportedvoltageaccordingtoTable3.
Figure10.
VoltageMonitoringBlockDiagramAlthoughthemonitorresultscanbereportedwitharesolutionofabout15μV,therealconversionresolutionof610μVisfixedbythe2.
5-Vreferenceandthe12-bitADC.
CURRENTMONITORINGCurrentcanbemonitoredusingtheanaloginputs.
Externalcircuitry,seeFigure11,mustbeusedinordertoconvertthecurrenttoavoltagewithintherangeoftheUCD90124AMONxinputbeingused.
Ifamonitorinputisconfiguredasacurrent,themeasurementsaresmoothedbyasliding-averagedigitalfilter.
Thecurrentfor1railismeasuredevery200μs.
Ifthedeviceisprogrammedtosupport10rails(independentofcurrentnotbeingmonitoredatallrails),theneachrail'scurrentwillgetmeasuredevery2ms.
Thecurrentcalculationisdonewithaslidingaverageusingthelast4measurements.
Thefilterreducestheprobabilityoffalsefaultdetections,andintroducesasmalldelaytothecurrentreading.
Ifarailisdefinedwithavoltagemonitorandacurrentmonitor,thenmonitoringforundercurrentwarningsbeginsoncetherailvoltagereachesPOWER_GOOD_ON.
Iftheraildoesnothaveavoltagemonitor,thencurrentmonitoringbeginsafterTON_DELAY.
ThedevicesupportsmultiplePMBuscommandsrelatedtocurrent,includingREAD_IOUT,whichreadsexternalcurrentsfromtheMONpins;IOUT_OC_FAULT_LIMIT,whichsetstheovercurrentfaultlimit;IOUT_OC_WARN_LIMIT,whichsetstheovercurrentwarninglimit;andIOUT_UC_FAULT_LIMIT,whichsetstheundercurrentfaultlimit.
TheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferencecontainsadetaileddescriptionofhowcurrentfaultresponsesareimplementedusingPMBuscommands.
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cnIOUT_CAL_GAINisaPMBuscommandthatallowsthescalefactorofanexternalcurrentsensorandanyamplifiersorattenuatorsbetweenthecurrentsensorandtheMONpintobeenteredbytheuserinmilliohms.
IOUT_CAL_OFFSETisthecurrentthatresultsin0VattheMONpin.
ThecombinationofthesePMBuscommandsallowscurrenttobereportedinamperes.
TheexamplebelowusingtheINA196wouldrequireprogrammingIOUT_CAL_GAINtoRsense(mΩ)*20.
Figure11.
CurrentMonitoringCircuitExampleUsingtheINA196REMOTETEMPERATUREMONITORINGANDINTERNALTEMPERATURESENSORTheUCD90124Ahassupportforinternalandremotetemperaturesensing.
TheinternaltemperaturesensorrequiresnocalibrationandcanreportthedevicetemperatureviathePMBusinterface.
Theremotetemperaturesensorcanreporttheremotetemperaturebyusingaconfigurablegainandoffsetforthetypeofsensorthatisusedintheapplicationsuchasalineartemperaturesensor(LTS)connectedtotheanaloginputs.
ExternalcircuitrymustbeusedinordertoconvertthetemperaturetoavoltagewithintherangeoftheUCD90124AMONxinputbeingused.
Ifaninputisconfiguredasatemperature,themeasurementsaresmoothedbyaslidingaveragedigitalfilter.
Thetemperaturefor1railismeasuredevery100ms.
Ifthedeviceisprogrammedtosupport10rails(independentoftemperaturenotbeingmonitoredatallrails),theneachrail'stemperaturewillgetmeasuredevery1s.
Thetemperaturecalculationisdonewithaslidingaverageusingthelast16measurements.
Thefilterreducestheprobabilityoffalsefaultdetections,andintroducesasmalldelaytothetemperaturereading.
Theinternaldevicetemperatureismeasuredusingasilicondiodesensorwithanaccuracyof±5°CandisalsomonitoredusingtheADC.
Temperaturemonitoringbeginsimmediatelyafterresetandinitialization.
ThedevicesupportsmultiplePMBuscommandsrelatedtotemperature,includingREAD_TEMPERATURE_1,whichreadstheinternaltemperature;READ_TEMPERATURE_2,whichreadsexternaltemperatures;andOT_FAULT_LIMITandOT_WARN_LIMIT,whichsettheovertemperaturefaultandwarninglimit.
TheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferencecontainsadetaileddescriptionofhowtemperature-faultresponsesareimplementedusingPMBuscommands.
TEMPERATURE_CAL_GAINisaPMBuscommandthatallowsthescalefactorofanexternaltemperaturesensor(Figure12)andanyamplifiersorattenuatorsbetweenthetemperaturesensorandtheMONpintobeenteredbytheuserin°C/V.
TEMPERATURE_CAL_OFFSETisthetemperaturethatresultsin0VattheMONpin.
ThecombinationofthesePMBuscommandsallowstemperaturetobereportedindegreesCelsius.
18Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012Figure12.
RemoteTemperatureMonitoringCircuitExampleUsingtheTMP20TEMPERATUREBYHOSTINPUTIfthehostsystemhastheoptionofnotusingthetemperature-sensingcapabilityoftheUCD90124A,itcanstillprovidethedesiredtemperaturetotheUCD90124AthroughPMBus.
ThehostmayhavetemperaturemeasurementsavailablethroughI2CorSPIinterfacedtemperaturesensors.
TheUCD90124Awouldusethetemperaturegivenbythehostinplaceofanexternaltemperaturemeasurementforagivenrail.
Thetemperatureprovidedbythehostwouldstillbeusedfordetectingovertemperaturewarningsorfaults,loggingpeaktemperatures,inputtoBooleanlogic-builderfunctions,andfeedbackforthefan-controlalgorithms.
Towriteatemperatureassociatedwitharail,thePMBuscommandusedistheREAD_TEMPERATURE_2command.
Ifthehostwritesthatcommand,thevaluewrittenwillbeusedasthetemperatureuntilanothervalueiswritten.
Thisistruewhetheramonitorpinwasassignedtothetemperatureornot.
Whenthereisamonitorpinassociatedwiththetemperature,onceREAD_TEMPERATURE_2iswritten,themonitorpinisnotusedagainuntilthepartisreset.
Whenthereisnotamonitorpinassociatedwiththetemperature,theinternaltemperaturesensorisusedforthetemperatureuntiltheREAD_TEMPERATURE_2commandiswritten.
Figure13.
HostWritingTemperaturetoUCD90124AFAULTRESPONSESANDALERTPROCESSINGTheUCD90124Amonitorswhethertherailstayswithinawindowofnormaloperation.
TherearetwoCopyright2012,TexasInstrumentsIncorporated19UCD90124AZHCS693–JANUARY2012www.
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cnprogrammablewarninglevels(underandover)andtwoprogrammablefaultlevels(underandover).
Whenanymonitoredvoltagegoesoutsideofthewarningorfaultwindow,thePMBALERT#pinisassertedimmediately,andtheappropriatebitsaresetinthePMBusstatusregisters(seeFigure7).
DetaileddescriptionsofthestatusregistersareprovidedintheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferenceandthePMBusSpecification.
AprogrammableglitchfiltercanbeenabledordisabledforeachMONinput.
Aglitchfilterforaninputdefinedasavoltagecanbesetbetween0and102mswith400-μsresolution.
Fault-responsedecisionsarebasedonresultsfromthe12-bitADC.
ThedevicecyclesthroughtheADCresultsandcomparesthemagainsttheprogrammedlimits.
ThetimetorespondtoanindividualeventisdeterminedbywhentheeventoccurswithintheADCconversioncycleandtheselectedfaultresponse.
Figure14.
SequencingandFault-ResponseTimingFigure15.
MaximumTurn-onFaultTheconfigurablefaultlimitsare:TON_MAX_FAULT–FlaggedifarailthatisenableddoesnotreachthePOWER_GOOD_ONlimitwithintheconfiguredtimeVOUT_UV_WARN–FlaggedifavoltageraildropsbelowthespecifiedUVwarninglimitafterreachingthePOWER_GOOD_ONsettingVOUT_UV_FAULT–FlaggedifaraildropsbelowthespecifiedUVfaultlimitafterreachingthePOWER_GOOD_ONsetting20Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012VOUT_OV_WARN–FlaggedifarailexceedsthespecifiedOVwarninglimitatanytimeduringstartuporoperationVOUT_OV_FAULT–FlaggedifarailexceedsthespecifiedOVfaultlimitatanytimeduringstartuporoperationMAX_TOFF_WARN–Flaggedifarailthatiscommandedtoshutdowndoesnotreach12.
5%ofthenominalrailvoltagewithintheconfiguredtimeFaultsaremoreseriousthanwarnings.
ThePMBALERT#pinisalwaysassertedimmediatelyifawarningorfaultoccurs.
Ifawarningoccurs,thefollowingtakesplace:WarningActions—ImmediatelyassertthePMBALERT#pin—Statusbitisflagged—AssertaGPIOpin(optional)—WarningsarenotloggedtoflashAnumberoffaultresponseoptionscanbechosenfrom:FaultResponses—ContinueWithoutInterruption:Flagthefaultandtakenoaction—ShutDownImmediately:Shutdownthefaultedrailimmediatelyandrestartaccordingtotherailconfiguration—ShutDownusingTOFF_DELAY:Ifafaultoccursonarail,exhaustwhateverretriesareconfigured.
Iftheraildoesnotcomeback,scheduletheshutdownofthisrailandallfault-shutdownslaves.
Allselectedrails,includingthefaultyrail,aresequencedoffaccordingtotheirsequence-offdependenciesandT_OFF_DELAYtimes.
IfDoNotRestartisselected,thensequenceoffallselectedrailswhenthefaultisdetected.
Restart—DoNotRestart:Donotattempttorestartafaultedrailafterithasbeenshutdown.
—RestartUpToNTimes:Attempttorestartafaultedrailupto14timesafterithasbeenshutdown.
Thetimebetweenrestartsismeasuredbetweenwhentherailenablepinisdeasserted(afteranyglitchfilteringandturn-offdelaytimes,ifconfiguredtoobservethem)andthenreasserted.
Itcanbesetbetween0and1275msin5-msincrements.
—RestartContinuously:SameasRestartUpToNTimesexceptthatthedevicecontinuestorestartuntilthefaultgoesaway,itiscommandedoffbythespecifiedcombinationofPMBusOPERATIONcommandandPMBUS_CNTRLpinstatus,thedeviceisreset,orpowerisremovedfromthedevice.
—ShutDownRailsandSequenceOn(Re-sequence):Shutdownselectedrailsimmediatelyoraftercontinue-operationtimeisreachedandthensequence-onthoserailsusingsequence-ondependenciesandT_ON_DELAYtimes.
SHUTDOWNALLRAILSANDSEQUENCEON(RESEQUENCE)Inresponsetoafault,oraRESEQUENCEcommand,theUCD90124Acanbeconfiguredtoturnoffasetofrailsandthensequencethembackon.
Tosequenceallrailsinthesystem,thenallrailsmustbeselectedasfault-shutdownslavesofthefaultedrail.
Therailsdesignatedasfault-shutdownslaveswilldosoftshutdownsregardlessofwhetherthefaultedrailissettostopimmediatelyorstopwithdelay.
Shut-down-all-railsandsequence-onarenotperformeduntilretriesareexhaustedforagivenfault.
Whilewaitingfortherailstoturnoff,anerrorisreportedifanyoftherailsreachesitsTOFF_MAX_WARN_LIMIT.
Thereisaconfigurableoptiontocontinuewiththeresequencingoperationifthisoccurs.
AfterthefaultedrailandCopyright2012,TexasInstrumentsIncorporated21UCD90124AZHCS693–JANUARY2012www.
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cnfault-shutdownslavessequence-off,theUCD90124Awaitsforaprogrammabledelaytimebetween0and1275msinincrementsof5msandthensequences-onthefaultedrailandfault-shutdownslavesaccordingtothestart-upsequenceconfiguration.
Thisisrepeateduntilthefaultedrailandfault-shutdownslavessuccessfullyachieveregulationorforauser-selected1,2,3,or4times.
Iftheresequenceoperationissuccessful,theresequencecounterisresetifalloftherailsthatwereresequencedmaintainnormaloperationforonesecond.
Onceshut-down-all-railsandsequence-onbegin,anyfaultsonthefault-shutdownslaverailsareignored.
Iftherearetwoormoresimultaneousfaultswithdifferentfault-shutdownslaves,themoreconservativeactionistaken.
Forexample,ifasetofrailsisalreadyonitssecondresequenceandthedeviceisconfiguredtoresequencethreetimes,andanothersetofrailsenterstheresequencestate,thatsecondsetofrailsisonlyresequencedonce.
Anotherexample–ifonesetofrailsiswaitingforallofitsrailstoshutdownsothatitcanresequence,andanothersetofrailsenterstheresequencestate,thedevicenowwaitsforallrailsfrombothsetstoshutdownbeforeresequencing.
GPIOsTheUCD90124Ahas22GPIOpinsthatcanfunctionaseitherinputsoroutputs.
EachGPIOhasconfigurableoutputmodeoptionsincludingopen-drainorpush-pulloutputsthatcanbeactivelydrivento3.
3Vorground.
ThereareanadditionalfourpinsthatcanbeusedaseitherinputsorPWMoutputsbutnotasGPOs.
Table4listspossibleusesfortheGPIOpinsandthemaximumnumberofeachtypeforeachuse.
GPIOpinscanbedependentsinsequencingandalarmprocessing.
Theycanalsobeusedforsystem-levelfunctionssuchasexternalinterrupts,power-goods,resets,orforthecascadingofmultipledevices.
GPOscanbesequencedupordownbyconfiguringarailwithoutaMONpinbutwithaGPIOsetasanenable.
22Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012Table4.
GPIOPinConfigurationOptionsPINNAMEPINRAILENGPIGPOPWMOUTMARGINPWM(12MAX)(8MAX)(12MAX)(12MAX)(10MAX)FPWM1/GPIO517XXXXXFPWM2/GPIO618XXXXXFPWM3/GPIO719XXXXXFPWM4/GPIO820XXXXXFPWM5/GPIO921XXXXXFPWM6/GPIO1022XXXXXFPWM7/GPIO1123XXXXXFPWM8/GPIO1224XXXXXGPI1/PWM131XXGPI2/PWM232XXGPI3/PWM342XXXGPI4/PWM441XXXGPIO111XXXGPIO212XXXGPIO313XXXGPIO414XXXGPIO1325XXXGPIO1429XXXGPIO1530XXXGPIO1633XXXGPIO1734XXXGPIO1835XXXTCK/GPIO1936XXXTDO/GPIO2037XXXTDI/GPIO2138XXXTMS/GPIO2239XXXGPOControlTheGPIOswhenconfiguredasoutputscanbecontrolledbyPMBuscommandsorthroughlogicdefinedininternalBooleanfunctionblocks.
ControllingGPOsbyPMBuscommands(GPIO_SELECTandGPIO_CONFIG)canbeusedtohavecontroloverLEDs,enableswitches,etc.
withtheuseofanI2Cinterface.
SeetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferencefordetailsoncontrollingaGPOusingPMBuscommands.
Copyright2012,TexasInstrumentsIncorporated23UCD90124AZHCS693–JANUARY2012www.
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cnGPODependenciesGPIOscanbeconfiguredasoutputsthatarebasedonBooleancombinationsofuptotwoANDsallORedtogether(Figure16).
Inputstothelogicblockscanincludethefirst8definedGPOs,GPIsandrail-statusflags.
OnerailstatustypeisselectableasaninputforeachANDgateinaBooleanblock.
Foraselectedrailstatus,thestatusflagsofallactiverailscanbeincludedasinputstotheANDgate.
_LATCHrail-statustypesstayasserteduntilclearedbyaMFRPMBuscommandorbyaspeciallyconfiguredGPIpin.
Thedifferentrail-statustypesareshowninTable5.
SeetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferenceforcompletedefinitionsofrail-statustypes.
TheGPOresponsecanbeconfiguredtohaveadelayedassertionordeassertion.
Figure16.
BooleanLogicCombinationsFigure17.
FusionBooleanLogicBuilder24Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012Table5.
Rail-StatusTypesforBooleanLogicRail-StatusTypesPOWER_GOODIOUT_UC_FAULTTON_MAX_FAULT_LATCHMARGIN_ENTEMP_OT_FAULTTOFF_MAX_WARN_LATCHMRG_LOW_nHIGHTEMP_OT_WARNIOUT_OC_FAULT_LATCHVOUT_OV_FAULTSEQ_ON_TIMEOUTIOUT_OC_WARN_LATCHVOUT_OV_WARNSEQ_OFF_TIMEOUTIOUT_UC_FAULT_LATCHVOUT_UV_WARNFAN_FAULTTEMP_OT_FAULT_LATCHVOUT_UV_FAULTSYSTEM_WATCHDOG_TIMEOUTTEMP_OT_WARN_LATCHTON_MAX_FAULTVOUT_OV_FAULT_LATCHSEQ_ON_TIMEOUT_LATCHTOFF_MAX_WARNVOUT_OV_WARN_LATCHSEQ_OFF_TIMEOUT_LATCHIOUT_OC_FAULTVOUT_UV_WARN_LATCHSYSTEM_WATCHDOG_TIMEOUT_LATCHIOUT_OC_WARNVOUT_UV_FAULT_LATCHGPODelaysTheGPOscanbeconfiguredsothattheymanifestachangeinlogicwithadelayonassertion,deassertion,bothornone.
GPObehaviorusingdelayswillhavedifferenteffectsdependingifthelogicchangeoccursatafasterratethanthedelay.
Onanormaldelayconfiguration,ifthelogicforaGPOchangestoastateandrevertsbacktopreviousstatewithinthetimeofadelaythentheGPOwillnotmanifestthechangeofstateonthepin.
InFigure18theGPOissetsothatitfollowstheGPIwitha3msdelayatassertionandalsoatde-assertion.
WhentheGPIfirstchangestohighlogicstate,thestateismaintainedforatimelongerthanthedelayallowingtheGPOtofollowwithappropriatelogicstate.
ThesamegoesforwhentheGPIreturnstoitspreviouslowlogicstate.
ThesecondtimethattheGPIchangestoahighlogicstateitretunstolowlogicstatebeforethedelaytimeexpires.
InthiscasetheGPOdoesnotchangestate.
AdelayconfiguredinthismannerservesasaglitchfilterfortheGPO.
Figure18.
GPOBehaviorWhenNotIgnoringInputsDuringDelayTheIgnoreInputDuringDelaybitallowstooutputachangeinGPOevenifitoccursforatimeshorterthanthedelay.
ThisconfigurationsettinghastheGPOignoreanyactivityfromthetriggeringeventuntilthedelayexpires.
Figure19representsthetwocasesforwhenignoringtheinputsduringadelay.
Inthecaseinwhichthelogicchangesoccurwithmoretimethanthedelay,theGPOsignallooksthesameasiftheinputwasnotignored.
ThenonaGPIpulseshorterthanthedelaytheGPOstillchangesstate.
AnypulsethatoccursontheGPOwhenhavingtheIgnoreInputDuringDelaybitsetwillhaveawidthofatleastthetimedelay.
Copyright2012,TexasInstrumentsIncorporated25UCD90124AZHCS693–JANUARY2012www.
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cnFigure19.
GPOBehaviorWhenIgnoringInputsDuringDelayStateMachineModeEnableWhenthisbitwithintheGPO_CONFIGcommandisset,onlyoneoftheANDpathwillbeusedatagiventime.
WhentheGPOlogicresultiscurrentlyTRUE,ANDpath0willbeuseduntiltheresultbecomesFALSE.
WhentheGPOlogicresultiscurrentlyFALSE,ANDpath1willbeuseduntiltheresultbecomesTRUE.
Thisprovidesaverysimplestatemachineandallowsformorecomplexlogicalcombinations.
GPISpecialFunctionsTherearefivespecialinputfunctionsforwhichGPIscanbeused.
Therecanbenomorethanonepinassignedtoeachofthesefunctions.
GPIFaultEnable-Whenset,thede-assertionoftheGPIistreatedasafault.
LatchedStatusesClearSource-WhenaGPOusesalatchedstatustype(_LATCH),youcanconfigureaGPIthatwillclearthelatchedstatus.
InputSourceforMarginEnable-Whenthispinisasserted,allrailswithmarginingenabledwillbeputinamarginedstate(loworhigh).
InputSourceforMarginLow/Not-High-WhenthispinisassertedallmarginedrailswillbesettoMarginLowaslongastheMarginEnableisasserted.
Whenthispinisde-assertedtherailswillbesettoMarginHigh.
FansInstalled-Fancontrolisenabledwhilethispinisasserted.
ThepolarityofGPIpinscanbeconfiguredtobeeitherActiveLoworActiveHigh.
Thefirst3GPIsthataredefinedregardlessoftheirmainpurposewillbeusedforthePIN_SELECTED_RAIL_STATEScommand.
Power-SupplyEnablesEachGPIOcanbeconfiguredasarail-enablepinwitheitheractive-loworactive-highpolarity.
Outputmodeoptionsincludeopen-drainorpush-pulloutputsthatcanbeactivelydrivento3.
3Vorground.
Duringreset,theGPIOpinsarehigh-impedanceexceptforFPWM/GPIOpins17–24,whicharedrivenlow.
Externalpulldownorpullupresistorscanbetiedtotheenablepinstoholdthepowersuppliesoffduringreset.
TheUCD90124Acansupportamaximumof12resetenablepins.
NOTEGPIOpinsthathaveFPWMcapability(pins17-24)shouldonlybeusedaspower-supplyenablesignalsifthesignalisactivehigh.
CascadingMultipleDevicesAGPIOpincanbeusedtocoordinatemultiplecontrollersbyusingitasapowergood-outputfromonedeviceandconnectingittothePMBUS_CNTRLinputpinofanother.
Thisimposesamaster/slaverelationshipamongmultipledevices.
Duringstartup,theslavecontrollersinitiatetheirstartsequencesafterthemasterhascompleteditsstartsequenceandallrailshavereachedregulationvoltages.
Duringshutdown,assoonasthemasterstartstosequence-off,itsendstheshut-downsignaltoitsslaves.
26Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012Ashutdownononeormoreofthemasterrailscaninitiateshutdownsoftheslavedevices.
Themastershutdownscanbeinitiatedintentionallyorbyafaultcondition.
Thismethodworkstocoordinatemultiplecontrollers,butitdoesnotenforceinterdependencybetweenrailswithinasinglecontroller.
ThePMBusspecificationimpliesthatthepower-goodsignalisactivewhenALLtherailsinacontrollerareregulatingattheirprogrammedvoltage.
TheUCD90124AallowsGPIOstobeconfiguredtorespondtoadesiredsubsetofpower-goodsignals.
PWMOutputsFPWM1-8Pins17–24canbeconfiguredasfastpulse-widthmodulators(FPWMs).
Thefrequencyrangeis15.
260kHzto125MHz.
FPWMscanbeconfiguredasclosed-loopmarginingoutputs,fancontrollersorgeneral-purposePWMs.
AnyFPWMpinnotusedasaPWMoutputcanbeconfiguredasaGPIO.
OneFPWMinapaircanbeusedasaPWMoutputandtheotherpincanbeusedasaGPO.
TheFPWMpinsareactivelydrivenlowfromresetwhenusedasGPOs.
ThefrequencysettingsfortheFPWMsapplytopairsofpins:FPWM1andFPWM2–samefrequencyFPWM3andFPWM4–samefrequencyFPWM5andFPWM6–samefrequencyFPWM7andFPWM8–samefrequencyIfanFPWMpinfromapairisnotusedwhileitscompanionissetuptofunctionasaPWM,itisrecommendedtoconfiguretheunusedFPWMpinasanactive-lowopen-drainGPOsothatitdoesnotdisturbtherestofthesystem.
BysettinganFPWM,itautomaticallyenablestheotherFPWMwithinthepairifitwasnotconfiguredforanyotherfunctionality.
ThefrequencyfortheFPWMisderivedbydividingdowna250MHzclock.
TodeterminetheactualfrequencytowhichanFPWMcanbeset,mustdivide250MHzbyanyintegerbetween2and(214-1).
TheFPWMdutycycleresolutionisdependentonthefrequencysetforagivenFPWM.
OncethefrequencyisknownthedutycycleresolutioncanbecalculatedasEquation1.
ChangeperStep(%)FPWM=frequency÷(250*106*16)(1)Takeforanexampledeterminingtheactualfrequencyandthedutycycleresolutionfora75MHztargetfrequency.
1.
Divide250MHzby75MHztoobtain3.
33.
2.
Roundoff3.
33toobtainanintegerof3.
3.
Divide250MHzby3toobtainactualclosestfrequencyof83.
333MHz.
4.
UseEquation1todeterminedutycycleresolutiontoobtain2.
0833%dutycycleresolution.
PWM1-4Pins31,32,41,and42canbeusedasGPIsorPWMoutputs.
IfconfiguredasPWMoutputs,thenlimitationsapply:PWM1hasafixedfrequencyof10kHzPWM2hasafixedfrequencyof1kHzPWM3andPWM4frequenciescanbe0.
93Hzto7.
8125MHz.
ThefrequencyforPWM3andPWM4isderivedbydividingdowna15.
625MHzclock.
TodeterminetheactualfrequencytowhichthesePWMscanbeset,mustdivide15.
625MHzbyanyintegerbetween2and(224-1).
ThedutycycleresolutionwillbedependentonthesetfrequencyforPWM3andPWM4.
ThePWM3orPWM4dutycycleresolutionisdependentonthefrequencysetforthegivenPWM.
OncethefrequencyisknownthedutycycleresolutioncanbecalculatedasEquation2ChangeperStep(%)PWM3/4=frequency÷15.
625*106(2)Copyright2012,TexasInstrumentsIncorporated27UCD90124AZHCS693–JANUARY2012www.
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cnTodeterminetheclosestfrequencyto1MHzthatPWM3canbesettocalculateasthefollowing:1.
Divide15.
625MHzby1MHztoobtain15.
625.
2.
Roundoff15.
625toobtainanintegerof16.
3.
Divide15.
625MHzby16toobtainactualclosestfrequencyof976.
563kHz.
4.
UseEquation2todeterminedutycycleresolutiontoobtain6.
25%dutycycleresolution.
Allfrequenciesbelow238Hzwillhaveadutycycleresolutionof0.
0015%.
ProgrammableMultiphasePWMsTheFPWMscanbealignedwithreferencetotheirphase.
ThephaseforeachFPWMisconfigurablefrom0°to360°.
ThisprovidesflexibilityinPWM-basedapplicationssuchaspower-supplycontroller,digitalclockgeneration,andothers.
SeeanexampleoffourFPWMsprogrammedtohavephasesat0°,90°,180°and270°(Figure20).
Figure20.
MultiphasePWMsMARGININGMarginingisusedinproductvalidationtestingtoverifythatthecompletesystemworksproperlyoverallconditions,includingminimumandmaximumpower-supplyvoltages,loadrange,ambienttemperaturerange,andotherrelevantparametervariations.
MarginingcanbecontrolledoverPMBususingtheOPERATIONcommandorbyconfiguringtwoGPIOpinsasmargin-ENandmargin-UP/DOWNinputs.
TheMARGIN_CONFIGcommandintheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferencedescribesdifferentavailablemarginingoptions,includingignoringfaultswhilemarginingandusingclosed-loopmarginingtotrimthepower-supplyoutputvoltageonetimeatpowerup.
Open-LoopMarginingOpen-loopmarginingisdonebyconnectingapower-supplyfeedbacknodetogroundthroughoneresistorandtothemarginedpowersupplyoutput(VOUT)throughanotherresistor.
Thepower-supplyregulationlooprespondstothechangeinfeedbacknodevoltagebyincreasingordecreasingthepower-supplyoutputvoltagetoreturnthefeedbackvoltagetotheoriginalvalue.
ThevoltagechangeisdeterminedbythefixedresistorvaluesandthevoltageatVOUTandground.
TwoGPIOpinsmustbeconfiguredasopen-drainoutputsforconnectingresistorsfromthefeedbacknodeofeachpowersupplytoVOUTorground.
28Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012Figure21.
Open-LoopMarginingClosed-LoopMarginingClosed-loopmarginingusesaPWMorFPWMoutputforeachpowersupplythatisbeingmargined.
AnexternalRCnetworkconvertstheFPWMpulsetrainintoaDCmarginingvoltage.
Themarginingvoltageisconnectedtotheappropriatepower-supplyfeedbacknodethrougharesistor.
Thepower-supplyoutputvoltageismonitored,andthemarginingvoltageiscontrolledbyadjustingthePWMdutycycleuntilthepower-supplyoutputvoltagereachesthemargin-lowandmargin-highvoltagessetbytheuser.
Thevoltagesettingresolutionswillbethesamethatappliestothevoltagemeasurementresolution(Table3).
Theclosedloopmarginingcanoperateinseveralmodes(Table6).
Giventhatthisclosed-loopsystemhasfeedbackthroughtheADC,theclosed-loopmarginingaccuracywillbedominatedbytheADCmeasurement.
Therelationshipbetweendutycycleandmarginedvoltageisconfigurablesothatvoltageincreaseswhendutycylceincreasesordecreases.
FormoredetailsonconfiguringtheUCD90124Aformargining,seetheVoltageMarginingUsingtheUCD9012xapplicationnote(SLVA375).
Table6.
ClosedLoopMarginingModesModeDescriptionDISABLEMarginingisdisabled.
ENABLE_TRI_STATEWhennotmargining,thePWMpinissettohighimpedancestate.
Whennotmargining,thePWMduty-cycleiscontinuouslyadjustedtokeepthevoltageatENABLE_ACTIVE_TRIMVOUT_COMMAND.
ENABLE_FIXED_DUTY_CYCLEWhennotmargining,thePWMduty-cycleissettoafixedduty-cycle.
Figure22.
Closed-LoopMarginingFANCONTROLTheUCD90124Acancontrolandmonitoruptofourtwo-,three-orfour-wirefans.
UptofourGPIOpinscanbeusedastachometerinputs.
ThenumberoffantachpulsesperrevolutionforeachfancanbeenteredusingtheFusionGUI.
Afanspeed-faultthresholdcanbesettotriggeranalarmifthemeasuredspeeddropsbelowauser-definedvalue.
Thetwo-andthree-wirefansarecontrolledbyconnectingthepositiveinputofthefantothespecifiedsupplyCopyright2012,TexasInstrumentsIncorporated29UCD90124AZHCS693–JANUARY2012www.
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cnvoltageforthefan.
Thenegativeinputofthefanisconnectedtothecollectorordrainofatransistor.
ThetransistoristurnedoffandonusingaGPIOpin.
Four-wirefanscanbecontrolledthesameway.
However,four-wirefansshouldusethefanPWMinput(thefourthwire).
ItcanbedrivendirectlybyoneoftheeightFPWMorthetwoadjustablePWMoutputs.
ThenormalfrequencyrangeforthePWMinputis15kHzto40kHz,butthespecificationsforthefanconfirmtheinterfaceprocedure.
Figure23.
Two-WireFanConnectionFigure24.
Three-WireFanConnection30Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012Figure25.
Four-WireFanConnectionTheUCD90124Aautocalibratefeatureautomaticallyfindsandrecordstheturn-on,turn-offandmaximumspeedsanddutycyclesforanyfan.
Fanshaveaminimumspeedatwhichtheyturnon,aturn-offspeedthatisusuallyslightlylowerthantheturn-onspeed,andamaximumspeedthatoccursatslightlylessthan100%dutycycle.
EachspeedhasaPWMdutycyclethatgoeswithit.
Everyfanisslightlydifferent,evenifthemodelnumbersarethesame.
Thebuilt-intemperaturecontrolalgorithmsusetheactualmeasuredoperatingspeedrangeinsteadof0RPMtoratedspeedofthefantoimprovethefancontrolalgorithms.
Theusercanchoosewhethertouseautocalibrateortomanuallyenterthefandata.
TheUCD90124AcancontroluptofourindependentfansasdefinedinthePMBusstandard.
Whenenabled,theFAN-PWMcontroloutputprovidesadigitalsignalwithaconfigurablefrequencyanddutycycle,withadutycyclethatissetbasedontheFAN_COMMAND_1PMBuscommand.
ThePWMcanbesettofrequenciesbetween1Hzand125MHzbasedontheUCD90124APWMtypeselectedforthefancontrol.
Thedutycyclecanbesetfrom0%to100%with1%resolution.
TheFAN-TACHfan-controlinputcountsthenumberoftransitionsinthetachometeroutputfromthefanineach1-secondinterval.
ThetachometercanbereadbyissuingtheREAD_FAN_SPEED_1command.
ThespeedisreturnedinRPMs.
FaultlimitscanalsobesetforthetachometerspeedbyissuingtheFAN_SPEED_FAULT_LIMITcommandandthestatuscheckedbyissuingtheSTATUS_FAN_1_2command.
SeetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferenceforacompletedescriptionofeachcommand.
TheUCD90124Aalsosupportstwofancontrolalgorithms.
HystereticFanControlTempONandTempOFFlevelsareinputbytheuser.
TempONishigherthanTempOFF.
AGPIOpinisusedtoturnthefanorfansonatfullspeedwhenthemonitoredtemperaturereachesTempONandtoturnthefansoffwhenthetemperaturedropsbelowTempOFF.
Copyright2012,TexasInstrumentsIncorporated31UCD90124AZHCS693–JANUARY2012www.
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cnInputs:TON,TOFF,TOT,UpdateInterval,RailwhereMEAS_TEMPismonitored,GPOxpinSystemstartsupatt=0secondsMEAS_TEMP=25°C→ambienttempGPO/PWMislowandFanisoffCheckMEAS_TEMPevery1second(or250msec)WhenMEAS_TEMP=TON,setGPO/PWM=1→turnfanonLeaveGPO/PWM=1unlessMEAS_TEMPTON,declareafaultandtaketheprescribedaction.
Figure26.
HystereticTemperatureControlfor2-or3-wireFansSetPointFanControlThesecondalgorithm(Figure27)usesfivecontrolsetpointsthateachhaveatemperatureandafanspeed.
Whenthemonitoredtemperatureincreasesaboveoneofthesetpointtemperatures,thefanspeedisincreasedtothecorrespondingsetpointvalue.
Whenthemonitoredtemperaturedropsbelowasetpointtemperature,thefanspeedisreducedtothecorrespondingsetpointvalue.
Theramprateforspeedcanbeselected,allowingtheusertooptimizefanperformanceandminimizeaudiblenoise.
ThefanspeedisvariedbychangingthedutycycleofaPWMoutput.
Fortwo-andthree-wirefans,asthefanisturnedonandoff,theinertiaofthefansmoothesoutthefanspeedchanges,resultinginvariablespeedoperation.
Thisapproachcanbetakenwithanyfan,butwouldmostlikelybeusedwithtwo-orthree-wirefansataPWMfrequencyinthe40-Hzto80-Hzrange.
Four-wirefanswouldusethePWMinputasdescribedearlierinthissection.
32Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012Inputs:TOT,UpdatesInterval,RailthatMEAS_TEMPisbeingmonitoredon,PWMpin,PWMfreq,PWMtemprate,FANTACpin,5x(TEMPn,SPEEDn)setpoints.
Systemstartsupatt=0secondsMEAS_TEMP=25°CatambienttempPWMDUTY_CYCLE=0%andfanisoffCheckMEAS_TEMPevery250ms(or1s)WhenMEAS_TEMP>TEMP1:–setSPEED_TARGET=SPEED1–increaseDUTY_CYCLEtoDUTY_CYCLE_ON–increaseDUTY_CYCLEbyramprate(10%/second)untilSPEED=SPEED_TARGETWhenMEAS_TEMP>TEMP2:–setSPEED_TARGET=SPEED2–increaseDUTY_CYCLEbyramprateuntilSPEED=SPEED_TARGETRepeatastemperatureisincreasedforeachnewsetpointIfMEAS_TEMP>TOT,declareafaultFigure27.
TemperatureandSpeedSetPointPWMControlforandtaketheprescribedactionFour-WireFansIftemperaturedrops-aboveTEMP4tobelowTEMP3forexample–whenMEAS_TEMPdropsbelowTEMP4,maintainSPEED4→donotchangetheDUTY_CYCLE–whenMEAS_TEMPdropsbelowTEMP3,setSPEED_TARGET=SPEED3–decreaseDUTY_CYCLEbyramprate(10%/second)untilSPEED=SPEED_TARGETToturmthefanoffwhenMEAS_TEMPTEMP2→increasesSPEED_TARGETfromSPD1toSPD2→increasesDUTY_CYCLE→ACTUALfanspeedrampsupfromSPD1toSPD2.
t=10to25sec:MEAS_TEMPincreasesto>TEMP5→SPEED_TARGETincreasesfromSPD2toSPD5→DUTY_CYCLErampstoDUTYMAX→ACTUALfanspeedincreasesSPD5.
t=25to30sec:MEAS_TEMPstays>TEMP5→SPEED_TARGETandDUTY_CYCLEdonotchange→ACTUALfanspeedstaysatSPD5.
t=30to35sec:MEAS_TEMPdecreasestoESETSIGNALTheUCD90124Acangenerateaprogrammablesystem-resetpulseaspartofsequence-on.
ThepulseiscreatedbyprogrammingaGPIOtoremaindeasserteduntilthevoltageofaparticularrailorcombinationofrailsreachtheirrespectivePOWER_GOOD_ONlevelsplusaprogrammabledelaytime.
Thesystem-resetdelaydurationcanbeprogrammedasshowninTable7.
SeeanexampleoftwoSYSTEMRESETsignalsFigure28.
ThefirstSYSTEMRESETsignalisconfiguredsothatitde-assertsonPowerGoodOnanditassertsonPowerGoodOffafteragivencommondelaytime.
ThesecondSYSTEMRESETsignalisconfiguredsothatitsendsapulseafteradelaytimeoncePowerGoodOnisachieved.
Thepulsewidthcanbeconfiguredbetween0.
001sto32.
256s.
SeetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferenceforpulsewidthconfigurationdetails.
Figure28.
SystemResetwithandwithoutPulseSettingThesystemresetcanreacttowatchdogtiming.
InFigure29ThefirstdelayonSYSTEMRESETisfortheinitialresetreleasethatwouldgetaCPUrunningonceallnecessaryvoltagerailsareinregulation.
ThewatchdogisconfiguredwithaStartTimeandaResetTime.
IfthesetimesexpirewithouttheWDIclearingthemthenitisexpectedthattheCPUprovidingthewatchdogsignalisnotoperating.
TheSYSTEMRESETistoggledeitherusingaDelayorGPITrackingReleaseDelaytoseeiftheCPUrecovers.
Figure29.
SystemResetwithWatchdogTable7.
System-ResetDelayDelay0ms1ms2ms4ms8ms16ms32ms34Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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com.
cnZHCS693–JANUARY2012Table7.
System-ResetDelay(continued)Delay64ms128ms256ms512ms1.
02s2.
05s4.
10s8.
19s16.
38s32.
8sWATCHDOGTIMERAGPIandGPOcanbeconfiguredasawatchdogtimer(WDT).
TheWDTcanbeindependentofpower-supplysequencingortiedtoaGPIOfunctioningasawatchdogoutput(WDO)thatisconfiguredtoprovideasystem-resetsignal.
TheWDTcanberesetbytogglingawatchdoginput(WDI)pinorbywritingtoSYSTEM_WATCHDOG_RESEToverI2C.
TheWDIandWDOpinsareoptionalwhenusingthewatchdogtimer.
TheWDIcanbereplacedbySYSTEM_WATCHDOG_RESETcommandandtheWDOcanbemanifestedthroughtheBooleanLogicdefinedGPOsorthroughtheSystemResetfunction.
TheWDTcanbeactiveimmediatelyatpoweruporsettowaitwhilethesysteminitializes.
Table8liststheprogrammablewaittimesbeforetheinitialtimeoutsequencebegins.
Table8.
WDTInitialWaitTimeWDTINITIALWAITTIME0ms100ms200ms400ms800ms1.
6s3.
2s6.
4s12.
8s25.
6s51.
2s102s205s410s819s1638sThewatchdogtimeoutisprogrammablefrom0.
001sto32.
256s.
SeetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferencefordetailsonconfiguringthewatchdogtimeout.
IftheWDTtimesout,theUCD90124AcanassertaGPIOpinconfiguredasWDOthatisseparatefromaGPIOdefinedassystem-resetpin,oritcangenerateasystem-resetpulse.
Afteratimeout,theWDTisrestartedbytogglingtheWDIpinorbywritingtoSYSTEM_WATCHDOG_RESEToverI2C.
Copyright2012,TexasInstrumentsIncorporated35UCD90124AZHCS693–JANUARY2012www.
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cnFigure30.
TimingofGPIOsConfiguredforWatchdogTimerOperationDATAANDERRORLOGGINGTOFLASHMEMORYTheUCD90124Acanlogfaultsandthenumberofdeviceresetstoflashmemory.
Peakvoltagemeasurementsarealsostoredforeachrail.
Toreducestressontheflashmemory,a30-secondtimerisstartedifameasuredvalueexceedsthepreviouslyloggedvalue.
Onlythehighestvaluefromthe30-secondintervaliswrittenfromRAMtoflash.
MultiplefaultscanbestoredinflashmemoryandcanbeaccessedoverPMBustohelpdebugpower-supplybugsorfailures.
Eachloggedfaultincludes:RailnumberFaulttypeFaulttimesincepreviousdeviceresetLastmeasuredrailvoltageThetotalnumberofdeviceresetsisalsostoredtoflashmemory.
ThevaluecanberesetusingPMBus.
Withthebrownoutfunctionenabled,therun-timeclockvalue,peakmonitorvalues,andfaultsareonlyloggedtoflashwhenapower-downisdetected.
Thedevicerun-timeclockvalueisstoredacrossresetsorpowercyclesunlessthebrownoutfunctionisdisabled,inwhichcasetherun-timeclockisreturnedtozeroaftereachreset.
ItisalsopossibletoupdateandcalibratetheUCD90124Ainternalrun-timeclockviaaPMBushost.
Forexample,ahostprocessorwithareal-timeclockcouldperiodicallyupdatetheUCD90124Arun-timeclocktoavaluethatcorrespondstotheactualdateandtime.
ThehostmusttranslatetheUCD90124Atimervaluebackintotheappropriateunits,basedontheusagescenariochosen.
SeetheREAL_TIME_CLOCKcommandintheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReferenceformoredetails.
BROWNOUTFUNCTIONTheUCD90124Acanbeenabledtoturnoffallnonvolatilelogginguntilabrownouteventisdetected.
AbrownouteventoccursifVCCdropsbelow2.
9V.
Inordertoenablethisfeature,theusermustprovideenoughlocalcapacitancetodeliverupto80mA(consideradditionalloadbasedonGPOssourcingexternalcircuitssuchasLEDs)onfor5mswhilemaintainingaminimumof2.
6Vatthedevice.
Ifusingthebrownoutcircuit(Figure31),thenaschottkydiodeshouldbeplacedsothatitblockstheothercircuitsthatarealsopoweredfromthe3.
3Vsupply.
Withthisfeatureenabled,theUCD90124Asavesfaults,peaks,andotherlogdatatoSRAMduringnormaloperationofthedevice.
Onceabrownouteventisdetected,alldataiscopiedfromSRAMtoFlash.
UseofthisfeatureallowstheUCD90124Atokeeptrackofasinglerun-timeclockthatspansdeviceresetsorsystempowerdown(ratherthanresettingtheruntimeclockafterdevicereset).
ItcanalsoimprovetheUCD90124Ainternalresponsetimetoevents,becauseFlashwritesaredisabledduringnormalsystemoperation.
ThisisanoptionalfeatureandcanbeenabledusingtheMISC_CONFIGcommand.
Formoredetails,seetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReference.
36Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012Figure31.
BrownoutCircuitPMBUSADDRESSSELECTIONTwopinsareallocatedtodecodethePMBusaddress.
Atpowerup,thedeviceappliesabiascurrenttoeachaddress-detectpin,andthevoltageonthatpiniscapturedbytheinternal12-bitADC.
ThePMBusaddressiscalculatedasfollows.
PMBusAddress=12*bin(VAD01)+bin(VAD00)Wherebin(VAD0x)istheaddressbinforoneofeightaddressesasshowninTable9.
TheaddressbinsaredefinedbytheMINandMAXVOLTAGERANGE(V).
Eachbinisaconstantratioof1.
25fromthepreviousbin.
Thismethodmaintainsthewidthofeachbinrelativetothetoleranceofstandard1%resistors.
Table9.
PMBusAddressBinsRPMBusADDRESSBINPMBusRESISTANCE(kΩ)open—11200101549118890.
9769.
8653.
6541.
2431.
6short—Alowimpedance(short)oneitheraddresspinthatproducesavoltagebelowtheminimumvoltagecausesthePMBusaddresstodefaulttoaddress126(0x7E).
Ahighimpedance(open)oneitheraddresspinthatproducesavoltageabovethemaximumvoltagealsocausesthePMBusaddresstodefaulttoaddress126(0x7E).
Address0isnotusedbecauseitisthePMBusgeneral-calladdress.
Addresses11and127cannotbeusedbythisdeviceoranyotherdevicethatsharesthePMBuswithit,becausethosearereservedformanufacturingprogrammingandtest.
Itisrecommendedthataddress126notbeusedforanydevicesonthePMBus,becausethisistheaddressthattheUCD90124Adefaultstoiftheaddresslinesareshortedtogroundorleftopen.
Table10summarizeswhichPMBusaddressescanbeused.
OtherSMBus/PMBusaddresseshavebeenassignedforspecificdevices.
ForasystemwithothertypesofdevicesconnectedtothesamePMBus,seetheSMBusdeviceaddressassignmentstableinAppendixCofthelatestversionoftheSystemManagementBus(SMBus)specification.
TheSMBusspecificationcanbedownloadedathttp://smbus.
org/specs/smbus20.
pdf.
Table10.
PMBusAddressAssignmentRulesAddressSTATUSReason0ProhibitedSMBusgeneraladdresscall1-10AvailableCopyright2012,TexasInstrumentsIncorporated37UCD90124AZHCS693–JANUARY2012www.
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com.
cnTable10.
PMBusAddressAssignmentRules(continued)AddressSTATUSReason11AvoidCausesconflictswithotherdevicesduringprogramflashupdates.
12ProhibitedPMBusalertresponseprotocol13-125Available126ForJTAGUseDefaultvalue;maycauseconflictswithotherdevices.
127ProhibitedUsedbyTImanufacturingfordevicetests.
Figure32.
PMBusAddress-DetectionMethodCAUTIONLeavingtheaddressindefaultstateas126(0x7E)willenabletheJTAGandnotallowusingtheJTAGcompatiblepins(36-39)asGPIOs.
DEVICERESETTheUCD90124Ahasanintegratedpower-onreset(POR)circuitwhichmonitorsthesupplyvoltage.
Atpowerup,thePORdetectstheV33Drise.
WhenV33DisgreaterthanVRESET,thedevicecomesoutofreset.
ThedevicecanbeforcedintotheresetstatebyanexternalcircuitconnectedtotheRESETpin.
Alogic-lowvoltageonthispinforlongerthantRESETholdsthedeviceinreset.
Itcomesoutofresetwithin1msafterRESETisreleasedandcanreturntoalogic-highlevel.
Toavoidanerroneoustriggercausedbynoise,apullupresistorto3.
3Visrecommended.
Anytimethedevicecomesoutofreset,itbeginsaninitializationroutinewhichlastsapproximately20ms.
Duringtheinitializationroutine,theFPWMpinsareheldlow,andallotherGPIOandGPIpinsareopen-circuit.
Attheendoftheinitializationroutine,thedevicebeginsnormaloperationasdefinedbythedeviceconfiguration.
DEVICECONFIGURATIONANDPROGRAMMINGFromthefactory,thedevicecontainsthesequencingandmonitoringfirmware.
ItisalsoconfiguredsothatallGPOsarehigh-impedance(exceptforFPWM/GPIOpins17-24,whicharedrivenlow),withnosequencingorfault-responseoperation.
SeeConfigurationProgrammingofUCDDevices,availablefromtheDocumentation&HelpCenterthatcanbeselectedfromtheFusionGUIHelpmenu,forfullUCD90124Aconfigurationdetails.
AftertheuserhasdesignedaconfigurationfileusingFusionGUI,therearethreegeneraldevice-configurationprogrammingoptions:1.
Devicescanbeprogrammedin-circuitbyahostmicrocontrollerusingPMBuscommandsoverI2C(seetheUCD90xxxSequencerandSystemHealthControllerPMBusCommandReference).
Eachparameterwritereplacesthedataintheassociatedmemory(RAM)location.
Afteralltherequiredconfigurationdatahasbeensenttothedevice,itistransferredtotheassociatednonvolatilememory(dataflash)byissuingaspecialcommand,STORE_DEFAULT_ALL.
ThismethodishowtheFusionGUInormallyreadsandwritesadeviceconfiguration.
2.
TheFusionGUI(Figure33)cancreateaPMBusorI2CcommandscriptfilethatcanbeusedbytheI2Cmastertoconfigurethedevice.
38Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012Figure33.
FusionGUIPMBusConfigurationScriptExportTool3.
Anotherin-circuitprogrammingoptionisfortheFusionGUItocreateadataflashimagefromtheconfigurationfile(Figure34).
TheconfigurationfilescanbeexportedinIntelHex,SerialVectorFormat(SVF)andS-record.
TheimagefilecanbedownloadedintothedeviceusingI2CorJTAG.
TheFusionGUItoolscanbeusedon-boardiftheFusionGUIcangainownershipofthetargetboardI2Cbus.
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cnFigure34.
FusionGUIDeviceConfigurationExportToolDevicescanbeprogrammedoff-boardusingtheFusionGUItoolsoradedicateddeviceprogrammer.
Forsmallruns,aZIFsocketedboardwithanI2CheadercanbeusedwiththestandardFusionGUIormanufacturingGUI.
TheTIEvaluationModuleforUCD90xxx64-pinSequencerandSystemHealthMonitor(UCD90SEQEVM64-650)canbeusedforthispurpose.
TheFusionGUIcanalsocreateadataflashfilethatcanthenbeloadedintotheUCD90124Ausingadedicateddeviceprogrammer.
ToconfigurethedeviceoverI2CorPMBus,theUCD90124Amustbepowered.
ThePMBusclockanddatapinsmustbeaccessibleandmustbepulledhightothesameVDDsupplythatpowersthedevice,withpullupresistorsbetween1kand2k.
Careshouldbetakentonotintroduceadditionalbuscapacitance(esetthedevice.
ItisnotrequiredtoresetthedeviceimmediatelybutmakenotethattheUCD90124Awillcontinuetooperatebasedonpreviousconfigurationwithfaultloggingdisableduntilreset.
SeeConfigurationProgrammingofUCDDevices,availablefromtheDocumentation&HelpCenterthatcanbeselectedfromtheFusionGUIHelpmenu,fordetails.
JTAGINTERFACETheJTAGportcanbeusedforproductionprogramming.
FourofthesixJTAGpinscanalsobeusedasGPIOsduringnormaloperation.
SeethePinFunctionstableatthebeginningofthedocumentandTable4foralistoftheJTAGsignalsandwhichcanbeusedasGPIOs.
TheJTAGportiscompatiblewiththeIEEEStandard1149.
1-1990,IEEEStandardTest-AccessPortandBoundaryScanArchitecturespecification.
Boundaryscanisnotsupportedonthisdevice.
TheJTAGinterfacecanprovideanalternateinterfaceforprogrammingthedevice.
ItisdisabledbydefaultinordertoenabletheGPIOpinswithwhichitismultiplexed.
TherearetwoconditionsunderwhichtheJTAGinterfaceisenabled:1.
Onpower-upifthedataflashisblank,allowingJTAGtobeusedforwritingtheconfigurationparameterstoaprogrammeddevicewithnoPMBusinteraction2.
Whenaddress126(0x7E)isdetectedatpowerup.
Ashorttogroundoranopenconditiononeitheraddresspinwillcauseanaddress126(0x7E)tobegeneratedwhichenablesJTAGmode.
TheUCD90124Asystemclockrunsat90%ofnominalspeedwhileinJTAGmode.
ForthisreasonitisimportantthattheUCD90124AisnotleftinJTAGmodefornormalapplicationoperation.
TheFusionGUIcancreateSVFfiles(SeeDEVICECONFIGURATIONANDPROGRAMMINGsection)basedonagivendataflashconfigurationwhichcanbeusedtoprogramthedesiredconfigurationbyJTAG.
ForBoundaryScanDescriptionLanguage(BSDL)filethatsupportstheUCD90124Aseetheproductfolderinwww.
ti.
com.
TherearemanyJTAGprogrammersinthemarketandtheyalldonotfunctionthesame.
IfyouplantouseJTAGtoconfigurethedevice,confirmthatyoucanreliablyconfigurethedevicewithyourJTAGtoolsbeforecommitingtoaprogrammingsolution.
Copyright2012,TexasInstrumentsIncorporated41UCD90124AZHCS693–JANUARY2012www.
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cnINTERNALFAULTMANAGEMENTANDMEMORYERRORCORRECTION(ECC)TheUCD90124Averifiesthefirmwarechecksumateachpowerup.
Ifitdoesnotmatch,thenthedevicewaitsforI2Ccommandsbutdoesnotexecutethefirmware.
Adeviceconfigurationchecksumverificationisalsoperformedatpowerup.
Ifitdoesnotmatch,thefactorydefaultconfigurationisloaded.
ThePMBALERT#pinisassertedandaflagissetinthestatusregister.
Theerror-logchecksumvalidatesthecontentsoftheerrorlogtomakesurethatsectionofflashisnotcorrupted.
Thereisaninternalfirmwarewatchdogtimer.
Ifittimesout,thedeviceresetssothatifthefirmwareprogramiscorrupted,thedevicegoesbacktoaknownstate.
Thisisanormaldevicereset,soalloftheGPIOpinsareopen-drainandtheFPWMpinsaredrivenlowwhilethedeviceisinreset.
Checksarealsodoneoneachparameterthatispassed,tomakesureitfallswithintheacceptablerange.
Error-correctingcode(ECC)isusedtoimprovedataintegrityandprovidehigh-reliabilitystorageofDataFlashcontents.
ECCusesdedicatedhardwaretogenerateextracheckbitsfortheuserdataasitiswrittenintotheFlashmemory.
Thisaddsanadditionalsixbitstoeach32-bitmemorywordstoredintotheFlasharray.
Theseextracheckbits,alongwiththehardwareECCalgorithm,allowforanysingle-biterrortobedetectedandcorrectedwhentheDataFlashisread.
42Copyright2012,TexasInstrumentsIncorporatedUCD90124Awww.
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cnZHCS693–JANUARY2012APPLICATIONINFORMATIONFigure35.
TypicalApplicationSchematicNOTEFigure35isasimplifiedapplicationschematic.
VoltagedividerssuchastheonesplacedonVMON1inputhavebeenommitedforsimplifyingtheschematic.
AllVMONxpinswhichareconfiguredtomeasureavoltagethatexceedsthe2.
5VADCreferencearerequiredtohaveavoltagedivider.
Copyright2012,TexasInstrumentsIncorporated43UCD90124AZHCS693–JANUARY2012www.
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cnLayoutguidelinesThethermalpadprovidesathermalandmechanicalinterfacebetweenthedeviceandtheprintedcircuitboard(PCB).
ConnecttheexposedthermalpadofthePCBtothedeviceVSSpinsandprovideatleasta4*4patternofPCBviastoconnectthethermalpadandVSSpinstothecircuitgroundonotherPCBlayers.
Forsupply-voltagedecoupling,providepower-supplypinbypasstothedeviceasfollows:0.
1-μF,X7Rceramicinparallelwith0.
01-μF,X7Rceramicatpin47(BPCAP)0.
1-μF,X7Rceramicinparallelwith4.
7-μF,X5Rceramicatpins44(V33DIO2)and45(V33D)0.
1-μF,X7Rceramicatpin7(V33DIO1)0.
1-μF,X7Rceramicinparallelwith4.
7-μF,X5Rceramicatpin46(V33A)DependingonuseandapplicationofthevariousGPIOsignalsusedasdigitaloutputs,someimpedancecontrolmaybedesiredtoquietfastsignaledges.
Forexample,whenusingtheFPWMpinsforfancontrolorvoltagemargining,thepinisconfiguredasadigitalclocksignal.
Routethesesignalsawayfromsensitiveanalogsignals.
Itisalsogooddesignpracticetoprovideaseriesimpedanceof20Ωto33Ωatthesignalsourcetoslowfastdigitaledges.
EstimatingADCReportingAccuracyTheUCD90124Ausesa12-bitADCandaninternal2.
5-Vreference(VREF)toconvertMONpininputsintodigitallyreportedvoltages.
Theleastsignificantbit(LSB)valueisVLSB=VREF/2NwhereN=12,resultinginaVLSB=610μV.
TheerrorinthereportedvoltageisafunctionoftheADClinearityerrorsandanyvariationsinVREF.
Thetotalunadjustederror(ETUE)fortheUCD90124AADCis±5LSB,andthevariationofVREFis±0.
5%between0°Cand125°Cand±1%between–40°Cand125°C.
VTUEiscalculatedasVLSB*ETUE.
Thetotalreportedvoltageerroristhesumofthereference-voltageerrorandVTUE.
Atlowermonitoredvoltages,VTUEdominatesreportederror,wheereasathighermonitoredvoltages,thetoleranceofVREFdominatesthereportederror.
ReportederrorcanbecalculatedusingEquation3,whereREFTOListhetoleranceofVREF,VACTistheactualvoltagebeingmonitoredattheMONpin,andVREFisthenominalvoltageoftheADCreference.
(3)FromEquation3,fortemperaturesbetween0°Cand125°C,ifVACT=0.
5V,thenRPTERR=1.
11%.
IfVACT=2.
2V,thenRPTERR=0.
64%.
Forthefulloperatingtemperaturerangeof–40°Cto125°C,ifVACT=0.
5V,thenRPTERR=1.
62%.
IfVACT=2.
2V,thenRPTERR=1.
14%.
SPACER44Copyright2012,TexasInstrumentsIncorporatedPACKAGEOPTIONADDENDUMwww.
ti.
com11-Apr-2013Addendum-Page1PACKAGINGINFORMATIONOrderableDeviceStatus(1)PackageTypePackageDrawingPinsPackageQtyEcoPlan(2)Lead/BallFinishMSLPeakTemp(3)OpTemp(°C)Top-SideMarkings(4)SamplesUCD90124ARGCRACTIVEVQFNRGC642000Green(RoHS&noSb/Br)CUNIPDAULevel-3-260C-168HR-40to125UCD90124AUCD90124ARGCTACTIVEVQFNRGC64250Green(RoHS&noSb/Br)CUNIPDAULevel-3-260C-168HR-40to125UCD90124A(1)Themarketingstatusvaluesaredefinedasfollows:ACTIVE:Productdevicerecommendedfornewdesigns.
LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect.
NRND:Notrecommendedfornewdesigns.
Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartinanewdesign.
PREVIEW:Devicehasbeenannouncedbutisnotinproduction.
Samplesmayormaynotbeavailable.
OBSOLETE:TIhasdiscontinuedtheproductionofthedevice.
(2)EcoPlan-Theplannedeco-friendlyclassification:Pb-Free(RoHS),Pb-Free(RoHSExempt),orGreen(RoHS&noSb/Br)-pleasecheckhttp://www.
ti.
com/productcontentforthelatestavailabilityinformationandadditionalproductcontentdetails.
TBD:ThePb-Free/Greenconversionplanhasnotbeendefined.
Pb-Free(RoHS):TI'sterms"Lead-Free"or"Pb-Free"meansemiconductorproductsthatarecompatiblewiththecurrentRoHSrequirementsforall6substances,includingtherequirementthatleadnotexceed0.
1%byweightinhomogeneousmaterials.
Wheredesignedtobesolderedathightemperatures,TIPb-Freeproductsaresuitableforuseinspecifiedlead-freeprocesses.
Pb-Free(RoHSExempt):ThiscomponenthasaRoHSexemptionforeither1)lead-basedflip-chipsolderbumpsusedbetweenthedieandpackage,or2)lead-baseddieadhesiveusedbetweenthedieandleadframe.
ThecomponentisotherwiseconsideredPb-Free(RoHScompatible)asdefinedabove.
Green(RoHS&noSb/Br):TIdefines"Green"tomeanPb-Free(RoHScompatible),andfreeofBromine(Br)andAntimony(Sb)basedflameretardants(BrorSbdonotexceed0.
1%byweightinhomogeneousmaterial)(3)MSL,PeakTemp.
--TheMoistureSensitivityLevelratingaccordingtotheJEDECindustrystandardclassifications,andpeaksoldertemperature.
(4)MultipleTop-SideMarkingswillbeinsideparentheses.
OnlyoneTop-SideMarkingcontainedinparenthesesandseparatedbya"~"willappearonadevice.
IfalineisindentedthenitisacontinuationofthepreviouslineandthetwocombinedrepresenttheentireTop-SideMarkingforthatdevice.
ImportantInformationandDisclaimer:TheinformationprovidedonthispagerepresentsTI'sknowledgeandbeliefasofthedatethatitisprovided.
TIbasesitsknowledgeandbeliefoninformationprovidedbythirdparties,andmakesnorepresentationorwarrantyastotheaccuracyofsuchinformation.
Effortsareunderwaytobetterintegrateinformationfromthirdparties.
TIhastakenandcontinuestotakereasonablestepstoproviderepresentativeandaccurateinformationbutmaynothaveconducteddestructivetestingorchemicalanalysisonincomingmaterialsandchemicals.
TIandTIsuppliersconsidercertaininformationtobeproprietary,andthusCASnumbersandotherlimitedinformationmaynotbeavailableforrelease.
InnoeventshallTI'sliabilityarisingoutofsuchinformationexceedthetotalpurchasepriceoftheTIpart(s)atissueinthisdocumentsoldbyTItoCustomeronanannualbasis.
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客户声明并同意,他们具备制定与实施安全措施所需的全部专业技术和知识,可预见故障的危险后果、监测故障及其后果、降低有可能造成人身伤害的故障的发生机率并采取适当的补救措施.
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