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V10410BITLVDSRECEIVERFORVIDEOGeneralDescriptionTheV10410BitLVDSReceiverforVideoisdesignedtosupportvideodatatransmissionbetweendisplayenginesandvideoprocessingenginesfortelevisionandprojectorapplications.
TheV104supportsuptoWXGAresolutionsforPlasma,RearProjection,FrontProjection,CRTandLCDapplications.
TheV104convertsthe6LVDS(LowVoltageDifferentialSignaling)videodatastreampairsto35CMOS/TTLdatabitswitharisingorfallingedgeclock.
Theclockedgeselectionisperformedusingadedicatedpin.
InconjunctionwiththeV103transmitter,theV104cantransmit10bitspercolor(R,G,B)alongwith5bitsofcontrolandtimingdata(HSYNC,VSYNC,DE,CNTL1,CNTL2)overalowEMI,lowbuswidthconnectionincludingconnectorsandstandardLVDScabling.
FeaturesPin&functioncompatiblewiththeTHC63LVD104AWidepixelclockrange:8-90MHzGuaranteedoperationover-20to+85°Cambienttemperature.
Supportsresolutionsfrom480ptoWXGAInternalPLLdoesnotrequireexternalloopfilterClockedgeselectionforTTLalignmentselectablePowerdownmodeSingle3.
3VsupplyLowpowerconsumptionCMOSdesign64-pinTQFPleadfreepackageBlockDiagramSerialtoParallelPLLCLKOUTTESTRA+/-RB+/-RC+/-RD+/-RE+/-RCLK+/-(8to90MHz)PDOER/FLVDSInputCMOS/TTLInputCMOS/TTLOutputRA6-RA0RB6-RB0RC6-RC0RD6-RD0RE6-RE07777710BITLVDSRECEIVERFORVIDEOV104PinAssignmentPinDescriptionsPinNumberPinNamePinTypePinDescription50,49RA+,RA-LVDSINLVDSDataIn52,51RB+,RB-LVDSINLVDSDataIn55,54RC+,RC-LVDSINLVDSDataIn60,59RD+,RD-LVDSINLVDSDataIn62,61RE+,RE-LVDSINLVDSDataIn57,56RCLK+,RCLK-LVDSINLVDSClockIn40,41,42,43,45,46,47RA6~RA0OUTCMOS/TTLDataOutputs32,33,34,35,36,38,39RB6~RB0OUTCMOS/TTLDataOutputs22,24,25,26,27,28,29RC6~RC0OUTCMOS/TTLDataOutputs14,15,17,18,19,20,21RD6~RD0OUTCMOS/TTLDataOutputs12111210GND39TEST456781615141364-pinTQFP33343536373839404142434445464748PDOERE6RE5RE4R/FVCCRE3RE2RE1RE0RD6RD5GNDRB5171819202122232425262728RD43231302949505152535455565758596061626364RD3RD2RD1RD0RC6VCCRC5RC4RC3RC2RC1RC0GNDCLKOUTRB6RB4RB3RB2VCCRB1RB0RA6RA5RA4RA3GNDRA2RA1RA0VCCRA-RA+RB-RB+LVCCRC-RC+RCLK-RCLK+LGNDRD-RD+RE-RE+PGNDPVCC10BITLVDSRECEIVERFORVIDEOV104**Rxnx=A,B,C,D,En=0,1,2,3,4,5,66,7,8,10,11,12,13RE6~RE0OUTCMOS/TTLDataOutputs.
2TESTINNotused.
TieLOW.
3PDINHIGH:normaloperation;LOW:Powerdown(alloutputsare"L").
4OEINHIGH:Outputenable(normaloperation);LOW:Outputdisable(alloutputsarehighimpedance).
5R/FINOutputClocktriggeringedgeselect.
High:Risingedge;Low:Fallingedge.
9,23,37,48VCCPowerPowersupplypinsforTTLoutputsanddigitalcircuitry.
31CLKOUTOUTClockout.
1,16,30,44GNDGroundGroundpinsforTTLoutputsanddigitalcircuitry.
53LVCCPowerPowersupplypinsforLVDSinputs.
58LGNDGroundGroundpinsforLVDSinputs.
64PVCCPowerPowersupplypinforPLLcircuitry.
63PGNDGroundGroundpinforPLLcircuitry.
PinNumberPinNamePinTypePinDescriptionPDR/FOEDataOutputs(Rxn)CLKOUT000HighimpedanceHighimpedance001All0FixedLow010HighimpedanceHighimpedance011All0FixedLow100HighimpedanceHighimpedance101DataOutLatchesoutputdataonfallingedge110HighimpedanceHighimpedance111DataOutLatchesoutputdataonrisingedge10BITLVDSRECEIVERFORVIDEOV104ExternalComponentsTheV104requiresnoexternalcomponents.
AbsoluteMaximumRatingsStressesabovetheratingslistedbelowcancausepermanentdamagetotheV104.
Theseratings,whicharestandardvaluesforICScommerciallyratedparts,arestressratingsonly.
Functionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthespecificationsisnotimplied.
Exposuretoabsolutemaximumratingconditionsforextendedperiodscanaffectproductreliability.
Electricalparametersareguaranteedonlyovertherecommendedoperatingtemperaturerange.
RecommendedOperationConditionsItemRatingSupplyVoltage,VCC-0.
3Vto+4.
0VCMOS/TTLInputVoltage-0.
3VtoVCC+0.
3VCMOS/TTLOutputVoltage-0.
3VtoVCC+0.
3VLVDSReceiverInputVoltage-0.
3VtoVCC+0.
3VOutputCurrent-30mAto30mAStorageTemperature-55to+125°CJunctionTemperature125°CSolderingTemperature(10seconds)260°CMaximumPowerDissipation@+25°C1.
0WParameterMin.
Typ.
Max.
UnitsAmbientOperatingTemperature-20+85°CPowerSupplyVoltage(measuredinrespecttoGND)+3.
0+3.
6V10BITLVDSRECEIVERFORVIDEOV104ElectricalCharacteristicsVDD=3.
3V±10%,Ambienttemperature-20to+85°CParameterSymbolConditionsMin.
Typ.
Max.
UnitsCMOS/TTLDCSpecificationsInputHighVoltageVIH2.
00VCCVInputLowVoltageVILGND0.
80VOutputHighVoltageVOHIOH=-4mA(data)IOH=-8mA(clock)2.
4VOutputLowVoltageVOLIOH=-4mA(data)IOH=-8mA(clock)0.
4VInputCurrentIINC0V2V100mVDifferentialInputLowThresholdVTLVOC=1.
2V-100mVInputCurrentIINLVIN=2.
4V/0VVIN=3.
6V±20AParameterSymbolConditionsTyp.
Max.
UnitsSupplyCurrentReceiverSupplyCurrent(GrayScalePattern)IRCCGfCLKOUT=90MHzCL=8pF,VCC=3.
3V70mAReceiverSupplyCurrent(CheckerPattern)IRCCWfCLKOUT=90MHzCL=8pF,VCC=3.
3V112mAReceiverPowerDownSupplyCurrentIRCCSPD=L10A10BITLVDSRECEIVERFORVIDEOV104IncrementalPattern(GrayScale)TogglePattern(Checker)CLKOUTRx0Rx1Rx2Rx3Rx4Rx5Rx6X=A,B,C,D,ECLKOUTRx0Rx1Rx2Rx3Rx4Rx5Rx6X=A,B,C,D,E10BITLVDSRECEIVERFORVIDEOV104ThermalCharacteristicsParameterSymbolMin.
Typ.
Max.
UnitsSwitchingCharacteristicsCLKOUTPeriodtRCP11.
1T125.
0nsCLKINHighTimetRCH(T-1)/2nsCLKINLowTimetRCL(T-1)/2nsTTLDataSetuptoCLKOUTtRS4.
5nsTTLDataHoldfromCLKOUTtRH2.
5nsTTLLowtoHighTransitionTimetTLH1.
02.
0nsTTLHightoLowTransitionTimetTHL1.
02.
0nsInputDataPosition0tRIP1-0.
250.
0+0.
25nsInputDataPosition1tRIP0nsInputDataPosition2tRIP6nsInputDataPosition3tRIP5nsInputDataPosition4tRIP4nsInputDataPosition5tRIP3nsInputDataPosition6tRIP2nsPhaseLockLoopSettRPLL10.
0msCLKINPeriodtRCIP11.
1125.
0nsDevice-devicedataoutputskew01.
6nsParameterSymbolConditionsMin.
Typ.
Max.
UnitsThermalResistanceJunctiontoAmbientθJAStillair53°C/WθJA1m/sairflow40°C/WθJA3m/sairflow33°C/WThermalResistanceJunctiontoCaseθJC8°C/W-0.
25tRCIP7tRCIP7+0.
25tRCIP72-0.
25tRCIP72tRCIP72+0.
25tRCIP73-0.
25tRCIP73tRCIP73+0.
25tRCIP74-0.
25tRCIP74tRCIP74+0.
25tRCIP75-0.
25tRCIP75tRCIP75+0.
25tRCIP76-0.
25tRCIP76tRCIP76+0.
25tRCIP710BITLVDSRECEIVERFORVIDEOV104ACTimingDiagramsTTLOutputsCL=8pFTTLOutput20%80%tTLHtTHL20%80%TTLOutputLoadCLKOUT2.
0VRxnx=A,B,C,D,ETTLOutputs2.
0V2.
0V0.
8V0.
8V0.
8V0.
8V2.
0V2.
0VtRCPR/F=LR/F=HtRStRHtRCHtRCLn=0,1,2,3,4,5,6PhaseLockLoopSetTimeVCC3.
0VRCLK+/-CLKOUTPDtRPLL2.
0V2.
0V10BITLVDSRECEIVERFORVIDEOV104Min100secVCC/2VCC/2VCCPVCCLVCCPDRecommendedPDPinCircuitVCCPDPin100kohm0.
1FPowerUpSequenceSequence1Sequence2VCCPVCCLVCCPDGNDVCC3.
0VVCCGNDGND10BITLVDSRECEIVERFORVIDEOV104Rx6Rx5Rx4Rx3Rx2Rx1Rx0Rx6Rx5Rx4Rx3Rx2Rx1Rx+/-RCLK+tRCIPVDIFF=0VVDIFF=0VtRIP1tRIP0tRIP6tRIP5tRIP4tRIP3tRIP2x=A,B,C,D,ELVDSInputsRE3'RE2'RE1'RE0'RE6RE5RE4RE3RE2RE1RE0RE6"RA+/-RCLK+(DifferentialVDIFF=0VVDIFF=0VtRIP1tRIP0tRIP6tRIP5tRIP4tRIP3tRIP2LVDSInputsRD3'RD2'RD1'RD0'RD6RD5RD4RD3RD2RD1RD0RD6"RC3'RC2'RC1'RC0'RC6RC5RC4RC3RC2RC1RC0RC6"RB3'RB2'RB1'RB0'RB6RB5RB4RB3RB2RB1RB0RB6"RA3'RA2'RA1'RA0'RA6RA5RA4RA3RA2RA1RA0RA6"PreviousCycleNextCycleCurrentCycleRB+/-RC+/-RD+/-RE+/-10BITLVDSRECEIVERFORVIDEOV104PackageOutlineandPackageDimensions(64-pinTQFP)PackagedimensionsarekeptcurrentwithJEDECPublicationNo.
95,variationACD.
OrderingInformationPart/OrderNumberMarkingShippingPackagingPackageTemperatureV104YLFV104YLFTray(160unitspertray)64-pinTQFP-20to+85°CV104YLFTV104YLFTapeandReel64-pinTQFP-20to+85°CSYMBOLMIN/MAXN64A--/1.
20A10.
05/0.
15A20.
95/1.
05b0.
17/0.
27c0.
09/0.
20D12.
00BASICD110.
00BASICD27.
50Ref.
E12.
00BASICE110.
00BASICE27.
50Ref.
e0.
50BASICL0.
45/0.
75θ0°/7°ccc--/0.
08D3&E3-ALLDIMENSIONSAREINMILLIMETERS.
CorporateHeadquartersTOYOSUFORESIA,3-2-24Toyosu,Koto-ku,Tokyo135-0061,Japanwww.
renesas.
comContactInformationForfurtherinformationonaproduct,technology,themostup-to-dateversionofadocument,oryournearestsalesoffice,pleasevisit:www.
renesas.
com/contact/TrademarksRenesasandtheRenesaslogoaretrademarksofRenesasElectronicsCorporation.
Alltrademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
IMPORTANTNOTICEANDDISCLAIMERRENESASELECTRONICSCORPORATIONANDITSSUBSIDIARIES("RENESAS")PROVIDESTECHNICALSPECIFICATIONSANDRELIABILITYDATA(INCLUDINGDATASHEETS),DESIGNRESOURCES(INCLUDINGREFERENCEDESIGNS),APPLICATIONOROTHERDESIGNADVICE,WEBTOOLS,SAFETYINFORMATION,ANDOTHERRESOURCES"ASIS"ANDWITHALLFAULTS,ANDDISCLAIMSALLWARRANTIES,EXPRESSORIMPLIED,INCLUDING,WITHOUTLIMITATION,ANYIMPLIEDWARRANTIESOFMERCHANTABILITY,FITNESSFORAPARTICULARPURPOSE,ORNON-INFRINGEMENTOFTHIRDPARTYINTELLECTUALPROPERTYRIGHTS.
TheseresourcesareintendedfordevelopersskilledintheartdesigningwithRenesasproducts.
Youaresolelyresponsiblefor(1)selectingtheappropriateproductsforyourapplication,(2)designing,validating,andtestingyourapplication,and(3)ensuringyourapplicationmeetsapplicablestandards,andanyothersafety,security,orotherrequirements.
Theseresourcesaresubjecttochangewithoutnotice.
RenesasgrantsyoupermissiontousetheseresourcesonlyfordevelopmentofanapplicationthatusesRenesasproducts.
Otherreproductionoruseoftheseresourcesisstrictlyprohibited.
NolicenseisgrantedtoanyotherRenesasintellectualpropertyortoanythirdpartyintellectualproperty.
Renesasdisclaimsresponsibilityfor,andyouwillfullyindemnifyRenesasanditsrepresentativesagainst,anyclaims,damages,costs,losses,orliabilitiesarisingoutofyouruseoftheseresources.
Renesas'productsareprovidedonlysubjecttoRenesas'TermsandConditionsofSaleorotherapplicabletermsagreedtoinwriting.
NouseofanyRenesasresourcesexpandsorotherwisealtersanyapplicablewarrantiesorwarrantydisclaimersfortheseproducts.
(Rev.
1.
0Mar2020)2020RenesasElectronicsCorporation.
Allrightsreserved.
TheV104supportsuptoWXGAresolutionsforPlasma,RearProjection,FrontProjection,CRTandLCDapplications.
TheV104convertsthe6LVDS(LowVoltageDifferentialSignaling)videodatastreampairsto35CMOS/TTLdatabitswitharisingorfallingedgeclock.
Theclockedgeselectionisperformedusingadedicatedpin.
InconjunctionwiththeV103transmitter,theV104cantransmit10bitspercolor(R,G,B)alongwith5bitsofcontrolandtimingdata(HSYNC,VSYNC,DE,CNTL1,CNTL2)overalowEMI,lowbuswidthconnectionincludingconnectorsandstandardLVDScabling.
FeaturesPin&functioncompatiblewiththeTHC63LVD104AWidepixelclockrange:8-90MHzGuaranteedoperationover-20to+85°Cambienttemperature.
Supportsresolutionsfrom480ptoWXGAInternalPLLdoesnotrequireexternalloopfilterClockedgeselectionforTTLalignmentselectablePowerdownmodeSingle3.
3VsupplyLowpowerconsumptionCMOSdesign64-pinTQFPleadfreepackageBlockDiagramSerialtoParallelPLLCLKOUTTESTRA+/-RB+/-RC+/-RD+/-RE+/-RCLK+/-(8to90MHz)PDOER/FLVDSInputCMOS/TTLInputCMOS/TTLOutputRA6-RA0RB6-RB0RC6-RC0RD6-RD0RE6-RE07777710BITLVDSRECEIVERFORVIDEOV104PinAssignmentPinDescriptionsPinNumberPinNamePinTypePinDescription50,49RA+,RA-LVDSINLVDSDataIn52,51RB+,RB-LVDSINLVDSDataIn55,54RC+,RC-LVDSINLVDSDataIn60,59RD+,RD-LVDSINLVDSDataIn62,61RE+,RE-LVDSINLVDSDataIn57,56RCLK+,RCLK-LVDSINLVDSClockIn40,41,42,43,45,46,47RA6~RA0OUTCMOS/TTLDataOutputs32,33,34,35,36,38,39RB6~RB0OUTCMOS/TTLDataOutputs22,24,25,26,27,28,29RC6~RC0OUTCMOS/TTLDataOutputs14,15,17,18,19,20,21RD6~RD0OUTCMOS/TTLDataOutputs12111210GND39TEST456781615141364-pinTQFP33343536373839404142434445464748PDOERE6RE5RE4R/FVCCRE3RE2RE1RE0RD6RD5GNDRB5171819202122232425262728RD43231302949505152535455565758596061626364RD3RD2RD1RD0RC6VCCRC5RC4RC3RC2RC1RC0GNDCLKOUTRB6RB4RB3RB2VCCRB1RB0RA6RA5RA4RA3GNDRA2RA1RA0VCCRA-RA+RB-RB+LVCCRC-RC+RCLK-RCLK+LGNDRD-RD+RE-RE+PGNDPVCC10BITLVDSRECEIVERFORVIDEOV104**Rxnx=A,B,C,D,En=0,1,2,3,4,5,66,7,8,10,11,12,13RE6~RE0OUTCMOS/TTLDataOutputs.
2TESTINNotused.
TieLOW.
3PDINHIGH:normaloperation;LOW:Powerdown(alloutputsare"L").
4OEINHIGH:Outputenable(normaloperation);LOW:Outputdisable(alloutputsarehighimpedance).
5R/FINOutputClocktriggeringedgeselect.
High:Risingedge;Low:Fallingedge.
9,23,37,48VCCPowerPowersupplypinsforTTLoutputsanddigitalcircuitry.
31CLKOUTOUTClockout.
1,16,30,44GNDGroundGroundpinsforTTLoutputsanddigitalcircuitry.
53LVCCPowerPowersupplypinsforLVDSinputs.
58LGNDGroundGroundpinsforLVDSinputs.
64PVCCPowerPowersupplypinforPLLcircuitry.
63PGNDGroundGroundpinforPLLcircuitry.
PinNumberPinNamePinTypePinDescriptionPDR/FOEDataOutputs(Rxn)CLKOUT000HighimpedanceHighimpedance001All0FixedLow010HighimpedanceHighimpedance011All0FixedLow100HighimpedanceHighimpedance101DataOutLatchesoutputdataonfallingedge110HighimpedanceHighimpedance111DataOutLatchesoutputdataonrisingedge10BITLVDSRECEIVERFORVIDEOV104ExternalComponentsTheV104requiresnoexternalcomponents.
AbsoluteMaximumRatingsStressesabovetheratingslistedbelowcancausepermanentdamagetotheV104.
Theseratings,whicharestandardvaluesforICScommerciallyratedparts,arestressratingsonly.
Functionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthespecificationsisnotimplied.
Exposuretoabsolutemaximumratingconditionsforextendedperiodscanaffectproductreliability.
Electricalparametersareguaranteedonlyovertherecommendedoperatingtemperaturerange.
RecommendedOperationConditionsItemRatingSupplyVoltage,VCC-0.
3Vto+4.
0VCMOS/TTLInputVoltage-0.
3VtoVCC+0.
3VCMOS/TTLOutputVoltage-0.
3VtoVCC+0.
3VLVDSReceiverInputVoltage-0.
3VtoVCC+0.
3VOutputCurrent-30mAto30mAStorageTemperature-55to+125°CJunctionTemperature125°CSolderingTemperature(10seconds)260°CMaximumPowerDissipation@+25°C1.
0WParameterMin.
Typ.
Max.
UnitsAmbientOperatingTemperature-20+85°CPowerSupplyVoltage(measuredinrespecttoGND)+3.
0+3.
6V10BITLVDSRECEIVERFORVIDEOV104ElectricalCharacteristicsVDD=3.
3V±10%,Ambienttemperature-20to+85°CParameterSymbolConditionsMin.
Typ.
Max.
UnitsCMOS/TTLDCSpecificationsInputHighVoltageVIH2.
00VCCVInputLowVoltageVILGND0.
80VOutputHighVoltageVOHIOH=-4mA(data)IOH=-8mA(clock)2.
4VOutputLowVoltageVOLIOH=-4mA(data)IOH=-8mA(clock)0.
4VInputCurrentIINC0V
2V-100mVInputCurrentIINLVIN=2.
4V/0VVIN=3.
6V±20AParameterSymbolConditionsTyp.
Max.
UnitsSupplyCurrentReceiverSupplyCurrent(GrayScalePattern)IRCCGfCLKOUT=90MHzCL=8pF,VCC=3.
3V70mAReceiverSupplyCurrent(CheckerPattern)IRCCWfCLKOUT=90MHzCL=8pF,VCC=3.
3V112mAReceiverPowerDownSupplyCurrentIRCCSPD=L10A10BITLVDSRECEIVERFORVIDEOV104IncrementalPattern(GrayScale)TogglePattern(Checker)CLKOUTRx0Rx1Rx2Rx3Rx4Rx5Rx6X=A,B,C,D,ECLKOUTRx0Rx1Rx2Rx3Rx4Rx5Rx6X=A,B,C,D,E10BITLVDSRECEIVERFORVIDEOV104ThermalCharacteristicsParameterSymbolMin.
Typ.
Max.
UnitsSwitchingCharacteristicsCLKOUTPeriodtRCP11.
1T125.
0nsCLKINHighTimetRCH(T-1)/2nsCLKINLowTimetRCL(T-1)/2nsTTLDataSetuptoCLKOUTtRS4.
5nsTTLDataHoldfromCLKOUTtRH2.
5nsTTLLowtoHighTransitionTimetTLH1.
02.
0nsTTLHightoLowTransitionTimetTHL1.
02.
0nsInputDataPosition0tRIP1-0.
250.
0+0.
25nsInputDataPosition1tRIP0nsInputDataPosition2tRIP6nsInputDataPosition3tRIP5nsInputDataPosition4tRIP4nsInputDataPosition5tRIP3nsInputDataPosition6tRIP2nsPhaseLockLoopSettRPLL10.
0msCLKINPeriodtRCIP11.
1125.
0nsDevice-devicedataoutputskew01.
6nsParameterSymbolConditionsMin.
Typ.
Max.
UnitsThermalResistanceJunctiontoAmbientθJAStillair53°C/WθJA1m/sairflow40°C/WθJA3m/sairflow33°C/WThermalResistanceJunctiontoCaseθJC8°C/W-0.
25tRCIP7tRCIP7+0.
25tRCIP72-0.
25tRCIP72tRCIP72+0.
25tRCIP73-0.
25tRCIP73tRCIP73+0.
25tRCIP74-0.
25tRCIP74tRCIP74+0.
25tRCIP75-0.
25tRCIP75tRCIP75+0.
25tRCIP76-0.
25tRCIP76tRCIP76+0.
25tRCIP710BITLVDSRECEIVERFORVIDEOV104ACTimingDiagramsTTLOutputsCL=8pFTTLOutput20%80%tTLHtTHL20%80%TTLOutputLoadCLKOUT2.
0VRxnx=A,B,C,D,ETTLOutputs2.
0V2.
0V0.
8V0.
8V0.
8V0.
8V2.
0V2.
0VtRCPR/F=LR/F=HtRStRHtRCHtRCLn=0,1,2,3,4,5,6PhaseLockLoopSetTimeVCC3.
0VRCLK+/-CLKOUTPDtRPLL2.
0V2.
0V10BITLVDSRECEIVERFORVIDEOV104Min100secVCC/2VCC/2VCCPVCCLVCCPDRecommendedPDPinCircuitVCCPDPin100kohm0.
1FPowerUpSequenceSequence1Sequence2VCCPVCCLVCCPDGNDVCC3.
0VVCCGNDGND10BITLVDSRECEIVERFORVIDEOV104Rx6Rx5Rx4Rx3Rx2Rx1Rx0Rx6Rx5Rx4Rx3Rx2Rx1Rx+/-RCLK+tRCIPVDIFF=0VVDIFF=0VtRIP1tRIP0tRIP6tRIP5tRIP4tRIP3tRIP2x=A,B,C,D,ELVDSInputsRE3'RE2'RE1'RE0'RE6RE5RE4RE3RE2RE1RE0RE6"RA+/-RCLK+(DifferentialVDIFF=0VVDIFF=0VtRIP1tRIP0tRIP6tRIP5tRIP4tRIP3tRIP2LVDSInputsRD3'RD2'RD1'RD0'RD6RD5RD4RD3RD2RD1RD0RD6"RC3'RC2'RC1'RC0'RC6RC5RC4RC3RC2RC1RC0RC6"RB3'RB2'RB1'RB0'RB6RB5RB4RB3RB2RB1RB0RB6"RA3'RA2'RA1'RA0'RA6RA5RA4RA3RA2RA1RA0RA6"PreviousCycleNextCycleCurrentCycleRB+/-RC+/-RD+/-RE+/-10BITLVDSRECEIVERFORVIDEOV104PackageOutlineandPackageDimensions(64-pinTQFP)PackagedimensionsarekeptcurrentwithJEDECPublicationNo.
95,variationACD.
OrderingInformationPart/OrderNumberMarkingShippingPackagingPackageTemperatureV104YLFV104YLFTray(160unitspertray)64-pinTQFP-20to+85°CV104YLFTV104YLFTapeandReel64-pinTQFP-20to+85°CSYMBOLMIN/MAXN64A--/1.
20A10.
05/0.
15A20.
95/1.
05b0.
17/0.
27c0.
09/0.
20D12.
00BASICD110.
00BASICD27.
50Ref.
E12.
00BASICE110.
00BASICE27.
50Ref.
e0.
50BASICL0.
45/0.
75θ0°/7°ccc--/0.
08D3&E3-ALLDIMENSIONSAREINMILLIMETERS.
CorporateHeadquartersTOYOSUFORESIA,3-2-24Toyosu,Koto-ku,Tokyo135-0061,Japanwww.
renesas.
comContactInformationForfurtherinformationonaproduct,technology,themostup-to-dateversionofadocument,oryournearestsalesoffice,pleasevisit:www.
renesas.
com/contact/TrademarksRenesasandtheRenesaslogoaretrademarksofRenesasElectronicsCorporation.
Alltrademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
IMPORTANTNOTICEANDDISCLAIMERRENESASELECTRONICSCORPORATIONANDITSSUBSIDIARIES("RENESAS")PROVIDESTECHNICALSPECIFICATIONSANDRELIABILITYDATA(INCLUDINGDATASHEETS),DESIGNRESOURCES(INCLUDINGREFERENCEDESIGNS),APPLICATIONOROTHERDESIGNADVICE,WEBTOOLS,SAFETYINFORMATION,ANDOTHERRESOURCES"ASIS"ANDWITHALLFAULTS,ANDDISCLAIMSALLWARRANTIES,EXPRESSORIMPLIED,INCLUDING,WITHOUTLIMITATION,ANYIMPLIEDWARRANTIESOFMERCHANTABILITY,FITNESSFORAPARTICULARPURPOSE,ORNON-INFRINGEMENTOFTHIRDPARTYINTELLECTUALPROPERTYRIGHTS.
TheseresourcesareintendedfordevelopersskilledintheartdesigningwithRenesasproducts.
Youaresolelyresponsiblefor(1)selectingtheappropriateproductsforyourapplication,(2)designing,validating,andtestingyourapplication,and(3)ensuringyourapplicationmeetsapplicablestandards,andanyothersafety,security,orotherrequirements.
Theseresourcesaresubjecttochangewithoutnotice.
RenesasgrantsyoupermissiontousetheseresourcesonlyfordevelopmentofanapplicationthatusesRenesasproducts.
Otherreproductionoruseoftheseresourcesisstrictlyprohibited.
NolicenseisgrantedtoanyotherRenesasintellectualpropertyortoanythirdpartyintellectualproperty.
Renesasdisclaimsresponsibilityfor,andyouwillfullyindemnifyRenesasanditsrepresentativesagainst,anyclaims,damages,costs,losses,orliabilitiesarisingoutofyouruseoftheseresources.
Renesas'productsareprovidedonlysubjecttoRenesas'TermsandConditionsofSaleorotherapplicabletermsagreedtoinwriting.
NouseofanyRenesasresourcesexpandsorotherwisealtersanyapplicablewarrantiesorwarrantydisclaimersfortheseproducts.
(Rev.
1.
0Mar2020)2020RenesasElectronicsCorporation.
Allrightsreserved.
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