GPIO10autopatch

TC3567CFSG-0022018-04-0612017-2018ToshibaElectronicDevices&StorageCorporationTC3567CFSG-002BluetoothlowenergyICRev1.
1TheBluetoothwordmarkandlogosareregisteredtrademarksownedbytheBluetoothSIG,Inc.
ARMandCortexareregisteredtrademarksofARMLimited(oritssubsidiaries)intheEUand/orelsewhere.
TC3567CFSG-0022018-04-062Contents1.
GeneralDescription.
41.
1.
ProductConcept41.
2.
Features.
42.
PinFunction.
62.
1.
TC3567CFSGPinAssignment(TopView)62.
2.
PinFunctionDescriptions.
72.
3.
GPIOfunctionlist.
102.
4.
PowerSupplyPins.
123.
SystemConfiguration.
133.
1.
BlockDiagram.
133.
2.
BootSequence.
144.
FunctionalSpecifications.
154.
1.
BluetoothFunction154.
1.
1.
SupportedFunction.
154.
1.
2.
SupportProtocolLayer.
164.
1.
3.
RF.
174.
1.
4.
AutoAdvertiseFunction.
174.
2.
ResetInterface(Powerupsequence)184.
2.
1.
Features.
184.
2.
2.
ConnectionExample.
184.
3.
UARTInterface.
194.
3.
1.
Features.
194.
3.
2.
ConnectionExample.
194.
3.
3.
FrameFormat.
204.
3.
4.
FlowControlFunction.
204.
3.
5.
Baudrate.
214.
3.
6.
TXmessagespacingfunction.
214.
3.
7.
ErrorDetectingFunctions.
224.
3.
8.
HostWakeupFunction.
234.
3.
9.
HCImode.
234.
3.
9.
1.
HCIReset234.
4.
SPIInterface.
244.
4.
1.
Features.
244.
4.
2.
ConnectionExample.
244.
4.
3.
FrameFormat.
254.
5.
I2CInterface.
264.
5.
1.
Features.
264.
5.
2.
ConnectionExample.
264.
5.
3.
SelectionofExternalPull-upResistorValue.
274.
5.
4.
FrameFormat.
284.
6.
PWMInterface.
294.
6.
1.
PulseGenerationFunction.
294.
6.
2.
RhythmFunction(OutputMasking)304.
7.
ADC314.
7.
1.
Features.
314.
7.
2.
Descriptions31TC3567CFSG-0022018-04-0634.
8.
ICReferenceClockInterface324.
8.
1.
Features.
324.
8.
2.
ConnectionExample.
324.
9.
SleepClockInterface.
334.
9.
1.
SleepClockConnectionExample.
335.
ElectricCharacteristics.
345.
1.
AbsoluteMaximumRatings.
345.
2.
OperatingConditions.
355.
3.
DCelectriccharacteristics.
365.
3.
1.
CurrentConsumption(Designvalue)365.
4.
Built-inRegulatorCharacteristics385.
5.
ADCCharacteristics.
385.
6.
RFCharacteristics(Designvalue)395.
7.
ACInterfaceCharacteristics(Designvalue)415.
7.
1.
UARTInterface.
415.
7.
2.
I2CInterface.
425.
7.
2.
1.
NormalMode.
425.
7.
2.
2.
Fastmode.
435.
7.
3.
SPIInterface.
445.
8.
CharacteristicsofFlash-ROMblock.
456.
SystemConfigurationExample.
466.
1.
InHCImode.
466.
2.
InUser-Appmode.
477.
Packageoutline.
487.
1.
OutlinedimensionaldrawingTC3567CFSG(P-VQFN40-0505-0.
40-005/F01)48RESTRICTIONSONPRODUCTUSE.
49TC3567CFSG-0022018-04-0641.
GeneralDescription1.
1.
ProductConceptTC3567CFSG(LateromittedTC3567C.
)arecompliantwith2.
4-GHzwirelesscommunication,BluetoothVer4.
2lowenergy.
RFanalogpartsandbasebanddigitalpartsarebuiltinthem,andTC3567CprovidesBluetoothHCI(HostControlInterface)functionsandBluetoothlowenergyGATTprofilefunctionsdefinedbyBluetoothcorespecifications.
Thebuilt-inflashmemoryforstoringapplicationsenableseasyimplementationofstandaloneapplicationsthatuselow-powerconsumptionBluetoothcommunication.
TheTC3567CcanbeconnectedtoanexternalhostCPUbytheUARTandcontrolledwiththeHCIortheGATT/SMlayercontrolcommand.
1.
2.
FeaturesCompliantwithBluetoothVer4.
2lowenergyBuilt-inBluetoothBasebandCircuitBuilt-inBluetoothRFanalogCircuitTransmissionelectricpower:0dBmReceiversensitivity:-93.
5dBmRSSIaccuracy:±1dB(-90to-10dBm@input)InternalmatchingcircuitBuilt-inARMCortex-M0(13MHzor26MHzoperationfrequencyisabletoselecttorun)Built-inmaskingROMBootprogramHCI/extensionHCIcommandGATT/SMlayercontrolAPI(TCUcommand;ToshibaCommandUnit)APIforhardwarecontrolRetentionSRAM(128KBwith51KBavailablefortheuserarea)Built-inserialNORflashmemory128KB(eachsectorsize:4KB)Writing/Erasingendurance:100,000timesSupportupto4patchprogramloaderfunctionsandautopatchfunctionGeneralPurposeIO(17ports)GeneralPurposeSerialInterfacesSPIinterface(1chassignedtoaGeneralPurposeIO)I2Cinterface(1chassignedtoaGeneralPurposeIO)HostCPUInterfaceUARTinterface(9600bpsto921.
6kbps,1ch-sharedwithGPIOs)SPIinterfaceEmulatordebugcontrolinterfaceSWD(SerialWireDebug)2-wire(1ch)Wake-upInterface(2chassignedtoaGeneralPurposeIO)Wake-upinputfunctionfromsleepanddeepsleepPWMInterface(4chassignedtoGeneralPurposeIOs)ReferenceClockInput(26MHz)Built-inoscillatorforcrystaloscillatorconnectionSleepClockInput(32.
768kHz)Built-inoscillatorforcrystaloscillatorconnectionWorksasStandalone(InUser-Appmode,operatingbystandaloneispossible)SleepandDeepSleepFunctionsTC3567CFSG-0022018-04-065Built-inDCDCconverterandLDOWiderangeofinputpowersupplyvoltagessupported(Bootingpowersupplyvoltage:1.
9to3.
6V,lowbatteryvoltagedetection)Built-ingeneralpurposeADCExternalanaloginputsassignedtoGPIOs(5ch)InternalVDDmonitoring(1ch-connectedinside)RNGfunctionRandomnumbergeneratorbyDRBGandESG(upto256bit)SupportrandomnumbertestforNISTSP800-22andBSIRTCRTCfunctionwhichhasafrequencyaccuracyofSleepclockClock/calendarfunction:YY/MM/DD,hh:mm:ss(24-hourclocksystem),anddayoftheweekAlarmfunction:hh:mm,setthealarmbydayordayoftheweek,andalarm-triggeredinterruptLeapyearfunction(Notsupportedforexceptionhandlinginevery100thyear)AvailableduringSleepandBackupmodesPackage:TC3567CFSG:QFNPackage[40pin,5x5mm,0.
4mmpitch,0.
9mmthickness]TC3567CFSG-0022018-04-0662.
PinFunction2.
1.
TC3567CFSGPinAssignment(TopView)31323334353637383940123456789103029282726252423222120191817161514131211VDDIO1GPIO25RESETXTMODEVPGMVSSRFIORFIOVSSATRTEST1TRTEST2XOINXOOUTVSSXVDDCORE1GPIO2VDDCORE2SWDIOVBATLXVSSDCSLPXOINSLPXOOUTVDDIO2GPIO14GPIO13GPIO10VDDIOFQGPIO9GPIO4GPIO0SWDCLKGPIO15GPIO12GPIO11GPIO5GPIO6GPIO7GPIO8GPIO1GPIO3FIN(VSSD)Figure2-1PinAssignment(TopView)TC3567CFSG-0022018-04-0672.
2.
PinFunctionDescriptionsTable2-1showsattributes,input/outputstatesforoperatingmodesanddescriptionsforpinfunctions.
Table2-4showsdescriptionsaboutpowersupplypins.
Table2-1PinFunctionsPinnamePinNo.
AttributeConditionFunctionaldescriptionVDDcategoryDirectionTypeDefault(duringreset)ResetinterfaceRESETX3VDDIOINSchmitttrigger—Hardwareresetinputpin.
SettingthispintoLowlevelputthesystematresetstate.
ClockinterfaceXOIN11VDDCOREINOSCINReferenceclockinputpin.
Pleaseuseoscillatorwith26MHzandNecessaryforaresetreleaseafterVDDIOstabilizationReferenceclockOscillationVBATPowersupplyOperationstartsSleepclock(incaseofcrystaloscillatorconnection)OscillationSoasnottoVBAT12timeframes1timeframeTC3567CFSG-0022018-04-06224.
3.
7.
ErrorDetectingFunctionsTC3567CUARTinterfacehas3kindsoferrordetectingfunctions.
ReceivertimeouterrorReceiveroverrunerrorReceiverframeerrorReceivertimeouterrordetectionjudgesanerrorifanUARTRXmessagemadefromseveralRXframeshasanRXframeintervallongerthanacertainvalue.
Theintervaliscountedbyinternaltimer.
KeeptheintervalbetweenRXframeslessthan12timeframesthatbelongtoanRXmessage.
ForUART1,keepintervalsbetweendifferentRXmessagesmorethan12timeframes.
Forexample,115200bpshas0.
087msfor1frame,theintervalbetweenRXmessagesshouldbelongerthan0.
087ms*12=1.
04ms.
RXmessagesthathasintervalslessthan12timeframesgivesanerrorbecauseTC3567CseesthemasoneUARTRXmessage.
Intervalofthereceivedframeisthedefaultinthe12timeframe,butitcanbechangedbythecommand.
Figure4-9RXframesandRXmessagesReceiveroverrunerrorjudgesifUARTreceiveframebufferinternalTC3567Cisoverflowed.
Normally,thisoverflowdoesnothappenwhentheflowcontrolmentionedin4.
3.
4isactivatedfordatacommunication.
Receiverframeerrorjudgesiffailingrecognizetheunitframe.
Aframeformationisjudgedasfailurewhenitsstartbitisdetectedandthecorrespondingstopbitisdetectedas"0".
UARTRXdataUARTRXmessageUARTRXmessage12timeframes1timeframeTC3567CFSG-0022018-04-06234.
3.
8.
HostWakeupFunctionTC3567CcanwakesupitshostbeforesendingUARTdatatothehost.
Thisfunctionisdisabledbydefault,butcanbeassignedtoGPIObycommand.
Hostwakeuptimecanbechangedbycommand(10msbydefault).
Figure4-10Hostwakeup4.
3.
9.
HCImodeWhenTC3567CisusedintheHCImode,UARTisthehostinterfacetoreceiveHCIcommands.
TheBluetoothwirelessperformancecanbetestedinHCImodebythemeasurementequipmentwhichconnectstheUARTdirectly.
4.
3.
9.
1.
HCIResetSendsaHCIresetcommandfromthehost,atleast150μsfromthecommandcompleteeventcanbeprocessedthefollowingcommandsuccessfully.
HostwakeupHostwakeuptime(10msbydefault)UARTTXmessageUARTTXdataTC3567CFSG-0022018-04-06244.
4.
SPIInterface4.
4.
1.
FeaturesTC3567ChasthefollowingmainfeaturesforaserialmemoryinterfaceOperationvoltage:1.
8to3.
6VSPIinterfaceChipselect:1chChipselectpolarity:Selectable:High-activeandLow-activeSerialclockmasteroperation:Polarityandphaseareadjustable(4combinationsareselectable)Serialclockfrequency:25Hzto6.
5MHzSerialdatatransfermode:MSB-first,LSB-firstSPIinterfacecanoperateat1.
8to3.
6VdependingonVDDIO,however,cannotoperateatdifferentvoltagefromonesotherinterfacesareoperateat.
4.
4.
2.
ConnectionExampleTC3567CSPIinterfacecanbeconnectedtoserialEEPROMsandserialFlash-ROMsandhas1chipselectport.
Figure4-11showsaconnectionexample,whereaserialFlash-ROMisconnectedtoTC3567CSPIinterface.
Figure4-11ConnectionexampleforserialFlash-ROMusingSPIinterfaceChipselect(SPI-SCS)Serialclock(SPI-SCLK)Writedata(SPI-DOUT)Readdata(SPI-DIN)SerialFlash-ROMTC3567CTC3567CFSG-0022018-04-06254.
4.
3.
FrameFormatWhentheSPIinterfaceisconnectedtoexternalICs,thefirst8bit(X7toX0)specifiestheaddressandreadorwritemode.
ThecommandrecognitioncodetypeandtheaddressbitwidthshouldbedeterminedbytheexternalICinuse.
Formoreinformationindetail,pleaserefertothetechnicaldocumentsfortheexternalIC.
Figure4-12showsanexamplewhere8-bitaddressiswrittenandthen8-bitdataisread.
Figure4-13showsanexamplewhere8-bitaddressiswrittenandthen8-bitdataiswritten.
Figure4-12SPIformat(singlebyteread)Figure4-13SPIformat(singlebytewrite)BitclockX7MSBLSBSerialdata(write)D7D2D0LSBSerialdata(read)ChipselectD1MSBX1X0BitclockX7MSBLSBSerialdata(write)X1X0D7-2D0LSBSerialdata(read)ChipselectD1MSBX1D7D1X0D0MSBX7MSBLSBTC3567CFSG-0022018-04-06264.
5.
I2CInterface4.
5.
1.
FeaturesI2Chasthefollowingmainfeaturesforaserialinterface.
Operationvoltage:1.
8to3.
6VI2CInterfaceOperationmode:I2CbusmasterSerialclockfrequency:Standardmode(Max100kHz),Fastmode(Min100kHztoMax400kHz)Outputmode:Open-drainoutput,CMOSoutputDeviceaddressformat:7-bitaddress(10-bitaddressisnotsupported)I2Cinterfacecanoperateat1.
8to3.
6VdependingonVDDIO,however,cannotoperateatdifferentvoltagefromonesotherinterfacesareoperateat.
4.
5.
2.
ConnectionExampleFigure4-14showsaconnectionexampleofaserialEEPROMusingI2Cbusinterfaceoftheopen-drainmode.
Externalpull-upresistors(Rext)arenecessaryforbothserialclocklineandserialdataline.
Figure4-15showsanotherconnectionexamplewhereI2CbusisintheCMOSoutputmode.
OnlytheserialdatalineneedsRextbecausethislinecanbedrivenbyneitherTC3567CnoraserialEEPROM.
Figure4-14ConnectionexampleforserialEEPROMwithI2C-businterface(Open-drainoutput)Figure4-15ConnectionexampleforserialEEPROMwithI2C-businterface(CMOSoutput)TC3567CSerialclockoutputSerialdatainput/outputSerialEEPROMRextRextVDDIOVDDIOSerialEEPROMTC3567CSerialclockoutputSerialdatainput/outputSerialEEPROMRextVDDIOSerialEEPROMTC3567CFSG-0022018-04-06274.
5.
3.
SelectionofExternalPull-upResistorValueAnexternalpull-upresistorvalueneedstobeselectedbythefollowingequationsincaseofI2Cbusinterface.
Itsmaximumvalueisdefinedbyequation(1),inwhichtrisrisetimeofserialclockanddataandCbisI2Cbuscapacity.
Itsminimumvalueisdefinedbyequation(2),inwhichVDDIOisasupplyvoltageforTC3567C,Vol_maxisthemaximumvalueoflowleveloutputvoltage,andIolisthelowleveloutputcurrent.
Pleasesetthepull-upresistorvaluebetweentheselowerandupperlimits.
brCt*=8473.
0Rext_max(1)ololIVVDDIOmax_ext_minR=(2)TC3567CsupportsI2Cbusstandardmode(Max100kHz)andI2Cbusfastmode(Min100kHztoMax400kHz).
Therisetimetris1000nsforthestandardmodeanditis300nsforthefastmode.
CbcanvarydependingontheICboardandhowitisimplemented.
Table4-3andTable4-4showexampleswhenI2Cbuscapacityis20pF.
Table4-3Externalpull-upresistorvalueforI2Cstandardmode(Cb=20pF)I2CbusfrequencyMax100kHztr[ns]1000Cb[pF]20VDDIO[V]1.
83.
03.
6Vol_max[V]0.
30.
40.
4Iol[mA]124124124Rext_min[kΩ]1.
500.
750.
382.
601.
300.
653.
201.
600.
80Rext_max[kΩ]59.
01Table4-4Externalpull-upresistorvalueforI2Cfastmode(Cb=20pF)I2CbusfrequencyMin100toMax400kHztr[ns]300Cb[pF]20VDDIO[V]1.
83.
03.
6Vol_max[V]0.
30.
40.
4Iol[mA]124124124Rext_min[kΩ]1.
500.
750.
382.
601.
300.
653.
201.
600.
80Rext_max[kΩ]17.
70TC3567CFSG-0022018-04-06284.
5.
4.
FrameFormatForI2Cformat,TC3567Cfirstgeneratesstartcondition.
Then,itsendsdevicerecognitionaddress(7bit:[A6:A0])andthefirstbyteaddress([B7:B0])fortheaccesstarget.
Next,itgoesforreadorwritesequence.
ForI2C,everydataissentasMSBfirst.
Howtospecifythevalueandbyteaddressofthedeviceidentificationaddress,andithasbeendeterminedinaccordancewiththedevicetobeconnected.
Inordertobeconnected,itmustmatchthedevicetobeconnected.
Forreadoperation,TC3567Creturnstotheserialmemoryeitherreceiveacknowledgebit(ACK)orreceivenotacknowledgebit(NACK)everytimeitreceivesonebyte.
Forwriteoperation,TC3567CreceiveseitherACKorNACKfromtheserialmemoryeverytimeitsendsonebyte.
Itcanhandlenotonlyonebytebutalsoseveralbytesinarow.
TC3567Cgeneratesstopconditionwhenithasfinishedallthereadorwriteofdata.
Figure4-16showsanexamplewhereTC3567Creadstwo-bytedata.
Figure4-17showsanexamplewhereTC3567Cwritestwo-bytedata.
Intheseexamples,graytextsandlinesindicatesignalsthataregivenbytheserialmemory.
Forreadoperation,afterhavingreadthefinalbytedata,TC3567CreturnsNACKwithwhichtheserialmemorygetstoknowthecompletionofthereadoperation.
Figure4-16I2Cformat(Serialmemory,read)Figure4-17I2Cformat(Serialmemory,write)SerialclockA6MSBLSBSerialdataStartconditionA0B0WACKACKD7D0LSBMSBB7MSBLSBACKStopconditionD7D0LSBMSBACKSerialclockA6MSBLSBStartconditionA0B0WACKACKA6D7D0LSBMSBA0LSBMSBB7MSBLSBRACKNACStopconditionD7D0LSBMSBACKStartconditionSerialdataTC3567CFSG-0022018-04-06294.
6.
PWMInterfaceTC3567ChasaPWMinterfacethatcanbeusedforLED,buzzercontrol,etc.
ThePWMinterfacehasthefollowingfeatures.
ArbitrarypulsegenerationfunctionItcanselectthesourceclockfrom13MHzand32.
768kHzIthas12-bitclockdivisionsettingupto1/4096:8Hzto16.
384kHz(32.
768kHz),3.
17kHzto6.
5MHz(13MHz)Thepulseoutputcanbemaskedbytheregularpatternwhoseperiodisonesecondwith50msunitwidth(Rhythmfunction).
Itcangenerateaninterruptwhichissynchronizedtotherhythmpatternperiod1s.
ItcanswitchthepulseoutputtoLow/HighactiveItcanadjustthedutycycleofthepulseoutput.
4.
6.
1.
PulseGenerationFunctionFigure4-18showsabriefexplanationofthepulsegeneration.
TC3567Ccanadjustoutputpulsefrequencybychangingitscycle.
Alsoitcanadjuston/offratiobychangingitsduty.
Thecycle(frequency)canbesetfrom8Hzto16.
384kHzfor32.
768kHzclock,andfrom3.
17kHzto6.
5MHzfor13MHzclock.
Thedutycanbesetfrom0%to100%CycleDutyFigure4-18PWMpulsegenerationfunctionTC3567CFSG-0022018-04-06304.
6.
2.
RhythmFunction(OutputMasking)Figure4-19showsthebriefexplanationofPWMrhythmfunction.
Inadditiontotheoneforpulsegeneration,TC3567Chasanothertimerthathas50ms*20=1s(rhythmcounter).
Thattimerhas20-bitregister(patternregister),eachbitcorrespondstotherhythmcounterthatcountsdowninevery50ms.
Whenthepatternregisteriszero,thePWMoutputismaskedtozeroorone.
Usingthisfunction,LEDorbuzzercanbeonwith1speriodicalpattern10150msCycletime1011010119181716151019RhythmCounterPatternRegisterPWMOutput50ms1s(50ms*20)InterruptPWMGenerateNoteIftherhythmpatternsetperiod(50ms)÷pulsecycletime=notanintegral,attheboundaryof0to1,1to0patternregister,Dutyratioofthepulsewillnotbeasset.
PatternRegisterPWMOutputPWMGenerateFigure4-19PWMRhythmFunctionTC3567CFSG-0022018-04-06314.
7.
ADC4.
7.
1.
FeaturesTC3567Chas6chof10-bitADCsforbatterymonitoring,analoginputsfromexternalsensors,forexample.
TheADChasthefollowingfeatures.
5chforanaloginputsNote:AnaloginputsaresharedwithGPIOpins.
1chforVBATvoltagemonitorNote:ThereferenceinputisinternallyconnectedtoVBAT,andtheanaloginputistobuilt-inVDDCORE2output.
Pleasereferto4.
7.
2forhowtocalculatevoltagevalue.
Maximumconversionrate:1MS/s4.
7.
2.
DescriptionsTheADChas10bitsconversionaccuracyandcanworkforinputvoltagesfrom0Vto3.
6V(VBAT).
Ithas6chofanaloginputs,andthech0isconnectedtoVDDCORE2output,andthech1toch5aresharedwithGPIOpins.
Whenabatteryisusedaspowersource,thereferencevoltagecanslideovertimebecausethebatteryisconnectedasreferencevoltage.
Inthatcase,theVDDCORE2outputvoltageconnectedtoch0canbeusedasareferencevoltage.
Theinputvoltagetoch1toch5isconvertedbythereferencevoltageofch0andtheconvertedvalueisusedtocalculateacorrectdigitalvaluebytheCPU.
Thefollowingshowstheconversionmethodoftheinputvoltage.
VoltageAattimeTcanbecalculatedasfollows(1)VDDCORE2outputvoltage(VDDCORE2)onCh0shouldbeconvertedbytheADC.
TheconverteddigitalvalueisX.
(2)TheanalogsignalonCh1isconvertedandtheconverteddigitalvalueisY.
(3)WhentheabsolutevalueoftheanalogsignalonCh1isdefinedasA(V),VDDCORE2(V)/A(V)=X/Y.
So,A(V)=VDDCORE2(V)*Y/XCalculationexample:Supposech0(forex.
VDDCORE2outputis1.
2V)isconvertedto0x0134,andch1(measurementtarget)isconvertedto0x0188,theabsolutevoltageatch1A(V)isgivenby1.
2*0x0188/0x0134=1.
2*392/308=1.
527(V).
Figure4-20showsconceptualofvoltageconversion.
3.
3VVDDCORE2voltageA[V](1)=X(2)=Y[t][V]Time[T]VREFFigure4-20VoltageconversionconceptTheADCconvertsinputsfromchselectedbyregistersettings.
Whenaconversionhasfinished,theCPUdetectsitbytheinterruptorregisterpolling,andthenreturnstheresults.
ThemaximumsamplingratedependsonsoftwareloadontheCPU.
Note:Thenumericalvaluesareexpressedasfollows.
Hexadecimalnumber:0xABCTC3567CFSG-0022018-04-06324.
8.
ICReferenceClockInterface4.
8.
1.
FeaturesTC3567ChasthefollowingfeaturesforICreferenceclockinterface.
Clockfrequency:26MHz(pleaseadjusttheaccuracyto6MHz—-38orless—BlockingPerformance—255octetsDwave:PRBS9Uwave:CW1230-2000MHz-30——dBm2003-2399MHz-35——2484-2997MHz-35——3000M-12.
75GHz-30——IntermodulationPerformance1500packets255octetsf1=-50dBmwithun-modulationf2=-50dBmwithPRBS150,12,19,39-4MHz30.
80—%+4MHzMaximuminputsignallevelPER255octetsPRBS90,12,19,39-10dBm30.
80—%PERReportIntegrityPER255octetsPRBS90,12,19,39-30dBm505065.
4%Note:C/IcharacteristicandblockingcharacteristichasthereliefspecsofthelogoattestationtestofBluetoothmaybeapplied.
TheblockingcharacteristicmeasuresDwaveas12ch.
TC3567CFSG-0022018-04-06415.
7.
ACInterfaceCharacteristics(Designvalue)5.
7.
1.
UARTInterfaceTable5-10UARTInterfaceACcharacteristicsSymbolsItemsMinTyp.
MaxUnittCLDTDLYTransmitDataONfromCTSXLowlevel192——nstCHDTDLYTransmitDataOFFfromCTSXHighlevel——2bytetRLDTDLYReceivedDataONfromRTSXLowlevel0——nstRHDTDLYReceivedDataOFFfromRTSXHighlevel——8byteCTSXTXDtCLDTDLYSTARTBIT0BIT1BIT2BIT3BIT4BIT5BIT6BIT7STOPtCHDTDLYtTXDIVRTSXRXDtRLDTDLYSTARTBIT0BIT1BIT2BIT3BIT4BIT5BIT6BIT7STOPtRHDTDLYtRXDIVFigure5-1UARTInterfaceTimingDiagramTC3567CFSG-0022018-04-06425.
7.
2.
I2CInterface5.
7.
2.
1.
NormalModeTable5-11I2CInterfaceNormalmodeACCharacteristicsSymbolsItemsMinTyp.
MaxUnittDATSDataset-uptime250——nstDATHDataholdtime300——nstDATVDDatavalidityperiod——3450nstACKVDACKvalidityperiod——3450nstSTASRestartconditionset-uptime4700——nstSTAHRestartconditionholdtime4000——nstSTOSStopconditionset-uptime4000——nstBUFBusopenperiodfromstopconditiontostartcondition4700——nstrRiseuptime——1000nstfFalldowntime——300nstHIGHSerialclockperiodofHigh4000——nstLOWSerialclockperiodofLow4700——nsCbBusloadcapacitance——400pF70%30%70%30%tftLOWtHIGHtDATVDtDATHtDATS1/fSCL70%30%70%30%tACKVDtSTOStBUFtSTAHSSrPS1stclocktrtftr2ndclock3rdclock9thclock9thclockSDASCLS:STARTconditionSr:RepeatedSTARTConditionP:STOPconditiontSTAHtSTASSCLSDAFigure5-2I2CInterfaceNormalmodeTimingdiagramTC3567CFSG-0022018-04-06435.
7.
2.
2.
FastmodeTable5-12I2CInterfaceFastmodeACCharacteristicsSymbolsItemsMinTyp.
MaxUnittDATSDataset-uptime100——nstDATHDataholdtime300——nstDATVDDatavalidityperiod——900nstACKVDACKvalidityperiod——900nstSTASRestartconditionset-uptime600——nstSTAHRestartconditionholdtime600——nstSTOSStopconditionset-uptime600——nstBUFBusopenperiodfromstopconditiontostartcondition1300——nstrRiseuptime20+0.
1Cb—300nstfFalldowntime20+0.
1Cb—300nstSPSpikepulsewidththatcanberemoved0—50nstHIGHSerialclockperiodofHigh—1423—nstLOWSerialclockperiodofLow—1423—nsCbBusloadcapacitance——400pF70%30%70%30%tftLOWtHIGHtDATVDtDATHtDATS1/fSCL70%30%70%30%tSPtACKVDtSTOStBUFtSTAHSSrPS1stclocktrtftr2ndclock3rdclock9thclock9thclockSDASCLS:STARTconditionSr:RepeatedSTARTConditionP:STOPconditiontSTAHtSTASSDASCLFigure5-3I2CInterfaceFastmodeTimingdiagramTC3567CFSG-0022018-04-06445.
7.
3.
SPIInterfaceTable5-13SPIInterfaceSymbolsItemsMinTyp.
MaxUnittSPICLKCYCSPIclockcycle154——nstSPICLKHPWSPIclockhighpulsewidth77——nstSPICLKLPWSPIclocklowpulsewidth77——nstSPICSSSPIchipselectsetuptime38——nstSPICSHSPIchipselectholdtime77——nstSPIIWSPItransferidlepulsewidth54——nstSPIASSPIaddresssetuptime38——nstSPIAHSPIaddressholdtime77——nstSPIDSSPIdatasetuptime38——nstSPIDHSPIdataholdtime77——nsNote:SPIInterfaceoperatesonthebasisof1/nfrequencyofhalfthefrequencyofARMCortex-M0coreclock(6.
5MHzfor13MHzcoreclock)Figure5-4SPIInterfacetimingdiagramSCLKtSPICSStSPIAStSPIAHA7tSPICSHA6A5A4WRA0D15D14D1D0A7A6SCSDOUTWritetSPICLKHPWtSPICLKLPWtSPIDStSPIDHtSPIIWSCLKtSPICSStSPIAStSPIAHA7tSPICSHA6A5A4WRA0D15A7A6SCSDINReadtSPICLKHPWtSPICLKLPWtSPIDStSPIDHtSPIIWtSPICLKCYCtSPICLKCYCD14D0D1TC3567CFSG-0022018-04-06455.
8.
CharacteristicsofFlash-ROMblockTable5-14CharacteristicsofFlash-ROMblock(VBAT=1.
9to3.
6V,VSSA=VSSRFIO=VSSDC=VSSD=VSSX=0V)ItemSymbolConditionRatingsUnitMinTyp.
MaxNumberoftimesoferaseandprogram—Ta=25°C105——timesTC3567CFSG-0022018-04-06466.
SystemConfigurationExampleAnexampleofsystemconfigurationisshowninthefollowingfigures.
6.
1.
InHCImodeHostinterface=UARTand26MHzReferenceClock=XOSCConnection.
XOSC(32.
768kHz)ofthedottedlineenclosureisunnecessarywhentheexternalinput(HOSTcommonuse)ischosen.
GPIOandSWDofconnectionistheconnectionexampleofwhennotinuse.
Figure6-1ExampleofTC3567CFSGsystemconfiguration(HCImode)VDD1F0.
1F18VBAT1VDDIO119LX14VDDCORE115VDDCORE24TMODE5VPGM13VSSX20VSSDCFINVSSD7RFIO6VSSRFIO8VSSATRTEST110TRTEST226GPIO1030GPIO329GPIO428GPIO935GPIO1134GPIO1225GPIO132GPIO25393821SLPXOIN22SLPXOOUT12XOOUT11XOIN26.
000MHz23X241X132.
768kHz2X21X1ANTCoaxialConnecterVDDBAT_1211F10H265431MLZ1608N100LT27VDDIOFQ0.
1F23VDDIO2VDDGPIO7GPIO824GPIO14940GPIO116GPIO21kΩ1kΩUART_RXUART_TXWakeup0RESETX32SWDCLK17SWDIO31GPIO03736GPIO53RESETXGPIO6Wakeup133GPIO15VDDDebugconnectorUART1-TXUART1-RXVDDTC3567CFSG-0022018-04-06476.
2.
InUser-AppmodeXOSC(32.
768kHz)ofthedottedlineenclosureisunnecessarywhentheexternalinput(HOSTcommonuse)ischosen.
GPIOandSWDofconnectionistheconnectionexampleofwhennotinuse.
VDD1F0.
1F18VBAT1VDDIO119LX14VDDCORE115VDDCORE24TMODE5VPGM13VSSX20VSSDCFINVSSD7RFIO6VSSRFIO8VSSATRTEST110TRTEST221SLPXOIN22SLPXOOUT12XOOUT11XOIN26.
000MHz23X241X132.
768kHz2X21X1ANTCoaxialConnecterVDDBAT_1211F10H265431MLZ1608N100LT27VDDIOFQ0.
1F23VDDIO2VDD931GPIO03RESETX33GPIO15VDDSW26GPIO1030GPIO329GPIO428GPIO935GPIO1134GPIO1232SWDCLK17SWDIO25GPIO132GPIO253938GPIO7GPIO824GPIO1440GPIO116GPIO23736GPIO5GPIO61kΩVDDUART1-TXUART1-RXDebugconnectorVDD1kΩFigure6-2ExampleofTC3567CFSGsystemconfiguration(User-Appmode)TC3567CFSG-0022018-04-06487.
Packageoutline7.
1.
OutlinedimensionaldrawingTC3567CFSG(P-VQFN40-0505-0.
40-005/F01)Figure7-1Packageoutline(P-VQFN40-0505-0.
40-005/F01)Unit:mmWeight:0.
068g(Typ.
)TC3567CFSG-0022018-04-0649RESTRICTIONSONPRODUCTUSEToshibaCorporationanditssubsidiariesandaffiliatesarecollectivelyreferredtoas"TOSHIBA".
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